Beruflich Dokumente
Kultur Dokumente
Bipolar Transistor
-BiasingProfessor Dino Isa
BSEE (Hons), PhD
Professor of Intelligent System
Department of Electrical and Electronic
Engineering
is forward biased. The depletion region has been reduced in width due to the applied
forward bias, resulting in a heavy flow of majority carriers from the p to the n type material.
is reversed biased. The depletion region has been increased in width. No majority
carrier current flows across the reversed biased junction but all the majority carriers which
manage to get into the base through thermal excitation will cross the reversed biased CB
junction because in the base these majority carriers coming from the emitter are actually
minority carriers.
Majority carrier current from the emitter cross the forward bias eb junction and find
themselves in the n type base where they become minority carriers.
Since most minority carriers will cross a reversed biased p-n junction, most of the holes
generated in the emitter will find themselves in the collector, hence,
;
Or more accurately,
!
Where
Class Example
For the bipolar transistor below, indicate, using arrows of different sizes the direction of
majority and minority current flow, reflecting the magnitudes of those currents. Also
indicate the direction of the flow for currents in the external circuit.
Pnp transistor rigged to measure the output common base characteristics (next page)
For each hole that recombines with an electron in the base (base loses one electron), a hole
leaves the base (electron enters base).
1. For the circuit above, increase starting from 0 volts (going more negative) as
increases, ie the CB junction becomes more reverse biased, also increases. When
is big enough, 1
and
!
. This is because only a very small portion of
the emmiter current is able to enter the collector region at low values of reversed
biased voltages 0
.
2. Once reaches a value large enough to ensure that almost all carriers enter the
collector, the curves more or less levels off. In the active region, therefore, is very
close to 1 and is essentially constant.
3. When the EB junction is open and no emitter flows, no minority carrier is injected
into the base. Under these conditions only a very small "leakage" current flows, we
call this current
$ .
Origin of $ .
10
11
12
& !
'
Where
' !
'
$
!
(
)*+,-./0
$).1,-./0
13
Typical values of voltage amplification for the common base configuration vary from 50 to
300. The current amplification (
is always less than 1 for the common base
configuration. This latter characteristics should be obvious since
!
and
The base amplifying action was produced by transferring a current
from a low to a high
resistance circuit. The combination of the two terms results in the label transistor;
Transfer + Resistor 2 transistor
ACTIVE:
REVERSE BIAS 2 43
14
In the active region, the collector junction is reversed biased, while the emitter junction is
forward biased.
Current Convention
!
15
Input resistance looking from e to b is small due to the forward biased junction.
Output resistance looking from c to b is large due to the reverse biased junction.
! 65 !
5
Assume
7889:
78
! 10;<
!1
=
!
!
>
> ! 10;<
! 10;<5000
! 50 3ABCD
= AC AMPLIFICATION !
E
5
F8
7889
! 250
16
Previously;
!
(1)
!
H:I
$ HJK
(Coming from Base. Akin to
L (reverse
From
=
!
J
J
, or
$
J)*+
J
where
! 0.9 2 0.99
(2)
$
14
14
$
NO PQRR SC TBAUVSW TRA; PABB PCAR
14
17
[ !
[
1
!
14
14 [
14
Define ; \] ! ^
J
= In terms of ^, ! \]
J,
\]
2 ^
J,
\]
! ^
[
Neglegating
[
^
18
output voltage
^
J
J
where and are collector and base current of a particular operating point in the
(
and
We get ^ !
\]
or
!
!
(
and using
!
,
`
`a\
Common emitter characteristics can be derived from common base characteristics and vice
versa.
19
20
Why is
$ small? The eb depletion region is bigger then when the eb junction was forward
biased. (See diode @ no bias)
21
BUT
and
To keep
reversed biased,
22
Input Characteristics
Output Characteristics
23
What the
diagram
shows
If
24
that means,
.
The purpose of biasing a transistor amplifier is to set a dc output level somewhere in the
middle of the total range of output voltages so that an ac waveform can be superimposed
on it and results in an undistorted and amplified ac output signal.
An ac input current causes the output voltage to vary and below the bias voltage.
25
1. Assume
is forward biased at 0.65V. The 0.03V
variation of
causes
to vary between 0.62V and
0.68V.
2. The variation in
variation?
causes a variation in
. What is this
which causes
26
Input Graph
Output Graph
The base emitter voltage varies from 0.62 to 0.68V as L varies b 0.03V about the bias
voltage of ! 0.65V. This input voltage variation causes
to vary between 20c<
and 40c<.
27
As the base current varies between 20 and 40c<. The collector emitter voltage varies
between 6V and 12V and
varies between 2mA and 4mA.
Recall that the DC load line is a plot of all combinations of
and for a specific set of ?
and ? .
4 ? 4 ! 0
4 ? 4 ! 0
1) 18 4 0 4 ! 0 = ! 18 ! 0
2) ? ! = !
6
! 6 @ ! 0
28
Find the value of ?g so that > will have maximum symmetrical swing.
ANS: For maximum symmetrical swing, !
(
2 ! 6
4 !
?
!
^
?
! 29.7c<
4 ?g
4 ! 0
= ?g ! 178.5i
29
COMMON EMMITER;
)*l
k
)*l
)*l
)*l
!
30
ASSUMING 0 , FIND ,
!
?7
! 2
?\ ?m7
1.3
!
! 0.867;<
? 1.5i
! 4 ? ! 13.33
31
! !
?7
3.9i
22
! 2
!
39 3.9i
?\ ?7
? !
p !
?\ ?7
! 3.55i
?\ ?7
4
2 4 0.7
!
! 6.05c<
? ^ 1
? 3.55i 1411.5i
! ^
! 1406.05c<
! 0.85;<
! 4
? ?
! 12.2
0.7
! ?:L
Almost the same because we picked ?7 small compared to ?:L qr therefore the
assumption that
0 is valid
4
? ^ 1
?
!
!
^
!
^ 1
32
? !
1(
1
?\ (?7
?\ ?7
?\ ?7
!
?7
?\ ?7
33
[ !
?7
?\ ?7
34
1.
2.
Calculate ?Ns,
?Ns ! 2i 3i ! 5i
3.
[ ! 4
[ ! 2;< t 2i ! 4
= [ /,/ ! 8
35
! 0.7
22 4 0.7
! 0.546;<
39i
1.
Assume 0
77tu.v
uvau.v
! 2 vollts at B
= cannot be 2
=
0 not valid
36
2.
22 4 10000
4 ! 0
22 4 10000
4 ! 0
3.
22 ! 39000 w 4 0.7 ! 0
4.
! w 4 ww
ww x
J {8.u||9:
J {`J
8.y]8
u.vz
! 0.179;<
! 3.66;<
= 22 4
10000
!
! 22 4 36.6
37
!
77]8.y
uv888
! 0.5;<
! 0.7
! ^
! 1000.54;<
! 5.4;<
22 4
? !
! 22 4 5.4
10000
! 22 4 54 !
38
is changed to
ALGEBRATICLY
GRAPHICALLY
1)
2)
3) Calculate
, : know
: can
determine value of
Changing
does not have any effect on the slope of the load line
39
4
\ ? 4
? 4 4
? ! 0
But
\ !
!
! ^ 1
= U W C 4 ^ 1
? 4
? 4 4 ^ 1
? ! 0
!
4
\ ? 4 4
? ! 0
Assume
\
4
? ^ 1
? ?
! 4 ? ?
40
Find ,
10 4 2i
4 ! 0
But
! ^
! 10020c<
! 2;<
10 4 20002;<
4 ! 0
4 ! 410 4
! 6 }~N
41
@q ! 0
[ ! 5
@q ! 5
F]
! \88z
F]8.y
.u
! ^ ! 5043c<
! 2.15;<
5 4 2.151000
4 ! 0
! 5 4 2.15
! 2.85
! [
42
^ ! 100
! 4.3;<
! 5 4 4.3
! 0.7
! [
CP CP
43
= 5 4 1000100
4 100000
4 0.7 ! 0
5 4 100000
4 100000
4 0.7 ! 0
5 4 200000
4 0.7 ! }
!
4.3
! 21.5c< ,
! 10021.5c<
200000
! 2.15;<
= ! 5 4 10002.15;<
! 2.85
44
Find [ , Assume :
5 4
1000
4 4
1000
! 0
5 4
: 20000
4
: 10000
! 0
5 4
: 20000
4 4
1000
! 0
Calculate
Find ,
then calculate
45
Calculate the dc bias current and voltage for the circuit above.
!
4
? ^ 1
? ?
! ^ 1
!
! 4
? ?
46
!
? ^ 1
? ?
! ^
! 4
?
47
Find
? w
43i
10
! 8.11
!
?w ?
43i 10i
! ! 8.11 0.7 ! 8.81
!
4 10 4 8.81
!
! 0.595;<
?
2i
!
? ! 0.595;<
6.2i
! 3.69
48
Progress Test 2
49
^g ! 100;
! g 1
;
! ^g ;
? 0.7 ? !
? 0.7 ^g ? !
? ^g ?
! 4 0.7
!
!
4 0.7
? ^g ?
^g 4 0.7
? ^g ?
50
(1)
(2)
? ^g ? !
^g 4 0.7
? 100 t 2200 !
? 220i !
10015 4 0.7
4;<
1430
t 10u
4
? 220i ! 358i
? ! 138i
(a)
(b)
(c)
!
?\
t
?\ ?7
? !
(3)
51
?\ ?7
?\ ?7
(4)
4
? 4 0.7 4
? ! 0
!
? 0.7 ^g
?
4 0.7 ! ? ^g ? ! ? ^g ?
!
!
4 0.7
? ^g ?
(5)
^g 4 0.7
? ^g ?
(6)
Equation (6) is an equation with two unknowns: and ? . Analysing the denominator of
the equation (6) we note that if ? is kept small compared to the product ^g ? then
the ^g s in the numerator and denominator will cancel if we can ignore ? . As a general rule
of thumb, keeping ? no greater than ten times ? will give good bias stability over a wide
range of ^g values. ? cannot be lowered to zero since the internal impendence of the
battery is zero, and thus any AC source that is capacitor-coupled into the transistor stage
will be shorted out. We will continue the example using ? ! 22. Now we can solve eqn.
(6) for ? .
Given ! 10.4 and ? ! 22 , we can now solve equation (3) and (4) for ?\
!
?\
t
?\ ?7
And ?7 . ?\ ?7 ! ?\
! ?\
?\ ?7 ! 1.45?\
0.45?\ ! ?7
52
\F
\8.
! 1.45?\
?\ ?7
! ? ! 22
?\ ?7
?\ ?7
! ? ! 22i
?\ ?7
?\ t 0.45?\
! 22i
?\ 0.45?\
0.45?\7
! 22i
1.45?\
0.310?\ ! 22i
?\ ! 70.9i use 68
^g 4 0.7
? ^g ?
!
(6)
^g 10.4 4 0.7
22i 2200
3.7 mA
4.0 mA
4.2 mA
4.3 mA
' =0.6 mA
^g
50
100
200
300
Looking at the partial circuit shown in Figure 2c; we can see that our goal is to keep the
product of the collector (emitter) current and the emitter resistor constant. This voltage is
8.8 volts for
= 4 mA. Note that the 0.7V base-emitter voltage is essentially constant. If we
can keep the voltage drop due to IB RB as small as possible by keeping RB small (since we
have no control over IB); then it becomes obvious that the emitter resistor voltage drop is
essentially set by the VB battery voltage minus the base-emitter voltage.
53
! 4 6 ?
6 !
! 1 ^
54
! ? 0.6 ?
For example, increasing increases IRC (B) but this in turn lowers the collector voltage VC (A)
and hence reduces IB (C) which in turn acts to reduce the increase in IC.
55
Example Sheet 3a
Base Bias
Find , and
12 4
390i
! 0
!
\7]8.y
uv8z
! 28.97c<
! ^
! 150 t 28.97c<
! 4.34;<
12 4 ? 4 ! 0
! 12 4 4.34;< t 1.5i
! 5.49
56
422 4
680i
4 40.7
! 0
4
!
77]8.y
|8z
! 431c< (the minus sign means the direction of
is opposite to that shown in the
diagram)
! ^
! 12031c<
! 3.75;<
422 4
3.3i
4 ! 0
]77]
uu88
u.yF
! \888
! 49.62
57
in terms of
58
and
Small Signal
ac analysis:
1)
2)
& model
59
Vq ! V , V[ ! V
Capacitor u shots out ?
? connected between emitter and collector
q input impedance
[ output impedance
,
5
60
voltage gain
Equivalent Circuits
Equivalent Circuits for transistor use transistor model which replace the transistor symbols
in the circuit under analysis. This is done so that the network can be simplified and analyzed
using basic methods of ac circuit analysis (mesh, node, Thevenin & Norton equivalents). Two
types of transistor models will be considered;
(2) & or
(b)
Ebers - moll
61
62
Common Emitter
(1)
(2)
Assume
to be very
small at operating
frequency
63
Capacitors
Time domain
V!P
3 !
3 C
!
!
Frequency Domain
3
C
!
1
VC
UP
1
!
UP
1
VC 3C[
Impedance of a capacitor
1
VC
U 2 radian frequency
As U ,
1
3C
! VC
]
C is chosen to have
'
'
small at the
frequency of application
64
2 Port Theory
Any 2 port network can be represented with voltage and current sources in series and in
parallel with resistors, respectively. The transistor has an input port and an output port,
hence it is a two port network.
65
Combining Circuits;
The key is to match the general two port h parameter to the equivalent parameter
associated with transistor characteristics.
Replacing
O\\
O\7
O7\
O77
with
with
with
with
Oq
O[
Input resistance
Reverse transfer voltage ratio
Forward transfer current ratio
Output conductance
Conductance !
66
6LJL:K
is input current q
is output current
[
& is input voltage q
67
68
O and O[
Remembering that,
Reverse transfer voltage
O ! O\7 ratio
1. We can see that O\7 or O will be small (the "feedback" term from output to input)
(ignore resistance in series means to short circuit id)
2. 1(O is normally large enough to be ignored. (Ignore resistance in parallel means to
8
open circuit it)
69
q !
q ! Oq&
8 ! ! O&
70
! O&
! O&
O& ! ^
O& ! ^
71
O !
O !
O ! 1
O ! 1
72
Example
Common Emitter Fixed Bias Configuration (1 bias resistor on base)
= q ! ? ||Oq&
[ ( output impedance found at [ ! 0 ) ! ?
73
(Since if q ! 0,Oq&
! 0)
Vq ! 0, V ! 0 and
,
<q !
5
J,
J5
Where
[ ! O&
1) Assume ? Oq&
= ! q
q ? Oq&
= <q ! O& ! ^
And [ ! 4 [ ?
= [ ! 4O& q ?
But q !
= [ !
= < !
5
]
5
q ?
] g
5
74
(1)
But
(2)
75
Example
Find
76
q ! ? ||Oq&
< !
Oq& ! 1300
4O&
? ! 4230.77
Oq&
<q !
$ ! ? ! 3i
77
[
(
! O& ! 100
q
Given (from a datasheet) Oq& ! 1i, O& ! 10] , O& ! 100, O& ! 12cV ; SD
At node C,
By definition,
<q !
! O& V 4 V>
At node \ ,
V
= <q ! >(V
V>
V>
!
VJK V
!
!
Where from 4
V 4 V> ! 0 ; V ! V> 4 2
V> !
$&
1(
O$&
O& V
1(
?
>
OA
1(
O$& O& V
!
? O$& 1
(O
$&
! >
O&
V>
4
! V> ?> ;
O$& O$&
O&
V ! V> ?> 1(O 4 4
$&
O$&
78
O&
1 O$& ?>
100
1 12 t 10]|
t 2 t 10u
! 97.7
?>
<q ! q E !
.1
aq
q
! O&
Compared to
! 100
Previously
found
O&
! 97.7
1 O$& ?>
79
DC network
AC network
Step (1)
80
(3)
(4)
But
And
Where
81
And
But
And
Also,
(current division)
Need
82
Step (2)
Step (2);
Step (3)
If
then
(Current division)
83
q ! ? ||Oq&
[ ! ?
4
? ! [ ! 4
[ ?
,
5
84
Since $ ! 4 [ ?
And [ ! ! O&
And ! q ,
= [ ! 4O&
q ? , but
q !
!
= < !
<q !
4O& q ?
Oq&
$ 4O&
!
?
q
Oq&
[
! O&
q
q
(O
q&
Voltage gain
Current gain
85
Case 2
Cannot assume
q
[ ! 4O&
?
q !
Oq&
[ 4O&
!
?
\
Oq&
Same as before
(logical because ? is in parallel with Oq& )
<q !
J,
J5
J
J5
Current division!
?
O&
q
? Oq&
!
q
<q ! O&
?
? Oq&
86
q ! ? ||
[ ! ?
87
[ ! 4
[ ?
! 4
?
! 4O&
?
!
] 5
? since ! 5
4O& ?
[
! < !
q
= !
q
! Oq& 1 O& ?
= < !
! 6
=
But
6
a
4O& ?
[ 4O& ?
!
!
q
Oq& 1 O& ?
q by current division
?
!
q ?
J,
J5
! <q !
= <q !
J
J5
YBDA, [ ! O& !
O& ?
?
88
89
Progress Test 3
1) q
2) $
3) <
4) <q
5) Dc load line
6) Dc analysis
90
The
model
Input characteristics
91
92
Substitute & for the Diode between E and B . . . and get the & model
93
(1)
(2)
is determined by setting
(open circuit current source) for both cases.
94
95
As
increases,
(sometimes called
in
datasheets)
96
very big)
97
!
= & !
2 4 0.7
! 1.3;<
1i
26;
! 20
1.3;<
q ! ? |& ! 1 | 20 ! 19.61
[ ! ? ! 5i
< !
5iI 5iI 5i
[
( !
!
!
! 250
q
& &
& &
20
4
4
4
& ?
<q ! $(
!
!
!
?
q
q
& ? &
R& ?
4?
! 40.98
R& ?
q t ?
!
&
? &
q !
J 6 a
6
98
Draw the & ac equivalent circuit of the CB amplifier above, and find
< and <q . Assume N ! 1; (very big) but show it in the equivalent
circuit. Use
!
& relationship.
99
< !
[
(
q
<q !
V
(V !
&
q ! 4V& &
Or,
[ ! 4V[ ?
<q !
= [ ! 4V[ ? ! 4V ?
= < !
V[
V
V
(V ! [(V t &(V
q
&
q
V
V& & ?
?
!
[ 4V ? 4 V& ? ?
!
!
q
4V& &
4V& &
&
V& ?
V& & ?
?
& ?
<q !
100
?
!
?
Example
[ ! 50i
101
!
8.2i
22
?7
!
! 2.81
?\ ?7
56i 8.2i
!
2.11
(? !
! 1.41;<
1.5i
& !
26;
! 18.44
102
[ 2
q ! ?\ |?7 |^& ! 1.35i
[ ! ? ! 6.8
<
[ 4
?
!
!
@[ !
q
^&
!
4^
? 4?
!
^R&
&
<q @[ !
<q !
J
$
(
! -w ||-
q
J
-w ||-
^
!
?\ ||?7 ^&
?\ ||?7
^?\ ||?7
?\ ||?7 ^&
907.15
! 73.04
7.15 1.66
?\ ||?7
!
?\ ||?7 ^&
= q !
103
?\ ||?7
[ ! 50i
q ! ?\ |?7 |^& ! 1.35i
Summary of calculations:
[ ! ? ||[ ! 5.98i
ac
parameter
< @ [ ! 50i
4? ||[
< !
! 4324.3
&
<
<q @ [ ! 50i ,
<q ! [(
!
q
<q
[
?
^
R$
[ ?
^R[
R[ ?
?\ ||?7
?\ ||?7 ^R&
8 ! 50i
6.8K
5.98K
1.35K
1.35K
-368.76
-324.3
73.04
64.3
? ||? ^R&
\ 7
?\ ||?7
8 !
?\ ||?7
?\ ||?7 ^R&
! 64.3
104
Example Sheet 4a
1. What is the reactance of a 10F capacitor at a frequency of 1KHz? For networks in
which the resistor levels are typically in the in the kilohm range, is it a good
assumption to use the short circuit equivalence for the conditions just disabled?
How about at 100KHz?
2.
Find q , q , $ , $ , <q .
3. Using the & model, for the common base configuration find & , q ,
' , $ , < ,
for
an emitter current of 3.2 mA and of 0.99. Assume ! 48; and ?> ! 2.2i.
105
4. Given Oq& ! 1i, O& ! 2 t 10] , < ! 4160 for the input configuration shown
below;
a) Determine $ in terms of q
b) Calculate in terms of q
c) Calculate if $ is ignored
% VTTR SP VS !
UVCOAQC Oq&
4
UVCO Oq&
t 100%
UVCOAQC Oq&
106
5.
Draw the small signal ac equivalent circuit and determine expressions for;
a) q
b) $
c) <
d) <q
107
6.
a)
108
b) By current division,
V> !
O& V 1(O
$&
1(
O$& ?>
V>
(V ! 97.7
(1)
O& ?> V
1 O$& ?>
$&
||?>
1 O$& ?>
= V !
O& ?>
(2)
Replace ( 2 ) into ( 1 )
4L 4
Oq& 4 O& '& ! 0
O& ?>
1 O$& ?>
4L 4
Oq& 4 O& ! 0
O& ?>
! 4
109
7.
^ ! 100
$ ! 50
a) Determine &
b) Calculate q and $
110
3.
& !
a)
q ! & ! 15
b)
c)
d)
q 48;
!
! 15
q 3.2;<
!
! 0.99
3.2;<
! 3.168;<
$ !
?> ! 3.168;<
2.2
! 6.97V
< !
e)
$ 6.97
!
! 145.21
q 48;
! 14
! 32c<
f)
4)
a)
< !
$
! 4160
q
$ ! 4160q
b)
!
!
Oq&
Oq&
Oq&
!
q 1 4 2 t 10]
160
! 9.68 t 10] q
c)
q
! 1 t 10]u q
1
111
5.
a)
b)
c)
q ! ? ||Oq&
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(i)
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(iii)
The impedance of all capacitors and the dc voltage supply may be assumed to be
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3.
In the circuit below RS =0, RE = 1k, RL = 10k, and for the transistor hfe = 60, hie=
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voltage gain.
4.
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