K.

Priyadharshini,
2/170, Arasampalayam,
Coimbatore 642109.

Email id: priyakeerthi.9127@gmail.com

Phone : 7502786630

CAREER OBJECTIVE
To begin my lecturer career at a highly reputed and eminent educational institute
to share my knowledge and experience with students and gain more experience into the
education and teaching field.
ACADEMIC CHRONICLE
Degree

Institution

University/Board

M.E
(VLSI DESIGN)

SVS College of
Engineering , Coimbatore

Anna University
(2013-2015)

B.E.(ECE)

SVS College of
Engineering, Coimbatore

Anna University
(2013)

HSC
SSLC

Vivek Vidyalaya Matric. Hr

Sec. School, Coimbatore.
Vivek Vidyalaya Matric. Hr
Sec. School, Coimbatore.

Matriculation
(2009)
Matriculation
(2007)

CGPA/Perce
Year of
ntage
completion
8.4
MAY 2015
( Till
3rdSem)
MAY 2013
8.4
(First Class)
MARCH
87%
2009
MARCH
83%
2007

AREA OF INTEREST
VLSI Design
Digital Electronics
SOFTWARE KNOWN
Xilinx
Cadence
MATLAB
Modelsim
P-SPICE
PROJECT UNDER TAKEN
M.E-Input Vector Monitoring Concurrent BIST using SRAM cells.
Description: Testing of input vector given to CUT during normal mode itself without
imposing them to test mode inorder to reduce latency and area overhead.
B.E-Area and Power Efficient Architecture for High Throughput implementation of
lifting 2DDWT.

Description: Processing of image using modified distributive arithmetic based DWT

architecture and implemented using FPGA to optimize area and power.
WORKSHOP ATTENDED
Two days workshop on Hands on Training in Analog and Digital VLSI Design using
MENTOR GRAPHICS EDA, ATERA & TINA.
CONFERENCE ATTENDED
Presented a paper in National conference on the topic A survey of power estimation
techniques in VLSI circuits held at SVS College of Engineering, Coimbatore.
Presented a paper in International conference on the topic Design of Low Power Full
Adder held at Akshaya College of Engineering and Technology, Coimbatore.
JOURNAL PUBLISHED
Published a survey paper on input vector monitoring concurrent BIST techniques in
International Journal of Science, Engineering, Technology and Research.
Published a paper on the topic Design and implementation of modified distributive
arithmetic based DWT architecture using FPGA in Scientific.net.
CORE COMPETENCIES
Analytical approach and ability to research as well as an ability to respect students
Strong commitment with the job
Ability to motivate students for better learning
Profound knowledge of the subject areas and ability to teach students by using various
methods
PERSONAL DETAILS
FathersName
Occupation
Date of birth
Spare time activity
Languages known

: M.Kanagaraj
: Reporter
: 10-06-1991
: Gardening, stitching
: Tamil, English, Kannada (speak)

DECLARATION
I hereby declare that all the above details furnished by me are true to the best of my
knowledge.

Date:
Place: Coimbatore

[K. PRIYADHARSHINI]