Beruflich Dokumente
Kultur Dokumente
SUBMITTED BY
SHUBHAM ARORA (2012B3A7522P)
PRANJAL GUPTA (2012B3A3437P)
ASHLESH KHARBADE (2012B5A7447P)
RAJEEV DUTT MISRA (2012B4A3622P)
PROBLEM STATEMENT
Design a microprocessor transistor
tester. The system has to display the
value of NPN transistors. The transistor under test (TUT) is to be inserted in
the socket, and its base is energized with a current from a device DI. The
current I produced by the device DI, can be controlled by supplying it with a DC
voltage V. The relationship is as follows.
I =V * 10-4 A
The emitter of the transistor is grounded, and the collector is connected to a
1K resistor, whose other end is connected to the +5V supply. The Voltage drop
across a 1K resistor is measured and this is related to the
by the following
relation:
* I * 1000 = Voltage drop
The
value should be displayed on a seven segment display. If the
is less than 20, an alarm should be sounded.
value
DESIGN SPECIFICATIONS
The 8086 processor is given RD WR Clock and other necessary inputs. The
multiplexed Address Data lines (AD0 to AD20 for 1MB memory) are
demultiplexed using 3 Latches (74LS373) to extract A0 to A20 address lines
and 2 buffers (74LS245) to generate D0 to D15 data lines. These address and
data lines are further used to drive the PICs (8255).
The transistor under test (TUT) is to be inserted in the socket, and its base is
energized with a current from a device DI. The current I produced by the
device DI, can be controlled by supplying it with a DC voltage V. The
relationship is as follows I =V * 10-4 A
ASSUMPTIONS
Voltages do not exceed ADCs configuration.
The
values lie only between 1 and 200 and so 2 seven segment displays
are sufficient.
A voltage of 0.08V does not drive the transistor into saturation.
Proof: A transistor is driven into saturation if
* IB > IC, max
Where IC, max =Maximum collector current=(5-0.2) / 1 K =4.8 mA
IB =base current = I
For V=0.08v
I=V*10-4 = 0.008 mA
o When hfe =1, hfe*I=0.008mA
o When hfe=200, hfe*I=1.6mA
In both cases hfe*I <IC, max. So, there is no saturation.
Negligible error in voltage dependent current source.
Impedances added by connecting wires do not affect the value
of hfe.
Since floating point calculations cannot be done directly on the 8086
microprocessor, the
calculations are done indirectly.
VR : voltage drop across the 1K resistor connected to the collector of
the TUT.
V=0.08v
I =V*10-4
hfe*I*1000=VR
hfe*V*10-4 *1000= VR
hfe*V = VR*10
hfe =(VR*10)/V
SYSTEM DESIGN
The 8086 based system uses the following chips/devices.
LIST OF CHIPS
COMPONENT
Intel8086
DESCRIPTION
NUMBER
Microprocessor
chip
(central processing unit)
8255
Programmable
Peripheral Interface (PIC)
ADC 0808
Analog to Digital
Converter
IDT6116SA
2K 8bits SRAM
M2732A
4K 8bits EPROM
74LS373
8bit Latch
8bit Buffer
1K ohm
Resistor
2N2369
NPN Transistor
NOT gate
BUZZER
MEMORY ORGANIZATION
The 8086 based system uses two SRAM chips and two ROM chips of size 4K
and 8K respectively.Both SRAM and ROM are organized into even and odd
banks to facilitate both byte size and word size data transfer.
SRAM
A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 Hex.Addr. Remarks
1
1 1
1 1
1 1 1 1 1 1 1 1 1 FFFFFH
0 0
0 0
1 1 1 1 1 1 1 1 1 00FFFH
End of ROM
End of SRAM
I/0 ORGANIZATION
PORT TYPE
PORT ADDRESS
TYPE
00H
OUTPUT
02H
INPUT
Clower
04H
OUTPUT
Cupper
04H
OUTPUT
Control Register
06H
Group A,B,C are used in simple I/O mode i.e., mode 0 for seven segment
display.
PORT TYPE
PORT ADDRESS
TYPE
01H
OUTPUT
03H
INPUT
Clower
05H
OUTPUT
Cupper
05H
INPUT
Control Register
07H
Port A and Port B are used in mode 0 for interfacing DI device circuit and ADC
respectively.
FLOWCHART
START
INPUT V VOLTAGE
FOR CURRENT
SOURCE
INPUT V
AND VDROP
TO ADC
CONVERTED
VOLTAGES TAKEN BY
PORTB
CALCULATE hfe
hfe<
20 ?
NO
DISPLAY
VALUE
ON SSD
YES
SOUND A
BUZZER
MOV AL,10000010b
;initialise CReg1
OUT 06H,AL
MOV AL,10001010b
;initialise CReg2
OUT 07H,AL
CALL HFE
CALL BUZZER
.exit
MOV CX,10
x2:
SUB CX,1
JNZ x2
IN AL,02H
MOV DL,AL
;DL contains v
MOV AL,00000000b
OUT 01H,AL
MOV CX,10
x3:
IN AL,02H
MOV CL,255
SUB CL,AL
MOV AL,CL
MOV BL,10
;(Vdrop *10)
MUL BL
DIV DL
OUT 00H,AL
RET
HFE ENDP
MOV CL,AL
MOV AL,40H
OUT 04H,AL
NOTBUZZ:
RET
BUZZER ENDP
end
LIMITATIONS
The system has not been designed for transistors with
>255.
However, normal hfe range lies well below 200.
CONCLUSIONS
The transistor
tester has been implemented as an 8086 based
system.
An alarm is sounded whenever
value is less than 20.
The seven segment displays the
values of NPN transistor.
DESIGN LAYOUT