Sie sind auf Seite 1von 13

L.122A.

ET122A Embedded Control Systems I


I.

Capture/Compare/Pulse Width Modulation DS-143-186, TXT-569-601


1.

How CCPs are used


A.
In the Compare mode, an external signal can be automatically
generated when a timer/counter reaches a preset value. Used to
generate an output waveform on the CCP pin or trigger an external
event such as an ADC conversion.
B.
In the Capture mode, external events can be timed and
measured. Eg, measuring the period and duty cycle time of a square
wave input signal.
C.
In PWM mode, an output waveform(s) can be generated of a
specified frequency (period) and a variable Duty Cycle time.
D.

Automatically Control Variable power to a load, eg DC motor


DS-178, TXT-653-657

a.
b.

Controls for a Half-Bridge and a Full-Bridge drive circuit


Variable power to a Heater to regulate temperature of a process.

E.
Automatically Control power to light intensity by controlling the
power to the lamp where on-time vs. off-time is an effective control.

1|P a ge

L.122A.5

2.

Compare Mode Programming DS-147, TXT-573, Fig 15-6 TXT-575


A.
The CCP event on CCP1 pin is caused when the contents of
Timer1 (or Timer3) register is equal to the 16-bit CCPR1H:CCPR1L
register. The clock source for Timer1 or Timer3 can be either internal
Fosc/4 from XTAL or from an External pin; RC0/T1CKI.
B.
With every clock cycle the registers are compared, when they
match the CCP1 pin can perform one of the following actions: DS-147
a)
b)
c)
d)
e)

C.

Drive the CCP1 pin High


Drive the CCP1 pin Low
Toggle the CCP1 pin
Remain unchanged
Trigger a special event with a hardware interrupt and automatically
clear the Timer register. (allows for automatic repeat operation)

Upon match CCP1IF (interrupt flag) goes high (PIR1 register)

DS-81, TXT-574

D.

CCP1CON control register is used to select one of the above

E.
T3CON is used to configure the timer to be used, prescale, clock
source and start/stop of the timer. DS-148, TXT-574
F.

Steps for programming the Compare Mode


a.
Initialize the CCP1CON register for the desired compare options
b.
Initialize the T3CON register for Timer1 (or Timer3)
c.
Initialize the CCPR1H:CCPR1L registers
d.
Make CCP1 pin an output pin
e.
Initialize Timer1 (or Timer3) register values
f.
Start Timer1 (or TIMER3)
g.
Monitor the CCP1IF flag (or use as an interrupt)

G.
Example program 15.1 to receive clock pulses on Timer1 pin
T1CKI (RC0) and toggle an LED on RC2 (CCP1 pin) after every 10th
input clock pulse. TXT-576

2|P a ge

L.122A.5

H.
Example 15.2 creates a square wave with a 40ms period and a
50% duty cycle on CCP1 pin using the compare mode. TXT-577

3|P a ge

L.122A.5

3.

Capture Mode Programming DS-145, TXT-579, Fig 15-9 TXT-580


A.
In Capture mode, an event on the CCP1 pin (must be configured
as an input pin) will cause the contents of Timer1 (or Timer3) to be
loaded into the 16-bit CCPR1H:CCPR1L register. T1CON and T3CON
are used to configure which timer is used for CCP1.
B.
Time measurements can be then taken between two events, eg.
Measure the period of an incoming waveform (frequency = 1/period),
or measure the on-time (duty cycle) of a waveform.
C.
There are four options for the type of trigger event on CCP1 pin,.
The options are selected with the CCP1CON register. DS-173, TXT-571
a.
Every falling-edge pulse
b.
Every rising-edge pulse
c.
Every fourth rising-edge pulse
d.
Every sixteenth rising-edge pulse
D.

Steps for Programming Capture Mode for Period Measurement


a.
Initialize the CCP1CON register for capture mode
b.
Make CCP1 pin and input pin
c.
Initialize the T3CON register to select Timer1 or Timer3
d.
Read Timer1 (or Timer3) register value on the first rising edge and
save the start value.

e.

Read the Timer1 (or Timer3) register value on the second rising
edge and save the end value.

f.

Subtract the start value (d) from the end value (e).

E.
Example 15-3 measures the period of the incoming waveform on
CCP1 pin (RC2) and puts the measured results on PORTB and PORTD.
The measurement is in terms of Fosc/4 clock period. TXT-581
F.
Example 15-4 illustrates a method for measuring pulse width of
an incoming waveform. Eg. Measuring the On-Time of a PWM signal
or measuring the duration of a single event from on to off states.

4|P a ge

L.122A.5

G.
Measuring Pulse Width requires starting the Timer1 with the
rising-edge of the input and ending with the trailing edge of the same
pulse. TXT-582 Example program 15-4 follows. TXT-583

5|P a ge

L.122A.5

6|P a ge

L.122A.5

4.

PWM Programming DS-149, TXT-586


A.
PWM output consists of a fixed frequency (fixed period) and an
adjustable of fixed duty cycle which determines the On-Time vs OffTime of each cycle (period).
B.
The Period of the PWM is created using Timer2 and its
associated PR2 8-bit register.
Tpwm = [(PR2)+1] x 4 x N x Tosc
Where N = pre-scale of 1, 4, or 16 set by T2CON
PR2 = [Fosc / (Fpwm x 4 x N)] 1 If N is maximum (16) and PR2 is 255
Tpwm = [255+1] x 4 x 16 x Tosc = 16384 Tosc
Therefore the minimum Frequency for PWM = Fosc/16384
EXAMPLE:
What are the minimum and maximum frequencies with a 10Mhz XTAL?
XTAL = 10Mhz, PR2=1, Prescale=1 10Hhz/(4 x 1 x 1) = 2.5Mhz Maximum
XTAL = 10Mhz, PR2=255, Prescale=16 10Mhz/(4x16x256) = 610Hz min.

C.
The Duty Cycle of PWM is the percent of ON-Time for the Period
of the PWM. The Duty Cycle value is always a percentage of the Period
and therefore always a percentage of the PR2 value in this example.
TXT-588

D.
Example: 2.5kHz PWM frequency with a 10Mhz XTAL and a
75% duty cycle find the value to be loaded into CCPR1L.
PR2 = [(10MHz/(4 x 2.5kHz x 4)] -1 = 250-1 = 249 (the period of the PWM)
Duty Cycle = 249 x 75% = 186.75 therefore load CCPR1L with 186 and
DC1B2:DC1B1 with 11 for the .75 decimal portion of the calculation .

7|P a ge

L.122A.5

E.

Steps in Programming PWM


a.
Set the PWM period by writing to the PR2 register
b.
Set the PWM Duty Cycle by writing to CCPR1L for the higher 8 bits.
c.
Set the CCP pin as an output
d.
Using the T2CON register, set the pre-scale value. TXT-589
e.
Clear the TMR2 register.
f.
Configure the CCP1CON register for PWM and set DC1B2:DC1B1 bits
for the decimal portion of the duty cycle. TXT-588

g.

Start Timer2.

F.
Example 15-5 illustrates a PWM output on CCP1 pin with a
2.5kHz frequency and a 75% duty cycle using TMR2IF flag

8|P a ge

L.122A.5

5.

CCP and Timers DS-143, TXT-570


A.

The PIC18F45K20 has two CCP modules.

B.

Each module contains a 16-bit register which can operate as:


a.
A 16-bit Capture register
b.
A 16-bit Compare register
c.
A PWM Master/Slave Duty Cycle register

C.

CCP2CON: Standard Capture/Compare/PWM Control Register


a.
b.

D.

CCP2M <Bits 3:0> select CCP mode TXT-143


DC2B <Bits 5:4> used only for PWM Duty Cycle bits 1:0

CCP1CON: Enhanced Capture/Compare/PWM Control Register


a.
b.

CCP1M <Bits 3:0> select Enhanced CCP modes DS-173, TXT-571


DC1B <Bits 5,4> set PWM Duty Cycle Bits <1:0> of 10-bit
CCPR1L contains the 8 MSB bits of the PWM Duty Cycle

c.
6.

P1M <bits 7, 6> Enhanced PWM configuration bits

CCP Registers DS-148, TXT-570


A.

Each CCP module is associated with these registers


a.
b.

B.

CCPxCON 8-bit Control register


CCPRx 16-bit Data register
i. CCPRxH High Byte of Data register
ii. CCPRxL Low Byte of Data register

Timer Resource
CCP/ECCP Mode
Capture
Compare
PWM

C.

Timer Resources
Timer1 or Timer3
Timer1 or Timer3
Timer2

Interaction Between CCP1 and CCP2 Timer Resources DS-144


T3CON Register contains the Timer-to-CCP enable bits. DS-172

9|P a ge

L.122A.5

D.

II.

CCP2 Pin Assignment is determined by CCP2MX bit


a.
By default CCP2 is assigned to RC1 (CCP2MX bit = 1)
b.
RB3 is selected if CCP2MX = 0.

Enhanced Capture/Compare/Pulse Width Modulation


1.

ECCP Compare Mode Programming TXT-594


A.
Compare Mode Programming in ECCP is identical as CCP except
we use ECCP registers.
B.

Steps for programming the compare mode in ECCP


a.
Initialize the ECCP1CON register for the desired compare option
b.
Initialize the T3CON register for Timer1 (or Timer3)
c.
Initialize the ECCPR1H:ECCPR1L registers
d.
Make the ECCP1 pin an output pin
e.
Initialize the Timer1 (or Timer3) register values
f.
Start Timer1 (or Timer3)
g.
Monitor the ECCP1IF flag (or use an interrupt)

C.
Example 15-6 uses Timer 3 as the counter and toggles the
CCP1/ECCP1 pin every 20 pulses.

10 | P a g e

L.122A.5

2.

ECCP Capture Mode Programming TXT-596


A.
Capture Mode Programming in ECCP is identical as CCP except
we use ECCP registers.
B.

Steps for Programming the Capture mode in ECCP


a.
Initialize the ECCP1CON register for the desired Capture option
b.
Make the ECCP1 pin an input pin
c.
Initialize the T3CON register to select Timer1 (or Timer3)
d.
Read the Timer1 (or Timer3) register value on the first rising-edge
and save the value.

e.

Read the Timer1 (or Timer3) register value on the second risingedge and save the second value.

f.
C.

Subtract the start value (d) from the ending value (e)

Example 15-7 captures the pulse on-time feeding the ECCP1 pin

11 | P a g e

L.122A.5

3.

ECCP PWM Programming DS-175


A.

Programming PWM in ECCP has more capability than CCP

B.

CCP only provides a single CCP output pin.

C.
ECCP provides 2 and 4 ECCP output pins to drive Half-Bridge
and Full-H-Bridge motor drive circuits. DS-175, TXT-597
D.
The PWM outputs are multiplexed with I/O pins and are
designated P1A, P1B, P1C, and P1D. The polarity of the PWM pins is
configurable and selected by setting the CCP1M bits in the CCP1CON
register. Refer to table 16-1 DS-175
E.

Steps in Programming PWM in ECCP TXT-597


a.
Set PWM period by writing to the PR2 register
b.
Set PWM duty cycle by writing to ECCPR1L for the higher 8 bits
c.
Set the ECCP pin as an output pin
d.
Use T2CON to set the pre-scale value
e.
Clear TMR2 register
f.
Configure the ECCP1CON register for PWM and set the
EDC1B2:EDC1B1 bits or the decimal portion of the duty cycle.

g.

Start Timer2

F.
Example 17-3 illustrates the Full-Bridge implementation of the
PWM in ECCP TXT-668
;Program 17-3
CLRF TRISD
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
AGAIN CLRF
BCF
WAIT BTFSS
BRA
BRA

;make PORTD an output


D100
PR2
D50
ECCPR1L
0xCF
ECCP1CON
0x24
T2CON
TMR2
PIR1, TMR2IF
PIR1, TMR2IF
WAIT
AGAIN

;set period = 100 * 16/Fosc


;duty cycle = 50%
;reverse full-bridge PWM
;4 postscaler, Turn on Timer2
;start pulse
;clear flag
;wait for end of period
;repeat next cycle
12 | P a g e

L.122A.5

13 | P a g e

Das könnte Ihnen auch gefallen