Beruflich Dokumente
Kultur Dokumente
Features
Typical Application
RF
100k
LOAD
RINRSENSE
IN-
10k
RIN+
IN+
10k
+5V
V+
ISL28x14
V-
VOUT
+
GAIN = 10
RREF+
100k
VREF
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2009. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
Ordering Information
PART NUMBER
(Note 2)
PART
MARKING
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL28114FEZ-T7 (Note 1)
BKA
5 Ld SC-70
P5.049
ISL28114FEZ-T7A (Note 1)
BKA
5 Ld SC-70
P5.049
ISL28114FHZ-T7 (Note 1)
BDBA
5 Ld SOT-23
MDP0038
ISL28114FHZ-T7A (Note 1)
BDBA
5 Ld SOT-23
MDP0038
ISL28214FUZ
8214Z
8 Ld MSOP
M8.118A
ISL28214FUZ-T7 (Note 1)
8214Z
8 Ld MSOP
M8.118A
ISL28214FBZ
28214 FBZ
8 Ld SOIC
M8.15E
ISL28214FBZ-T7 (Note 1)
28214 FBZ
8 Ld SOIC
M8.15E
ISL28214FBZ-T13 (Note 1)
28214 FBZ
8 Ld SOIC
M8.15E
ISL28414FVZ
28414 FVZ
14 Ld TSSOP
MDP0044
ISL28414FVZ-T7 (Note 1)
28414 FVZ
14 Ld TSSOP
MDP0044
ISL28414FVZ-T13 (Note 1)
28414 FVZ
14 Ld TSSOP
MDP0044
ISL28414FBZ
28414 FBZ
14 Ld SOIC
MDP0027
ISL28414FBZ-T7 (Note 1)
28414 FBZ
14 Ld SOIC
MDP0027
ISL28414FBZ-T13 (Note 1)
28414 FBZ
14 Ld SOIC
MDP0027
NOTES:
1. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both
SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL28114, ISL28214, ISL28414. For more
information on MSL please see techbrief TB363.
Pin Configurations
ISL28114
(5 LD SC-70)
TOP VIEW
IN+
VS-
IN-
ISL28114
(5 LD SOT-23)
TOP VIEW
VS+
OUT
OUT
VS-
IN+
ISL28214
(8 LD MSOP, 8 LD SOIC)
TOP VIEW
VS+
IN-
OUT_A
VS+
IN-_A
OUT_B
IN+_A
IN-_B
VS-
IN+_B
FN6800.3
December 22, 2009
14 OUT_D
IN-_A 2
13 IN-_D
IN+_A 3
12 IN+_D
VS+ 4
11 VS-
IN+_B 5
10 IN+_C
IN-_B 6
9 IN-_C
OUT_B 7
8 OUT_C
Pin Descriptions
PIN NO.
TSSOP14,
PIN NAME SC70-5 SOT23-5 MSOP8, SO8 14 LD SOIC
OUT
OUT_A
OUT_B
OUT_C
OUT_D
DESCRIPTION
Output
1
1
7
V+
1
7
8
14
OUT
VCIRCUIT 1
VS-
11
IN+
IN+_A
IN+_B
IN+_C
IN+_D
ININ-_A
IN-_B
IN-_C
IN-_D
VS+
Positive Input
3
3
5
3
5
10
12
V+
IN-
IN+
Negative Input
4
2
6
2
6
9
13
4
VCIRCUIT 3
See Circuit 2
FN6800.3
December 22, 2009
Thermal Information
. .6.5V
. 1V/s
. 20mA
. 0.5V
+ 0.5V
4000V
. 350V
. 400V
2000V
JA (C/W)
JC (C/W)
5 Ld SC-70 (Notes 4, 5) . . . . . . . .
250
N/A
5 Ld SOT-23 (Notes 4, 5) . . . . . . .
225
N/A
8 Ld MSOP (Notes 4, 5) . . . . . . . .
180
100
8 Ld SO Package (Notes 4, 5) . . . .
126
90
14 Ld TSSOP Package (Notes 4, 5)
120
40
14 Ld SOIC Package (Notes 4, 5) .
90
50
Ambient Operating Temperature Range. . . . -40C to +125C
Storage Temperature Range . . . . . . . . . . . -65C to +150C
Operating Junction Temperature . . . . . . . . . . . . . . +125C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact
product reliability and result in failures not covered by warranty.
NOTES:
4. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief
TB379 for details.
5. For JC, the case temp location is the center of the exposed metal pad on the package underside.
Electrical Specifications
PARAMETER
VS+ = 5V, VS- = 0V, RL = Open, VCM = VS/2, TA = +25C, unless otherwise specified.
Boldface limits apply over the operating temperature range, -40C to +125C,
unless otherwise specified.
DESCRIPTION
CONDITIONS
MIN
(Note 6)
TYP
MAX
(Note 6)
UNIT
-5
0.5
mV
mV
10
V/C
30
pA
20
pA
100
pA
20
pA
-50
50
pA
- 0.1
5.1
DC SPECIFICATIONS
VOS
-6
TCVOS
IOS
IB
-40C to +125C
ISL28114
-20
-100
ISL28214, ISL28414
PSRR
VOH
-20
VS = 1.8V to 5.5V
RL = 10k
4.985
72
dB
70
dB
71
dB
70
dB
4.993
4.98
VOL
V+
Supply Voltage
IS
RL = 10k
V
13
1.8
RL = OPEN
300
15
mV
20
mV
5.5
360
400
FN6800.3
December 22, 2009
PARAMETER
VS+ = 5V, VS- = 0V, RL = Open, VCM = VS/2, TA = +25C, unless otherwise specified.
Boldface limits apply over the operating temperature range, -40C to +125C,
unless otherwise specified. (Continued)
DESCRIPTION
CONDITIONS
MIN
(Note 6)
TYP
MAX
(Note 6)
UNIT
ISC+
RL = 10 to V-
-31
mA
ISC-
RL = 10 to V+
26
mA
MHz
AC SPECIFICATIONS
GBWP
VS = 2.5V
AV = 100, RF = 100k,
RG = 1k, RL = 10k to
VCM
eN VP-P
VS = 2.5V
f = 0.1Hz to 10Hz
12
VP-P
eN
VS = 2.5V
f = 1kHz
40
nV/(Hz)
iN
VS = 2.5V
f = 1kHz
fA/(Hz)
ZIN
Input Impedance
1012
Cin
VS = 2.5V
f = 1MHz
1.0
pF
1.3
pF
Slew Rate
2.5
V/s
VS = 2.5V
AV = +1, VOUT = 0.05VP-P,
RF = 0, RL = 10k,
CL = 15pF
37
ns
42
ns
5.6
VS = 2.5V
AV = +1, RF = 0,
RL = 10k, CL = 1.2pF
NOTE:
6. Parameters with MIN and/or MAX limits are 100% tested at +25C, unless otherwise specified. Temperature limits established
by characterization and are not production tested.
FN6800.3
December 22, 2009
50
40
30
10
0
-10
-20
-30
-40
SIMULATION
-50
-40 -20
0
20
40
60
80
V+ = 2.5V
AV = 1
1000
100
10
10
TEMPERATURE (C)
10k
100k
20
120
20
100
100
80
-20
GAIN
60
-40
40
-60
20
-80
-100
-20 V+ = 0.9V
RL = 100k
-40
CL = 10pF
-60 SIMULATION
-80
0.1
10
PHASE
-120
-140
120
PHASE ()
1k
-160
100
1k
10k 100k
FREQUENCY (Hz)
1M
-180
10M 100M
80
-60
20
-80
-100
-20 V+ = 0.9V
RL = 100k
-40
CL = 10pF
-60 SIMULATION
70
80
-160
100
1k
10k 100k
FREQUENCY (Hz)
PSRR (dB)
SIMULATION
0.1
10
1M
10M 100M
1M
-180
10M 100M
PSRR+ VS = 0.9V
PSRR+ VS = 2.5V
PSRR- VS = 2.5V
60
20
0
0.01
10
-120
-140
70
30
10
PHASE
90
40
-40
40
80
50
-20
GAIN
60
-80
0.1
60
CMRR (dB)
100
FREQUENCY (Hz)
PHASE ()
IBIAS (pA)
20
10,000
50
40
PSRR- VS = 0.9V
30
RL = INF
20 CL = 4pF
AV = +1
10
VCM = 100mVP-P
0
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
FN6800.3
December 22, 2009
70
Rg = 1k, Rf = 100k
GAIN (dB)
50
40
V+ = 2.5V
CL = 4pF
RL = 10k
VOUT = 50mVP-P
AV = 100
30
20
AV = 10
Rg = 10k, Rf = 100k
10
0
AV = 1
-10
10
60
Rg = 100, Rf = 100k
AV = 1000
10k
1k
-2
-3
-4
VOUT = 10mVP-P
-5
VOUT = 50mVP-P
-6
VS = 2.5V
CL = 4pF
-7
AV = +1
-8 R = 10k
100k
1M
10M
-9
100
100M
VOUT = 500mVP-P
VOUT = 1VP-P
1k
10k
1
-1
-2
-3
RL = 4.99k
-6
-7
V+ = 2.5V
RL = 1k
CL = 4pF
AV = +1
RL = 499
-8 V
OUT = 50mVP-P
-9
100
1k
RL = 100
10k
100k
1M
10M
5
4
VS = 2.5V
RL = 10k
AV = +1
VOUT = 50mVP-P
3
1
CL = 104pF
0
-1
CL = 26pF
-2
CL = 4pF
-3
1k
100M
10k
1M
10M
140
120
CL = 4pF
RL = 10k
AV = +1
VOUT = 50mVP-P
CROSSTALK (dB)
100k
FREQUENCY (Hz)
-3
100M
CL = 474pF
CL = 224pF
-2
10M
CL = 1004pF
FREQUENCY (Hz)
-1
1M
-5
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
-4
VOUT = 100mVP-P
VOUT = 200mVP-P
Rg = OPEN, Rf = 0
100
0
-1
-4
-5
VS = 2.5V
-6
VS = 1.75V
-7
-9
10k
VS = 0.9V
100k
1M
10M
100M
FREQUENCY (Hz)
80
60
40
20
VS = 1.25V
-8
100
VS = 2.5V
RL-DRIVER = INF
RL-RECEIVER = 10k
CL = 4pF
AV = +1
VSOURCE = 1VP-P
0
10
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FN6800.3
December 22, 2009
20
2
LARGE SIGNAL (V)
10
VS = 2.5V
RL = 10k
CL = 15pF
AV = +1
VOUT = 50mVP-P
0
-10
-20
1
VS = 0.9V
RL = 10k
CL = 15pF
AV = +1
VOUT = RAIL
-1
-2
-30
-40
VS = 2.5V
-3
TIME (ns)
INPUT (V)
-0.2
-0.3
-0.4
OUTPUT @ VS = 0.9V
OUTPUT @ VS = 2.5V
-0.5
0.4
-1.0
-1.5
-2.0
10
3.0
-0.1
2.0
RL = INF
CL = 15pF
AV =10
Rf = 9.09k, Rg = 1k
0.1
-3.0
0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.3 3.6 4.0
TIME (ms)
2.5
OUTPUT @ VS=0.9V
0.2
OUTPUT @ VS = 2.5V
0.3
-2.5
-0.5
-0.6
0
0.5
INPUT (V)
RL = INF
CL = 15pF
AV =10
Rf = 9.09k, Rg = 1k
-0.1
OUTPUT (V)
0.6
0.5
INPUT
4
5
6
TIME (s)
0.1
1.5
1.0
0.5
OUTPUT (V)
specified. (Continued)
30
0
INPUT
0
-0.5
0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.3 3.6 4.0
TIME (ms)
VS = 2.5V
70 RL = 10k
AV = 1
60 VOUT = 50mVP-P
50
40
30
20
O
V
ER
SH
O
O
V
O
ER
T
SH
+
O
O
T
-
OVERSHOOT (%)
80
10
0
10
100
1k
CAPACITANCE (pF)
10k
FN6800.3
December 22, 2009
Applications Information
Functional Description
The ISL28114, ISL28214 and ISL28414 are single dual
and quad, CMOS rail-to-rail input, output (RRIO)
micropower operational amplifiers. They are designed to
operate from single supply (1.8V to 5.5V) or dual supply
(0.9V to 2.75V). The parts have an input common
mode range that extends 100mV above and below the
power supply voltage rails. The output stage can swing to
within 15mV of the supply rails with a 10k load.
Power Dissipation
It is possible to exceed the +125C maximum junction
temperatures under certain load, power supply
conditions and ambient temperature conditions. It is
therefore important to calculate the maximum junction
temperature (TJMAX) for all applications to determine if
power supply voltages, load conditions, or package type
need to be modified to remain in the safe operating area.
These parameters are related using Equation 1:
(EQ. 1)
where:
(EQ.2)
where:
TMAX = Maximum ambient temperature
JA = Thermal resistance of the package
VIN
VOUT
RIN
RL
Unused Channels
If the application requires less than all amplifiers one
channel, the user must configure the unused channel(s)
to prevent it from oscillating. The unused channel(s) will
oscillate if the input and output pins are floating. This will
result in higher than expected supply currents and
possible noise injection into the channel being used. The
proper way to prevent this oscillation is to short the
output to the inverting input and ground the positive
input (as shown in Figure 19).
FN6800.3
December 22, 2009
10
FN6800.3
December 22, 2009
R21
500E3
28
V9
V++
29 DN
D13
En
R22
5E11
+
CinDiff
R23
5E11
+
-
R2
R1
1.0004 1.0004
3
Vc
Vmid
1
In+
M16
M14
R3
10
R4
10
11
R7
1
M15
Cin1
Cin2
1.26pF
1.26pF
+
-
100
25E-12
V--
4
15
DX
D2
RA2
G2A
+1E-6V
IOS
DX
D1
R9
14
13
I1
5E-3
R10
1E9
RA1
M17
R8
1
7
Vin-
G1A
R6
10
12
R5
10
6
10
EOS
1.02pF
I2
5E-3
V1
1E-6V
Vc
+
-
0.00035V
Vmid
V2
V-VCM
Input Stage
V++
G1
17
+
-
D3
DX
+
V3
- 0.61V
G3
19
+
-
R11
1
636.658E3
D5
DX
+
V5
G5
R13
- 0.604V
+
-
C2
2.0nF
1.9895
R15
1E6
Vmid
Vc
Vg
R12
1
G2
+
-
18
V4
0.61V
+
-
D4
DX
V--
C3
G4
20
0.604V
+
V6
2.0nF
R14
D6
DX
R16
1E6
G6
E4
+
-
Vg
Vmid
22
+
-
Vmid
V++
21
16
Vc
L1
+
-
L2
1.9895
636.658E3
V-VCM
VCM
V++
+
-
E2
D9
DX
D10
DX
26
R17
2652.66
ISY
300uA
Vg
C4
10pF
D7
DX
27
24
G11
V7
+
+
-
+
-
0.08V
V8
25
DX
D8
R18
V--
E3
V-
C3
G8
11
10pF
Pole Stage
0.08V
G12
2652.66
VOUT
VOUT
23
Vmid
V-
R19
50
D11
DY
+
G9
+
-
D12
DY
R20
50
+
-
V+
G7
V+
G10
Output Stage
FN6800.3
December 22, 2009
R_R11
16 V++ 1 TC=0,0
R_R12
V-- 16 1 TC=0,0
*
*2nd Gain Stage
G_G3
V++ VG 16 VMID 24.893e-3
G_G4
V-- VG 16 VMID 24.893e-3
V_V5
19 VG .604
V_V6
VG 20 .604
D_D5
19 V++ DX
D_D6
V-- 20 DX
R_R13
VG V++ 636.658e3 TC=0,0
R_R14
V-- VG 636.658e3 TC=0,0
C_C2
VG V++ 2E-09 TC=0,0
C_C3
V-- VG 2E-09 TC=0,0
*
*Mid supply Ref
E_E4
VMID V-- V++ V-- 0.5
E_E2
V++ 0 V+ 0 1
E_E3
V-- 0 V- 0 1
I_ISY
V+ V- DC 300e-6
*
*Common Mode Gain Stage with Zero
G_G5
V++ VC VCM VMID 2.5118E-10
G_G6
V-- VC VCM VMID 2.5118E-10
E_EOS
1 EN VC VMID 1
R_R15
VC 21 1e6 TC=0,0
R_R16
22 VC 1e6 TC=0,0
R_R22
EN VCM 5e11 TC=0,0
R_R23
VCM VIN- 5e11 TC=0,0
L_L1
21 V++ 1.9895
L_L2
22 V-- 1.9895
*
*Pole Satge
G_G7
V++ 23 VG VMID 376.98e-6
G_G8
V-- 23 VG VMID 376.98e-6
R_R17
23 V++ 2652.66 TC=0,0
R_R18
V-- 23 2652.66 TC=0,0
C_C4
23 V++ 10e-12 TC=0,0
C_C5
V-- 23 10e-12 TC=0,0
*
*Output Stage with Correction Current Sources
G_G9
26 V-- VOUT 23 0.02
G_G10
27 V-- 23 VOUT 0.02
G_G11
VOUT V++ V++ 23 0.02
G_G12
V-- VOUT 23 V-- 0.02
V_V7
24 VOUT .08
V_V8
VOUT 25 .08
D_D7
23 24 DX
D_D8
25 23 DX
D_D9
V++ 26 DX
D_D10
V++ 27 DX
D_D11
V-- 26 DY
D_D12
V-- 27 DY
R_R19
VOUT V++ 50 TC=0,0
R_R20
V-- VOUT 50 TC=0,0
.model pmosisil pmos (kp=16e-3 vto=-0.6)
.model NCHANNELMOSFET nmos (kp=3e-3 vto=0.6)
.model DN D(KF=6.69e-9 AF=1)
.MODEL DX D(IS=1E-12 Rs=0.1)
.MODEL DY D(IS=1E-15 BV=50 Rs=1)
.ends ISL28114subckt
12
FN6800.3
December 22, 2009
10,000
V+ = 2.5V
AV = 1
1000
100
10
1
10
100
1k
FREQUENCY (Hz)
10k
100k
AV = 1000
0.2
0
1.0
AV = 10
1.0k
60
AV = 1000
40
AV = 100
Rg = 100, Rf = 100k
AV = 10
20
Rg = OPEN, Rf = 0
1k
Rg = 100k, Rf = 100k
-10
10k
100k
1M
FREQUENCY (Hz)
10M
100M
10
100
VS = 2.5V
LARGE SIGNAL (V)
VS = 0.9V
0
RL = 10k
CL = 15pF
AV = +1
VOUT = RAIL
10M
100M
VS = 2.5V
VOUT
-2
10k
100k
1.0M
FREQUENCY (Hz)
-1
1.0k
3
2
100k
Rg = 10k, Rf = 100k
AV = 1
100
10k
Rg = 10k, Rf = 100k
-10
10
100
Rg = 1k, Rf = 100k
V+ = 2.5V
CL = 4pF
RL = 10k
VOUT = 50mVP-P
AV = 100
10
-3
10
GAIN (dB)
GAIN (dB)
0.4
Rg = 1k, Rf = 100k
30
0.6
Rg = 100, Rf = 100k
50
20
0.8
70
70
40
1.0
FREQUENCY (Hz)
60
1
VIN
V(VIN+)/VOUT)
-0
-1
RL = 10k
CL = 15pF
AV = +10
VOUT = RAIL
-2
-3
4
5
6
TIME (s)
13
10
10
15
TIME (s)
20
25
30
FN6800.3
December 22, 2009
20
100
80
GAIN
60
-20
-40
40
-60
20
-80
-100
-20 V+ = 0.9V
PHASE
RL = 100k
-40
CL = 10pF
-60 SIMULATION
-80
0.1
1
10 100 1k 10k 100k 1M
FREQUENCY (Hz)
-120
-140
-160
-180
10M 100M
120
PHASE ()
200
PHASE
160
120
80
GAIN
RL = 10k
40
CL = 10pF
MODEL VOS SET TO ZERO
0 FOR THIS TEST
0.01
0.1
1.0
10
80
80
70
60
CMRR (dB )
CMRR (dB)
60
50
40
30
40
20
20
10
SIMULATION
0
0.01 0.1
1
10
14
0
0.01
0.1
1.0
10
FN6800.3
December 22, 2009
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to
Web to make sure you have the latest Rev.
DATE
REVISION
CHANGE
12/16/09
FN6800.3
11/17/09
FN6800.2
Removed Coming Soon from SC70 and SOT-23 package options in the
Ordering Information on page 2.
11/12/09
FN6800.1
Changed theta Ja to 250 from 300. Added license statement (page 10) and
reference in spice model (page 12).
10/23/09
FN6800.0
Initial Release
Products
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Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones,
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processing functions. Go to www.intersil.com/products for a complete list of Intersil product families.
*For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device
information page on intersil.com: ISL28114, ISL28214, ISL28414
To report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff
FITs are available from our website at http://rel.intersil.com/reports/search.php
15
FN6800.3
December 22, 2009
D
VIEW C
e1
SYMBOL
CL
1
CL
E1
b
CL
0.20 (0.008) M
CL
A2
SEATING
PLANE
A1
-C-
PLATING
b1
0.043
0.80
1.10
0.004
0.00
0.10
A2
0.031
0.039
0.80
1.00
0.006
0.012
0.15
0.30
b1
0.006
0.010
0.15
0.25
0.003
0.009
0.08
0.22
c1
0.003
0.009
0.08
0.20
0.073
0.085
1.85
2.15
0.071
0.094
1.80
2.40
E1
0.045
0.053
1.15
1.35
0.0256 Ref
0.65 Ref
e1
0.0512 Ref
1.30 Ref
L2
c1
NOTES
0.031
0.010
0.018
0.017 Ref.
0.26
0.46
0.420 Ref.
0.006 BSC
0o
MAX
0.000
WITH
MIN
MILLIMETERS
MAX
A1
L1
0.10 (0.004) C
MIN
0.15 BSC
8o
0o
8o
0.004
0.10
R1
0.004
0.010
0.15
0.25
Rev. 3 7/07
NOTES:
BASE METAL
4X 1
R
GAUGE PLANE
SEATING
PLANE
L
C
L1
L2
4X 1
VIEW C
0.4mm
0.75mm
2.1mm
0.65mm
TYPICAL RECOMMENDED LAND PATTERN
16
FN6800.3
December 22, 2009
e1
MILLIMETERS
6
SYMBOL
E1
2
0.15 C D
1
2X
3
0.20 C
2X
0.20 M C A-B D
B
b
NX
0.15 C A-B
SOT23-5
SOT23-6
TOLERANCE
1.45
1.45
MAX
A1
0.10
0.10
0.05
A2
1.14
1.14
0.15
0.40
0.40
0.05
0.14
0.14
0.06
2.90
2.90
Basic
2.80
2.80
Basic
E1
1.60
1.60
Basic
0.95
0.95
Basic
e1
1.90
1.90
Basic
0.45
0.45
0.10
L1
0.60
0.60
Reference
Reference
2X
Rev. F 2/07
NOTES:
C
A2
SEATING
PLANE
A1
0.10 C
NX
5. Index area - Pin #1 I.D. will be located within the indicated zone
(SOT23-6 only).
(L1)
GAUGE
PLANE
c
17
0.25
0 +3
-0
FN6800.3
December 22, 2009
0.25
CAB
3.00.1
4.90.15
DETAIL "X"
1.10 Max
PIN# 1 ID
B
SIDE VIEW 2
1
0.18 0.05
2
0.65 BSC
TOP VIEW
0.95 BSC
0.860.09
GAUGE
PLANE
H
C
0.25
SEATING PLANE
0.33 +0.07/ -0.08
0.08 C A B
0.10 0.05
33
0.10 C
0.55 0.15
DETAIL "X"
SIDE VIEW 1
5.80
NOTES:
4.40
3.00
1.
2.
3.
4.
5.
6.
0.65
0.40
1.40
TYPICAL RECOMMENDED LAND PATTERN
18
FN6800.3
December 22, 2009
DETAIL "A"
0.22 0.03
6.0 0.20
3.90 0.10
4
PIN NO.1
ID MARK
5
(0.35) x 45
4 4
0.43 0.076
1.27
0.25 M C A B
SIDE VIEW B
TOP VIEW
1.75 MAX
1.45 0.1
0.25
GAUGE PLANE
C
SEATING PLANE
0.10 C
0.175 0.075
SIDE VIEW A
0.63 0.23
DETAIL "A"
(0.60)
(1.27)
NOTES:
(1.50)
(5.40)
1.
2.
3.
4.
5.
6.
19
FN6800.3
December 22, 2009
h X 45
(N/2)+1
A
PIN #1
I.D. MARK
E1
c
SEE DETAIL X
(N/2)
B
L1
0.010 M C A B
e
A2
GAUGE
PLANE
SEATING
PLANE
A1
0.004 C
0.010 M C A B
0.010
4 4
DETAIL X
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO)
INCHES
SYMBOL
SO-14
SO16 (0.300)
(SOL-16)
SO20
(SOL-20)
SO24
(SOL-24)
SO28
(SOL-28)
TOLERANCE
NOTES
0.068
0.068
0.068
0.104
0.104
0.104
0.104
MAX
A1
0.006
0.006
0.006
0.007
0.007
0.007
0.007
0.003
A2
0.057
0.057
0.057
0.092
0.092
0.092
0.092
0.002
0.017
0.017
0.017
0.017
0.017
0.017
0.017
0.003
0.009
0.009
0.009
0.011
0.011
0.011
0.011
0.001
0.193
0.341
0.390
0.406
0.504
0.606
0.704
0.004
1, 3
0.236
0.236
0.236
0.406
0.406
0.406
0.406
0.008
E1
0.154
0.154
0.154
0.295
0.295
0.295
0.295
0.004
2, 3
0.050
0.050
0.050
0.050
0.050
0.050
0.050
Basic
0.025
0.025
0.025
0.030
0.030
0.030
0.030
0.009
L1
0.041
0.041
0.041
0.056
0.056
0.056
0.056
Basic
0.013
0.013
0.013
0.020
0.020
0.020
0.020
Reference
16
20
24
28
Reference
SO-8
SO16
(0.150)
14
16
Rev. M 2/07
NOTES:
1. Plastic or metal protrusions of 0.006 maximum per side are not included.
2. Plastic interlead protrusions of 0.010 maximum per side are not included.
3. Dimensions D and E1 are measured at Datum Plane H.
4. Dimensioning and tolerancing per ASME Y14.5M-1994
20
FN6800.3
December 22, 2009
0.25 M C A B
D
A
(N/2)+1
MILLIMETERS
SYMBOL 14 LD 16 LD 20 LD 24 LD 28 LD TOLERANCE
PIN #1 I.D.
E1
(N/2)
0.20 C B A
2X
N/2 LEAD TIPS
TOP VIEW
0.05
C
SEATING
PLANE
1.20
1.20
1.20
1.20
1.20
Max
A1
0.10
0.10
0.10
0.10
0.10
0.05
A2
0.90
0.90
0.90
0.90
0.90
0.05
0.25
0.25
0.25
0.25
0.25
+0.05/-0.06
0.15
0.15
0.15
0.15
0.15
+0.05/-0.06
5.00
5.00
6.50
7.80
9.70
0.10
6.40
6.40
6.40
6.40
6.40
Basic
E1
4.40
4.40
4.40
4.40
4.40
0.10
0.65
0.65
0.65
0.65
0.65
Basic
0.60
0.60
0.60
0.60
0.60
0.15
L1
1.00
1.00
1.00
1.00
1.00
Reference
Rev. F 2/07
0.10 M C A B
b
0.10 C
N LEADS
SIDE VIEW
NOTES:
1. Dimension D does not include mold flash, protrusions or gate
burrs. Mold flash, protrusions or gate burrs shall not exceed
0.15mm per side.
2. Dimension E1 does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.25mm per
side.
SEE DETAIL X
END VIEW
L1
A2
GAUGE
PLANE
0.25
L
A1
0 - 8
DETAIL X
For information regarding Intersil Corporation and its products, see www.intersil.com
21
FN6800.3
December 22, 2009