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Design of Low Power CMOS Band-pass Gm-C Filter

for 5.8 GHz RF Transceiver of ETC System


Yan Li1,2, Hang Yu1,2, Lai Jiang1,2, Zhen Ji1,2

Shenzhen City Key Laboratory of Embedded System Design, Shenzhen University

College of Computer Science and Software Engineering, Shenzhen University
Shenzhen, 518060 China

Abstract-Since electronic tolling collection (ETC) allows

vehicles passing through without slowing down which improves
greatly transportation efficiency, it is chosen as the basic
technology for new national highway network construction. The
key component of the ETC system is a 5.8 GHz RF transceiver
that enables wireless communication between toll booth and
vehicles. A 1-V Gm-C sixth order band pass filter is designed in a
0.18 mm CMOS process for this purpose. Based on a pseudo
differential operational transconductance amplifier (OTA), a
wide tuning range and large input voltage swing is achieved. A
common-mode feed forward (CMFF) circuit is introduced to
reduce the distortion caused by common mode signal. The filter
is implemented as a cascade of three identical second-order
blocks. The power consumption is about 456 W.


A typical ETC system involving toll gate and vehicle is

given in Fig. 1. Relied on RFID technology, a road-side unit
(RSU) is installed at the toll gate and an on-board unit (OBU)
is installed on the vehicle. When a vehicle is passing through
the toll gate, the RSU works as a base station that
communicates with the OBU via DSRC. In order to decrease
interference from neighbor lanes, a high gain and narrow
beam-with antenna should be used in the RSD design. For the
OBU, since it is required to be installed inside a car and is
battery powered, the characteristics such as easy-to-portable
and low-power must be concerned.


With the rapid increase of automobiles, traffic congestion is

now a prominent problem in many major cities in China. One
way to alleviate the traffic problems is to employ information
and wireless communication technologies on transport
infrastructure and vehicles to construct urban intelligent traffic
control system. Floating car data (also known as floating
cellular data), inductive loop detection and video vehicle
detection have been developed for traffic measurement [1-3]
and radio frequency identification (RFID) technology is
widely applied traffic control. Electronic tolling collection
(ETC) is one of the main applications. On the contrary of the
traditional manual in-lane toll collection process, the ETC
allows drivers to pass through a toll booth without stopping
their cars. Thus, a registered car will be electronically debited
when it drives through a toll gate at traffic speed. Toll booth
throughput is largely increased and the traffic congestion is
minimized. Taking a long-term view, operation costs will be
also lower since additional investment in toll booth and the
number of staff dedicated to the toll collection process can be
both reduced. Based on the above advantages, the ETC is now
widely applied to enforce congestion pricing in city centers [35]. According to the advantages of the ETC, China's
transportation authority plans to construct a national ETC
based highway network with the goal of improving
Administration of the People's Republic of China (SAC) has
released the Chinese standard of Dedicated Short Range
Communications (DSRC), which set its working frequencies
range from 5.8 GHz to 5.9 GHz [7].
This work is partially supported by the project 60901016
supported by NSFC, the project 801000172 supported by SZU
R/D Fund and the SRF for ROCS, SEM.



Wake up



Information exchange

Figure 1. ETC based system. The RSU is at the toll gate and the OBU is
inside the car.

The basic issue to ensure a fast automatic toll collection

process is to realize high quality two-way communication
between the OBU inside moving object and the RSU of the
base station. A 5.8 GHz RF transceiver that complies with
China's ETC standard [7] is the key component for both part
of such a system. In particular, in order to meet the
requirement of the OBU, the power consumption of the
transceiver should be reduced as much as possible. Smart
wake-up strategy that only actives the chip during toll
collection process should be implemented and low-voltage
VLSI circuit design techniques should be applied. In the
transceiver, a filter is necessary to reject surrounding interface
of the input signal. Since Gm-C filters operate on open loop
topology, good frequency responses of signal transfer can be
obtained [8]. Compared to active R-C filters, the tuning range

of Gm-C filter is easily achieved by changing DC-bias of the

Gm cell. In this work, a 1-V sixth order band-pass filter is
design to meet the size and power limits of the 5.8 GHz RF
transceiver. The filter is implemented by cascading three
identical second order Gm-C blocks which is based on pseudo
differential operational transconductance amplifier (OTA).
The OTA operates in both weak inversion and strong
inversion regions and a wide transconductance tuning range is
achieved. In section II, the design issue about the pseudo
differential OTA, which is the basic element of a Gm-C filter,
is discussed. The filter design is described in section III.
Section IV gives the simulation results and the conclusion is
given in Section V.


Since a pseudo differential transconductance avoids the

voltage drop across the tail current source, this structure is
suitable for low power supply application. However, the
common mode signal is equal to the input differential signal in
such architecture so that carefully control on common mode
signal is required. In this work, a common mode feed forward
(CMFF) method introduced in [9] is used. An additional
transconductance with non-differential inputs is applied for
common mode cancellation, as shown in Fig. 2. The added
transconductance has the same common mode signal as that of
the original one (Gma = Gmb) but a zero differential
transconductance. Thus, the common mode signal of the
original transconductance can be rejected by subtraction the
output current at the output nodes.

Vcm + Vin/2

Vcm Vin/2


the CMRR is dominated by the matching errors at low


The circuit implementation of the CMFF architecture is

given in Fig. 3. The W/L ratio of transistors M3 and M4 is
half of the transistors M1 and M2. They sense the input
common mode signal and then send it to the main pseudo
differential pairs through the current mirror formed by the
transistors M5 to M10. The current flowing through transistor
M5 is mirrored to the main pseudo differential pairs and then
the cancellation of the input common-mode signal is obtained.
In order to improve output impedance, cascade current mirrors
are used here. Moreover, a high-swing structure [10] is
applied for achieving a large output swing. Transistors M11
to M13 are added to ensure that the transistors M1 to M4
operate in the triode region.

















Figure 3. Circuit implementation of the CMFF architecture.

Since the transistors M3 and M4 operates in the triode

region, the current IM is given by


IM = 2 K (W/L)3,4VCMVDS
Figure 2. Principle of CMFF for common mode cancellation.

The CM rejection ratio (CMRR) of the proposed CMFF

architecture is given in [9] which is

1 + s

Gma Gmb

+ s



, where K is the technology parameter which equals to COX.

When the second order effect of the transistors is not
concerned, the transconductance of the stage can be estimate
by the following formula:

Gm =

, where is the time constant of the current mirror pole. From (1),


K(W/L)1,2 VDS
1 + ds 1,2
g m11,12


The value of the GM is tunable by changing VDS via the

adjustment of Vt. A linear relationship between the Gm value
and the control parameter is achieved.


According to the power and space limits of the OBU, direct

conversion structure is chosen to realize the 5.8 GHz RF
transceiver. In a direct conversion structure, an important issue
is that clock leakage to the inputs will cause unwanted DC
bias shift. The solution is to introduce an intermediate
frequency (IF) instead of using directly the base band. Taking
into account both the power consumption, the IF is set to 10
MHz. A band-pass filter with 0 equaling to 10 MHz is then
indispensable to get the useful signal. For entirely rejection of
the unwanted background, a sixth order filter is chosen.
By biquad synthesis method, the sixth order band-pass filter
is built by cascading three identical second order blocks. Each
block is a Gm-C filter based on the OTA discussed in section
II. The architecture proposed in [11] is used for the second
order filter design. The schematic is given in Fig. 4.

is 1/gm (seen from point A), the total impedance seem from Vi
is Z+1/gm. When a large (W/L) ratio of M1 is chosen, the ac
current flowing through Z is ir=Vi / Z. Note that the (W/L)
ratio between M1 and M2 is 1/N, the total current at the input
node should be: (N+1) ir. Therefore, an effective capacitance
equaling (N+1) C can be obtained when a capacitor C is used
as the impedance.



+g +


+g +




Figure 5. Impedance scaling.


The whole system was implemented using TSMC 0.18 m

CMOS technology. Simulated by the Spectre, the I-V transfer
curve of the CMFF OTA is given in Fig. 6. When Vid change
from -0.5 V to 0.5 V, a good linearity is obtained.











Current (A)


Figure 4. System schematic of the second order filter.


The transfer function is as follows:





Figure 6. I-V transfer characteristics of the CMFF OTA.


As shown in (4), the 0 and Q of the filter can be adjusted

independently by the gm1 to gm4, which are linearly controlled
by Vt, as indicated in Fig. 3. However, in order to achieve the
desired 0, a large value of capacitor is required. Thus, the
grounded impedance must be scaled down using the
techniques described in [12]. The principle of impedance
scaling is illustrated in Fig. 5. In this architecture, because the
equivalent ac impedance of the diode connected transistor M1




( m1 )s
H(s) =
g g
s + ( m2 )s + m3 m4
C1C 2





Frequency (Hz)



Figure 7. The gain and phase responses of the sixth order filter.

The gain and phase responses of the sixth order filter are
given in Fig. 7. The design requirement is achieved. The
power consumption of the system is about 456 W.


A low power sixth order filter for the 5.8 GHz transceiver of
the ETC system is designed. The Gm-C cell based structure is
used for reduced system power consumption. A pseudo
differential OTA employing CMFF technique is designed. The
sixth order filter was realized by cascading three identical
second order filters that based on the OTA. Simulation results
show that the system satisfies the design requirements.

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