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Winbond W55Fxx
Serial Flash Memory
Data Sheet
Contents
General Description
Features
Electrical Characteristics
Timing Waveform
Applications
General Description
The W55Fxx is a serial flash memory series that is typically used as the contents upgradeable memory device of
Internet toy applications, or applications with W51300 (VoiceRecorderTM controller) for voice message storage device.
Besides that, W55Fxx can still be the W551Cxxx (Serial Voice Memory) program or data emulator. The single voltage
supply eliminates the need for an extra pump circuit during flash memory cells programming and erasing.
Part #
W55F01
W55F05
W55F10A
W55F20
Density
128K bits
512K bits
1M bits
2M bits
Features
Provides CLK, ADDR, and DATA connection interface pins to communicate with other controllers such as
Winbond PowerSpeechTM , BandDirectorTM, ViewTalkTM, . Series.
!"
!"
!"
!"
!"
!"
EOP
MODE
CTRL
VDD
VSS
CLK
DATA
ADDR
Pin Description
No.
Pin Name
I/O
Description
EOP
CTRL
VSS
Ground
ADDR
DATA
I/O
CLK
VDD
MODE
CL
DATA
ADDR
Page-code cells
/Page-code flag
Shift Register
/Address Counter
/Comparator
Outpu
Buffer
PO
Circuit
Decoder
Core
Array
Write-in Buffer
Pum
Circuit
Control
CTR
MOD
EO
Circuit
Electrical Characteristics
Symbol
TOPR
TSTG
VDDVSS
VDC
VTRAN
Condition
All pins
All pins
Rated Value
0 to +70
-65 to +150
-0.3 to +7.0
-0.5 to VDD +1.0
-1.0 to VDD +1.0
Unit
C
C
V
V
V
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability
of the device.
Parameter
Symbol
Limits
TYP.
Unit
MAX.
5.5
10
mA
VOL = 0.5V
VOH = 4.0V
2.0
-0.3
2.5
-2.5
5
-5
VDD
0.8
-
V
V
mA
mA
ILI1
VIN = 4.5V
4.5
ILI2
VIN = 0V
-4.5
VDD
Standby current
ISB
Operating current
IOP
Input voltage
VIH
VIL
IOL
IOH
MIN.
2.4
(Note)
4.5
Operating voltage
High
Low
Output current
Sink
Drive
Input leakage current of
CTRL, MODE
Input leakage current of
DATA
Condition
All inputs = GND
DATA & EOP open
In read mode
DATA & EOP open
FOSC = 1 MHz
All input pins
Parameter
MODE pulse width
CTRL pulse width
Clock frequency of ADDR
Clock frequency of CLK
Clock frequency of CTRL
Interval between ADDR end &
CLK begin
Interval between CLK & CTRL
Interval between ADDR & CTRL
Interval between addressing end
& block-erase begin
Interval between MODE rising
edge & CTRL clock begin
Interval between CTRL clock end
& MODE falling edge
Interval between MODE falling
edge & another pin active
Data access time
Data set up time
Symbol
TMP
TWP
FADDR
FCLK
FCTRL
TI
Conditions
Page coding mode
Read/Write mode
MIN.
1
400
1
TYP.
-
MAX.
700
1
1
1
-
Unit
S
S
MHz
MHz
MHz
S
TGCC
TGCA
TAE
Write mode
Page coding mode
Block erase mode
1
1
1
S
S
S
TMB
Mode selection
500
nS
TME
Mode selection
500
nS
TGM
Programming duration
Whole-chip-erase time
TRA
TWS
TAS
TRH
TWH
TAH
TPR
TWE
250
250
0
10
10
400
45
500
50
nS
nS
nS
nS
nS
nS
S
mS
Block-erase time
TBE
Read mode
Write mode
Read mode
Write mode
Write mode
Whole-chip-erase
mode
Block-erase mode
40
45
mS
Timing Waveform
! Read Cycle
! Write Cycle
1/
1/
CL
CLK
CLK
DATA
DATA
TR
TW
TR
! Address Shift-in
CL
TW
ADD
ADDR
MODE
DATA
CTRL
TA
TA
TMB
1/
CTRL
TME
CTRL
CTRL
DATA
TR
TR
Applications
$"
W55Fxx
ADDR EOP
DATA MODE
CLK
CTRL
W55Fxx
ADDR EOP
DATA MODE
CLK
CTRL
W55Fxx
ADDR EOP
DATA MODE
CLK
CTRL
W55Fxx
ADDR EOP
DATA MODE
CLK
CTRL
W55Fxx
ADDR EOP
DATA MODE
CLK
CTRL
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Headquarters
Taipei Office
11F, No. 115, Sec. 3, Min-Sheng East Rd.,
Taipei, Taiwan
TEL: 886-2-27190505
FAX: 886-2-27197502
Note: All data and specifications are subject to change without notice.
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