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Application Description
PROCONTROL P
Binary and Analog Control
Signal Processing
Control Module
for Binary Control Function 4-fold
for Analog Control Function 1- to 4-fold
1KGF 100 824, Edition 09/04
83SR04-E/R1210
Application
Features
Disturbance
SG
Module disturbance
Light-emitting diode ST signals any disturbances in the module and in data communication with the module. Lightemitting diode SG signals module disturbances only.
83SR04-E/R1210
Module design
The operating program enables the microprocessor to perform the basic operations of the module.
Process interface
All function blocks together with their inputs and outputs can
be called by the user via the Programming, Diagnosis and
Display System (PDDS).
- Process interface
- Station-bus interface
- Processing section
Station-bus interface
Processing section
Storage
medium
Operating program
EPROM
Function blocks
EPROM
User program
(structure, address, parameters, limit value
and simulation list)
EEPROM
User program
(structure, address, parameter, limit value
and simulation list)
RAM
History values
RAM
RAM
83SR04-E/R1210
Structuring
During structuring, module inputs and outputs are allocated to
the neutral inputs and outputs of the individual function
blocks, or constants and parameters or outputs of other function blocks (calculated function results) are specified to the
inputs of the function blocks. Structuring is performed on the
basis of the data supplied by the user in the form of a socalled structure list.
The following limit values of the module have to be observed
during structuring:
- max. no. of module inputs
- max. no. of simulatable module inputs
Input
Address
EG1
1,
32,
223
255
128
80
16
4
2789
768
24, 8, 7
Bit No.
Register No.
Module No.
Multi-purpose
processing
station No.
System No.
32
In the case of module inputs receiving their signal via the bus,
addressing is done by allocating the source location address
to EGn, e.g.:
287
(0 - 15)
(0 - 255)
(0 - 58)
(1 - 249)
(0 - 3 )
Address
EG1
VP2
Process interface 2
(1 - 4)
Input
Address
EG1
L
Destination telegram from POS
Addressing
General
The signal exchange between the module and the bus system takes place via a shared memory. Here, incoming telegrams to be received by the module and calculated function
results which are to leave the module are buffered.
The shared memory has source registers for telegrams to be
transmitted and sink registers for telegrams to be received.
Register numbers 0 to 63 are defined as source registers and
numbers 64 to 199 as sink registers.
The allocation of the module input and output signals to the
shared memory registers is determined from the PDDS on the
basis of data supplied by the user.
The address list for inputs is translated by the PDDS into two
module-internal lists, the Bus address list and the Allocation list Module inputs.
The bus address list contains all telegrams to be used by the
module, as well as the source location address and the sink
register number.
Incoming telegrams whose addresses are included in the bus
address list, are written to the sink register of the shared
memory. Incoming telegrams whose addresses are not included in the bus address list are ignored by the module.
The allocation list Module inputs includes, for each module
input, the associated sink register number and, in the case of
binary values, also the bit position.
83SR04-E/R1210
Parameter list
Address
AG1
1,
Simulation list
Bit No.
Register No.
(1 - 15)
(0 - 63)
Output
RM2
AR1
Relay interface 1
(1 - 4)
Checkback signal
Address formation
Event generation
The module is requested by the PROCONTROL system once
every cycle to transmit the information filed in the source
registers of the shared memory.
If any values change within the cycle time, this is treated as
an event.
The module recognizes the following occurrences as events:
The system and station addresses are set on the station bus
coupling module (or on the station bus control module) and
transmitted from this module to all other modules of a
PROCONTROL station.
The limit value list contains a set of 4 limit values for each of
a maximum of 16 function blocks GRE (limit signal formation
for one analog value). It is stored in the EEPROM and - in the
case of RAM operation - in the RAM.
Limit value lists can be changed at any time from the PDDS
and POS by way of a Job memory (RAM). Changes are
stored in the EEPROM in the case of EEPROM operation,
and in the RAM in the case of RAM operation. The limit value
list is taken over from the RAM into the EEPROM, and vice
versa, together with the user list.
83SR04-E/R1210
ST
- Module disturbance
SG
Diagnosis
The incoming telegrams, the generation of the telegrams to
be transmitted, and internal signal processing are monitored
for errors in the processing section of the module (selfdiagnosis).
In the event of a disturbance, the type of disturbance is filed
in the diagnosis register and, at the same time, a general
disturbance annunciation is sent to the PROCONTROL system.
When requested, the module transfers a telegram with the
data stored in the diagnosis register (register 246) (see
Fig.1).
The contents of the diagnosis register, the annunciations sent
over the general disturbance line, the annunciations on the
CDS and the annunciation disturbance ST are shown in Fig.1
83SR04-E/R1210
Module operating
Diagnosis
register 246
CDS messages *)
Bit Type
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
S
S
S
S
0
S
D
S
0
0
0
S
0
S
0
0
Parameter fault
Process channel fault
Processing fault
Checksum error detected
6615
6600
6601
6602
Timer defective
Module restart executed
Bus deactivation defective
6604
6605
6606
6610
6612
ST
Module not operating
Wrong firmware PROM
Hardware defect of processing section
EEPROM not valid
Processing initialization active
SST
SSG
D = Dynamic annunciations are cancelled after the contents of the diagnosis register has been transmitted
S = Static annunciations disappear automatically upon deactivation
0 = Not used
83SR04-E/R1210
83SR04-E/R1210
Command functions
Actuation from the control room
The module is controlled via the bus and does not have any
hard-wired control room interfaces.
Actuation by a higher-level automatic system
A higher-level automatic system controls the module via the
bus.
Operating modes
REG REG
50
100
ms
ms
REG
150 ms
ASI
1 2 3 1 2 3 4
REG
200/
250 ms
Process
Process
Process
Process interface 4
interface
interface
interface
1
2
3
Input TXT1
Binary control
(and analog
basic functions)
variable up to
max. 700 ms
STR
Analog control
(and bin. control)
fixed:
REG, x
x = 50 ms
x = 100 ms
x = 150 ms
x = 200 ms
x = 250 ms
Signal conditioning
with disturbance
bit output
fixed: 250 ms
50, 100
150, 200
or 250 ms
MWV
83SR04-E/R1210
Function block
This operating mode provides the function blocks for all binary control functions on the drive, group and unit control
levels. Additional analog basic functions are available.
The module cycle time is variable, i.e. it is strictly determined
by the function blocks used.
In this operating mode, no disturbance bits are transmitted for
analog values, except at the output of the function block
GRE.
Function block
Abbrev.
Abbrev.
BINARY FUNCTIONS
GOG
GUG
GRE
ANALOG FUNCTIONS
Absolute value generator
ABS
Limiter
BEG
Divider
DIV
Function generator
FKG
Factor variation
KVA
ASV
MAX
2 of 3 selection, binary
B23
MIN
2 of 4 selection, binary
B24
Multiplier
MUL
M of N selection, binary
BMN
MVN
BRA1
Delay element
PT1
Dual-BCD converter
DBC1
RAD
Dual-Decimal converter
DDC
Summing multiplier
SMU
Dynamic OR gate
DOD
SZU
ESV
Time variation
TVA
MOA
Change-over switch
UMS
MOK
OR gate
ODR
RS flipflop
RSR
Pushbutton selection
TAW
AND gate
UND
TAZ
Counter
ZAE
ORGANISATION FUNCTIONS
GROUP CONTROL
Group control function for sequential control
GSA2
GSV
Criteria indication
KRA1
KRA3
Step function
SCH1
VW2
VW3
VW4
WS4
TXT
TXT1
DRIVE CONTROL
Drive control function Unidirectional drive
ASE1
ASM1
ASS1
83SR04-E/R1210
Function block
Abbrev.
ANALOG FUNCTIONS
Absolute value generator
ABS
Limiter
BEG
Divider
DIV
Function generator
FKG
Integrator
INT
Factor variation
KVA
MAX
MIN
Multiplier
MUL
MVN
PDT
Delay element
PT1
RAD
Summing multiplier
SMU
Time variation
TVA
Change-over switch
UMS
This operating mode provides the function blocks for all analog control functions for single variable and master control. In
addition, the function blocks for drive control are available.
In this operating mode, no disturbance bits are transmitted for
analog values, except at the output of the function block
GRE.
The module cycle time can be preset in steps as fixed minimum time (see inputs in text element TXT1).
When implementing several control loops on one module, it
should be noted that the cycle time of the module increases
accordingly.
Function block
Abbrev.
BINARY FUNCTIONS
Switch-off delay element
ASV
2 of 3 selection, binary
B23
ANALOG CONTROL
2 of 4 selection, binary
B24
Manual station
HST
M of N selection, binary
BMN
PID Controller
PID1
BRA1
PI Controller
PIR1
Dual-BCD converter
DBC1
P Controller
PRE
Dual-Decimal converter
DDC
PTV
Dynamic OR gate
DOD
Setpoint integrator
SWI
ESV
Setpoint adjuster
SWV1
MOA
SZU
MOK
OR gate
ODR
RSR
AND gate
UND
Counter
ZAE
DRIVE CONTROL
Drive control function Unidirectional drive
ASE1
ASI2
ASM1
ASS1
TAW
TAZ
ORGANISATION FUNCTIONS
Text element
TXT
TXT1
GOG
GRE
GUG
10
83SR04-E/R1210
Function block
Abbrev.
ANALOG FUNCTIONS
Absolute value generator
ABS
Limiter
BEG
Divider
DIV
Enthalpy function
ENT
Function generator
FKG
Integrator
INT
Factor variation
KVA
MAX
Function block
MIN
Multiplier
MUL
MVN
PDT
Delay element
PT1
PTV
RAD
Summing multiplier
SMU
Time variation
TVA
Change-over switch
UMS
Abbrev.
BINARY FUNCTIONS
Switch-off delay element
ASV
2 of 3 selection, binary
B23
2 of 4 selection, binary
B24
M of N selection, binary
BMN
BRA1
Dual-BCD converter
DBC1
Dual-Decimal converter
DDC
Dynamic OR gate
DOD
ESV
MOA
MOK
OR gate
ODR
RSR
AND gate
UND
Counter
ZAE
ORGANISATION FUNCTIONS
Text element
TXT
TXT1
GOG
GRE
GUG
11
Process interface 1
ST
Processor
Process interface 2
Monitor
Operational
functions
Function
blocks
Process interface 3
Parallel/Serial
conversion
83SR04-E/R1210
*T
oe
User
functions
RAM
Process interface 4
User
functions
EEPROM
Shared
memory
SS
Terminal designations:
X21
ZD ZD ZD SRA *
Function diagram
SG
X11 d30
USB USA Z
Station-bus
83SR04-E/R1210
* Connect connector X11/d18 with ZD to ensure proper functioning of the module (once per subrack).
12
11
A1 1
Switchgear
8
+
10
B12 BV1
12 5 3
Disturbance
Plant
B11
F1
F2
K1
A1
A1
Q4
6
K1
L11
L21
L31
L12(N)
A1/2
A1/1
L11
L1u
83SR04-E/R1210
A1
11
12
STA1
US11
Plant
K1A
SRA ZD
SS
K1E
E11
Station-bus
E12
USA USB Z
83SR04-E/R1210
13
11
A1 1
Switchgear
10
B12 BV1
12 5 3
Disturbance
Plant
B11
K1
F1
F2
K2
ZU
K1
K2
A1
Q4
AUF
K2
K1
A1
7
L11
L21
L31
L12
A1/2
A1/1
L11
L1u
83SR04-E/R1210
A1
11
12
STA1
US11
Plant
E13
SRA ZD
SS
E11
Station-bus
E12
USA USB Z
83SR04-E/R1210
14
11
A1 1
Switchgear
8
+
12 5 3
Disturbance
Plant
10
B12 BV1
A1
F1
6
7
A1/2
A1/1
L1u
83SR04-E/R1210
A1
11
12
STA1
US11
Plant
K1A
SRA ZD
SS
K1E
E11
Station-bus
E12
USA USB Z
83SR04-E/R1210
15
B12
Power unit
B11
BV1
83SR04-E/R1210
Pos
BUS
STA1
US11
Plant
E13
SRA ZD
SS
E11
Station-bus
E12
USA USB Z
83SR04-E/R1210
16
83SR04-E/R1210
Mechanical design
Board size:
Connector:
02
E11
B11
04
E12
B12
06
E13
BV1
08
US11
STA1
10
E21
B21
12
E22
B22
14
E23
BV2
16
US21
STA2
18
E31
B31
20
E32
B32
22
E33
BV3
24
US31
STA3
26
E41
B41
28
E42
B42
30
E43
BV4
32
US41
STA4
1x
X
11
X
21
17
83SR04-E/R1210
ST
SG
ST Disturbance
SG Module
disturbance
X11
X21
ABB
83SR04
18
83SR04-E/R1210
Technical data
In addition to the system data, the following values apply:
Power supply
Operating voltage Module USA/USB
24 V
3.5 W
Z =0V
ZD = 0 V
Input values
Direct connections for 4 function units (FU)
Ex1 - Process checkback signal (EA/EZ) OFF/CLOSED
5 mA at 48 V
5 mA at 48 V
5 mA at 48 V
CLOSED/OPEN
5 mA at 48 V
x from 1 to 4
Output values
CONTACT VOLTAGES
US11 = 48 V / 30 mA
US21 = 48 V / 30 mA
US31 = 48 V / 30 mA
US41 = 48 V / 30 mA
x from 1 to 4
The outputs are short-circuit-proof and non-interacting.
PROCESS INTERFACE
Voltage supply of the 4 function units
for the command outputs Bx1 and Bx2
24 V
OFF/CLOSE
ON/OPEN
IS 80 mA
IS 80 mA
IS 80 mA
360 Rload 15 k
83SR04-E/R1210
DIN EN 61000-4-2
8 kV / 4 kV
DIN EN 61000-4-3
10V/m
DIN EN 61000-4-4
2 kV
Surge Immunity
DIN EN 61000-4-5
2 kV / 1 kV
DIN EN 61000-4-6
10 V
ORDERING DATA
Order No. Complete module:
Type designation: 83SR04-E/R1210
NOTE:
We reserve the right to make technical changes or modify the contents
of this manual without prior notice. With regard to purchase orders, the
agreed particulars shall prevail.
ABB does not accept any responsibility whatsoever for potential errors
or possible lack of information in this document.
We reserve all rights in this document and in the subject matter and
illustrations contained therein. Any reproduction in whole or in parts
is forbidden without ABB's prior written consent.
Copyright 2004 ABB
Internet: www.abb.de/utilities
20