Beruflich Dokumente
Kultur Dokumente
V100R009
Hardware Description
Issue
02
Date
2009-07-30
Huawei Technologies Co., Ltd. provides customers with comprehensive technical support and service. For any
assistance, please contact our local office or company headquarters.
Website:
http://www.huawei.com
Email:
support@huawei.com
Notice
The information in this document is subject to change without notice. Every effort has been made in the
preparation of this document to ensure accuracy of the contents, but the statements, information, and
recommendations in this document do not constitute a warranty of any kind, express or implied.
Contents
Contents
About This Document.....................................................................................................................1
1 Equipment Structure.................................................................................................................1-1
2 Cabinet.........................................................................................................................................2-1
2.1 Types of Cabinets............................................................................................................................................2-2
2.2 Configuration of the Cabinet...........................................................................................................................2-3
2.2.1 Indicators................................................................................................................................................2-3
2.2.2 DC PDU.................................................................................................................................................2-4
2.2.3 Other Configurations..............................................................................................................................2-5
2.3 Technical Specifications.................................................................................................................................2-5
3 Subrack.........................................................................................................................................3-1
3.1 Slot Access Capacity.......................................................................................................................................3-2
3.2 Structure..........................................................................................................................................................3-3
3.3 Slot Allocation.................................................................................................................................................3-4
3.4 Technical Specifications.................................................................................................................................3-6
5 SDH Boards.................................................................................................................................5-1
5.1 SL1..................................................................................................................................................................5-4
5.1.1 Version Description................................................................................................................................5-4
5.1.2 Functions and Features...........................................................................................................................5-5
5.1.3 Working Principle and Signal Flow.......................................................................................................5-6
5.1.4 Front Panel.............................................................................................................................................5-8
5.1.5 Valid Slots............................................................................................................................................5-10
5.1.6 Feature Code........................................................................................................................................5-10
5.1.7 Parameter Settings................................................................................................................................5-10
5.1.8 Technical Specifications......................................................................................................................5-11
5.2 SL1A.............................................................................................................................................................5-12
5.2.1 Version Description..............................................................................................................................5-13
5.2.2 Functions and Features.........................................................................................................................5-13
Issue 02 (2009-07-30)
Contents
5.3 SLQ1.............................................................................................................................................................5-20
5.3.1 Version Description..............................................................................................................................5-20
5.3.2 Functions and Features.........................................................................................................................5-21
5.3.3 Working Principle and Signal Flow.....................................................................................................5-22
5.3.4 Front Panel...........................................................................................................................................5-24
5.3.5 Valid Slots............................................................................................................................................5-26
5.3.6 Feature Code........................................................................................................................................5-26
5.3.7 Parameter Settings................................................................................................................................5-26
5.3.8 Technical Specifications......................................................................................................................5-27
5.4 SLQ1A..........................................................................................................................................................5-28
5.4.1 Version Description..............................................................................................................................5-28
5.4.2 Functions and Features.........................................................................................................................5-29
5.4.3 Working Principle and Signal Flow.....................................................................................................5-30
5.4.4 Front Panel...........................................................................................................................................5-32
5.4.5 Valid Slots............................................................................................................................................5-34
5.4.6 Feature Code........................................................................................................................................5-34
5.4.7 Parameter Settings................................................................................................................................5-34
5.4.8 Technical Specifications......................................................................................................................5-35
5.5 SLO1.............................................................................................................................................................5-36
5.5.1 Version Description..............................................................................................................................5-36
5.5.2 Functions and Features.........................................................................................................................5-37
5.5.3 Working Principle and Signal Flow.....................................................................................................5-38
5.5.4 Front Panel...........................................................................................................................................5-40
5.5.5 Valid Slots............................................................................................................................................5-42
5.5.6 Feature Code........................................................................................................................................5-42
5.5.7 Parameter Settings................................................................................................................................5-43
5.5.8 Technical Specifications......................................................................................................................5-43
5.6 SLT1..............................................................................................................................................................5-44
5.6.1 Version Description..............................................................................................................................5-45
5.6.2 Functions and Features.........................................................................................................................5-45
5.6.3 Working Principle and Signal Flow.....................................................................................................5-46
5.6.4 Front Panel...........................................................................................................................................5-48
5.6.5 Valid Slots............................................................................................................................................5-50
5.6.6 Parameter Settings................................................................................................................................5-50
5.6.7 Technical Specifications......................................................................................................................5-50
5.7 SLH1B...........................................................................................................................................................5-51
ii
Issue 02 (2009-07-30)
Contents
iii
Contents
5.12 SLD4A........................................................................................................................................................5-96
5.12.1 Version Description............................................................................................................................5-97
5.12.2 Functions and Features.......................................................................................................................5-97
5.12.3 Working Principle and Signal Flow...................................................................................................5-98
5.12.4 Front Panel.......................................................................................................................................5-100
5.12.5 Valid Slots........................................................................................................................................5-102
5.12.6 Feature Code....................................................................................................................................5-102
5.12.7 Parameter Settings............................................................................................................................5-102
5.12.8 Technical Specifications..................................................................................................................5-103
5.13 SLQ4.........................................................................................................................................................5-104
5.13.1 Version Description..........................................................................................................................5-104
5.13.2 Functions and Features.....................................................................................................................5-105
5.13.3 Working Principle and Signal Flow.................................................................................................5-106
5.13.4 Front Panel.......................................................................................................................................5-108
5.13.5 Valid Slots........................................................................................................................................5-110
5.13.6 Feature Code....................................................................................................................................5-110
5.13.7 Parameter Settings............................................................................................................................5-110
5.13.8 Technical Specifications..................................................................................................................5-111
5.14 SLQ4A......................................................................................................................................................5-112
5.14.1 Version Description..........................................................................................................................5-112
5.14.2 Functions and Features.....................................................................................................................5-113
5.14.3 Working Principle and Signal Flow.................................................................................................5-114
5.14.4 Front Panel.......................................................................................................................................5-116
5.14.5 Valid Slots........................................................................................................................................5-118
5.14.6 Feature Code....................................................................................................................................5-118
5.14.7 Parameter Settings............................................................................................................................5-118
5.14.8 Technical Specifications..................................................................................................................5-119
5.15 SL16..........................................................................................................................................................5-120
5.15.1 Version Description..........................................................................................................................5-120
5.15.2 Functions and Features.....................................................................................................................5-121
5.15.3 Working Principle and Signal Flow.................................................................................................5-123
5.15.4 Front Panel.......................................................................................................................................5-125
5.15.5 Valid Slots........................................................................................................................................5-127
5.15.6 Feature Code....................................................................................................................................5-127
5.15.7 Parameter Settings............................................................................................................................5-127
5.15.8 Technical Specifications..................................................................................................................5-128
5.16 SL16A.......................................................................................................................................................5-130
5.16.1 Version Description..........................................................................................................................5-130
5.16.2 Functions and Features.....................................................................................................................5-131
5.16.3 Working Principle and Signal Flow.................................................................................................5-133
iv
Issue 02 (2009-07-30)
Contents
Contents
5.22 SF64A........................................................................................................................................................5-179
5.22.1 Version Description..........................................................................................................................5-179
5.22.2 Functions and Features.....................................................................................................................5-179
5.22.3 Working Principle and Signal Flow.................................................................................................5-181
5.22.4 Front Panel.......................................................................................................................................5-182
5.22.5 Valid Slots........................................................................................................................................5-184
5.22.6 Parameter Settings............................................................................................................................5-184
5.22.7 Technical Specifications..................................................................................................................5-184
5.23 SLQ41.......................................................................................................................................................5-186
5.23.1 Version Description..........................................................................................................................5-187
5.23.2 Functions and Features.....................................................................................................................5-187
5.23.3 Working Principle and Signal Flow.................................................................................................5-188
5.23.4 Front Panel.......................................................................................................................................5-190
5.23.5 Valid Slots........................................................................................................................................5-192
5.23.6 Feature Code....................................................................................................................................5-192
5.23.7 Parameter Settings............................................................................................................................5-192
5.23.8 Technical Specifications..................................................................................................................5-193
6 PDH Boards.................................................................................................................................6-1
6.1 PQ1..................................................................................................................................................................6-3
6.1.1 Version Description................................................................................................................................6-3
6.1.2 Functions and Features...........................................................................................................................6-4
6.1.3 Working Principle and Signal Flow.......................................................................................................6-5
6.1.4 Front Panel............................................................................................................................................. 6-7
6.1.5 Valid Slots..............................................................................................................................................6-9
6.1.6 Feature Code........................................................................................................................................6-10
6.1.7 Board Protection...................................................................................................................................6-10
6.1.8 Parameter Settings................................................................................................................................6-12
6.1.9 Technical Specifications......................................................................................................................6-12
6.2 PO1................................................................................................................................................................6-13
6.2.1 Version Description..............................................................................................................................6-13
6.2.2 Functions and Features.........................................................................................................................6-13
6.2.3 Working Principle and Signal Flow.....................................................................................................6-14
6.2.4 Front Panel...........................................................................................................................................6-17
6.2.5 Valid Slots............................................................................................................................................6-18
6.2.6 Feature Code........................................................................................................................................6-19
6.2.7 Parameter Settings................................................................................................................................6-19
vi
Issue 02 (2009-07-30)
Contents
vii
Contents
6.8 DX1...............................................................................................................................................................6-61
6.8.1 Version Description..............................................................................................................................6-62
6.8.2 Functions and Features.........................................................................................................................6-62
6.8.3 Working Principle and Signal Flow.....................................................................................................6-63
6.8.4 Front Panel...........................................................................................................................................6-64
6.8.5 Valid Slots............................................................................................................................................6-66
6.8.6 Feature Code........................................................................................................................................6-66
6.8.7 Board Protection...................................................................................................................................6-67
6.8.8 Parameter Settings................................................................................................................................6-68
6.8.9 Technical Specifications......................................................................................................................6-69
6.9 DXA..............................................................................................................................................................6-69
6.9.1 Version Description..............................................................................................................................6-70
6.9.2 Functions and Features.........................................................................................................................6-70
6.9.3 Working Principle and Signal Flow.....................................................................................................6-70
6.9.4 Front Panel...........................................................................................................................................6-71
6.9.5 Valid Slots............................................................................................................................................6-73
6.9.6 Parameter Settings................................................................................................................................6-73
6.9.7 Technical Specifications......................................................................................................................6-73
6.10 SPQ4............................................................................................................................................................6-73
6.10.1 Version Description............................................................................................................................6-74
6.10.2 Functions and Features.......................................................................................................................6-74
6.10.3 Working Principle and Signal Flow...................................................................................................6-75
6.10.4 Front Panel.........................................................................................................................................6-79
6.10.5 Valid Slots..........................................................................................................................................6-81
6.10.6 Board Protection.................................................................................................................................6-81
6.10.7 Parameter Settings..............................................................................................................................6-83
6.10.8 Technical Specifications....................................................................................................................6-84
7 Data Boards.................................................................................................................................7-1
7.1 EFT8................................................................................................................................................................7-3
7.1.1 Version Description................................................................................................................................7-3
7.1.2 Functions and Features...........................................................................................................................7-3
7.1.3 Working Principle and Signal Flow.......................................................................................................7-5
7.1.4 Front Panel.............................................................................................................................................7-7
7.1.5 Valid Slots............................................................................................................................................7-10
7.1.6 Parameter Settings................................................................................................................................7-10
7.1.7 Technical Specifications......................................................................................................................7-10
7.2 EFT8A...........................................................................................................................................................7-14
7.2.1 Version Description..............................................................................................................................7-14
7.2.2 Functions and Features.........................................................................................................................7-14
viii
Issue 02 (2009-07-30)
Contents
ix
Contents
7.8 EMS2.............................................................................................................................................................7-92
7.8.1 Version Description..............................................................................................................................7-93
7.8.2 Functions and Features.........................................................................................................................7-93
7.8.3 Working Principle and Signal Flow.....................................................................................................7-96
7.8.4 Front Panel...........................................................................................................................................7-98
7.8.5 Valid Slots..........................................................................................................................................7-102
7.8.6 Feature Code......................................................................................................................................7-102
7.8.7 Parameter Settings..............................................................................................................................7-103
7.8.8 Technical Specifications....................................................................................................................7-103
7.9 EMS4...........................................................................................................................................................7-104
7.9.1 Version Description............................................................................................................................7-104
7.9.2 Functions and Features.......................................................................................................................7-104
7.9.3 Working Principle and Signal Flow...................................................................................................7-107
7.9.4 Front Panel.........................................................................................................................................7-110
7.9.5 Valid Slots..........................................................................................................................................7-113
7.9.6 Feature Code......................................................................................................................................7-113
7.9.7 Board Protection.................................................................................................................................7-114
7.9.8 Parameter Settings..............................................................................................................................7-117
7.9.9 Technical Specifications....................................................................................................................7-117
7.10 EGS4.........................................................................................................................................................7-126
7.10.1 Version Description..........................................................................................................................7-127
7.10.2 Functions and Features.....................................................................................................................7-127
7.10.3 Working Principle and Signal Flow.................................................................................................7-130
7.10.4 Front Panel.......................................................................................................................................7-133
7.10.5 Valid Slots........................................................................................................................................7-136
7.10.6 Feature Code....................................................................................................................................7-136
7.10.7 Board Protection...............................................................................................................................7-136
7.10.8 Parameter Settings............................................................................................................................7-140
7.10.9 Technical Specifications..................................................................................................................7-140
7.11 EGR2.........................................................................................................................................................7-149
7.11.1 Version Description..........................................................................................................................7-150
7.11.2 Functions and Features.....................................................................................................................7-150
7.11.3 Working Principle and Signal Flow.................................................................................................7-153
7.11.4 Front Panel.......................................................................................................................................7-155
7.11.5 Valid Slots........................................................................................................................................7-157
x
Issue 02 (2009-07-30)
Contents
xi
Contents
7.17 IDL4A.......................................................................................................................................................7-211
7.17.1 Version Description..........................................................................................................................7-211
7.17.2 Functions and Features.....................................................................................................................7-211
7.17.3 Working Principle and Signal Flow.................................................................................................7-213
7.17.4 Front Panel.......................................................................................................................................7-215
7.17.5 Valid Slots........................................................................................................................................7-217
7.17.6 Feature Code....................................................................................................................................7-217
7.17.7 Board Protection...............................................................................................................................7-217
7.17.8 Parameter Settings............................................................................................................................7-217
7.17.9 Technical Specifications..................................................................................................................7-218
7.18 IDQ1..........................................................................................................................................................7-219
7.18.1 Version Description..........................................................................................................................7-219
7.18.2 Functions and Features.....................................................................................................................7-219
7.18.3 Working Principle and Signal Flow.................................................................................................7-221
7.18.4 Front Panel.......................................................................................................................................7-223
7.18.5 Valid Slots........................................................................................................................................7-225
7.18.6 Feature Code....................................................................................................................................7-225
7.18.7 Board Protection...............................................................................................................................7-225
7.18.8 Parameter Settings............................................................................................................................7-225
7.18.9 Technical Specifications..................................................................................................................7-226
7.19 IDQ1A.......................................................................................................................................................7-227
7.19.1 Version Description..........................................................................................................................7-227
7.19.2 Functions and Features.....................................................................................................................7-227
7.19.3 Working Principle and Signal Flow.................................................................................................7-229
7.19.4 Front Panel.......................................................................................................................................7-231
7.19.5 Valid Slots........................................................................................................................................7-233
7.19.6 Feature Code....................................................................................................................................7-233
7.19.7 Board Protection...............................................................................................................................7-233
7.19.8 Parameter Settings............................................................................................................................7-233
7.19.9 Technical Specifications..................................................................................................................7-234
Issue 02 (2009-07-30)
Contents
xiii
Contents
8.8 OU08.............................................................................................................................................................8-33
8.8.1 Version Description..............................................................................................................................8-34
8.8.2 Functions and Features.........................................................................................................................8-34
8.8.3 Working Principle and Signal Flow.....................................................................................................8-35
8.8.4 Front Panel........................................................................................................................................... 8-35
8.8.5 Valid Slots............................................................................................................................................8-38
8.8.6 Technical Specifications...................................................................................................................... 8-39
8.9 MU04............................................................................................................................................................ 8-40
8.9.1 Version Description..............................................................................................................................8-40
8.9.2 Functions and Features.........................................................................................................................8-40
8.9.3 Working Principle and Signal Flow.....................................................................................................8-40
8.9.4 Front Panel........................................................................................................................................... 8-41
8.9.5 Valid Slots............................................................................................................................................8-43
8.9.6 Technical Specifications...................................................................................................................... 8-43
8.10 TSB4............................................................................................................................................................8-44
8.10.1 Version Description............................................................................................................................8-44
8.10.2 Functions and Features.......................................................................................................................8-44
8.10.3 Working Principle and Signal Flow...................................................................................................8-45
8.10.4 Front Panel......................................................................................................................................... 8-45
8.10.5 Valid Slots..........................................................................................................................................8-46
8.10.6 Technical Specifications.................................................................................................................... 8-47
8.11 TSB8............................................................................................................................................................8-48
8.11.1 Version Description............................................................................................................................8-48
8.11.2 Functions and Features.......................................................................................................................8-48
8.11.3 Working Principle and Signal Flow...................................................................................................8-49
8.11.4 Front Panel......................................................................................................................................... 8-49
8.11.5 Valid Slots..........................................................................................................................................8-50
8.11.6 Technical Specifications.................................................................................................................... 8-53
8.12 EFF8............................................................................................................................................................8-54
8.12.1 Version Description............................................................................................................................8-54
8.12.2 Functions and Features.......................................................................................................................8-54
8.12.3 Working Principle and Signal Flow...................................................................................................8-54
8.12.4 Front Panel......................................................................................................................................... 8-55
8.12.5 Valid Slots..........................................................................................................................................8-57
8.12.6 Technical Specifications.................................................................................................................... 8-58
8.13 EFF8A.........................................................................................................................................................8-59
8.13.1 Version Description............................................................................................................................8-59
8.13.2 Functions and Features.......................................................................................................................8-60
8.13.3 Working Principle and Signal Flow...................................................................................................8-60
8.13.4 Front Panel......................................................................................................................................... 8-60
xiv
Issue 02 (2009-07-30)
Contents
xv
Contents
9.3 CXS...............................................................................................................................................................9-35
9.3.1 Version Description..............................................................................................................................9-35
9.3.2 Functions and Features.........................................................................................................................9-36
9.3.3 Working Principle and Signal Flow.....................................................................................................9-37
9.3.4 Jumpers and DIP Switches...................................................................................................................9-39
9.3.5 Front Panel........................................................................................................................................... 9-41
9.3.6 Valid Slots............................................................................................................................................9-43
9.3.7 Parameter Settings................................................................................................................................9-43
9.3.8 Technical Specifications...................................................................................................................... 9-44
10 Auxiliary Boards.....................................................................................................................10-1
10.1 EOW............................................................................................................................................................10-2
10.1.1 Version Description............................................................................................................................10-2
10.1.2 Functions and Features.......................................................................................................................10-2
10.1.3 Working Principle and Signal Flow...................................................................................................10-3
10.1.4 Front Panel......................................................................................................................................... 10-4
10.1.5 Valid Slots..........................................................................................................................................10-6
10.1.6 Technical Specifications.................................................................................................................... 10-6
10.2 AUX............................................................................................................................................................10-7
10.2.1 Version Description............................................................................................................................10-7
10.2.2 Functions and Features.......................................................................................................................10-7
10.2.3 Working Principle and Signal Flow...................................................................................................10-9
10.2.4 Jumpers.............................................................................................................................................10-10
10.2.5 Front Panel.......................................................................................................................................10-11
10.2.6 Valid Slots........................................................................................................................................10-14
10.2.7 Technical Specifications..................................................................................................................10-14
10.3 SEI.............................................................................................................................................................10-14
10.3.1 Version Description..........................................................................................................................10-15
10.3.2 Functions and Features.....................................................................................................................10-15
10.3.3 Working Principle and Signal Flow.................................................................................................10-15
10.3.4 Front Panel.......................................................................................................................................10-16
10.3.5 Valid Slots........................................................................................................................................10-23
10.3.6 Technical Specifications..................................................................................................................10-23
10.4 FAN/FANB...............................................................................................................................................10-23
xvi
Issue 02 (2009-07-30)
Contents
11 WDM Boards...........................................................................................................................11-1
11.1 CMR2..........................................................................................................................................................11-2
11.1.1 Version Description............................................................................................................................11-2
11.1.2 Functions and Features.......................................................................................................................11-2
11.1.3 Working Principle and Signal Flow...................................................................................................11-3
11.1.4 Front Panel.........................................................................................................................................11-4
11.1.5 Valid Slots..........................................................................................................................................11-5
11.1.6 Feature Code......................................................................................................................................11-5
11.1.7 Technical Specifications....................................................................................................................11-6
11.2 CMR4..........................................................................................................................................................11-7
11.2.1 Version Description............................................................................................................................11-8
11.2.2 Functions and Features.......................................................................................................................11-8
11.2.3 Working Principle and Signal Flow...................................................................................................11-8
11.2.4 Front Panel.......................................................................................................................................11-10
11.2.5 Valid Slots........................................................................................................................................11-11
11.2.6 Feature Code....................................................................................................................................11-11
11.2.7 Technical Specifications..................................................................................................................11-12
11.3 MR2...........................................................................................................................................................11-13
11.3.1 Version Description..........................................................................................................................11-14
11.3.2 Functions and Features.....................................................................................................................11-14
11.3.3 Working Principle and Signal Flow.................................................................................................11-14
11.3.4 Front Panel.......................................................................................................................................11-16
11.3.5 Valid Slots........................................................................................................................................11-17
11.3.6 Feature Code....................................................................................................................................11-17
11.3.7 Technical Specifications..................................................................................................................11-18
11.4 MR2A........................................................................................................................................................11-19
11.4.1 Version Description..........................................................................................................................11-19
11.4.2 Functions and Features.....................................................................................................................11-20
11.4.3 Working Principle and Signal Flow.................................................................................................11-21
Issue 02 (2009-07-30)
xvii
Contents
11.5 MR2C........................................................................................................................................................11-24
11.5.1 Version Description..........................................................................................................................11-24
11.5.2 Functions and Features.....................................................................................................................11-25
11.5.3 Working Principle and Signal Flow.................................................................................................11-26
11.5.4 Front Panel.......................................................................................................................................11-27
11.5.5 Valid Slots........................................................................................................................................11-29
11.5.6 Technical Specifications..................................................................................................................11-29
11.6 MR4...........................................................................................................................................................11-30
11.6.1 Version Description..........................................................................................................................11-30
11.6.2 Functions and Features.....................................................................................................................11-30
11.6.3 Working Principle and Signal Flow.................................................................................................11-31
11.6.4 Front Panel.......................................................................................................................................11-32
11.6.5 Valid Slots........................................................................................................................................11-34
11.6.6 Feature Code....................................................................................................................................11-34
11.6.7 Technical Specifications..................................................................................................................11-35
11.7 LWX..........................................................................................................................................................11-36
11.7.1 Version Description..........................................................................................................................11-36
11.7.2 Functions and Features.....................................................................................................................11-36
11.7.3 Working Principle and Signal Flow.................................................................................................11-37
11.7.4 Front Panel.......................................................................................................................................11-39
11.7.5 Valid Slots........................................................................................................................................11-41
11.7.6 Feature Code....................................................................................................................................11-41
11.7.7 Parameter Settings............................................................................................................................11-41
11.7.8 Technical Specifications..................................................................................................................11-42
11.8 FIB.............................................................................................................................................................11-45
11.8.1 Version Description..........................................................................................................................11-45
11.8.2 Functions and Features.....................................................................................................................11-45
11.8.3 Working Principle and Signal Flow.................................................................................................11-46
11.8.4 Front Panel.......................................................................................................................................11-46
11.8.5 Valid Slots........................................................................................................................................11-48
11.8.6 Technical Specifications..................................................................................................................11-48
12 Microwave Boards..................................................................................................................12-1
12.1 IFSD1..........................................................................................................................................................12-2
12.1.1 Version Description............................................................................................................................12-2
12.1.2 Functions and Features.......................................................................................................................12-2
12.1.3 Working Principle and Signal Flow...................................................................................................12-4
12.1.4 Front Panel.........................................................................................................................................12-5
12.1.5 Valid Slots..........................................................................................................................................12-8
12.1.6 Parameter Settings..............................................................................................................................12-8
xviii
Issue 02 (2009-07-30)
Contents
xix
Contents
13.5 RPC02.......................................................................................................................................................13-35
13.5.1 Version Description..........................................................................................................................13-35
13.5.2 Functions and Features.....................................................................................................................13-35
13.5.3 Working Principle and Signal Flow.................................................................................................13-36
13.5.4 Front Panel.......................................................................................................................................13-38
13.5.5 Valid Slots........................................................................................................................................13-39
13.5.6 Jumpers and DIP Switches...............................................................................................................13-39
13.5.7 Feature Code....................................................................................................................................13-40
13.5.8 Parameter Settings............................................................................................................................13-40
13.5.9 Technical Specifications..................................................................................................................13-41
13.6 OBU1........................................................................................................................................................13-42
13.6.1 Version Description..........................................................................................................................13-42
13.6.2 Functions and Features.....................................................................................................................13-42
13.6.3 Working Principle and Signal Flow.................................................................................................13-43
13.6.4 Front Panel.......................................................................................................................................13-45
13.6.5 Valid Slots........................................................................................................................................13-46
13.6.6 Feature Code....................................................................................................................................13-46
13.6.7 Parameter Settings............................................................................................................................13-47
13.6.8 Technical Specifications..................................................................................................................13-47
13.7 DCU..........................................................................................................................................................13-48
13.7.1 Version Description..........................................................................................................................13-49
13.7.2 Functions and Features.....................................................................................................................13-49
13.7.3 Working Principle and Signal Flow.................................................................................................13-51
13.7.4 Front Panel.......................................................................................................................................13-51
13.7.5 Valid Slots........................................................................................................................................13-54
13.7.6 Feature Code....................................................................................................................................13-54
13.7.7 Technical Specifications..................................................................................................................13-55
14 Power Boards...........................................................................................................................14-1
14.1 UPM............................................................................................................................................................14-2
14.1.1 Version Description............................................................................................................................14-2
14.1.2 Functions and Features.......................................................................................................................14-2
14.1.3 Working Principle and Signal Flow...................................................................................................14-3
14.1.4 Front Panel.........................................................................................................................................14-4
14.1.5 Valid Slots..........................................................................................................................................14-6
14.1.6 Technical Specifications....................................................................................................................14-6
14.2 PIU..............................................................................................................................................................14-7
14.2.1 Version Description............................................................................................................................14-8
14.2.2 Functions and Features.......................................................................................................................14-8
14.2.3 Working Principle and Signal Flow...................................................................................................14-8
14.2.4 Front Panel.........................................................................................................................................14-9
14.2.5 Valid Slots........................................................................................................................................14-11
xx
Issue 02 (2009-07-30)
Contents
15 Cables.......................................................................................................................................15-1
15.1 Fiber Jumper................................................................................................................................................15-2
15.1.1 Categories of the Fiber Jumpers.........................................................................................................15-2
15.1.2 Connector...........................................................................................................................................15-2
15.2 Power Cable and Grounding Cable.............................................................................................................15-5
15.2.1 Power Cable of the Cabinet................................................................................................................15-5
15.2.2 Grounding Cable of the Cabinet Door............................................................................................... 15-7
15.2.3 Subrack Power Cable.........................................................................................................................15-8
15.2.4 COA Power Cable..............................................................................................................................15-9
15.3 Alarm Cable..............................................................................................................................................15-11
15.3.1 Cabinet Indicator Cable....................................................................................................................15-11
15.3.2 Indicator Cascading Cable Between Subracks or Alarm Cascading Cable Between the OptiX OSN
Equipment...................................................................................................................................................15-13
15.3.3 Alarm Cascading Cable Between the OptiX OSN Equipment and the Other Huawei Transmission
Equipment...................................................................................................................................................15-14
15.3.4 Alarm Input/Output Cable................................................................................................................15-16
15.4 Management Cable....................................................................................................................................15-17
15.4.1 OAM Serial Port Cable....................................................................................................................15-18
15.4.2 Serial 1 to 4/F1/F&f Serial Port Cable.............................................................................................15-19
15.4.3 RS-232/RS-422 Serial Port Cable....................................................................................................15-21
15.4.4 Ordinary Telephone Line.................................................................................................................15-22
15.4.5 COA Cascading Cable.....................................................................................................................15-23
15.4.6 Straight Through Cable....................................................................................................................15-25
15.4.7 Crossover Cable...............................................................................................................................15-26
15.5 Signal Cable..............................................................................................................................................15-27
15.5.1 75-ohm 8xE1 Cable..........................................................................................................................15-28
15.5.2 120-ohm 8xE1 Cable........................................................................................................................15-30
15.5.3 120-ohm 21xE1 Cable......................................................................................................................15-32
15.5.4 E3/T3/STM-1 Cable.........................................................................................................................15-35
15.5.5 Framed E1 Cable..............................................................................................................................15-37
15.5.6 Nx64 kbit/s Cable.............................................................................................................................15-37
15.6 Clock Cable...............................................................................................................................................15-55
15.6.1 Clock Cable......................................................................................................................................15-56
15.6.2 One-Channel Clock Transit Cable and Two-Channel Clock Transit Cable....................................15-57
A Indicators...................................................................................................................................A-1
A.1 Indicators on the Cabinet...............................................................................................................................A-2
A.2 Alarm Indicators on the Boards.....................................................................................................................A-2
B Labels..........................................................................................................................................B-1
B.1 Safety Labels..................................................................................................................................................B-2
B.1.1 Label Description..................................................................................................................................B-2
B.1.2 Label Position.......................................................................................................................................B-3
Issue 02 (2009-07-30)
xxi
Contents
G Glossary.....................................................................................................................................G-1
H Acronyms and Abbreviations...............................................................................................H-1
xxii
Issue 02 (2009-07-30)
Figures
Figures
Figure 1-1 Appearance of the OptiX OSN 3500 II that is installed in the ETSI cabinet.....................................1-2
Figure 1-2 Appearance of the OptiX OSN 3500 II subrack that is installed with boards....................................1-3
Figure 2-1 Appearance of the N63E cabinet........................................................................................................2-2
Figure 2-2 ETSI cabinet.......................................................................................................................................2-3
Figure 2-3 Appearance of the DC PDU...............................................................................................................2-5
Figure 3-1 Access capacity of each slot when using the Q5CXL series boards..................................................3-2
Figure 3-2 Access capacity of each slot when using the Q6CXL series boards..................................................3-2
Figure 3-3 Access capacity of each slot when using the Q5CXS series boards...................................................3-3
Figure 3-4 Structure of the OptiX OSN 3500 II subrack.....................................................................................3-4
Figure 3-5 Slot layout of the OptiX OSN 3500 II subrack..................................................................................3-5
Figure 4-1 Bar code of a board.............................................................................................................................4-4
Figure 5-1 Functional block diagram of the SL1.................................................................................................5-7
Figure 5-2 Front panel of the SL1........................................................................................................................5-9
Figure 5-3 Functional block diagram of the SL1A............................................................................................5-14
Figure 5-4 Front panel of the SL1A...................................................................................................................5-17
Figure 5-5 Functional block diagram of the SLQ1............................................................................................5-23
Figure 5-6 Front panel of the SLQ1...................................................................................................................5-25
Figure 5-7 Functional block diagram of the SLQ1A.........................................................................................5-30
Figure 5-8 Front panel of the SLQ1A................................................................................................................5-33
Figure 5-9 Functional block diagram of the SLO1............................................................................................5-39
Figure 5-10 Front panel of the SLO1.................................................................................................................5-41
Figure 5-11 Functional block diagram of the SLT1...........................................................................................5-46
Figure 5-12 Front panel of the SLT1..................................................................................................................5-49
Figure 5-13 Functional block diagram of the SLH1B when the SLH1B works with the EU08........................5-54
Figure 5-14 Functional block diagram of the SLH1B when the SLH1B works with the OU08.......................5-55
Figure 5-15 Front panel of the SLH1B..............................................................................................................5-57
Figure 5-16 1:3 TPS protection provided by the SLH1B...................................................................................5-58
Figure 5-17 Slot configuration for the two 1:3 TPS protection groups of the SLH1B......................................5-59
Figure 5-18 Functional block diagram of the SEP1...........................................................................................5-64
Figure 5-19 Functional block diagram of the SEP when the SEP works with the EU08..................................5-65
Figure 5-20 Functional block diagram of the SEP when the SEP works with the OU08..................................5-66
Figure 5-21 Front panel of the SEP1..................................................................................................................5-68
Figure 5-22 TPS protection provided by the SEP1............................................................................................5-70
Issue 02 (2009-07-30)
xxiii
Figures
Figure 5-23 Slot configuration for two 1:3 TPS protection groups of the SEP1...............................................5-71
Figure 5-24 Functional block diagram of the SL4.............................................................................................5-75
Figure 5-25 Front panel of the SL4....................................................................................................................5-77
Figure 5-26 Functional block diagram of the SL4A..........................................................................................5-83
Figure 5-27 Front panel of the SL4A.................................................................................................................5-85
Figure 5-28 Functional block diagram of the SLD4..........................................................................................5-91
Figure 5-29 Front panel of the SLD4.................................................................................................................5-93
Figure 5-30 Functional block diagram of the SLD4A.......................................................................................5-99
Figure 5-31 Front panel of the SLD4A............................................................................................................5-101
Figure 5-32 Functional block diagram of the SLQ4........................................................................................ 5-107
Figure 5-33 Front panel of the SLQ4...............................................................................................................5-109
Figure 5-34 Functional block diagram of the SLQ4A..................................................................................... 5-114
Figure 5-35 Front panel of the SLQ4A............................................................................................................5-117
Figure 5-36 Functional block diagram of the SL16.........................................................................................5-123
Figure 5-37 Front panel of the SL16................................................................................................................5-126
Figure 5-38 Functional block diagram of the N1SL16A/N2SL16A/N3SL16A.............................................. 5-133
Figure 5-39 Front panel of the SL16A.............................................................................................................5-135
Figure 5-40 Functional block diagram of the SLD16...................................................................................... 5-141
Figure 5-41 Front panel of the SLD16.............................................................................................................5-143
Figure 5-42 Functional block diagram of the SLQ16...................................................................................... 5-149
Figure 5-43 Front panel of the N1SLQ16........................................................................................................5-151
Figure 5-44 Front panel of the N2SLQ16........................................................................................................5-152
Figure 5-45 Functional block diagram of the SF16......................................................................................... 5-157
Figure 5-46 Front panel of the SF16................................................................................................................5-160
Figure 5-47 Functional block diagram of the N1SL64.................................................................................... 5-165
Figure 5-48 Appearance of the front panel of the SL64...................................................................................5-168
Figure 5-49 Functional block diagram of the SF64......................................................................................... 5-174
Figure 5-50 Front panel of the SF64................................................................................................................5-176
Figure 5-51 Functional block diagram of the SF64A.......................................................................................5-181
Figure 5-52 Front panel of the SF64A............................................................................................................. 5-183
Figure 5-53 Functional block diagram of the SLQ41...................................................................................... 5-189
Figure 5-54 Front panel of the SLQ41.............................................................................................................5-191
Figure 6-1 Functional block diagram of the PQ1.................................................................................................6-5
Figure 6-2 Functional block diagram of the E1 mapping/demapping module.....................................................6-6
Figure 6-3 Front panel of the PQ1........................................................................................................................6-8
Figure 6-4 TPS protection provided by the PQ1................................................................................................6-11
Figure 6-5 Slot configuration for the 1:10 TPS protection of the PQ1..............................................................6-12
Figure 6-6 Functional block diagram of the PO1...............................................................................................6-15
Figure 6-7 Functional block diagram of the E1 mapping/demapping module...................................................6-15
Figure 6-8 Front panel of the PO1......................................................................................................................6-17
Figure 6-9 Functional block diagram of the PQM.............................................................................................6-22
Figure 6-10 Functional block diagram of the E1/T1 mapping/demapping module...........................................6-22
xxiv
Issue 02 (2009-07-30)
Figures
xxv
Figures
xxvi
Issue 02 (2009-07-30)
Figures
Figure 7-46 Connection for testing the throughput specifications, packet loss ratio in the case of overloading, and
latency specifications........................................................................................................................................ 7-141
Figure 7-47 Connection for testing the back-to-back specifications................................................................7-141
Figure 7-48 Functional block diagram of the EGR2........................................................................................7-153
Figure 7-49 Front panel of the EGR2...............................................................................................................7-156
Figure 7-50 Connection for testing the throughput specifications, packet loss ratio in the case of overloading,
latency specifications, and back-to-back specifications....................................................................................7-159
Figure 7-51 Functional block diagram of the EMR0.......................................................................................7-166
Figure 7-52 Front panel of the EMR0..............................................................................................................7-169
Figure 7-53 Connection for testing the throughput specifications, packet loss ratio in the case of overloading,
latency specifications, and back-to-back specifications....................................................................................7-173
Figure 7-54 Functional block diagram of the EAS2........................................................................................7-183
Figure 7-55 Front panel of the EAS2...............................................................................................................7-184
Figure 7-56 Connection for testing the throughput specifications, packet loss ratio in the case of overloading,
latency specifications, and back-to-back specifications....................................................................................7-186
Figure 7-57 Functional block diagram of the ADL4........................................................................................7-191
Figure 7-58 Front panel of the ADL4..............................................................................................................7-193
Figure 7-59 Functional block diagram of the ADQ1.......................................................................................7-198
Figure 7-60 Front panel of the ADQ1..............................................................................................................7-200
Figure 7-61 Functional block diagram of the IDL4.........................................................................................7-205
Figure 7-62 Front panel of the IDL4................................................................................................................7-208
Figure 7-63 Functional block diagram of the IDL4A......................................................................................7-214
Figure 7-64 Front panel of the IDL4A.............................................................................................................7-216
Figure 7-65 Functional block diagram of the IDQ1.........................................................................................7-221
Figure 7-66 Front panel of the IDQ1................................................................................................................7-224
Figure 7-67 Functional block diagram of the IDQ1A......................................................................................7-230
Figure 7-68 Front panel of the IDQ1A.............................................................................................................7-232
Figure 8-1 Functional block diagram of the D12B..............................................................................................8-3
Figure 8-2 Front panel of the D12B.....................................................................................................................8-4
Figure 8-3 Functional block diagram of the D12S...............................................................................................8-8
Figure 8-4 Front panel of the D12S......................................................................................................................8-9
Figure 8-5 Functional block diagram of the D75S.............................................................................................8-13
Figure 8-6 Front panel of the D75S....................................................................................................................8-14
Figure 8-7 Functional block diagram of the D34S.............................................................................................8-18
Figure 8-8 Front panel of the D34S....................................................................................................................8-19
Figure 8-9 Functional block diagram of the C34S.............................................................................................8-21
Figure 8-10 Front panel of the C34S..................................................................................................................8-23
Figure 8-11 Functional block diagram of the EU04...........................................................................................8-26
Figure 8-12 Front panel of the EU04.................................................................................................................8-27
Figure 8-13 Functional block diagram of the EU08...........................................................................................8-30
Figure 8-14 Front panel of the EU08.................................................................................................................8-31
Figure 8-15 Functional block diagram of the OU08..........................................................................................8-35
Figure 8-16 Front panel of the N1OU08............................................................................................................8-36
Issue 02 (2009-07-30)
xxvii
Figures
Issue 02 (2009-07-30)
Figures
xxix
Figures
Issue 02 (2009-07-30)
Figures
Issue 02 (2009-07-30)
xxxi
Tables
Tables
Table 2-1 Meanings of the status of the indicators...............................................................................................2-4
Table 2-2 Technical specifications of the ETSI cabinet.......................................................................................2-6
Table 3-1 Mapping relation between slots for the interface boards and slots for the processing boards.............3-6
Table 3-2 Paired slots...........................................................................................................................................3-6
Table 3-3 Dimensions and weight of the OptiX OSN 3500 II subrack................................................................3-7
Table 3-4 Maximum power consumption of the OptiX OSN 3500 II subrack....................................................3-7
Table 4-1 Appearances and dimensions of the boards used on the OptiX OSN 3500 II.....................................4-2
Table 4-2 SDH boards that the OptiX OSN 3500 II supports..............................................................................4-5
Table 4-3 PDH boards that the OptiX OSN 3500 II supports..............................................................................4-6
Table 4-4 Data boards that the OptiX OSN 3500 II supports..............................................................................4-6
Table 4-5 Interface boards and switching and bridging boards that the OptiX OSN 3500 II supports................4-7
Table 4-6 Cross-connect boards and system control boards that the OptiX OSN 3500 II supports....................4-8
Table 4-7 Auxiliary boards that the OptiX OSN 3500 II supports.......................................................................4-9
Table 4-8 WDM boards that the OptiX OSN 3500 II supports............................................................................4-9
Table 4-9 Microwave boards that the OptiX OSN 3500 II supports....................................................................4-9
Table 4-10 Optical amplifier boards and dispersion compensation boards that the OptiX OSN 3500 II supports
.............................................................................................................................................................................4-10
Table 4-11 Power boards that the OptiX OSN 3500 II supports........................................................................4-10
Table 5-1 Versions of the SL1..............................................................................................................................5-4
Table 5-2 Functions and features of the SL1........................................................................................................5-5
Table 5-3 Optical interfaces of the SL1..............................................................................................................5-10
Table 5-4 Relationship between the feature code of the SL1 and the type of optical interface.........................5-10
Table 5-5 Parameters specified for the optical interfaces of the SL1.................................................................5-11
Table 5-6 Functions and features of the SL1A...................................................................................................5-13
Table 5-7 Optical interfaces of the SL1A...........................................................................................................5-18
Table 5-8 Relationship between the feature code of the SL1A and the type of optical interface......................5-18
Table 5-9 Parameters specified for the optical interfaces of the SL1A..............................................................5-19
Table 5-10 Versions of the SLQ1.......................................................................................................................5-21
Table 5-11 Functions and features of the SLQ1.................................................................................................5-21
Table 5-12 Optical interfaces of the SLQ1.........................................................................................................5-26
Table 5-13 Relationship between the feature code of the SLQ1 and the type of optical interface....................5-26
Table 5-14 Parameters specified for the optical interfaces of the SLQ1............................................................5-27
Table 5-15 Functions and features of the SLQ1A..............................................................................................5-29
Table 5-16 Optical interfaces of the SLQ1A......................................................................................................5-34
Issue 02 (2009-07-30)
xxxiii
Tables
xxxiv
Issue 02 (2009-07-30)
Tables
Table 5-58 Parameters specified for the optical interfaces of the SLQ4..........................................................5-111
Table 5-59 Functions and features of the SLQ4A............................................................................................5-113
Table 5-60 Optical interfaces of the SLQ4A....................................................................................................5-118
Table 5-61 Relationship between the feature code of the SLQ4A and the type of optical interface...............5-118
Table 5-62 Parameters specified for the optical interfaces of the SLQ4A.......................................................5-119
Table 5-63 Versions of the SL16......................................................................................................................5-121
Table 5-64 Functions and features of the SL16................................................................................................5-121
Table 5-65 Optical interfaces of the SL16........................................................................................................5-127
Table 5-66 Relationship between the feature code of the SL16 and the type of optical interface...................5-127
Table 5-67 Parameters specified for the optical interfaces of the SL16...........................................................5-128
Table 5-68 Parameters specified for the optical interfaces that comply with the standard wavelengths specified in
ITU-T G.692......................................................................................................................................................5-129
Table 5-69 Versions of the SL16A...................................................................................................................5-130
Table 5-70 Functions and features of the SL16A.............................................................................................5-131
Table 5-71 Optical interfaces of the SL16A.....................................................................................................5-136
Table 5-72 Relationship between the feature code of the SL16A and the type of optical interface................5-136
Table 5-73 Parameters specified for the optical interfaces of the SL16A........................................................5-137
Table 5-74 Functions and features of the SLD16.............................................................................................5-139
Table 5-75 Optical interfaces of the SLD16.....................................................................................................5-144
Table 5-76 Relationship between the feature code of the SLD16 and the type of optical interface................5-144
Table 5-77 Parameters specified for the optical interfaces of the SLD16........................................................5-145
Table 5-78 Versions of the SLQ16...................................................................................................................5-147
Table 5-79 Functions and features of the SLQ16.............................................................................................5-147
Table 5-80 Optical interfaces of the SLQ16.....................................................................................................5-153
Table 5-81 Relationship between the feature code of the SLQ16 and the type of optical interface................5-153
Table 5-82 Parameters specified for the optical interfaces of the SLQ16........................................................5-154
Table 5-83 Functions and features of the SF16................................................................................................5-156
Table 5-84 Optical interfaces of the SF16........................................................................................................5-161
Table 5-85 Parameters specified for the optical interfaces of the SF16...........................................................5-161
Table 5-86 Parameters specified for the optical interfaces that comply with the standard wavelengths specified in
ITU-T G.692......................................................................................................................................................5-162
Table 5-87 Functions and features of the SL64................................................................................................5-164
Table 5-88 Optical interfaces of the SL64........................................................................................................5-169
Table 5-89 Relationship between the feature code of the SL64 and the type of optical interface...................5-169
Table 5-90 Parameters specified for the optical interfaces of the SL64...........................................................5-170
Table 5-91 Parameters specified for the optical interfaces that comply with the standard wavelengths specified in
ITU-T G.692......................................................................................................................................................5-171
Table 5-92 Functions and features of the SF64................................................................................................5-173
Table 5-93 Optical interfaces of the SF64........................................................................................................5-177
Table 5-94 Specifications of optical interfaces of the SF64.............................................................................5-177
Table 5-95 Parameters specified for the optical interfaces that comply with the standard wavelengths specified in
ITU-T G.692......................................................................................................................................................5-178
Table 5-96 Functions and features of the SF64A.............................................................................................5-179
Issue 02 (2009-07-30)
xxxv
Tables
xxxvi
Issue 02 (2009-07-30)
Tables
Table 6-31 Relationship between the feature code of the DX1 and the type of interface impedance................6-66
Table 6-32 Slots for the DX1 and DM12...........................................................................................................6-68
Table 6-33 Functions and features of the DXA..................................................................................................6-70
Table 6-34 Versions of the SPQ4.......................................................................................................................6-74
Table 6-35 Functions and features of the SPQ4.................................................................................................6-74
Table 6-36 Slots valid for the SPQ4 and the corresponding slots for the MU04...............................................6-81
Table 6-37 Slots for the SPQ4, MU04, and TSB8/TSB4...................................................................................6-83
Table 7-1 Functions and features of the EFT8.....................................................................................................7-3
Table 7-2 Interfaces of the EFT8..........................................................................................................................7-9
Table 7-3 Pins of the RJ-45 connector ................................................................................................................7-9
Table 7-4 Throughput specifications of the EFT8..............................................................................................7-11
Table 7-5 Packet loss ratio in the case of overloading of the EFT8...................................................................7-12
Table 7-6 Latency specifications of the EFT8....................................................................................................7-12
Table 7-7 Back-to-back specifications of the EFT8...........................................................................................7-13
Table 7-8 Functions and features of the EFT8A................................................................................................7-14
Table 7-9 Interfaces of the EFT8A.....................................................................................................................7-19
Table 7-10 Pins of the RJ-45 connector.............................................................................................................7-19
Table 7-11 Throughput specifications of the EFT8A.........................................................................................7-22
Table 7-12 Packet loss ratio in the case of overloading of the EFT8A..............................................................7-22
Table 7-13 Latency specifications of the EFT8A...............................................................................................7-23
Table 7-14 Back-to-back specifications of the EFT8A......................................................................................7-23
Table 7-15 Functions and features of the EGT2.................................................................................................7-25
Table 7-16 Optical interfaces of the N1EGT2/N2EGT2....................................................................................7-31
Table 7-17 Electrical interfaces of the N2EGT2................................................................................................7-31
Table 7-18 Pin assignments of the RJ-45 interface of the N2EGT2..................................................................7-31
Table 7-19 Relationship between the feature code of the EGT2 and the type of interface................................7-32
Table 7-20 Parameters specified for the optical interfaces of the EGT2............................................................7-33
Table 7-21 Throughput specifications of the EGT2...........................................................................................7-34
Table 7-22 Packet loss ratio in the case of overloading of the EGT2................................................................7-35
Table 7-23 Latency specifications of the EGT2.................................................................................................7-35
Table 7-24 Back-to-back specifications of the EGT2........................................................................................7-36
Table 7-25 Versions of the EFS0.......................................................................................................................7-37
Table 7-26 Functions and features of the EFS0.................................................................................................7-38
Table 7-27 Slots valid for the EFS0 and the corresponding slots for the ETF8 and EFF8................................7-45
Table 7-28 Slots for the EFS0, ETS8, and TSB8...............................................................................................7-46
Table 7-29 Throughput specifications of the EFS0............................................................................................7-48
Table 7-30 Packet loss ratio in the case of overloading of the EFS0.................................................................7-48
Table 7-31 Latency specifications of the EFS0..................................................................................................7-49
Table 7-32 Back-to-back specifications of the EFS0.........................................................................................7-50
Table 7-33 Functions and features of the EFS0A...............................................................................................7-52
Table 7-34 Slots valid for the EFS0A and the corresponding slots for the ETF8 and EFF8.............................7-59
Table 7-35 Slots for the EFS0A, ETS8, and TSB8............................................................................................7-60
Issue 02 (2009-07-30)
xxxvii
Tables
xxxviii
Issue 02 (2009-07-30)
Tables
Table 7-77 Latency specifications of the EMS4 (24 VC-3s are bound on the GE port)..................................7-123
Table 7-78 Back-to-back specifications of the EMS4 (one VC-4 is bound on the FE port)............................7-124
Table 7-79 Back-to-back specifications of the EMS4 (24 VC-3s are bound on the GE port).........................7-125
Table 7-80 Versions of the EGS4.....................................................................................................................7-127
Table 7-81 Functions and features of the EGS4...............................................................................................7-128
Table 7-82 Optical interfaces of the N1EGS4/N3EGS4/N4EGS4...................................................................7-135
Table 7-83 Electrical interfaces of the N1EGS4/N4EGS4...............................................................................7-135
Table 7-84 Pin assignments of the RJ-45 interface of the N1EGS4/N4EGS4.................................................7-135
Table 7-85 Relationship between the feature code of the EGS4 and the type of interface..............................7-136
Table 7-86 Parameters specified for the optical interfaces of the EGS4..........................................................7-140
Table 7-87 Throughput specifications of the EGS4 (one VC-4 is bound on the FE port)...............................7-142
Table 7-88 Throughput specifications of the EGS4 (24 VC-3s are bound on the GE port).............................7-142
Table 7-89 Packet loss ratio in the case of overloading of the EGS4 (one VC-4 is bound on the FE port)
...........................................................................................................................................................................7-143
Table 7-90 Packet loss ratio in the case of overloading of the EGS4 (24 VC-3s are bound on the GE port)
...........................................................................................................................................................................7-144
Table 7-91 Latency specifications of the EGS4 (one VC-4 is bound on the FE port).....................................7-145
Table 7-92 Latency specifications of the EGS4 (24 VC-3s are bound on the GE port)...................................7-146
Table 7-93 Back-to-back specifications of the EGS4 (one VC-4 is bound on the FE port).............................7-147
Table 7-94 Back-to-back specifications of the EGS4 (24 VC-3s are bound on the GE port)..........................7-148
Table 7-95 Functions and features of the EGR2..............................................................................................7-150
Table 7-96 Optical interfaces of the EGR2 .....................................................................................................7-157
Table 7-97 Relationship between the feature code of the EGR2 and the type of optical interface..................7-157
Table 7-98 Parameters specified for the optical interfaces of the EGR2.........................................................7-158
Table 7-99 Throughput specifications of the EGR2.........................................................................................7-159
Table 7-100 Packet loss ratio in the case of overloading of the EGR2............................................................7-160
Table 7-101 Latency specifications of the EGR2.............................................................................................7-161
Table 7-102 Back-to-back specifications of the EGR2....................................................................................7-161
Table 7-103 Functions and features of the EMR0............................................................................................7-163
Table 7-104 Interfaces of the EMR0................................................................................................................7-170
Table 7-105 Slots valid for the EMR0 and the corresponding slots for the ETF8 and EFF8..........................7-170
Table 7-106 Relationship between the feature code of the EMR0 and the type of optical interface...............7-171
Table 7-107 Parameters specified for the optical interfaces of the EMR0.......................................................7-172
Table 7-108 Throughput specifications of the EMR0 (eight VC-4s are bound on the FE port)......................7-173
Table 7-109 Throughput specifications of the EMR0 (eight VC-4s are bound on the GE port).....................7-174
Table 7-110 Packet loss ratio in the case of overloading of the EMR0 (eight VC-4s are bound on the FE port)
...........................................................................................................................................................................7-175
Table 7-111 Packet loss ratio in the case of overloading of the EMR0 (eight VC-4s are bound on the GE port)
...........................................................................................................................................................................7-175
Table 7-112 Latency specifications of the EMR0 (eight VC-4s are bound on the FE port)............................7-176
Table 7-113 Latency specifications of the EMR0 (eight VC-4s are bound on the GE port)...........................7-177
Table 7-114 Back-to-back specifications of the EMR0 (eight VC-4s are bound on the FE port)...................7-178
Table 7-115 Back-to-back specifications of the EMR0 (eight VC-4s are bound on the GE port)...................7-179
Issue 02 (2009-07-30)
xxxix
Tables
xl
Issue 02 (2009-07-30)
Tables
xli
Tables
xlii
Issue 02 (2009-07-30)
Tables
xliii
Tables
xliv
Issue 02 (2009-07-30)
Tables
Table 13-10 Parameters specified for the optical interfaces of the BPA..........................................................13-16
Table 13-11 Versions of the COA....................................................................................................................13-17
Table 13-12 Functions and features of the 61COA/N1COA...........................................................................13-18
Table 13-13 Functions and features of the 62COA..........................................................................................13-20
Table 13-14 Pin assignments of the RS-232 serial port...................................................................................13-24
Table 13-15 Pin assignments of the MONITOR interfaces.............................................................................13-25
Table 13-16 Pin assignments of the RJ-45 connector of the 62COA...............................................................13-25
Table 13-17 Relationship between the feature code of the 61COA and the output optical power..................13-27
Table 13-18 Parameters specified for the optical interfaces of the COA.........................................................13-27
Table 13-19 Functions and features of the RPC01...........................................................................................13-29
Table 13-20 Interfaces of the RPC01...............................................................................................................13-32
Table 13-21 Feature code of the RPC01..........................................................................................................13-33
Table 13-22 Serial numbers of the optical interfaces on the front panel of the RPC01 on the NMS..............13-33
Table 13-23 Parameters specified for the optical interfaces of the RPC01......................................................13-34
Table 13-24 Functions and features of the RPC02...........................................................................................13-36
Table 13-25 Interfaces of the RPC02...............................................................................................................13-39
Table 13-26 Feature code of the RPC02..........................................................................................................13-40
Table 13-27 Serial numbers of the optical interfaces on the front panel of the RPC02 on the NMS..............13-40
Table 13-28 Parameters specified for the optical interfaces of the RPC02......................................................13-41
Table 13-29 Functions and features of the OBU1............................................................................................13-42
Table 13-30 Optical interfaces of the OBU1....................................................................................................13-46
Table 13-31 Feature code of the OBU1............................................................................................................13-46
Table 13-32 Parameters specified for the optical interfaces of the OBU1.......................................................13-47
Table 13-33 Versions of the DCU....................................................................................................................13-49
Table 13-34 Functions and features of the DCU..............................................................................................13-50
Table 13-35 Optical interface of the one-interface DCU.................................................................................13-54
Table 13-36 Optical interfaces of the two-interface DCU................................................................................13-54
Table 13-37 Relationship between the feature code of the DCU and the compensated dispersion.................13-54
Table 13-38 Parameters specified for the optical interfaces of the DCU.........................................................13-55
Table 14-1 Functions and features of the UPM..................................................................................................14-3
Table 14-2 Interfaces of the UPM......................................................................................................................14-5
Table 14-3 Power parameters of the UPM.........................................................................................................14-6
Table 14-4 Functions and features of the PIU....................................................................................................14-8
Table 14-5 Interfaces of the PIU......................................................................................................................14-10
Table 14-6 Pin assignments of the PWS interface of the PIU..........................................................................14-11
Table 15-1 Categories of the fiber jumpers that the OptiX OSN equipment uses............................................. 15-2
Table 15-2 Types of fiber connectors.................................................................................................................15-3
Table 15-3 Pin assignments of the subrack power cable....................................................................................15-9
Table 15-4 Pin assignments of the COA power cable......................................................................................15-10
Table 15-5 Pin assignments of the cabinet indicator cable...............................................................................15-12
Table 15-6 Pin assignments of the indicator cascading cable between subracks or the alarm cascading cable between
the OptiX OSN equipment................................................................................................................................15-13
Issue 02 (2009-07-30)
xlv
Tables
xlvi
Issue 02 (2009-07-30)
Tables
Table E-2 Information on whether each SDH board of the OptiX OSN equipment supports the insertion of the
AU_AIS when the board is looped back..............................................................................................................E-4
Table E-3 Loopback capability of the PDH boards.............................................................................................E-6
Table E-4 Loopback capability of the data boards of the OptiX OSN equipment..............................................E-7
Table E-5 Loopback capability of the ATM/IMA boards of the OptiX OSN equipment...................................E-8
Table F-1 Relation between the service type and the value of the C2 byte.........................................................F-2
Table F-2 Relation between the service type and the value of the C2 byte.........................................................F-3
Table F-3 Relation between the service type and the value of the V5 byte.........................................................F-4
Table F-4 Relation between the service type and the value of the V5 byte.........................................................F-6
Table F-5 Parameters that need to be set for the cross-connect and timing units..............................................F-21
Issue 02 (2009-07-30)
xlvii
Related Versions
The following table lists the product versions related to this document.
Product Name
Version
V100R009
Intended Audience
This document is intended for:
l
Hardware installers
Organization
This document is organized as follows.
Issue 02 (2009-07-30)
Chapter
Description
1 Equipment Structure
2 Cabinet
Chapter
Description
3 Subrack
5 SDH Boards
6 PDH Boards
7 Data Boards
10 Auxiliary Boards
11 WDM Boards
12 Microwave Boards
14 Power Boards
15 Cables
A Indicators
B Labels
Issue 02 (2009-07-30)
Chapter
Description
D Compatibility of Board
Versions with the Products
F Parameter Settings
G Glossary
H Acronyms and
Abbreviations
Conventions
Symbol Conventions
The symbols that may be found in this document are defined as follows.
Symbol
Description
DANGER
WARNING
CAUTION
TIP
NOTE
General Conventions
The general conventions that may be found in this document are defined as follows.
Issue 02 (2009-07-30)
Convention
Description
Boldface
Italic
Courier New
Command Conventions
The command conventions that may be found in this document are defined as follows.
Convention
Description
Boldface
Italic
[]
{ x | y | ... }
[ x | y | ... ]
{ x | y | ... }*
[ x | y | ... ]*
GUI Conventions
The GUI conventions that may be found in this document are defined as follows.
Convention
Description
Boldface
>
Issue 02 (2009-07-30)
Keyboard Operations
The keyboard operations that may be found in this document are defined as follows.
Format
Description
Key
Press the key. For example, press Enter and press Tab.
Key 1+Key 2
Key 1, Key 2
Mouse Operations
The mouse operations that may be found in this document are defined as follows.
Action
Description
Click
Double-click
Drag
Press and hold the primary mouse button and move the
pointer to a certain position.
Update History
Updates between document issues are cumulative. Therefore, the latest document issue contains
all updates made in previous issues.
Issue 02 (2009-07-30)
1 Equipment Structure
Equipment Structure
The OptiX OSN 3500 II equipment consists of the cabinet, side panels, DC power distribution
unit (PDU), subracks, boards, and cables.
NOTE
The OptiX OSN 7500 equipment and the OptiX OSN 9500 equipment are installed in the same cabinet.
The upper subrack houses the OptiX OSN 7500 equipment and the lower subrack houses the OptiX OSN
9500 equipment.
Figure 1-1 shows the appearance of the OptiX OSN 3500 II that is installed in the ETSI cabinet.
Issue 02 (2009-07-30)
1-1
1 Equipment Structure
Figure 1-1 Appearance of the OptiX OSN 3500 II that is installed in the ETSI cabinet
6
1
2
5
7
H
D
1. DC PDU
2. Side panel
3. Upper subrack
4. Lower subrack
6. Enclosure frame
Figure 1-2 shows the appearance of the OptiX OSN 3500 II subrack that is installed with boards.
1-2
Issue 02 (2009-07-30)
1 Equipment Structure
Figure 1-2 Appearance of the OptiX OSN 3500 II subrack that is installed with boards
Issue 02 (2009-07-30)
5. Mounting ear
1-3
2 Cabinet
Cabinet
Issue 02 (2009-07-30)
2-1
2 Cabinet
The equipment can be installed in the N63E cabinet. Figure 2-1 shows the appearance of the
N63E cabinet.
Figure 2-1 Appearance of the N63E cabinet
2-2
Issue 02 (2009-07-30)
2 Cabinet
H
W
1. Indicators
2. DC PDU
2.2.1 Indicators
The ETSI cabinet has one power indicator and three alarm severity indicators.
2.2.2 DC PDU
The DC PDU is at the top of the cabinet and is used to supply power to the equipment.
2.2.3 Other Configurations
External case-shaped devices can be installed in a cabinet as required.
2.2.1 Indicators
The ETSI cabinet has one power indicator and three alarm severity indicators.
Table 2-1 provides the meanings of the status of the indicators.
Issue 02 (2009-07-30)
2-3
2 Cabinet
Status
Meaning
On
Off
On
Off
No critical alarm
occurs on the
equipment.
On
Off
On
Off
CAUTION
The status of the indicators is controlled by the AUX on the subrack. The indicators work only
after the cables of the indicators are correctly connected and the subrack is powered on.
2.2.2 DC PDU
The DC PDU is at the top of the cabinet and is used to supply power to the equipment.
Figure 2-3 shows the appearance of the PDU.
2-4
Issue 02 (2009-07-30)
2 Cabinet
INPUT B
4
3
10
7
OUTPUT A
OUTPUT B
5: Output 48 V power cable on side A (A1(-) and A2 6: Output 48 V power cable on side B (B1(-) and B2
(-))
(-))
7: Output 48 V power grounding cable on side A (A1 8: Output power grounding cable on side B (B1(+) and
(+) and A2(+))
B2(+))
9: PGND
The DC PDU consists of side A and side B, which function as a mutual backup for each other.
The DC PDU provides two inputs and four outputs, and can supply power to a maximum of two
OptiX OSN 3500 II subracks.
NOTE
When a subrack accesses two power inputs, each power input carries a 10 A current. The nominal current
of a single subrack, however, is set to 20 A according to the power distribution principle of the equipment
room. Hence, when one power input fails, the subrack still has normal power supply.
Fiber management tray, which is used to manage the excess fibers inside the cabinet.
2-5
2 Cabinet
2-6
Dimensions (mm)
Weight (kg)
Number of Permitted
Subracks
51.6
Issue 02 (2009-07-30)
3 Subrack
Subrack
Issue 02 (2009-07-30)
3-1
3 Subrack
2.5Gbit/s
2.5Gbit/s
5Gbit/s
S
L
O
T
1
1
S
L
O
T
1
2
S
L
O
T
1
3
S
L
O
T
1
4
S
L
O
T
1
5
S
S L
O
L T
O 43
T
1
6
S
L
O
T
42
EOW
2.5Gbit/s
S
L
O
T
1
0
AUX
2.5Gbit/s
S
L
O
T
9
2.5Gbit/s
S S
L L
O O
T T
7 8
2.5Gbit/s
S
L
O
T
6
2.5Gbit/s
2.5Gbit/s
S
L
O
T
5
2.5Gbit/s
S
L
O
T
4
46FAN
2.5Gbit/s CXL
2.5Gbit/s CXL
S
L
O
T
3
2.5Gbit/s
PIU
S
L
O
T
41
2.5Gbit/s
PIU
S
L S
O L
T
O
1
T
2
45FAN
2.5Gbit/s
44FAN
Cable routing
Figure 3-2 Access capacity of each slot when using the Q6CXL series boards
S
L
O
T
9
S
L
O
T
1
0
S S
L L
O O
T T
1 1
1 2
S
L
O
T
1
3
S
L
O
T
1
4
S
L
O
T
1
5
5Gbit/s
10Gbit/s
2.5Gbit/s CXL
2.5Gbit/s CXL
10Gbit/s
5Gbit/s
5Gbit/s
5Gbit/s
S
S L
O
L T
O 43
T
1
6
S
L
O
T
42
EOW
S S
L L
O O
T T
7 8
AUX
S
L
O
T
6
5Gbit/s
S
L
O
T
5
10Gbit/s
S
L
O
T
4
10Gbit/s
S
L
O
T
3
5Gbit/s
46FAN
5Gbit/s
PIU
S
L
O
T
41
5Gbit/s
PIU
S
L S
O L
T
O
1
T
2
45FAN
5Gbit/s
44FAN
Cable routing
3-2
Issue 02 (2009-07-30)
3 Subrack
Figure 3-3 Access capacity of each slot when using the Q5CXS series boards
S
L
O
T
1
4
S
L
O
T
1
5
S
S L
O
L T
O 43
T
1
6
S
L
O
T
42
EOW
S
L
O
T
1
3
AUX
2.5Gbit/s
S
L
O
T
1
2
2.5Gbit/s
2.5Gbit/s
S
L
O
T
1
1
2.5Gbit/s
S S
L L
O O
T T
7 8
5Gbit/s
2.5Gbit/s
S
L
O
T
6
46FAN
5Gbit/s
S
L
O
T
5
2.5Gbit/s
S
L
O
T
1
0
CXS
S
L
O
T
4
2.5Gbit/s
S
L
O
T
9
5Gbit/s
CXS
S
L
O
T
3
2.5Gbit/s
PIU
S
L
O
T
41
2.5Gbit/s
PIU
S
L S
O L
T
O
1
T
2
45FAN
2.5Gbit/s
44FAN
Cable routing
3.2 Structure
The OptiX OSN 3500 II subrack has a two-layer structure. The subrack consists of the processing
board area, interface board area, fan area, and cable routing area.
Figure 3-4 shows the structure of the OptiX OSN 3500 II subrack.
Issue 02 (2009-07-30)
3-3
3 Subrack
2
5
3
5. Mounting ear
Processing board area: These areas house the processing boards of the OptiX OSN 3500
II.
Interface board area: This area houses the interface boards of the OptiX OSN 3500 II.
Fan area: This area houses three fan modules, which dissipate heat generated by the
equipment.
Cable routing area: This area houses the fiber jumpers in the subrack.
NOTE
The interface board is also called the access board or transit board. The interface board provides physical
interfaces for optical signals and electrical signals, and transmits the optical signals or electrical signals to
the corresponding processing board.
3-4
Issue 02 (2009-07-30)
3 Subrack
S
S
LL
O
O
TT
22
77
FAN
FAN
SLOT
44
SLOT
FAN
45
SLOT
46
4
3
E
O
W
S
4
1
C
X
L
P
I
C
X
L
4
2
A
U
X
Fiber Routing
Other Slots
l
Slots for integrated boards of the line, SCC, cross-connect and timing units: slots 9-10
Mapping Relation Between Slots for Interface Boards and Slots for Processing
Boards
Table 3-1 lists the mapping relation between slots for the interface boards and slots for the
processing boards.
Issue 02 (2009-07-30)
3-5
3 Subrack
Table 3-1 Mapping relation between slots for the interface boards and slots for the processing
boards
Slots for
Processing
Boards
Slots for
Processing
Boards
Slot 3
Slots 21 and 22
Slot 12
Slots 31 and 32
Slot 4
Slots 23 and 24
Slot 13
Slots 33 and 34
Slot 5
Slots 25 and 26
Slot 14
Slots 35 and 36
Slot 6
Slots 27 and 28
Slot 15
Slots 37 and 38
Slot 7
Slots 29 and 30
Slot 16
Slots 39 and 40
Paired Slots
If the overhead bytes pass through the backplane bus between two slots, the two slots are paired
slots. When an NE is configured with an orderwire phone, realizes the service protection in DPS
mode, or is configured with the ring MSP at the STM-16/STM-64 level, the two boards that
form a ring must be inserted in the paired slots. Table 3-2 lists the paired slots.
Table 3-2 Paired slots
Slot
Paired Slot
Slot 3
Slot 16
Slot 4
Slot 15
Slot 5
Slot 14
Slot 6
Slot 13
Slot 7
Slot 12
Slot 8
Slot 11
slot 9
slot 10
3-6
Issue 02 (2009-07-30)
3 Subrack
Table 3-3 Dimensions and weight of the OptiX OSN 3500 II subrack
Dimensions (mm)
Weight (kg)
Table 3-4 lists the maximum power consumption of the OptiX OSN 3500 II subrack.
Table 3-4 Maximum power consumption of the OptiX OSN 3500 II subrack
Issue 02 (2009-07-30)
Maximum Configuration
Typical Configuration
Maximum Power
Consumption
Fuse
Capacity
Typical
Power
Consumpt
ion
Remarks
1100 W
32 A
275 W
3-7
Issue 02 (2009-07-30)
4-1
Board appearance
Board classification
Service interface
board (for example,
D75S)
Height (mm)
262.05
262.05
262.05
Depth (mm)
220
220
110
Width (mm)
25.4
25.4
22
Board classification
System auxiliary
interface board (AUX)
Height (mm)
262.05
262.05
110
Depth (mm)
220
111.8
220
Board appearance
4-2
Issue 02 (2009-07-30)
Parameter
Width (mm)
25.4
25.4
Note: The figure in the right cell shows the three dimensions. "H" and "W"
indicate the height and width of the front panel respectively and "D" indicates
the depth of the printed circuit board (PCB).
37
H
D
CAUTION
Wear an antistatic wrist strap when holding a board. To prevent the static discharge from
damaging the board, ensure that the antistatic wrist strap is grounded properly.
DANGER
Do not look directly at the optical interface board or optical interface. The laser beams inside
the fiber can damage your eyes.
CAUTION
l
If an optical attenuator is required, insert the attenuator in the IN interface instead of the OUT
interface.
Add an attenuator when performing a loopback to prevent the optical module from being
damaged.
16-digit manufacturing code + board version + board name + board feature code
20-digit manufacturing code + board version + board name + board feature code
The bar code is affixed to the front panel of a board. Figure 4-1 shows the bar code with a 16digit manufacturing code.
Issue 02 (2009-07-30)
4-3
Bar code
0364401055000015 -SSN3SL16A01
NOTE
For details on the feature code of a board, see the topic that describes the feature code of the board.
For details on the board version replacement relation between boards, refer to the table of board version
replacement relations in the Parts Replacement.
SDH Boards
The OptiX OSN 3500 II supports the SDH boards that operate at the STM-64, STM-16, STM-4,
and STM-1 rates.
Table 4-2 lists the SDH boards that the OptiX OSN 3500 II supports.
4-4
Issue 02 (2009-07-30)
Table 4-2 SDH boards that the OptiX OSN 3500 II supports
Board
Description
Board
Description
N1SL64,
N4SL64
N1SLD4A
N1SF64,
N1SF64A,
N4SF64
N1SL4 and
N2SL4
N1SLQ16
N1SL4A
N2SLQ16,
N4SLQ16
N3SLQ41
4xSTM-4/STM-1 optical
interface board
N1SLD16
N1SLH1B
N1SL16A,
N2SL16A,
and
N3SL16A
N1SLT1
N1SL16,
N2SL16,
and N3SL16
N2SLO1 and
N3SLO1
N1SF16
N1SLQ1,
N2SLQ1, and
N1SLQ1A
N1SLQ4,
N2SLQ4,
and
N1SLQ4A
N1SL1,
N2SL1, and
N1SL1A
N1SLD4
and
N2SLD4
N1SEP1
N3SLH41
Issue 02 (2009-07-30)
16xSTM-1/STM-4 optical
interface board
4-5
PDH Boards
The OptiX OSN 3500 II supports the PDH boards that operate at different rates and have different
impedances.
Table 4-3 lists the PDH boards that the OptiX OSN 3500 II supports.
Table 4-3 PDH boards that the OptiX OSN 3500 II supports
Board
Description
N2PQ3
N2PO1
N1PQM
N1DX1
N1DXA
Data Boards
The OptiX OSN 3500 II supports the data boards that provide the transparent transmission
function, switching function, or RPR function.
Table 4-4 lists the data boards that the OptiX OSN 3500 II supports.
Table 4-4 Data boards that the OptiX OSN 3500 II supports
4-6
Board
Description
Board
Description
N1EFT8
N1EMS4
N1EFT8A
8xFE transparent
transmission board (The
interfaces are available on
the front panel.)
N1EMS2
N1EGT2 and
N2EGT2
2xGE transparent
transmission board
N2EGR2
Issue 02 (2009-07-30)
Board
Description
Board
Description
N1EFS0,
N2EFS0,
N4EFS0, and
N5EFS0
N1EMR0
and
N2EMR0
N1EFS0A
N1ADL4
N1EFS4,
N2EFS4, and
N3EFS4
N1ADQ1
N1EAS2
N1IDL4,
N1IDL4A
N1EGS4,
N3EGS4, and
N4EGS4
N1IDQ1,
N1IDQ1A
N2EGS2,
N3EGS2,
N1EGS2A
N1EFP0
Issue 02 (2009-07-30)
Board
Description
Board
Description
N1EU08
N1D12S
N1OU08
N1D12B
N2OU08
N1EFF8
and
N1EFF8A
4-7
Board
Description
Board
Description
N1D75S
N1ETF8
and
N1ETF8A
N1MU04
4xE4/STM-1 electrical
interface board
N1ETS8
N1D34S
N1DM12
N1C34S
N1TSB4
4-channel electrical
interface protection
switching board
N1EU04
N1TSB8
8-channel electrical
interface protection
switching board
Description
Q5CXLLN
Q5CXLQ41
Q6CXLLN
Q6CXLQ41
Q5CXS
Auxiliary Boards
The OptiX OSN 3500 II supports auxiliary boards such as the system auxiliary interface board
and fan board.
Table 4-7 lists the auxiliary boards that the OptiX OSN 3500 II supports.
4-8
Issue 02 (2009-07-30)
Table 4-7 Auxiliary boards that the OptiX OSN 3500 II supports
Board
Description
Board
Description
R1EOW
Orderwire processing
board
N1SEI
Signal extended
interface board
N1FAN and
N1FANB
Fan board
Q1AUX
System auxiliary
interface board
WDM Boards
The OptiX OSN 3500 II supports WDM boards such as the optical add/drop multiplexing board
and optical amplifier board.
Table 4-8 lists the WDM boards that the OptiX OSN 3500 II supports.
Table 4-8 WDM boards that the OptiX OSN 3500 II supports
Board
Description
Board
Description
TN11CMR2
N1MR2C
TN11CMR4
N1LWX
TN11MR2
TN11OBU1
TN11MR4
N1FIB
N1MR2A
Microwave Boards
The OptiX OSN 3500 II supports microwave boards such as the microwave IF board and
microwave power board.
Table 4-9 lists the microwave boards that the OptiX OSN 3500 II supports.
Table 4-9 Microwave boards that the OptiX OSN 3500 II supports
Issue 02 (2009-07-30)
Board
Description
N1IFSD1
Dual-port IF board
N1RPWR
4-9
Description
Board
Description
N1BPA and
N2BPA
N1RPC01
Forward Raman
driving board
(external)
N1COA,
61COA, and
62COA
Case-shaped optical
amplifier
N1RPC02
Backward Raman
driving board
(external)
N1BA2
Optical booster
amplifier board
Dispersion
compensation board
Power Boards
The OptiX OSN 3500 II supports power boards such as the UPM and power interface board.
Table 4-11 lists the power boards that the OptiX OSN 3500 II supports.
Table 4-11 Power boards that the OptiX OSN 3500 II supports
4-10
Board
Description
UPM
Q2PIU
Issue 02 (2009-07-30)
5 SDH Boards
SDH Boards
5-1
5 SDH Boards
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SL4 (1xSTM-4 optical interface board).
5.10 SL4A
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SL4A (1xSTM-4 optical interface board).
5.11 SLD4
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SLD4 (2xSTM-4 optical interface board).
5.12 SLD4A
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SLD4A (2xSTM-4 optical interface board).
5.13 SLQ4
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SLQ4 (4xSTM-4 optical interface board).
5.14 SLQ4A
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SLQ4A (4xSTM-4 optical interface board).
5.15 SL16
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SL16 (1xSTM-16 optical interface board).
5.16 SL16A
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SL16A (1xSTM-16 optical interface board).
5.17 SLD16
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SLD16 (2xSTM-16 optical interface board).
5.18 SLQ16
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SLQ16 (4xSTM-16 optical interface board).
5.19 SF16
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SF16 (1xSTM-16 optical interface board with the out-band FEC
function).
5.20 SL64
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SL64 (1xSTM-64 optical interface board).
5.21 SF64
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SF64 (1xSTM-64 optical interface board with the FEC function).
5.22 SF64A
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SF64A (1xSTM-64 optical interface board with the FEC function).
5.23 SLQ41
5-2
Issue 02 (2009-07-30)
5 SDH Boards
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SLQ41 (4xSTM-4/STM-1 optical interface board).
Issue 02 (2009-07-30)
5-3
5 SDH Boards
5.1 SL1
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SL1 (1xSTM-1 optical interface board).
5.1.1 Version Description
The SL1 is available in two functional versions, namely, N1 and N2. The difference between
the two versions is with regard to whether they support the tandem connection monitoring (TCM)
function and AU-3 services. The N1SL1 is no longer manufactured.
5.1.2 Functions and Features
The SL1 transmits and receives STM-1 optical signals, performs O/E conversion for the STM-1
optical signals, extracts and inserts overhead bytes, and generates alarm signals on the line.
5.1.3 Working Principle and Signal Flow
The SL1 consists of the O/E converting module, CDR module, SDH overhead processing
module, logic and control module, DC/DC converter, and other modules.
5.1.4 Front Panel
The front panel of the SL1 has indicators, interfaces, a bar code, and a laser safety class label.
5.1.5 Valid Slots
The SL1 can be installed in slots 28 and 1116 in the subrack.
5.1.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the SL1 indicates the type of optical interface.
5.1.7 Parameter Settings
You can set the parameters for the SL1 by using the T2000.
5.1.8 Technical Specifications
The technical specifications of the SL1 include the parameters specified for optical interfaces,
laser safety class, mechanical specifications, and power consumption.
5-4
Item
Description
Functional
versions
Differences
The N2SL1 supports the TCM function and AU-3 services, but the
TCM function and AU-3 services cannot be available at the same
time.
The N1SL1 does not support the TCM function or AU-3 services.
Issue 02 (2009-07-30)
Item
Description
Substitution
5 SDH Boards
NOTE
When you configure the multiplex section protection (MSP) or sub-network connection protection (SNCP),
you cannot configure the N1SL1 as the protection board if the working board is the N2SL1 on which the
TCM function is enabled or AU-3 services are configured. Otherwise, the services are interrupted when a
switching operation is performed.
SL1
Basic functions
Specifications of
the optical
interface
The characteristics of the optical interfaces of the I-1, S-1.1, L-1.1, and
L-1.2 types comply with ITU-T G.957.
Supports the detection and query of the information about the optical
module.
Service
processing
Overhead
processing
Supports the setting and query of the J0, J1, J2, and C2 bytes.
Specifications of
the optical
module
Issue 02 (2009-07-30)
5-5
5 SDH Boards
Function and
Feature
SL1
Alarms and
performance
events
Protection
schemes
Supports the two-fiber ring MSP, four-fiber ring MSP, linear MSP, SNCP,
sub-network connection tunnel protection (SNCTP), and sub-network
connection multi-protection (SNCMP).
Maintenance
features
Supports warm resets and cold resets. The warm reset does not affect
services.
5-6
Issue 02 (2009-07-30)
5 SDH Boards
O/E
E/O
O/E
E/O
S
P
I
155
CDR Mbit/s
155
Mbit/s
CDR
K1 and K2 insertion/
extraction
K1 and K2
High-speed
bus
....
....
155
Mbit/s
155
Mbit/s
S
P
I
155
Mbit/s
Reference clock
155 MHz
PLL
RST
155
Mbit/s
IIC
LOS
MST
MSA
HPT
High-speed
bus
DCC
Frame header
Communication
Laser shutdown
+3.3 V
DC/DC
converter
DC/DC
converter
Fuse
Crossconnect unit
Crossconnect unit
Cross-connect
unit A
Cross-connect
unit B
SCC unit
Crossconnect unit
SCC unit
-48 V/ -60 V
-48 V/ -60 V
In the receive direction, the module converts the received optical signals into electrical
signals.
In the transmit direction, the module converts the electrical signals into SDH optical signals
and sends the SDH optical signals to fibers for transmission.
The SPI detects the R_LOS alarm and provides the function of shutting down the laser.
CDR Module
This module restores the data signal and the clock signal.
Issue 02 (2009-07-30)
RST sub-module
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
5-7
5 SDH Boards
In the receive direction, the RST sub-module detects the frame alignment bytes (A1 and
A2), performs descrambling, restores the regenerator section trace byte (J0), detects a
J0 mismatch, and counts BIP-8 errored blocks.
In the transmit direction, the RST sub-module inserts the frame alignment bytes, inserts
the J0 byte, performs scrambling, and performs BIP-8 calculation and insertion.
MST sub-module
In the receive direction, the MST sub-module counts BIP-24 errored blocks, restores
the multiplex section-remote error indication (MS_REI), and detects the multiplex
section-remote defect indication (MS_RDI), multiplex section-alarm indication signal
(MS_AIS), and multiplex section-excessive errors alarm (MS-EXC).
In the transmit direction, the MST sub-module performs BIP-24 calculation and
insertion and inserts the MS_REI, MS_RDI, and MS_AIS.
The MST sub-module extracts or inserts the K1, K2, E2, D4D12, S1, B2, and M1
bytes.
MSA sub-module
In the receive direction, the MSA sub-module interprets the AU-4 pointer, detects the
LOP and AIS, and performs pointer justifications.
In the transmit direction, the MSA sub-module assembles the administration unit group
(AUG) and generates the AU-4 pointer and the AU_AIS.
HPT sub-module
Traces the clock signal from the active and standby cross-connect units.
Passes the orderwire and embedded control channel (ECC) bytes through an add/drop
multiplexer (ADM) that consists of two paired slots when the CXL is not online.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
Issue 02 (2009-07-30)
5 SDH Boards
SL1
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1
IN1
SL1
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
5-9
5 SDH Boards
Interfaces
The front panel of the SL1 has one optical interface. Table 5-3 describes the types and usage of
the optical interfaces of the SL1.
Table 5-3 Optical interfaces of the SL1
Interface
Type of
Interface
Usage
IN
LC
OUT
LC
Feature Code
SSN1SL110 and
SSN2SL110
10
S-1.1
SSN1SL111 and
SSN2SL111
11
L-1.1
SSN1SL112 and
SSN2SL112
12
L-1.2
SSN1SL113 and
SSN2SL113
13
Ve-1.2
SSN1SL114 and
SSN2SL114
14
I-1
5-10
J0
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
Issue 02 (2009-07-30)
J1
J2
C2
5 SDH Boards
Value
155520 kbit/s
Line code
pattern
Application
code
I-1
S-1.1
L-1.1
L-1.2
Ve-1.2
Transmission
distance (km)
0 to 2
2 to 15
20 to 40
60 to 80
80 to 100
Type of fiber
Single-mode LC Single-mode LC
Single-mode
LC
Single-mode LC
Single-mode LC
Operating
wavelength
range (nm)
1260 to 1360
1261 to 1360
1263 to 1360
1480 to 1580
1480 to 1580
Launched
optical power
range (dBm)
-15 to -8
-15 to -8
-5 to 0
-5 to 0
-3 to 0
Receiver
sensitivity
(dBm)
-23
-28
-34
-34
-34
Minimum
overload (dBm)
-8
-8
-10
-10
-10
Minimum
extinction ratio
(dB)
8.2
8.2
10
10
10
Issue 02 (2009-07-30)
5-11
5 SDH Boards
Mechanical Specifications
The mechanical specifications of the N1SL1 and N2SL1 are as follows:
l
Power Consumption
The maximum power consumption of the N1SL1 at room temperature (25C) is 17 W.
The maximum power consumption of the N2SL1 at room temperature (25C) is 14 W.
5.2 SL1A
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SL1A (1xSTM-1 optical interface board).
5.2.1 Version Description
The SL1A is available in one functional version, namely, N1.
5.2.2 Functions and Features
The SL1A transmits and receives STM-1 optical signals, performs O/E conversion for the
STM-1 optical signals, extracts and inserts overhead bytes, and generates alarm signals on the
line.
5.2.3 Working Principle and Signal Flow
The SL1A consists of the O/E converting module, CDR module, SDH overhead processing
module, logic and control module, DC/DC converter, and other modules.
5.2.4 Front Panel
The front panel of the SL1A has indicators, interfaces, a bar code, and a laser safety class label.
5.2.5 Valid Slots
The SL1A can be installed in slots 28 and 1116 in the subrack.
5.2.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the SL1A indicates the type of optical interface.
5.2.7 Parameter Settings
You can set the parameters for the SL1A by using the T2000.
5.2.8 Technical Specifications
The technical specifications of the SL1A include the parameters specified for optical interfaces,
laster safety class, mechanical specifications, and power consumption.
5-12
Issue 02 (2009-07-30)
5 SDH Boards
SL1A
Basic functions
Specifications of
the optical
interface
The characteristics of the optical interfaces of the I-1, S-1.1, L-1.1, and
L-1.2 types comply with ITU-T G.957.
Supports the detection and query of the information about the optical
module.
Supports the usage and detection of the SFP optical module, which
facilitates the maintenance and upgrading of the optical module.
Provides the ALS function. The optical interface supports the setting
of the on/off state of a laser.
Specifications of
the optical
module
Issue 02 (2009-07-30)
Service
processing
Overhead
processing
Supports the setting and query of the J0, J1, J2, and C2 bytes.
Alarms and
performance
events
Protection
schemes
Supports the two-fiber ring MSP, four-fiber ring MSP, linear MSP, SNCP,
SNCTP, and SNCMP.
5-13
5 SDH Boards
Function and
Feature
SL1A
Maintenance
features
Supports warm resets and cold resets. The warm reset does not affect
services.
O/E
E/O
O/E
E/O
S
P
I
155
CDR Mbit/s
155
Mbit/s
CDR
K1 and K2 insertion/
extraction
K1 and K2
High-speed
bus
....
....
155
Mbit/s
155
Mbit/s
S
P
I
155
Mbit/s
Reference clock
155 MHz
PLL
RST
155
Mbit/s
IIC
LOS
MST
MSA
HPT
High-speed
bus
DCC
Frame header
Communication
Laser shutdown
+3.3 V
DC/DC
converter
DC/DC
converter
Crossconnect unit
Cross-connect
unit A
Cross-connect
unit B
SCC unit
Crossconnect unit
SCC unit
-48 V/ -60 V
-48 V/ -60 V
5-14
Fuse
Crossconnect unit
Issue 02 (2009-07-30)
5 SDH Boards
In the receive direction, the module converts the received optical signals into electrical
signals.
In the transmit direction, the module converts the electrical signals into SDH optical signals
and sends the SDH optical signals to fibers for transmission.
The SPI detects the R_LOS alarm and provides the function of shutting down the laser.
CDR Module
This module restores the data signal and the clock signal.
Issue 02 (2009-07-30)
RST sub-module
In the receive direction, the RST sub-module detects the frame alignment bytes (A1 and
A2), performs descrambling, restores the regenerator section trace byte (J0), detects a
J0 mismatch, and counts BIP-8 errored blocks.
In the transmit direction, the RST sub-module inserts the frame alignment bytes, inserts
the J0 byte, performs scrambling, and performs BIP-8 calculation and insertion.
MST sub-module
In the receive direction, the MST sub-module counts BIP-24 errored blocks, restores
the MS_REI, and detects the MS_RDI, MS_AIS, and MS-EXC.
In the transmit direction, the MST sub-module performs BIP-24 calculation and
insertion and inserts the MS_REI, MS_RDI, and MS_AIS.
The MST sub-module extracts or inserts the K1, K2, E2, D4D12, S1, B2, and M1
bytes.
MSA sub-module
In the receive direction, the MSA sub-module interprets the AU-4 pointer, detects the
LOP and AIS, and performs pointer justifications.
In the transmit direction, the MSA sub-module assembles the AUG and generates the
AU-4 pointer and the AU_AIS.
HPT sub-module
5-15
5 SDH Boards
Traces the clock signal from the active and standby cross-connect units.
Passes the orderwire and ECC bytes through an ADM that consists of two paired slots when
the CXL is not online.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
5-16
Issue 02 (2009-07-30)
5 SDH Boards
SL1A
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1
IN1
SL1A
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the SL1A has one optical interface. Table 5-7 describes the types and usage
of the optical interfaces of the SL1A.
Issue 02 (2009-07-30)
5-17
5 SDH Boards
Type of
Interface
Usage
IN
LC
OUT
LC
Feature Code
SSN1SL1A10
10
S-1.1
SSN1SL1A11
11
L-1.1
SSN1SL1A12
12
L-1.2
SSN1SL1A13
13
Ve-1.2
SSN1SL1A14
14
I-1
J0
J1
J2
C2
Issue 02 (2009-07-30)
5 SDH Boards
Value
Nominal bit
rate
155520 kbit/s
Line code
pattern
NRZ
Application
code
I-1
S-1.1
L-1.1
L-1.2
Ve-1.2
Transmissio
n distance
(km)
0 to 2
2 to 15
20 to 40
60 to 80
80 to 100
Type of fiber
Single-mode
LC
Single-mode
LC
Single-mode
LC
Single-mode
LC
Single-mode
LC
Operating
wavelength
range (nm)
1260 to 1360
1261 to 1360
1480 to 1580
Launched
optical
power range
(dBm)
-15 to -8
-15 to -8
-5 to 0
-5 to 0
-3 to 0
Receiver
sensitivity
(dBm)
-23
-28
-34
-34
-34
Minimum
overload
(dBm)
-8
-8
-10
-10
-10
Minimum
extinction
ratio (dB)
8.2
8.2
10
10
10
Mechanical Specifications
The mechanical specifications of the SL1A are as follows:
Issue 02 (2009-07-30)
5-19
5 SDH Boards
l
Power Consumption
The maximum power consumption of the SL1A at room temperature (25C) is 17 W.
5.3 SLQ1
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SLQ1 (4xSTM-1 optical interface board).
5.3.1 Version Description
The SLQ1 is available in two functional versions, namely, N1 and N2. The difference between
the two versions is with regard to whether they support the TCM function and AU-3 services.
The N1SLQ1 is no longer manufactured.
5.3.2 Functions and Features
The SLQ1 transmits and receives 4xSTM-1 optical signals, performs O/E conversion for the
STM-1 optical signals, extracts and inserts overhead bytes, and generates alarm signals on the
line.
5.3.3 Working Principle and Signal Flow
The SLQ1 consists of the O/E converting module, CDR module, SDH overhead processing
module, logic and control module, DC/DC converter, and other modules.
5.3.4 Front Panel
The front panel of the SLQ1 has indicators, interfaces, a bar code, and a laser safety class label.
5.3.5 Valid Slots
The SLQ1 can be installed in slots 28 and 1116 in the subrack.
5.3.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the SLQ1 indicates the type of optical interface.
5.3.7 Parameter Settings
You can set the parameters for the SLQ1 by using the T2000.
5.3.8 Technical Specifications
The technical specifications of the SLQ1 include the parameters specified for optical interfaces,
laser safety class, mechanical specifications, and power consumption.
5-20
Issue 02 (2009-07-30)
5 SDH Boards
Description
Functional
versions
Differences
The N2SLQ1 supports the TCM function and AU-3 services, but the
TCM function and AU-3 services cannot be available at the same
time.
The N1SLQ1 does not support the TCM function or AU-3 services.
Substitution
NOTE
When you configure the MSP or SNCP, you cannot configure the N1SLQ1 as the protection board if the
working board is the N2SLQ1 on which the TCM function is enabled or AU-3 services are configured.
Otherwise, the services are interrupted when a switching operation is performed.
SLQ1
Basic functions
Specifications of
the optical
interface
The characteristics of the optical interfaces of the I-1, S-1.1, L-1.1, and
L-1.2 types comply with ITU-T G.957.
The characteristics of the optical interfaces of the Ie-1 and Ve-1.2 types
comply with the standards defined by Huawei.
Supports the detection and query of the information about the optical
module.
Provides the ALS function. The optical interface supports the setting
of the on/off state of a laser.
Supports the usage and detection of the SFP optical module, which
facilitates the maintenance of the optical module.
Specifications of
the optical
module
Service
processing
Issue 02 (2009-07-30)
5-21
5 SDH Boards
Function and
Feature
SLQ1
Overhead
processing
Supports the setting and query of the J0, J1, J2, and C2 bytes.
Alarms and
performance
events
Protection
schemes
Supports the two-fiber ring MSP, four-fiber ring MSP, linear MSP, SNCP,
SNCTP, and SNCMP.
Maintenance
features
Supports warm resets and cold resets. The warm reset does not affect
services.
5-22
Issue 02 (2009-07-30)
5 SDH Boards
O/E
E/O
O/E
E/O
S
P
I
155
CDR Mbit/s
155
Mbit/s
CDR
K1 and K2 insertion/
extraction
K1 and K2
High-speed
bus
....
....
155
Mbit/s
155
Mbit/s
S
P
I
155
Mbit/s
Reference clock
155 MHz
PLL
RST
155
Mbit/s
IIC
LOS
MST
MSA
HPT
High-speed
bus
DCC
Frame header
Communication
Laser shutdown
+3.3 V
DC/DC
converter
DC/DC
converter
Fuse
Crossconnect unit
Crossconnect unit
Cross-connect
unit A
Cross-connect
unit B
SCC unit
Crossconnect unit
SCC unit
-48 V/ -60 V
-48 V/ -60 V
In the receive direction, the module converts the received optical signals into electrical
signals.
In the transmit direction, the module converts the electrical signals into SDH optical signals
and sends the SDH optical signals to fibers for transmission.
The SPI detects the R_LOS alarm and provides the function of shutting down the laser.
CDR Module
This module restores the data signal and the clock signal.
Issue 02 (2009-07-30)
RST sub-module
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
5-23
5 SDH Boards
In the receive direction, the RST sub-module detects the frame alignment bytes (A1 and
A2), performs descrambling, restores the regenerator section trace byte (J0), detects a
J0 mismatch, and counts BIP-8 errored blocks.
In the transmit direction, the RST sub-module inserts the frame alignment bytes, inserts
the J0 byte, performs scrambling, and performs BIP-8 calculation and insertion.
MST sub-module
In the receive direction, the MST sub-module counts BIP-24 errored blocks, restores
the MS_REI, and detects the MS_RDI, MS_AIS, and MS-EXC.
In the transmit direction, the MST sub-module performs BIP-24 calculation and
insertion and inserts the MS_REI, MS_RDI, and MS_AIS.
The MST sub-module extracts or inserts the K1, K2, E2, D4D12, S1, B2, and M1
bytes.
MSA sub-module
In the receive direction, the MSA sub-module interprets the AU-4 pointer, detects the
LOP and AIS, and performs pointer justifications.
In the transmit direction, the MSA sub-module assembles the AUG and generates the
AU-4 pointer and the AU_AIS.
HPT sub-module
Traces the clock signal from the active and standby cross-connect units.
Passes the orderwire and ECC bytes through an ADM that consists of two paired slots when
the CXL is not online.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
Issue 02 (2009-07-30)
5 SDH Boards
SLQ1
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1 IN1
OUT2 IN2
OUT3 IN3
OUT4 IN4
SLQ1
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
5-25
5 SDH Boards
Interfaces
The front panel of the SLQ1 has four optical interfaces. Table 5-12 describes the types and usage
of the optical interfaces of the SLQ1.
Table 5-12 Optical interfaces of the SLQ1
Interface
Type of
Interface
Usage
IN1-IN4
LC
OUT1-OUT4
LC
Feature Code
SSN1SLQ110 and
SSN2SLQ110
10
S-1.1
SSN1SLQ111 and
SSN2SLQ111
11
L-1.1
SSN1SLQ112 and
SSN2SLQ112
12
L-1.2
SSN1SLQ113 and
SSN2SLQ113
13
Ve-1.2
SSN1SLQ114 and
SSN2SLQ114
14
I-1
SSN1SLQ115
15
Ie-1
Issue 02 (2009-07-30)
J0
J1
J2
C2
5 SDH Boards
Value
155520 kbit/s
Line code
pattern
NRZ
Application
code
I-1
S-1.1
L-1.1
L-1.2
Ve-1.2
Ie-1
Transmission
distance (km)
0 to 2
2 to 15
20 to 40
60 to 80
80 to 100
0 to 2
Type of fiber
Singlemode LC
Singlemode LC
Singlemode LC
Singlemode LC
Single-mode
LC
Multi-mode LC
Operating
wavelength
range (nm)
1260 to
1360
1261 to 1360
1263 to
1360
1480 to
1580
1480 to 1580
1270 to 1380
Launched
optical power
range (dBm)
-15 to -8
-15 to -8
-5 to 0
-5 to 0
-3 to 0
-19 to -14
Receiver
sensitivity
(dBm)
-23
-28
-34
-34
-34
-30
Minimum
overload (dBm)
-8
-8
-10
-10
-10
-14
Minimum
extinction ratio
(dB)
8.2
8.2
10
10
10
10
Issue 02 (2009-07-30)
5-27
5 SDH Boards
Mechanical Specifications
The mechanical specifications of the N1SLQ1 and N2SLQ1 are as follows:
l
Power Consumption
The maximum power consumption of the N1SLQ1 and N2SLQ1 at room temperature (25C) is
15 W.
5.4 SLQ1A
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SLQ1A (4xSTM-1 optical interface board).
5.4.1 Version Description
The SLQ1A is available in one functional version, namely, N1.
5.4.2 Functions and Features
The SLQ1A transmits and receives STM-1 optical signals, performs O/E conversion for the
STM-1 optical signals, extracts and inserts overhead bytes, and generates alarm signals on the
line.
5.4.3 Working Principle and Signal Flow
The SLQ1A consists of the O/E converting module, CDR module, SDH overhead processing
module, logic and control module, DC/DC converter, and other modules.
5.4.4 Front Panel
The front panel of the SLQ1A has indicators, interfaces, a bar code, and a laser safety class label.
5.4.5 Valid Slots
The SLQ1A can be installed in slots 28 and 1116 in the subrack.
5.4.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the SLQ1A indicates the type of optical interface.
5.4.7 Parameter Settings
You can set the parameters for the SLQ1A by using the T2000.
5.4.8 Technical Specifications
The technical specifications of the SLQ1A include the parameters specified for optical
interfaces, laser safety class, mechanical specifications, and power consumption.
Issue 02 (2009-07-30)
5 SDH Boards
SLQ1A
Basic functions
Specifications of
the optical
interface
The characteristics of the optical interfaces of the I-1, S-1.1, L-1.1, and
L-1.2 types comply with ITU-T G.957.
The characteristics of the optical interfaces of the Ie-1 and Ve-1.2 types
comply with the standards defined by Huawei.
Supports the detection and query of the information about the optical
module.
Provides the ALS function. The optical interface supports the setting
of the on/off state of a laser.
Supports the usage and detection of the SFP optical module, which
facilitates the maintenance and upgrading of the optical module.
Specifications of
the optical
module
Issue 02 (2009-07-30)
Service
processing
Overhead
processing
Supports the setting and query of the J0, J1, J2, and C2 bytes.
Alarms and
performance
events
Protection
schemes
Supports the two-fiber ring MSP, four-fiber ring MSP, linear MSP, SNCP,
SNCTP, and SNCMP.
5-29
5 SDH Boards
Function and
Feature
SLQ1A
Maintenance
features
Supports warm resets and cold resets. The warm reset does not affect
services.
155 Mbit/s
155 Mbit/s
O/E
E/O
S
P
I
155
Mbit/s
E/O
S
P
I
155
Mbit/s
CDR
Cross-connect unit
K1 and K2
Cross-connect unit
K1 and K2 insertion/extraction
High-speed
bus
....
155 Mbit/s
O/E
155
Mbit/s
155
Mbit/s
....
155 Mbit/s
CDR
Reference clock
155 MHz
PLL
RST
155
Mbit/s
MS
T
MS
A
HPT
High-speed
bus
155
Mbit/s
DCC
SDH overhead processing module
IIC
LOS
Laser shutdown
Logic and
control
module
+3.3 V
DC/DC
converter
Frame header
Communication
Fuse
Cross-connect unit A
Cross-connect unit B
SCC unit
Cross-connect unit
SCC unit
-48 V/ -60 V
-48 V/ -60 V
DC/DC
converter
Issue 02 (2009-07-30)
5 SDH Boards
In the receive direction, the module converts the received optical signals into electrical
signals.
In the transmit direction, the module converts the electrical signals into SDH optical signals
and sends the SDH optical signals to fibers for transmission.
The SPI detects the R_LOS alarm and provides the function of shutting down the laser.
CDR Module
This module restores the data signal and the clock signal.
RST sub-module
In the receive direction, the RST sub-module detects the frame alignment bytes (A1 and
A2), performs descrambling, restores the regenerator section trace byte (J0), detects a
J0 mismatch, and counts BIP-8 errored blocks.
In the transmit direction, the RST sub-module inserts the frame alignment bytes, inserts
the J0 byte, performs scrambling, and performs BIP-8 calculation and insertion.
MST sub-module
In the receive direction, the MST sub-module counts BIP-24 errored blocks, restores
the MS_REI, and detects the MS_RDI, MS_AIS, and MS-EXC.
In the transmit direction, the MST sub-module performs BIP-24 calculation and
insertion and inserts the MS_REI, MS_RDI, and MS_AIS.
The MST sub-module extracts or inserts the K1, K2, E2, D4D12, S1, B2, and M1
bytes.
MSA sub-module
In the receive direction, the MSA sub-module interprets the AU-4 pointer, detects the
LOP and AIS, and performs pointer justifications.
In the transmit direction, the MSA sub-module assembles the AUG and generates the
AU-4 pointer and the AU_AIS.
HPT sub-module
Issue 02 (2009-07-30)
5-31
5 SDH Boards
l
Traces the clock signal from the active and standby cross-connect units.
Passes the orderwire and ECC bytes through an ADM that consists of two optical interface
boards when the CXL is not online.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
5-32
Issue 02 (2009-07-30)
5 SDH Boards
SLQ1A
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1 IN1
OUT2 IN2
OUT3 IN3
OUT4 IN4
SLQ1A
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the SLQ1A has four optical interfaces. Table 5-16 describes the types and
usage of the optical interfaces of the SLQ1A.
Issue 02 (2009-07-30)
5-33
5 SDH Boards
Type of
Interface
Usage
IN1IN4
LC
OUT1OUT4
LC
Feature Code
SSN1SLQ1A10
10
S-1.1
SSN1SLQ1A11
11
L-1.1
SSN1SLQ1A12
12
L-1.2
SSN1SLQ1A13
13
Ve-1.2
SSN1SLQ1A14
14
I-1
SSN1SLQ1A15
15
Ie-1
J0
J1
J2
C2
Issue 02 (2009-07-30)
5 SDH Boards
Value
Nominal bit
rate
155520 kbit/s
Line code
pattern
NRZ
Application
code
I-1
S-1.1
L-1.1
L-1.2
Ve-1.2
Ie-1
Transmissio
n distance
(km)
0 to 2
2 to 15
20 to 40
60 to 80
80 to 100
0 to 2
Type of fiber
Singlemode LC
Singlemode LC
Singlemode LC
Singlemode LC
Singlemode LC
Multi-mode
LC
Operating
wavelength
range (nm)
1260 to
1360
1261 to
1360
1263 to
1360
1480 to
1580
1480 to
1580
1270 to
1380
Launched
optical
power range
(dBm)
-15 to -8
-15 to -8
-5 to 0
-5 to 0
-3 to 0
-19 to -14
Receiver
sensitivity
(dBm)
-23
-28
-34
-34
-34
-30
Minimum
overload
(dBm)
-8
-8
-10
-10
-10
-14
Minimum
extinction
ratio (dB)
8.2
8.2
10
10
10
10
5-35
5 SDH Boards
Mechanical Specifications
The mechanical specifications of the SLQ1A are as follows:
l
Power Consumption
The maximum power consumption of the SLQ1A at room temperature (25C) is 15 W.
5.5 SLO1
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SLO1 (8xSTM-1 optical interface board).
5.5.1 Version Description
The SLO1 is available in two functional versions, namely, N2 and N3. The difference between
the two versions is with regard to whether they support the TCM function or AU-3 services. The
N3SLO1 is discontinued.
5.5.2 Functions and Features
The SLO1 transmits and receives 8xSTM-1 optical signals, performs O/E conversion for the
STM-1 optical signals, extracts and inserts overhead bytes, and generates alarm signals on the
line.
5.5.3 Working Principle and Signal Flow
The SLO1 consists of the O/E converting module, CDR module, SDH overhead processing
module, logic and control module, DC/DC converter, and other modules.
5.5.4 Front Panel
The front panel of the SLO1 has indicators, interfaces, a bar code, and a laser safety class label.
5.5.5 Valid Slots
The SLO1 can be installed in slots 28 and 1116 in the subrack.
5.5.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the SLO1 indicates the type of optical interface.
5.5.7 Parameter Settings
You can set the parameters for the SLO1 by using the T2000.
5.5.8 Technical Specifications
The technical specifications of the SLO1 include the parameters specified for optical interfaces,
laser safety class, mechanical specifications, and power consumption.
Issue 02 (2009-07-30)
5 SDH Boards
Description
Functional versions
Differences
The N2SLO1 supports the TCM function and AU-3 services, but the
TCM function and AU-3 services cannot be available at the same
time.
The N3SLO1 does not support the TCM function and AU-3 services.
Substitution
When the N2SLO1 is not configured with the TCM function and AU-3
services, the N3SLO1 can substitute for the N2SLO1.
NOTE
When you configure the MSP or SNCP, you cannot configure the N3SLO1 as the protection board if the
working board is the N2SLO1 on which the TCM function or AU-3 services are configured. Otherwise,
the services are interrupted when a switching operation is performed.
SLO1
Basic functions
Specifications of
the optical interface
Supports the detection and query of the information about the optical
module.
Provides the ALS function. The optical interface supports the setting
of the on/off state of a laser.
Supports the usage and detection of the SFP optical module, which
facilitates the maintenance and upgrading of the optical module.
Specifications of
the optical module
Service processing
Issue 02 (2009-07-30)
5-37
5 SDH Boards
Function and
Feature
SLO1
Overhead
processing
Supports the setting and query of the J0, J1, J2, and C2 bytes.
Alarms and
performance events
Protection schemes
Supports the two-fiber ring MSP, four-fiber ring MSP, linear MSP,
SNCP, SNCTP, and SNCMP.
Maintenance
features
Supports warm resets and cold resets. The warm reset does not affect
services.
5-38
Issue 02 (2009-07-30)
5 SDH Boards
O/E
E/O
O/E
E/O
S
P
I
155
CDR Mbit/s
155
Mbit/s
CDR
K1 and K2 insertion/
extraction
K1 and K2
High-speed
bus
....
....
155
Mbit/s
155
Mbit/s
S
P
I
155
Mbit/s
Reference clock
155 MHz
PLL
RST
155
Mbit/s
IIC
LOS
MST
MSA
HPT
High-speed
bus
DCC
Frame header
Communication
Laser shutdown
+3.3 V
DC/DC
converter
DC/DC
converter
Fuse
Crossconnect unit
Crossconnect unit
Cross-connect
unit A
Cross-connect
unit B
SCC unit
Crossconnect unit
SCC unit
-48 V/ -60 V
-48 V/ -60 V
In the receive direction, the module converts the received optical signals into electrical
signals.
In the transmit direction, the module converts the electrical signals into SDH optical signals
and sends the SDH optical signals to fibers for transmission.
The SPI detects the R_LOS alarm and provides the function of shutting down the laser.
CDR Module
This module restores the data signal and the clock signal.
Issue 02 (2009-07-30)
RST sub-module
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
5-39
5 SDH Boards
In the receive direction, the RST sub-module detects the frame alignment bytes (A1 and
A2), performs descrambling, restores the regenerator section trace byte (J0), detects a
J0 mismatch, and counts BIP-8 errored blocks.
In the transmit direction, the RST sub-module inserts the frame alignment bytes, inserts
the J0 byte, performs scrambling, and performs BIP-8 calculation and insertion.
MST sub-module
In the receive direction, the MST sub-module counts BIP-24 errored blocks, restores
the MS_REI, and detects the MS_RDI, MS_AIS, and MS-EXC.
In the transmit direction, the MST sub-module performs BIP-24 calculation and
insertion and inserts the MS_REI, MS_RDI, and MS_AIS.
The MST sub-module extracts or inserts the K1, K2, E2, D4D12, S1, B2, and M1
bytes.
MSA sub-module
In the receive direction, the MSA sub-module interprets the AU-4 pointer, detects the
LOP and AIS, and performs pointer justifications.
In the transmit direction, the MSA sub-module assembles the AUG and generates the
AU-4 pointer and the AU_AIS.
HPT sub-module
Traces the clock signal from the active and standby cross-connect units.
Passes the orderwire and ECC bytes through an ADM that consists of two paired slots when
the CXL is not online.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
Issue 02 (2009-07-30)
5 SDH Boards
SLO1
STAT
ACT
PROG
SRV
OUT1 IN1 OUT2 IN2 OUT3 IN3 OUT4 IN4 OUT5 IN5 OUT6 IN6 OUT7 IN7 OUT8 IN8
CLASS 1
LASER
PRODUCT
SLO1
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
5-41
5 SDH Boards
Interfaces
The front panel of the SLO1 has eight optical interfaces. Table 5-21 describes the types and
usage of the optical interfaces of the SLO1.
Table 5-21 Optical interfaces of the SLO1
Interface
Type of
Interface
Usage
IN1IN8
LC
OUT1OUT8
LC
CAUTION
The optical interfaces of the SLO1 are level optical interfaces. Hence, use an optical attenuator
only on the ODF side.
5-42
Board
Feature Code
SSN2SLO110 and
SSN3SLO110
10
S-1.1
SSN2SLO111 and
SSN3SLO111
11
L-1.1
SSN2SLO112 and
SSN3SLO112
12
L-1.2
SSN2SLO113 and
SSN3SLO113
13
Ve-1.2
SSN2SLO114 and
SSN3SLO114
14
I-1
Issue 02 (2009-07-30)
5 SDH Boards
J0
J1
J2
C2
Issue 02 (2009-07-30)
Parameter
Value
155520 kbit/s
NRZ
Application code
I-1.1
S-1.1
L-1.1
L-1.2
Ve-1.2
Transmission
distance (km)
0 to 2
2 to 15
20 to 40
60 to 80
80 to 100
Type of fiber
Singlemode LC
Singlemode LC
Singlemode LC
Singlemode LC
Singlemode LC
Operating
wavelength range
(nm)
1261 to
1360
1261 to
1360
1263 to
1360
1480 to
1580
1480 to
1580
Launched optical
power range (dBm)
-15 to -8
-15 to -8
-5 to 0
-5 to 0
-3 to 0
Receiver sensitivity
(dBm)
-23
-28
-34
-34
-34
Minimum overload
(dBm)
-8
-8
-10
-10
-10
Minimum extinction
ratio (dB)
8.2
8.2
10
10
10
5-43
5 SDH Boards
Mechanical Specifications
The mechanical specifications of the N2SLO1 are as follows:
l
Power Consumption
The maximum power consumption of the N2SLO1 at room temperature (25C) is 26 W.
The maximum power consumption of the N3SLO1 at room temperature (25C) is 20 W.
5.6 SLT1
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SLT1 (12xSTM-1 optical interface board).
5.6.1 Version Description
The SLT1 is available in one functional version, namely, N1.
5.6.2 Functions and Features
The SLT1 transmits and receives STM-1 optical signals, performs O/E conversion for the STM-1
optical signals, extracts and inserts overhead bytes, and generates alarm signals on the line.
5.6.3 Working Principle and Signal Flow
The SLT1 consists of the O/E converting module, CDR module, SDH overhead processing
module, logic and control module, DC/DC converter, and other modules. The external services
are accessed by the external interface boards EU08 and OU08. The EU08 is an electrical interface
board and the OU08 is an optical interface board.
5.6.4 Front Panel
The front panel of the SLT1 has indicators, interfaces, a bar code, and a laser safety class label.
5.6.5 Valid Slots
The SLT1 can be installed in slots 28 and 1116 in the subrack.
5.6.6 Parameter Settings
You can set the parameters for the SLT1 by using the T2000.
5.6.7 Technical Specifications
The technical specifications of the SLT1 include the parameters specified for optical interfaces,
dimensions, weight, and power consumption.
5-44
Issue 02 (2009-07-30)
5 SDH Boards
SLT1
Basic functions
Issue 02 (2009-07-30)
Supports the detection and query of the information about the optical
module.
Provides the ALS function. The optical interface supports the setting
of the on/off state of a laser.
Supports the usage and detection of the SFP optical module, which
facilitates the maintenance of the optical module.
Service
processing
Overhead
processing
Supports the setting and query of the J0, J1, J2, and C2 bytes.
Alarms and
performance
events
Protection
schemes
Supports the two-fiber ring MSP, four-fiber ring MSP, linear MSP, SNCP,
SNCTP, and SNCMP.
5-45
5 SDH Boards
Function and
Feature
SLT1
Maintenance
features
Supports warm resets and cold resets. The warm reset does not affect
services.
O/E
E/O
O/E
E/O
S
P
I
155
CDR Mbit/s
155
Mbit/s
CDR
K1 and K2 insertion/
extraction
K1 and K2
High-speed
bus
....
....
155
Mbit/s
155
Mbit/s
S
P
I
155
Mbit/s
Reference clock
155 MHz
PLL
RST
155
Mbit/s
IIC
LOS
MST
MSA
HPT
High-speed
bus
DCC
Frame header
Communication
Laser shutdown
+3.3 V
DC/DC
converter
5-46
DC/DC
converter
Fuse
Crossconnect unit
Crossconnect unit
Cross-connect
unit A
Cross-connect
unit B
SCC unit
Crossconnect unit
SCC unit
-48 V/ -60 V
-48 V/ -60 V
Issue 02 (2009-07-30)
5 SDH Boards
In the receive direction, the module converts the received optical signals into electrical
signals.
In the transmit direction, the module converts the electrical signals into SDH optical signals
and sends the SDH optical signals to fibers for transmission.
The SPI detects the R_LOS alarm and provides the function of shutting down the laser.
CDR Module
This module restores the data signal and the clock signal.
Issue 02 (2009-07-30)
RST sub-module
In the receive direction, the RST sub-module detects the frame alignment bytes (A1 and
A2), performs descrambling, restores the regenerator section trace byte (J0), detects a
J0 mismatch, and counts BIP-8 errored blocks.
In the transmit direction, the RST sub-module inserts the frame alignment bytes, inserts
the J0 byte, performs scrambling, and performs BIP-8 calculation and insertion.
MST sub-module
In the receive direction, the MST sub-module counts BIP-24 errored blocks, restores
the MS_REI, and detects the MS_RDI, MS_AIS, and MS-EXC.
In the transmit direction, the MST sub-module performs BIP-24 calculation and
insertion and inserts the MS_REI, MS_RDI, and MS_AIS.
The MST sub-module extracts or inserts the K1, K2, E2, D4D12, S1, B2, and M1
bytes.
MSA sub-module
In the receive direction, the MSA sub-module interprets the AU-4 pointer, detects the
LOP and AIS, and performs pointer justifications.
In the transmit direction, the MSA sub-module assembles the AUG and generates the
AU-4 pointer and the AU_AIS.
HPT sub-module
5-47
5 SDH Boards
Traces the clock signal from the active and standby cross-connect units.
Passes the orderwire and ECC bytes through an ADM that consists of two paired slots when
the CXL is not online.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
5-48
Issue 02 (2009-07-30)
5 SDH Boards
SLT1
STAT
ACT
PROG
SRV
OUT1 IN1 OUT2 IN2 OUT3 IN3 OUT4 IN4 OUT5 IN5 OUT6 IN6 OUT7 IN7 OUT8 IN8 OUT9 IN9 OUT10IN10OUT11IN11OUT12IN12
CLASS 1
LASER
PRODUCT
SLT1
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the SLT1 has 12 optical interfaces. Table 5-25 describes the types and usage
of the optical interfaces of the SLT1.
Issue 02 (2009-07-30)
5-49
5 SDH Boards
Type of
Interface
Usage
IN1IN12
LC
OUT1OUT12
LC
CAUTION
The optical interfaces of the SLT1 are level optical interfaces. Hence, use an optical attenuator
only on the ODF side.
J0
J1
J2
C2
5-50
Parameter
Value
155520 kbit/s
NRZ
Application code
S-1.1
L-1.1
L-1.2
Issue 02 (2009-07-30)
5 SDH Boards
Parameter
Value
2 to 15
20 to 40
60 to 80
Type of fiber
Single-mode LC
Single-mode LC
Single-mode LC
1261 to 1360
1263 to 1360
1480 to 1580
-15 to -8
-5 to 0
-5 to 0
-28
-34
-34
-8
-10
-10
8.2
10
10
Mechanical Specifications
The mechanical specifications of the SLT1 are as follows:
l
Power Consumption
The maximum power consumption of the SLT1 at room temperature (25C) is 22 W.
5.7 SLH1B
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SLH1B (16xSTM-1 signal processing board).
5.7.1 Version Description
The SLH1B is available in one functional version, namely, N1.
5.7.2 Functions and Features
The SLH1B processes STM-1 optical and electrical signals.
5.7.3 Working Principle and Signal Flow
The SLH1B consists of the CDR module, SDH overhead processing module, logic and control
module, DC/DC converter, and other modules. The external services are accessed by the external
interface boards EU08 and OU08. The EU08 is an electrical interface board and the OU08 is an
optical interface board.
5.7.4 Front Panel
Issue 02 (2009-07-30)
5-51
5 SDH Boards
The front panel of the SLH1B has indicators and a bar code.
5.7.5 Valid Slots
The SLH1B can be installed in slots 37 and 1216 in the subrack.
5.7.6 Board Protection
The SLH1B supports the 1:N (N3) TPS protection.
5.7.7 Parameter Settings
You can set the parameters for the SLH1B by using the T2000.
5.7.8 Technical Specifications
The technical specifications of the SLH1B include the parameters specified for optical interfaces,
mechanical specifications, and power consumption.
SLH1B
Basic functions
Specifications of
the optical
module
Supports the detection and query of the information about the optical
module.
Provides the ALS function. The optical interface supports the setting
of the on/off state of a laser.
Supports the usage and detection of the SFP optical module, which
facilitates the maintenance and upgrading of the optical module.
Service
processing
Overhead
processing
Alarm and
Performance
Event
5-52
Issue 02 (2009-07-30)
5 SDH Boards
Function and
Feature
SLH1B
Protection
schemes
Supports the TPS protection when used with the interface board and
the switching and bridging board.
Supports the two-fiber ring MSP, four-fiber ring MSP, linear MSP,
SNCP, SNCTP, and SNCMP.
Supports warm resets and cold resets. The warm reset does not affect
services.
Maintenance
features
When the SLH1B works with different interface boards and electrical interface switching boards,
the access capabilities for the STM-1 signals are different. For details, refer to Table 5-28.
Table 5-28 Access capabilities of the SLH1B when the SLH1 works with different interface
boards and electrical interface switching boards
Interface Board
SLH1B
None
EU08
OU08a
EU08 + OU08a
EU08 + TSB8
a: The N2OU08 does not support the usage and monitoring of the SFP optical module.
Issue 02 (2009-07-30)
5-53
5 SDH Boards
Figure 5-13 shows the functional block diagram of the SLH1B when the SLH1B works with
the EU08 by describing how to process 1xSTM-1 signals.
Figure 5-13 Functional block diagram of the SLH1B when the SLH1B works with the EU08
155 MHz
EU08
SPI
155
Mbit/s
155
Mbit/s
CMI
Transformer
Encode/
Decode
155
155
Mbit/s CDR Mbit/s
155
Mbit/s
CDR
Reference clock
155 MHz
PLL
K1 and K2 insertion/
extraction
K1 and K2
Highspeed bus
RST
MST
MSA
HPT
155
Mbit/s
Highspeed bus
DCC
Logic and
control module
+3.3 V
DC/DC
converter
DC/DC
converter
Frame header
Communication
Fuse
Crossconnect unit
Crossconnect unit
Cross-connect
unit A
Cross-connect
unit B
SCC unit
Crossconnect unit
SCC unit
-48 V/ -60 V
-48 V/ -60 V
Figure 5-14 shows the functional block diagram of the SLH1B when the SLH1B works with
the OU08 by describing how to process 1xSTM-1 signals.
5-54
Issue 02 (2009-07-30)
5 SDH Boards
Figure 5-14 Functional block diagram of the SLH1B when the SLH1B works with the OU08
155 MHz
OU08
155
Mbit/s
155
Mbit/s
O/E
E/O
S
P
I
155 MHz
PLL
K1 and K2 insertion/
extraction
155
155
Mbit/s CDR Mbit/s
155
Mbit/s
NRZ
K1 and K2
Highspeed bus
RST
CDR
Reference clock
155
Mbit/s
LOS
Laser shut dow
MST
HPT
Highspeed bus
DCC
Logic and
control module
+3.3 V
DC/DC
converter
MSA
Communication
DC/DC
converter
Fuse
Crossconnect unit
Crossconnect unit
Crossconnect unit A
Crossconnect unit B
SCC unit
Crossconnect unit
SCC unit
-48 V/ -60 V
-48 V/ -60 V
HPT: higher order path termination CDR: clock and data recovery
CDR Module
This module restores the data signal and the clock signal.
Issue 02 (2009-07-30)
RST sub-module
In the receive direction, the RST sub-module detects the frame alignment bytes (A1 and
A2), performs descrambling, restores the regenerator section trace byte (J0), detects a
J0 mismatch, and counts BIP-8 errored blocks.
In the transmit direction, the RST sub-module inserts the frame alignment bytes, inserts
the J0 byte, performs scrambling, and performs BIP-8 calculation and insertion.
MST sub-module
In the receive direction, the MST sub-module counts BIP-24 errored blocks, restores
the MS_REI, and detects the MS_RDI, MS_AIS, and MS-EXC.
In the transmit direction, the MST sub-module performs BIP-24 calculation and
insertion and inserts the MS_REI, MS_RDI, and MS_AIS.
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
5-55
5 SDH Boards
The MST sub-module extracts or inserts the K1, K2, E2, D4D12, S1, B2, and M1
bytes.
MSA sub-module
In the receive direction, the MSA sub-module interprets the AU-4 pointer, detects the
LOP and AIS, and performs pointer justifications.
In the transmit direction, the MSA sub-module assembles the AUG and generates the
AU-4 pointer and the AU_AIS.
HPT sub-module
Traces the clock signal from the active and standby cross-connect units.
Passes the orderwire and ECC bytes through an ADM that consists of two paired slots when
the CXL is not online.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
5-56
Issue 02 (2009-07-30)
5 SDH Boards
SLH1
STAT
ACT
PROG
SRV
SLH1
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
5-57
5 SDH Boards
Protection Principle
The TPS protection is equipment-level protection. When the working board fails, the accessed
signals are switched to the protection board. Hence, complex network-level protection
operations such as the MSP and SNCP are not triggered. In addition, the reliability of the
equipment is enhanced.
The SLH1B can work with the EU08 and TSB8 to realize the 1:N (N3) TPS protection for
8xSTM-1 or 16xSTM-1 electrical signals.Figure 5-16 shows the 1:3 TPS protection for
8xSTM-1 electrical signals. The principle of the 1:3 TPS protection for 16xSTM-1 electrical
signals is the same as the principle of the 1:3 TPS protection for 8xSTM-1 electrical signals.
Figure 5-16 1:3 TPS protection provided by the SLH1B
8xSTM-1(e) 8xSTM-1(e)
EU08
TSB8
8xSTM-1(e)
Sw itching
control
EU08 signal
EU08
Protection
Working
Working
Working
SLH1A
SLH1A
SLH1A
SLH1A
Crossconnect
and timing
board
Slot 9/10
Failed
Slot 3
Slot 4
Slot 5
Slot 6
Normal state
When each working board functions normally, the traffic signal is directly transmitted to
the SLH1B through position 1 of the control switch on the EU08.
Switching state
When a working board detects a failure and requires the switching operation, the system
protects the working boards in the following manner:
5-58
When the working board in slot 5 fails, the control switch of the corresponding EU08
switches from position 1 to position 2. At the same time, the control switch of the TSB8
switches from position 1 to position 2 so that the protection board in slot 3 can protect
the working board in slot 5.
When the working board in slot 4 fails, the control switch of the corresponding EU08
switches from position 1 to position 2, but the control switch of the TSB8 does not act
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
Issue 02 (2009-07-30)
5 SDH Boards
and is still in position 1. In this case, the protection board in slot 3 protects the working
board in slot 4.
When the working board in slot 6 fails, the control switch of the corresponding EU08
switches from position 1 to position 2. At the same time, the control switch of the TSB8
switches from position 1 to position 3 so that the protection board in slot 3 can protect
the working board in slot 6.
Hardware Configuration
Figure 5-17 shows the slot configuration for the two 1:3 TPS protection groups of the SLH1B.
Figure 5-17 Slot configuration for the two 1:3 TPS protection groups of the SLH1B
S
L
O
T
S
L
O
T
S
L
O
T
S
L
O
T
S
L
O
T
S
L
O
T
2 2 2 2 2 2 2 2
1 2 3 4 5 6 7 8
S
L
O
T
2
9
3
1
3
2
3
3
3
4
3 3 3 3
5 6 7 8
S
L
O
T
3 4
9 0
S
L
O
T
S
L
O
T
11 12 13 14 15 16
S 43 EOW
S 42 AUX
10
S S
L L
O O
T T
Working 2
Working 1
S 41 PIU
S
L
O
T
Protection 2
Working 1
7 8
S
L
O
T
Working 2
S
L
O
T
Working 2
S
L
O
T
CXL
S
L
O
T
FAN
CXL
2 3
Protection 1
S S S S
L L L L
O O O O
T T T T
Working 1
S 1 PIU
S
L
O
T
S
L
O
T
EU08
FAN
S
L
O
T
S
L
O
T
EU08
EU08
FAN
S
L
O
T
3
0
S
L
O
T
TSB8
S
L
O
T
TSB8
S S
L L
O O
T T
EU08
S
L
O
T
EU08
EU08
EU08
EU08
EU08
EU08
TSB8
TSB8
S S
L L
O O
T T
EU08
S
L
O
T
EU08
S
L
O
T
In Figure 5-17, the board in slot 3 protects the boards in slots 46. The board in slot 16 protects
the boards in slots 1315.
Table 5-29 lists the slots for the SLH1B, EU08, and TSB8.
Table 5-29 Slots for the SLH1B, EU08, and TSB8
Issue 02 (2009-07-30)
Board
Protection Group 1
Protection Group 2
SLH1B (protection
board)
Slot 3
Slot 16
5-59
5 SDH Boards
Board
Protection Group 1
Protection Group 2
TSB8
Slots 21 and 22
Slots 39 and 40
SLH1B (working
board)
Slots 46
Slots 1315
EU08
J0
J1
J2
C2
Value
155520 kbit/s
Mechanical Specifications
The mechanical specifications of the SLH1B are as follows:
l
Power Consumption
The maximum power consumption of the SLH1B at room temperature (25C) is 21 W.
5-60
Issue 02 (2009-07-30)
5 SDH Boards
5.8 SEP1
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SEP1 (2xSTM-1 line processing board).
5.8.1 Version Description
The SEP1 is available in one functional version, namely, N1.
5.8.2 Functions and Features
The SEP1 processes STM-1 signals.
5.8.3 Working Principle and Signal Flow
The SEP1 consists of the line interface module, CDR module, SDH overhead processing module,
logic and control module, DC/DC converter, and other modules. The external services are
accessed by the external interface boards EU08 and OU08. The EU08 is an electrical interface
board and the OU08 is an optical interface board.
5.8.4 Front Panel
The front panel of the SEP1 has indicators, interfaces, and a bar code.
5.8.5 Valid Slots
When the interfaces are available on the front panel of the SEP1, the SEP1 can be installed in
slots 27 and 1216 in the subrack. When the SEP1 is used with the interface board, it is defined
as SEP. When the SEP is used with the interface board, it can be installed in slots 37 and 12
16 in the subrack.
5.8.6 Board Protection
The TPS protection is equipment-level protection. When the working board fails, the accessed
services are switched to the protection board.
5.8.7 Parameter Settings
You can set the parameters for the SEP1 by using the T2000.
5.8.8 Technical Specifications
The technical specifications of the SEP1 include the parameters specified for interfaces,
mechanical specifications, and power consumption.
5-61
5 SDH Boards
SEP1
Basic functions
Supports the detection and query of the information about the optical
module.
Provides the ALS function. The optical interface supports the setting
of the on/off state of a laser.
Supports the usage and monitoring of the SFP optical module, which
facilitates the maintenance and upgrading of the optical module.
Specifications of
the optical
module
Service
processing
Overhead
processing
Supports the setting and query of the J0, J1, J2, and C2 bytes.
Alarms and
performance
events
Protection
schemes
Supports the TPS protection when used with the interface board and
the switching and bridging board.
Supports the two-fiber ring MSP, four-fiber ring MSP, linear MSP, and
SNCP.
Supports warm resets and cold resets. The warm reset does not affect
services.
Maintenance
features
When the SEP1 works with different interface boards and electrical interface switching boards,
the access capabilities for the STM-1 signals are different. For details, refer to Table 5-32.
5-62
Issue 02 (2009-07-30)
5 SDH Boards
Table 5-32 Access capabilities of the SEP1 when the SEP1 works with different interface boards
and electrical interface switching boards
Interface Board
SEP1
None
EU08
OU08
EU08 + OU08
Cannot work with the EU08 and OU08 at the same time.
EU08 + TSB8
CAUTION
When the SEP1 works with an interface board, the two interfaces on the front panel of the SEP1
are invalid. The SEP1 cannot work with the EU08 and OU08 at the same time.
Issue 02 (2009-07-30)
5-63
5 SDH Boards
Reference
clock
155 Mbit/s
Port 1 155 Mbit/s
Port 2
Transfor
mer
155 Mbit/s
Transfor
155 Mbit/s
mer
CMI
CMI
155
Mbit/s
NRZ
SPI
CDR
Encode/
155
Decode
Mbit/s
Encode/
Decode
NRZ
CDR
Highspeed
bus
RS
T
MS
T
MS
A
HP
T
155
Mbit/s
DCC
155
Mbit/s
LO
S
Highspeed
bus
Logic and
control module
+3.3 V
DC/DC
converter
DC/DC
converter
Crossconnect unit
Crossconnect unit
Cross-connect
unit A
Cross-connect
unit B
SCC
unit
CrossFrame header
Communication connect unit
SCC unit
Fuse
-48 V/ -60 V
-48 V/ -60 V
HPT: higher order path termination CDR: clock and data recovery
Figure 5-19 shows the functional block diagram of the SEP when the SEP works with the EU08.
5-64
Issue 02 (2009-07-30)
5 SDH Boards
Figure 5-19 Functional block diagram of the SEP when the SEP works with the EU08
EU08
155 Mbit/s
Transfor
Port 1 155 Mbit/s mer
155 Mbit/s
Port 8
155 Mbit/s
Transfor
mer
CMI
CMI
155 Mbit/s
155 Mbit/s
Transfor
mer
CMI
SPI
Encode/
Decode
Encode/
Decode
Encode/
Decode
155 MHz
PLL
155
Mbit/s
SDH overhead
processing module
K1 and K2
insertion/extraction
CDR
155 Mbit/s
CDR
155
Mbit/s
155 Mbit/s
155
NRZ CDR Mbit/s
Reference
clock
K1 and
K2
Highspeed
bus
155 Mbit/s
155
NRZ
CDR Mbit/s
Encode/
Decode
155 Mbit/s
DCC
Logic and
control module
LOS
Highspeed
bus
+3.3 V
DC/DC
converter
DC/DC
converter
Frame
header
Communication
Fuse
Crossconnect unit
Crossconnect unit
Crossconnect unit A
Crossconnect unit B
SCC unit
Crossconnect unit
SCC unit
-48 V/ -60 V
-48 V/ -60 V
HPT: higher order path termination CDR: clock and data recovery
Figure 5-20 shows the functional block diagram of the SEP when the SEP works with the OU08.
Issue 02 (2009-07-30)
5-65
5 SDH Boards
Figure 5-20 Functional block diagram of the SEP when the SEP works with the OU08
155
Mbit/s
Port 1
Port 8
Port 1
155 Mbit/s
155 Mbit/s
Port 2
155 Mbit/s
155 Mbit/s
155
Mbit/s
O/E
S
P
I
O/E
NRZ
E/O
SPI
Encode/
Decode
CMI
Transfor
mer
CMI
Encode/
Decode
Reference clock
155
SDH overhead processing
CDR Mbit/s
module
155 Mbit/s
K1 and K2
insertion/extraction
155
Mbit/s
CDR
155 Mbit/s
NRZ
E/O
155
Mbit/s
155
Mbit/s
Transfor
mer
155 MHz
PLL
OU08
155
NRZ
CDR Mbit/s
155 Mbit/s
155
NRZ CDR Mbit/s
RST MST
MSA
K1 and K2
High-speed
bus
HPT
High-speed
bus
155 Mbit/s
LOS
LOS
Laser shut dow
DCC
Logic and
control module
+3.3 V
DC/DC
converter
DC/DC
converter
Frame header
Communication
Fuse
Cross-connect
unit
Cross-connect
unit
Cross-connect
unit A
Cross-connect
unit B
SCC unit
Cross-connect
unit
SCC unit
-48 V/ -60 V
-48 V/ -60 V
HPT: higher order path termination CDR: clock and data recovery
In the receive direction, the received electrical signals (CMI codes) are isolated through
the converter and then transmitted to the decoding unit. The CDR module restores the data
and clock signals after decoding.
In the transmit direction, the SDH signals, which are processed by the SDH overhead
processing module, are transmitted to the encoding unit. The converter isolates the 155
Mbit/s electrical signals (CMI codes) and sends the signals. The encoding and decoding
units monitor R_LOS alarms.
5-66
RST sub-module
In the receive direction, the RST sub-module detects the frame alignment bytes (A1 and
A2), performs descrambling, restores the regenerator section trace byte (J0), detects a
J0 mismatch, and counts BIP-8 errored blocks.
In the transmit direction, the RST sub-module inserts the frame alignment bytes, inserts
the J0 byte, performs scrambling, and performs BIP-8 calculation and insertion.
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
Issue 02 (2009-07-30)
5 SDH Boards
MST sub-module
In the receive direction, the MST sub-module counts BIP-24 errored blocks, restores
the MS_REI, and detects the MS_RDI, MS_AIS, and MS-EXC.
In the transmit direction, the MST sub-module performs BIP-24 calculation and
insertion and inserts the MS_REI, MS_RDI, and MS_AIS.
The MST sub-module extracts or inserts the K1, K2, E2, D4D12, S1, B2, and M1
bytes.
MSA sub-module
In the receive direction, the MSA sub-module interprets the AU-4 pointer, detects the
LOP and AIS, and performs pointer justifications.
In the transmit direction, the MSA sub-module assembles the AUG and generates the
AU-4 pointer and the AU_AIS.
HPT sub-module
Traces the clock signal from the active and the standby cross-connect unit.
Passes the orderwire and ECC bytes through an ADM that consists of two paired slots when
the CXL is not online.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
5-67
5 SDH Boards
SEP1
STAT
ACT
PROG
SRV
AOUT
AIN
BOUT
BIN
SEP1
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the SEP1 has two pairs of electrical interfaces. Table 5-33 describes the types
and usage of the electrical interfaces of the SEP1.
5-68
Issue 02 (2009-07-30)
5 SDH Boards
Type of Interface
Usage
AINBIN
75-ohm SMB
AOUTBOUT
75-ohm SMB
Note: The SEP1 can be used with the interface board EU04, EU08, or OU08. In this case,
the SEP1 is defined as SEP. When the SEP1 is used with the interface board, the two interfaces
on the front panel are invalid.
Protection Principle
When the SEP1 works with the EU08 and TSB8 to realize the TPS protection, the protection
principle and valid slots of the involved boards are the same as the protection principle and valid
slots of the involved boards when the SEP1 works with the EU04 and TSB4 to realize the TPS
protection. This topic considers the TPS protection realized when the SEP1 works with the EU08
and TSB8 as an example to describe the protection principle.
Figure 5-22 shows the TPS protection provided by the SEP1.
Issue 02 (2009-07-30)
5-69
5 SDH Boards
8xSTM-1(e)
TSB8
8xSTM-1(e)
EU08
8xSTM-1(e)
Sw itching
control
EU08 signal
EU08
Crossconnect
and timing
board
Slot 9/10
Protection
SEP
Working
SEP
Working
SEP
Working
SEP
Failed
Slot 3
Slot 4
Slot 5
Slot 6
Normal state: When each working board functions normally, the traffic signal is directly
transmitted to the SEP1 through position 1 of the control switch on the EU08.
Switching state: When a working board detects a failure and requires the switching
operation, the system protects the working boards in the following manner:
When the working board in slot 5 fails, the control switch of the corresponding EU08
switches from position 1 to position 2. At the same time, the control switch of the TSB8
switches from position 1 to position 2 so that the protection board in slot 3 can protect
the working board in slot 5.
When the working board in slot 4 fails, the control switch of the corresponding EU08
switches from position 1 to position 2, but the control switch of the TSB8 does not act
and is still in position 1. In this case, the protection board in slot 3 protects the working
board in slot 4.
When the working board in slot 6 fails, the control switch of the corresponding EU08
switches from position 1 to position 2. At the same time, the control switch of the TSB8
switches from position 1 to position 3 so that the protection board in slot 3 can protect
the working board in slot 6.
Hardware Configuration
Figure 5-23 shows the slot configuration for two 1:3 TPS protection groups of the SEP1.
5-70
Issue 02 (2009-07-30)
5 SDH Boards
Figure 5-23 Slot configuration for two 1:3 TPS protection groups of the SEP1
S
L
O
T
S
L
O
T
S
L
O
T
S
L
O
T
S
L
O
T
S
L
O
T
2 2 2 2 2 2 2 2
1 2 3 4 5 6 7 8
S
L
O
T
2
9
3
1
3
2
3
3
3
4
3 3 3 3
5 6 7 8
S
L
O
T
3 4
9 0
S
L
O
T
S
L
O
T
11 12 13 14 15 16
S 43 EOW
S 42 AUX
10
S S
L L
O O
T T
Working 2
Working 1
S 41 PIU
S
L
O
T
Protection 2
Working 1
7 8
S
L
O
T
Working 2
S
L
O
T
Working 2
S
L
O
T
CXL
S
L
O
T
FAN
CXL
2 3
Protection 1
S S S S
L L L L
O O O O
T T T T
Working 1
S 1 PIU
S
L
O
T
S
L
O
T
EU08
FAN
S
L
O
T
S
L
O
T
EU08
EU08
FAN
S
L
O
T
3
0
S
L
O
T
TSB8
S
L
O
T
TSB8
S S
L L
O O
T T
EU08
S
L
O
T
EU08
EU08
EU08
EU08
EU08
EU08
TSB8
TSB8
S S
L L
O O
T T
EU08
S
L
O
T
EU08
S
L
O
T
In Figure 5-23, the board in slot 3 protects the boards in slots 46. The board in slot 16 protects
the boards in slots 1315.
Table 5-34 lists the slots for the SLH1, EU08, and TSB8.
Table 5-34 Slots for the SEP1, EU08, and TSB8
Board
Protection Group 1
Protection Group 2
SEP1 (protection
board)
Slot 3
Slot 16
TSB8
Slot 21
Slot 40
SLH1 (working
board)
Slots 46
Slots 1315
EU08
5-71
5 SDH Boards
l
J0
J1
J2
C2
Value
155520 kbit/s
Connector
SMB
Mechanical Specifications
The mechanical specifications of the SEP1 are as follows:
l
Power Consumption
The maximum power consumption of the SEP1 at room temperature (25C) is 17 W.
5.9 SL4
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SL4 (1xSTM-4 optical interface board).
5.9.1 Version Description
The SL4 is available in two functional versions, namely, N1 and N2. The difference between
the two versions is with regard to whether they support the TCM function and AU-3 services.
The N1SL4 is no longer manufactured.
5.9.2 Functions and Features
The SL4 transmits and receives 1xSTM-4 optical signals, performs O/E conversion for the
STM-4 optical signals, extracts and inserts overhead bytes, and generates alarm signals on the
line.
5-72
Issue 02 (2009-07-30)
5 SDH Boards
Description
Functional versions
Differences
The N2SL4 supports the TCM function and AU-3 services, but the
TCM function and AU-3 services cannot be available at the same
time.
The N1SL4 does not support the TCM function or AU-3 services.
Substitution
NOTE
When you configure the MSP or SNCP, you cannot configure the N1SL4 as the protection board if the
working board is the N2SL4 on which the TCM function is enabled or AU-3 services are configured.
Otherwise, the services are interrupted when a switching operation is performed.
5-73
5 SDH Boards
SL4
Basic functions
Specifications of
the optical
interface
Supports the detection and query of the information about the optical
module.
Provides the ALS function. The optical interface supports the setting
of the on/off state of a laser.
Supports the usage and monitoring of the SFP optical module, which
facilitates the maintenance and upgrading of the optical module.
Specifications of
the optical module
Service
processing
Overhead
processing
Alarms and
performance
events
Protection
schemes
Supports the two-fiber ring MSP, four-fiber ring MSP, linear MSP,
SNCP, SNCTP, and SNCMP.
Supports the fiber-shared MSP and SNCP and processes two sets of
K bytes. One SL4 supports a maximum of two MSP protection rings.
Supports warm resets and cold resets. The warm reset does not affect
services.
Maintenance
features
5-74
Issue 02 (2009-07-30)
5 SDH Boards
622 Mbit/s
622 Mbit/s
O/E
E/O
S
P
I
622
Mbit/s
CDR
Reference clock
155 MHz
PLL
622
Mbit/s
K1 and K2
K1 and K2 insertion/extraction
Cross-connect unit
Cross-connect unit
622 Mbit/s
High-speed bus
622 Mbit/s
O/E
E/O
S
P
I
....
....
622 Mbit/s
Cross-connect unit A
622
Mbit/s
CDR
622
Mbit/s
RST
MST
MSA
High-speed
bus
HPT
622 Mbit/s
DCC
SDH overhead processing module
IIC
LOS
Laser shutdown
Logic and
control
module
+3.3 V
DC/DC
converter
Frame header
Communication
Fuse
Cross-connect unit B
SCC unit
Cross-connect unit
SCC unit
-48 V/ -60 V
-48 V/ -60 V
DC/DC
converter
In the receive direction, the module converts the received optical signals into electrical
signals.
In the transmit direction, the module converts the electrical signals into SDH optical signals
and sends the SDH optical signals to fibers for transmission.
The SPI detects the R_LOS alarm and provides the function of shutting down the laser.
CDR Module
This module restores the data signal and the clock signal.
Issue 02 (2009-07-30)
5-75
5 SDH Boards
RST sub-module
In the receive direction, the RST sub-module detects the frame alignment bytes (A1 and
A2), performs descrambling, restores the regenerator section trace byte (J0), detects a
J0 mismatch, and counts BIP-8 errored blocks.
In the transmit direction, the RST sub-module inserts the frame alignment bytes, inserts
the J0 byte, performs scrambling, and performs BIP-8 calculation and insertion.
MST sub-module
In the receive direction, the MST sub-module counts BIP-24 errored blocks, restores
the MS_REI, and detects the MS_RDI, MS_AIS, and MS-EXC.
In the transmit direction, the MST sub-module performs BIP-24 calculation and
insertion and inserts the MS_REI, MS_RDI, and MS_AIS.
The MST sub-module extracts or inserts the K1, K2, E2, D4D12, S1, B2, and M1
bytes.
MSA sub-module
In the receive direction, the MSA sub-module interprets the AU-4 pointer, detects the
LOP and AIS, and performs pointer justifications.
In the transmit direction, the MSA sub-module assembles the AUG and generates the
AU-4 pointer and the AU_AIS.
HPT sub-module
Traces the clock signal from the active and standby cross-connect units.
Passes the orderwire and ECC bytes through an ADM that consists of two paired slots when
the CXL is not online.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
5-76
Issue 02 (2009-07-30)
5 SDH Boards
SL4
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1
IN1
SL4
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Issue 02 (2009-07-30)
5-77
5 SDH Boards
l
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the SL4 has one optical interface. Table 5-38 describes the types and usage
of the optical interfaces of the SL4.
Table 5-38 Optical interfaces of the SL4
Interface
Type of
Interface
Usage
IN
LC
OUT
LC
The SL4 can use the swappable optical modules to facilitate maintenance.
5-78
Board
Feature Code
SSN1SL410 and
SSN2SL410
10
S-4.1
SSN1SL411 and
SSN2SL411
11
L-4.1
SSN1SL412 and
SSN2SL412
12
L-4.2
SSN1SL413 and
SSN2SL413
13
Ve-4.2
SSN1SL414 and
SSN2SL414
14
I-4
Issue 02 (2009-07-30)
5 SDH Boards
J0
J1
J2
C2
Issue 02 (2009-07-30)
Parameter
Value
622080 kbit/s
NRZ
Application code
I-4
S-4.1
L-4.1
L-4.2
Ve-4.2
Transmission
distance (km)
0 to 2
2 to 15
20 to 40
50 to 80
80 to 100
Type of fiber
Single-mode
LC
Single-mode
LC
Singlemode LC
Singlemode LC
Singlemode LC
Operating
wavelength range
(nm)
1261 to 1360
1274 to 1356
1280 to
1335
1480 to
1580
1480 to
1580
Launched optical
power range
(dBm)
-15 to -8
-15 to -8
-3 to +2
-3 to +2
-3 to +2
Receiver
sensitivity (dBm)
-23
-28
-28
-28
-34
Minimum
overload (dBm)
-8
-8
-8
-8
-13
Minimum
extinction ratio
(dB)
8.2
8.2
10
10
10.5
5-79
5 SDH Boards
Mechanical Specifications
The mechanical specifications of the N1SL4 and N2SL4 are as follows:
l
Power Consumption
The maximum power consumption of the N1SL4 at room temperature (25C) is 17 W.
The maximum power consumption of the N2SL4 at room temperature (25C) is 15 W.
5.10 SL4A
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SL4A (1xSTM-4 optical interface board).
5.10.1 Version Description
The SL4A is available in one functional version, namely, N1.
5.10.2 Functions and Features
The SL4A transmits and receives 1xSTM-4 optical signals, performs O/E conversion for the
STM-4 optical signals, extracts and inserts overhead bytes, and generates alarm signals on the
line.
5.10.3 Working Principle and Signal Flow
The SL4A consists of the O/E converting module, CDR module, SDH overhead processing
module, logic and control module, DC/DC converter, and other modules.
5.10.4 Front Panel
The front panel of the SL4A has indicators, interfaces, a bar code, and a laser safety class label.
5.10.5 Valid Slots
The SL4A can be installed in slots 28 and 1116 in the subrack.
5.10.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the SL4A indicates the type of optical interface.
5.10.7 Parameter Settings
You can set the parameters for the SL4A by using the T2000.
5.10.8 Technical Specifications
The technical specifications of the SL4A include the parameters specified for optical interfaces,
laser safety class, mechanical specifications, and power consumption.
5-80
Issue 02 (2009-07-30)
5 SDH Boards
SL4A
Basic functions
Specifications of
the optical
interface
Supports the detection and query of the information about the optical
module.
Provides the ALS function. The optical interface supports the setting
of the on/off state of a laser.
Supports the usage and monitoring of the SFP optical module, which
facilitates the maintenance and upgrading of the optical module.
Specifications of
the optical module
Service
processing
Overhead
processing
Alarms and
performance
events
Issue 02 (2009-07-30)
5-81
5 SDH Boards
Function and
Feature
SL4A
Protection
schemes
Supports the two-fiber ring MSP, four-fiber ring MSP, linear MSP,
SNCP, SNCTP, and SNCMP.
Supports the fiber-shared MSP and SNCP and processes two sets of
K bytes. One SL4A supports a maximum of two MSP protection rings.
Supports warm resets and cold resets. The warm reset does not affect
services.
Maintenance
features
5-82
Issue 02 (2009-07-30)
5 SDH Boards
622 Mbit/s
622 Mbit/s
O/E
E/O
S
P
I
622
Mbit/s
CDR
Reference clock
155 MHz
PLL
622
Mbit/s
K1 and K2
K1 and K2 insertion/extraction
Cross-connect unit
Cross-connect unit
622 Mbit/s
High-speed bus
622 Mbit/s
O/E
E/O
S
P
I
....
....
622 Mbit/s
Cross-connect unit A
622
Mbit/s
CDR
622
Mbit/s
RST
MST
MSA
High-speed
bus
HPT
622 Mbit/s
DCC
SDH overhead processing module
IIC
LOS
Laser shutdown
Logic and
control
module
+3.3 V
DC/DC
converter
Frame header
Communication
Fuse
Cross-connect unit B
SCC unit
Cross-connect unit
SCC unit
-48 V/ -60 V
-48 V/ -60 V
DC/DC
converter
In the receive direction, the module converts the received optical signals into electrical
signals.
In the transmit direction, the module converts the electrical signals into SDH optical signals
and sends the SDH optical signals to fibers for transmission.
The SPI detects the R_LOS alarm and provides the function of shutting down the laser.
CDR Module
This module restores the data signal and the clock signal.
Issue 02 (2009-07-30)
RST sub-module
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
5-83
5 SDH Boards
In the receive direction, the RST sub-module detects the frame alignment bytes (A1 and
A2), performs descrambling, restores the regenerator section trace byte (J0), detects a
J0 mismatch, and counts BIP-8 errored blocks.
In the transmit direction, the RST sub-module inserts the frame alignment bytes, inserts
the J0 byte, performs scrambling, and performs BIP-8 calculation and insertion.
MST sub-module
In the receive direction, the MST sub-module counts BIP-24 errored blocks, restores
the MS_REI, and detects the MS_RDI, MS_AIS, and MS-EXC.
In the transmit direction, the MST sub-module performs BIP-24 calculation and
insertion and inserts the MS_REI, MS_RDI, and MS_AIS.
The MST sub-module extracts or inserts the K1, K2, E2, D4D12, S1, B2, and M1
bytes.
MSA sub-module
In the receive direction, the MSA sub-module interprets the AU-4 pointer, detects the
LOP and AIS, and performs pointer justifications.
In the transmit direction, the MSA sub-module assembles the AUG and generates the
AU-4 pointer and the AU_AIS.
HPT sub-module
Traces the clock signal from the active and standby cross-connect units.
Passes the orderwire and ECC bytes through an ADM that consists of two paired slots when
the CXL is not online.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
Issue 02 (2009-07-30)
5 SDH Boards
SL4A
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1
IN1
SL4A
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
5-85
5 SDH Boards
Interfaces
The front panel of the SL4A has one optical interface. Table 5-42 describes the types and usage
of the optical interfaces of the SL4A.
Table 5-42 Optical interfaces of the SL4A
Interface
Type of
Interface
Usage
IN
LC
OUT
LC
The SL4A can use the swappable optical modules to facilitate maintenance.
Feature Code
SSN1SL4A10
10
S-4.1
SSN1SL4A11
11
L-4.1
SSN1SL4A12
12
L-4.2
SSN1SL4A13
13
Ve-4.2
SSN1SL4A14
14
I-4
5-86
J0
J1
J2
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
Issue 02 (2009-07-30)
5 SDH Boards
C2
Value
622080 kbit/s
NRZ
Application code
I-4
S-4.1
L-4.1
L-4.2
Ve-4.2
Transmission
distance (km)
0 to 2
2 to 15
20 to 40
50 to 80
80 to 100
Type of fiber
Single-mode
LC
Single-mode
LC
Singlemode LC
Singlemode LC
Singlemode LC
Operating
wavelength range
(nm)
1261 to 1360
1274 to 1356
1280 to
1335
1480 to
1580
1480 to
1580
Launched optical
power range
(dBm)
-15 to -8
-15 to -8
-3 to +2
-3 to +2
-3 to +2
Receiver
sensitivity (dBm)
-23
-28
-28
-28
-34
Minimum
overload (dBm)
-8
-8
-8
-8
-13
Minimum
extinction ratio
(dB)
8.2
8.2
10
10
10.5
Mechanical Specifications
The mechanical specifications of the SL4A are as follows:
Issue 02 (2009-07-30)
5-87
5 SDH Boards
l
Power Consumption
The maximum power consumption of the SL4A at room temperature (25C) is 17 W.
5.11 SLD4
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SLD4 (2xSTM-4 optical interface board).
5.11.1 Version Description
The SLD4 is available in two functional versions, namely, N1 and N2. The difference between
the two versions is with regard to whether they support the TCM function and AU-3 services.
The N1SLD4 is no longer manufactured.
5.11.2 Functions and Features
The SLD4 transmits and receives 2xSTM-4 optical signals, performs O/E conversion for the
STM-4 optical signals, extracts and inserts overhead bytes, and generates alarm signals on the
line.
5.11.3 Working Principle and Signal Flow
The SLD4 consists of the O/E converting module, CDR module, SDH overhead processing
module, logic and control module, DC/DC converter, and other modules.
5.11.4 Front Panel
The front panel of the SLD4 has indicators, interfaces, a bar code, and a laser safety class label.
5.11.5 Valid Slots
The SLD4 can be installed in slots 28 and 1116 in the subrack.
5.11.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the SLD4 indicates the type of optical interface.
5.11.7 Parameter Settings
You can set the parameters for the SLD4 by using the T2000.
5.11.8 Technical Specifications
The technical specifications of the SLD4 include the parameters specified for optical interfaces,
laser safety class, mechanical specifications, and power consumption.
5-88
Issue 02 (2009-07-30)
5 SDH Boards
Description
Functional versions
Differences
The N2SLD4 supports the TCM function and AU-3 services, but
the TCM function and AU-3 services cannot be available at the
same time.
Substitution
NOTE
When you configure the MSP or SNCP, you cannot configure the N1SLD4 as the protection board if the
working board is the N2SLD4 on which the TCM function is enabled or AU-3 services are configured.
Otherwise, the services are interrupted when a switching operation is performed.
SLD4
Basic functions
Specifications of
the optical
interface
Supports the detection and query of the information about the optical
module.
Provides the ALS function. The optical interface supports the setting
of the on/off state of a laser.
Supports the usage and monitoring of the SFP optical module, which
facilitates the maintenance and upgrading of the optical module.
Specifications of
the optical module
Issue 02 (2009-07-30)
5-89
5 SDH Boards
Function and
Feature
SLD4
Service
processing
Supports the setting and query of the J0, J1, J2, and C2 bytes.
Overhead
processing
Alarms and
performance
events
Protection
schemes
Supports the two-fiber ring MSP, four-fiber ring MSP, linear MSP,
SNCP, SNCTP, and SNCMP.
Supports the fiber-shared MSP and SNCP and processes four sets of
K bytes. A single optical interface supports two MSP protection rings,
and one SLD4 supports a maximum of four MSP protection rings.
Supports warm resets and cold resets. The warm reset does not affect
services.
Maintenance
features
5-90
Issue 02 (2009-07-30)
5 SDH Boards
622 Mbit/s
622 Mbit/s
O/E
E/O
S
P
I
622
Mbit/s
CDR
Reference clock
155 MHz
PLL
622
Mbit/s
K1 and K2
K1 and K2 insertion/extraction
Cross-connect unit
Cross-connect unit
622 Mbit/s
High-speed bus
622 Mbit/s
O/E
E/O
S
P
I
....
....
622 Mbit/s
Cross-connect unit A
622
Mbit/s
CDR
622
Mbit/s
RST
MST
MSA
High-speed
bus
HPT
622 Mbit/s
DCC
SDH overhead processing module
IIC
LOS
Laser shutdown
Logic and
control
module
+3.3 V
DC/DC
converter
Frame header
Communication
Fuse
Cross-connect unit B
SCC unit
Cross-connect unit
SCC unit
-48 V/ -60 V
-48 V/ -60 V
DC/DC
converter
In the receive direction, the module converts the received optical signals into electrical
signals.
In the transmit direction, the module converts the electrical signals into SDH optical signals
and sends the SDH optical signals to fibers for transmission.
The SPI detects the R_LOS alarm and provides the function of shutting down the laser.
CDR Module
This module restores the data signal and the clock signal.
Issue 02 (2009-07-30)
RST sub-module
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
5-91
5 SDH Boards
In the receive direction, the RST sub-module detects the frame alignment bytes (A1 and
A2), performs descrambling, restores the regenerator section trace byte (J0), detects a
J0 mismatch, and counts BIP-8 errored blocks.
In the transmit direction, the RST sub-module inserts the frame alignment bytes, inserts
the J0 byte, performs scrambling, and performs BIP-8 calculation and insertion.
MST sub-module
In the receive direction, the MST sub-module counts BIP-24 errored blocks, restores
the MS_REI, and detects the MS_RDI, MS_AIS, and MS-EXC.
In the transmit direction, the MST sub-module performs BIP-24 calculation and
insertion and inserts the MS_REI, MS_RDI, and MS_AIS.
The MST sub-module extracts or inserts the K1, K2, E2, D4D12, S1, B2, and M1
bytes.
MSA sub-module
In the receive direction, the MSA sub-module interprets the AU-4 pointer, detects the
LOP and AIS, and performs pointer justifications.
In the transmit direction, the MSA sub-module assembles the AUG and generates the
AU-4 pointer and the AU_AIS.
HPT sub-module
Traces the clock signal from the active and standby cross-connect units.
Passes the orderwire and ECC bytes through an ADM that consists of two paired slots when
the CXL is not online.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
Issue 02 (2009-07-30)
5 SDH Boards
SLD4
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
SLD4
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
5-93
5 SDH Boards
Interfaces
The front panel of the SLD4 has two optical interfaces. Table 5-47 describes the types and usage
of the optical interfaces of the SLD4.
Table 5-47 Optical interfaces of the SLD4
Interface
Type of
Interface
Usage
IN1-IN2
LC
OUT1-OUT2
LC
The SLD4 can use the swappable optical modules to facilitate maintenance.
Feature Code
SSN1SLD410 and
SSN2SLD410
10
S-4.1
SSN1SLD411 and
SSN2SLD411
11
L-4.1
SSN1SLD412 and
SSN2SLD412
12
L-4.2
SSN1SLD413 and
SSN2SLD413
13
Ve-4.2
SSN1SLD414 and
SSN2SLD414
14
I-4
Issue 02 (2009-07-30)
J0
J1
J2
C2
5 SDH Boards
Issue 02 (2009-07-30)
Parameter
Value
622080 kbit/s
Line code
pattern
NRZ
Application
code
I-4
S-4.1
L-4.1
L-4.2
Ve-4.2
Transmission
distance (km)
0 to 2
2 to 15
20 to 40
50 to 80
80 to 100
Type of fiber
Singlemode LC
Singlemode LC
Singlemode LC
Singlemode LC
Single-mode
LC
Operating
wavelength
range (nm)
1261 to
1360
1274 to
1356
1280 to
1335
1480 to
1580
1480 to 1580
Launched
optical power
range (dBm)
-15 to -8
-15 to -8
-3 to +2
-3 to +2
-3 to +2
Receiver
sensitivity
(dBm)
-23
-28
-28
-28
-34
Minimum
overload (dBm)
-8
-8
-8
-8
-13
Minimum
extinction ratio
(dB)
8.2
8.2
10
10
10.5
5-95
5 SDH Boards
Mechanical Specifications
The mechanical specifications of the N1SLD4 and N2SLD4 are as follows:
l
Power Consumption
The maximum power consumption of the N1SLD4 at room temperature (25C) is 17 W.
The maximum power consumption of the N2SLD4 at room temperature (25C) is 15 W.
5.12 SLD4A
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SLD4A (2xSTM-4 optical interface board).
5.12.1 Version Description
The SLD4A is available in one functional version, namely, N1.
5.12.2 Functions and Features
The SLD4A transmits and receives STM-4 optical signals, performs O/E conversion for the
STM-4 optical signals, extracts and inserts overhead bytes, and generates alarm signals on the
line.
5.12.3 Working Principle and Signal Flow
The SLD4A consists of the O/E converting module, CDR module, SDH overhead processing
module, logic and control module, DC/DC converter, and other modules.
5.12.4 Front Panel
The front panel of the SLD4A has indicators, interfaces, a bar code, and a laser safety class label.
5.12.5 Valid Slots
The SLD4A can be installed in slots 28 and 1116 in the subrack.
5.12.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the SLD4A indicates the type of optical interface.
5.12.7 Parameter Settings
You can set the parameters for the SLD4A by using the T2000.
5.12.8 Technical Specifications
The technical specifications of the SLD4A include the parameters specified for optical
interfaces, laser safety class, mechanical specifications, and power consumption.
5-96
Issue 02 (2009-07-30)
5 SDH Boards
SLD4A
Basic functions
Specifications of
the optical
interface
Supports the detection and query of the information about the optical
module.
Provides the ALS function. The optical interface supports the setting
of the on/off state of a laser.
Supports the usage and monitoring of the SFP optical module, which
facilitates the maintenance and upgrading of the optical module.
Specifications of
the optical module
Service
processing
Overhead
processing
Supports the setting and query of the J0, J1, J2, and C2 bytes.
Alarms and
performance
events
Issue 02 (2009-07-30)
5-97
5 SDH Boards
Function and
Feature
SLD4A
Protection
schemes
Supports the two-fiber ring MSP, four-fiber ring MSP, linear MSP,
SNCP, SNCTP, and SNCMP.
Supports the fiber-shared MSP and SNCP and processes four sets of
K bytes. A single optical interface supports two MSP protection rings,
and one SLD4A supports a maximum of four MSP protection rings.
Supports warm resets and cold resets. The warm reset does not affect
services.
Maintenance
features
5-98
Issue 02 (2009-07-30)
5 SDH Boards
622 Mbit/s
622 Mbit/s
O/E
E/O
S
P
I
622
Mbit/s
CDR
Reference clock
155 MHz
PLL
622
Mbit/s
K1 and K2
K1 and K2 insertion/extraction
Cross-connect unit
Cross-connect unit
622 Mbit/s
High-speed bus
622 Mbit/s
O/E
E/O
S
P
I
....
....
622 Mbit/s
Cross-connect unit A
622
Mbit/s
CDR
622
Mbit/s
RST
MST
MSA
High-speed
bus
HPT
622 Mbit/s
DCC
SDH overhead processing module
IIC
LOS
Laser shutdown
Logic and
control
module
+3.3 V
DC/DC
converter
Frame header
Communication
Fuse
Cross-connect unit B
SCC unit
Cross-connect unit
SCC unit
-48 V/ -60 V
-48 V/ -60 V
DC/DC
converter
In the receive direction, the module converts the received optical signals into electrical
signals.
In the transmit direction, the module converts the electrical signals into SDH optical signals
and sends the SDH optical signals to fibers for transmission.
The SPI detects the R_LOS alarm and provides the function of shutting down the laser.
CDR Module
This module restores the data signal and the clock signal.
Issue 02 (2009-07-30)
RST sub-module
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
5-99
5 SDH Boards
In the receive direction, the RST sub-module detects the frame alignment bytes (A1 and
A2), performs descrambling, restores the regenerator section trace byte (J0), detects a
J0 mismatch, and counts BIP-8 errored blocks.
In the transmit direction, the RST sub-module inserts the frame alignment bytes, inserts
the J0 byte, performs scrambling, and performs BIP-8 calculation and insertion.
MST sub-module
In the receive direction, the MST sub-module counts BIP-24 errored blocks, restores
the MS_REI, and detects the MS_RDI, MS_AIS, and MS-EXC.
In the transmit direction, the MST sub-module performs BIP-24 calculation and
insertion and inserts the MS_REI, MS_RDI, and MS_AIS.
The MST sub-module extracts or inserts the K1, K2, E2, D4D12, S1, B2, and M1
bytes.
MSA sub-module
In the receive direction, the MSA sub-module interprets the AU-4 pointer, detects the
LOP and AIS, and performs pointer justifications.
In the transmit direction, the MSA sub-module assembles the AUG and generates the
AU-4 pointer and the AU_AIS.
HPT sub-module
Traces the clock signal from the active and standby cross-connect units.
Passes the orderwire and ECC bytes through an ADM that consists of two paired slots when
the CXL is not online.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
Issue 02 (2009-07-30)
5 SDH Boards
SLD4A
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
SLD4A
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
5-101
5 SDH Boards
Interfaces
The front panel of the SLD4A has two optical interfaces. Table 5-51 describes the types and
usage of the optical interfaces of the SLD4A.
Table 5-51 Optical interfaces of the SLD4A
Interface
Type of
Interface
Usage
IN1IN2
LC
OUT1OUT2
LC
The SLD4A can use the swappable optical modules to facilitate maintenance.
Feature Code
SSN1SLD4A10
10
S-4.1
SSN1SLD4A11
11
L-4.1
SSN1SLD4A12
12
L-4.2
SSN1SLD4A13
13
Ve-4.2
SSN1SLD4A14
14
I-4
5-102
J0
J1
J2
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
Issue 02 (2009-07-30)
5 SDH Boards
C2
Value
622080 kbit/s
Line code
pattern
NRZ
Application
code
I-4
S-4.1
L-4.1
L-4.2
Ve-4.2
Transmission
distance (km)
0 to 2
2 to 15
20 to 40
50 to 80
80 to 100
Type of fiber
Singlemode LC
Singlemode LC
Singlemode LC
Singlemode LC
Single-mode
LC
Operating
wavelength
range (nm)
1261 to
1360
1274 to
1356
1280 to
1335
1480 to
1580
1480 to 1580
Launched
optical power
range (dBm)
-15 to -8
-15 to -8
-3 to +2
-3 to +2
-3 to +2
Receiver
sensitivity
(dBm)
-23
-28
-28
-28
-34
Minimum
overload (dBm)
-8
-8
-8
-8
-13
Minimum
extinction ratio
(dB)
8.2
8.2
10
10
10.5
5-103
5 SDH Boards
Mechanical Specifications
The mechanical specifications of the SLD4A are as follows:
l
Power Consumption
The maximum power consumption of the SLD4A at room temperature (25C) is 17 W.
5.13 SLQ4
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SLQ4 (4xSTM-4 optical interface board).
5.13.1 Version Description
The SLQ4 is available in two functional versions, namely, N1 and N2. The difference between
the two versions is with regard to whether they support the TCM function and AU-3 services.
The N1SLQ4 is no longer manufactured.
5.13.2 Functions and Features
The SLQ4 transmits and receives STM-4 optical signals, performs O/E conversion for the
STM-4 optical signals, extracts and inserts overhead bytes, and generates alarm signals on the
line.
5.13.3 Working Principle and Signal Flow
The SLQ4 consists of the O/E converting module, CDR module, SDH overhead processing
module, logic and control module, DC/DC converter, and other modules.
5.13.4 Front Panel
The front panel of the SLQ4 has indicators, interfaces, a bar code, and a laser safety class label.
5.13.5 Valid Slots
The SLQ4 can be installed in slots 28 and 1116 in the subrack.
5.13.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the SLQ4 indicates the type of optical interface.
5.13.7 Parameter Settings
You can set the parameters for the SLQ4 by using the T2000.
5.13.8 Technical Specifications
The technical specifications of the SLQ4 include the parameters specified for optical interfaces,
laser safety class, mechanical specifications, and power consumption.
Issue 02 (2009-07-30)
5 SDH Boards
Description
Functional
versions
Differences
The N2SLQ4 supports the TCM function and AU-3 services, but the
TCM function and AU-3 services cannot be available at the same
time.
The N1SLQ4 does not support the TCM function or AU-3 services.
Substitution
NOTE
When you configure the MSP or SNCP, you cannot configure the N1SLQ4 as the protection board if the
working board is the N2SLQ4 on which the TCM function is enabled or AU-3 services are configured.
Otherwise, the services are interrupted when a switching operation is performed.
SLQ4
Basic functions
Specifications of
the optical
interface
The characteristics of the optical interfaces of the I-4, S-4.1, L-4.1, and
L-4.2 types comply with ITU-T G.957.
Supports the detection and query of the information about the optical
module.
Provides the ALS function. The optical interface supports the setting
of the on/off state of a laser.
Supports the usage and monitoring of the SFP optical module, which
facilitates the maintenance and upgrading of the optical module.
Specifications of
the optical
module
Service
processing
Issue 02 (2009-07-30)
5-105
5 SDH Boards
Function and
Feature
SLQ4
Overhead
processing
Supports the setting and query of the J0, J1, J2, and C2 bytes.
Alarms and
performance
events
Protection
schemes
Supports the two-fiber ring MSP, four-fiber ring MSP, linear MSP,
SNCP, SNCTP, and SNCMP.
Supports the fiber-shared MSP and SNCP and processes eight sets of
K bytes. A single optical interface supports two MSP protection rings,
and one SLQ4 supports a maximum of eight MSP protection rings.
Supports warm resets and cold resets. The warm reset does not affect
services.
Maintenance
features
5-106
Issue 02 (2009-07-30)
5 SDH Boards
622 Mbit/s
622 Mbit/s
O/E
E/O
S
P
I
622
Mbit/s
CDR
Reference clock
155 MHz
PLL
622
Mbit/s
K1 and K2
K1 and K2 insertion/extraction
Cross-connect unit
Cross-connect unit
622 Mbit/s
High-speed bus
622 Mbit/s
O/E
E/O
S
P
I
....
....
622 Mbit/s
Cross-connect unit A
622
Mbit/s
CDR
622
Mbit/s
RST
MST
MSA
High-speed
bus
HPT
622 Mbit/s
DCC
SDH overhead processing module
IIC
LOS
Laser shutdown
Logic and
control
module
+3.3 V
DC/DC
converter
Frame header
Communication
Fuse
Cross-connect unit B
SCC unit
Cross-connect unit
SCC unit
-48 V/ -60 V
-48 V/ -60 V
DC/DC
converter
In the receive direction, the module converts the received optical signals into electrical
signals.
In the transmit direction, the module converts the electrical signals into SDH optical signals
and sends the SDH optical signals to fibers for transmission.
The SPI detects the R_LOS alarm and provides the function of shutting down the laser.
CDR Module
This module restores the data signal and the clock signal.
Issue 02 (2009-07-30)
RST sub-module
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
5-107
5 SDH Boards
In the receive direction, the RST sub-module detects the frame alignment bytes (A1 and
A2), performs descrambling, restores the regenerator section trace byte (J0), detects a
J0 mismatch, and counts BIP-8 errored blocks.
In the transmit direction, the RST sub-module inserts the frame alignment bytes, inserts
the J0 byte, performs scrambling, and performs BIP-8 calculation and insertion.
MST sub-module
In the receive direction, the MST sub-module counts BIP-24 errored blocks, restores
the MS_REI, and detects the MS_RDI, MS_AIS, and MS-EXC.
In the transmit direction, the MST sub-module performs BIP-24 calculation and
insertion and inserts the MS_REI, MS_RDI, and MS_AIS.
The MST sub-module extracts or inserts the K1, K2, E2, D4D12, S1, B2, and M1
bytes.
MSA sub-module
In the receive direction, the MSA sub-module interprets the AU-4 pointer, detects the
LOP and AIS, and performs pointer justifications.
In the transmit direction, the MSA sub-module assembles the AUG and generates the
AU-4 pointer and the AU_AIS.
HPT sub-module
Traces the clock signal from the active and standby cross-connect units.
Passes the orderwire and ECC bytes through an ADM that consists of two paired slots when
the CXL is not online.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
Issue 02 (2009-07-30)
5 SDH Boards
SLQ4
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1 IN1
OUT2 IN2
OUT3 IN3
OUT4 IN4
SLQ4
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
5-109
5 SDH Boards
Interfaces
The front panel of the SLQ4 has four optical interfaces. Table 5-56 describes the types and usage
of the optical interfaces of the SLQ4.
Table 5-56 Optical interfaces of the SLQ4
Interface
Type of
Interface
Usage
IN1-IN4
LC
OUT1-OUT4
LC
The SLQ4 can use the swappable optical modules to facilitate maintenance.
Feature Code
SSN1SLQ410 and
SSN2SLQ410
10
S-4.1
SSN1SLQ411 and
SSN2SLQ411
11
L-4.1
SSN1SLQ412 and
SSN2SLQ412
12
L-4.2
SSN1SLQ413 and
SSN2SLQ413
13
Ve-4.2
SSN1SLQ414 and
SSN2SLQ414
14
I-4
Issue 02 (2009-07-30)
J0
J1
J2
C2
5 SDH Boards
Issue 02 (2009-07-30)
Parameter
Value
622080 kbit/s
Line code
pattern
NRZ
Application
code
I-4
S-4.1
L-4.1
L-4.2
Ve-4.2
Transmission
distance (km)
0 to 2
2 to 15
20 to 40
50 to 80
80 to 100
Type of fiber
Singlemode LC
Singlemode LC
Singlemode LC
Singlemode LC
Single-mode
LC
Operating
wavelength
range (nm)
1261 to
1360
1274 to
1356
1280 to
1335
1480 to
1580
1480 to 1580
Launched
optical power
range (dBm)
-15 to -8
-15 to -8
-3 to +2
-3 to +2
-3 to +2
Receiver
sensitivity
(dBm)
-23
-28
-28
-28
-34
Minimum
overload (dBm)
-8
-8
-8
-8
-13
Minimum
extinction ratio
(dB)
8.2
8.2
10
10
10.5
5-111
5 SDH Boards
Mechanical Specifications
The mechanical specifications of the SLQ4 are as follows:
l
Power Consumption
The maximum power consumption of the SLQ4 at room temperature (25C) is 17 W.
5.14 SLQ4A
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SLQ4A (4xSTM-4 optical interface board).
5.14.1 Version Description
The SLQ4A is available in one functional version, namely, N1.
5.14.2 Functions and Features
The SLQ4A transmits and receives STM-4 optical signals, performs O/E conversion for the
STM-4 optical signals, extracts and inserts overhead bytes, and generates alarm signals on the
line.
5.14.3 Working Principle and Signal Flow
The SLQ4A consists of the O/E converting module, CDR module, SDH overhead processing
module, logic and control module, DC/DC converter, and other modules.
5.14.4 Front Panel
The front panel of the SLQ4A has indicators, interfaces, a bar code, and a laser safety class label.
5.14.5 Valid Slots
The SLQ4A can be installed in slots 28 and 1116 in the subrack.
5.14.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the SLQ4A indicates the type of optical interface.
5.14.7 Parameter Settings
You can set the parameters for the SLQ4A by using the T2000.
5.14.8 Technical Specifications
The technical specifications of the SLQ4A include the parameters specified for optical
interfaces, laser safety class, mechanical specifications, and power consumption.
Issue 02 (2009-07-30)
5 SDH Boards
SLQ4A
Basic functions
Specifications of
the optical
interface
The characteristics of the optical interfaces of the I-4, S-4.1, L-4.1, and
L-4.2 types comply with ITU-T G.957.
Supports the detection and query of the information about the optical
module.
Provides the ALS function. The optical interface supports the setting
of the on/off state of a laser.
Supports the usage and monitoring of the SFP optical module, which
facilitates the maintenance and upgrading of the optical module.
Specifications of
the optical
module
Issue 02 (2009-07-30)
Service
processing
Supports the VC-12 services, VC-3 services, VC-4 services, and VC-4-4c
concatenation services.
Overhead
processing
Supports the setting and query of the J0, J1, J2, and C2 bytes.
Alarms and
performance
events
Protection
schemes
Supports the two-fiber ring MSP, four-fiber ring MSP, linear MSP,
SNCP, SNCTP, and SNCMP.
Supports the fiber-shared MSP and SNCP and processes eight sets of
K bytes. A single optical interface supports two MSP protection rings,
and one SLQ4A supports a maximum of eight MSP protection rings.
5-113
5 SDH Boards
Function and
Feature
SLQ4A
Maintenance
features
Supports warm resets and cold resets. The warm reset does not affect
services.
622 Mbit/s
622 Mbit/s
O/E
E/O
S
P
I
622
Mbit/s
E/O
S
P
I
K1 and K2
K1 and K2 insertion/extraction
High-speed
bus
....
622 Mbit/s
O/E
622
Mbit/s
622 Mbit/s
....
622 Mbit/s
CDR
Reference clock
155 MHz
PLL
622
Mbit/s
RST
622
CDR Mbit/s
MST
MSA
High-speed
bus
HPT
622 Mbit/s
DCC
SDH overhead processing module
IIC
LOS
Laser shutdown
Logic and
control
module
+3.3
V
DC/DC
converter
DC/DC
converter
Frame header
Communication
Fuse
Cross-connect
unit
Cross-connect
unit
Cross-connect
unit A
Cross-connect
unit B
SCC unit
Cross-connect
unit
SCC unit
-48 V/ -60 V
-48 V/ -60 V
Issue 02 (2009-07-30)
5 SDH Boards
In the receive direction, the module converts the received optical signals into electrical
signals.
In the transmit direction, the module converts the electrical signals into SDH optical signals
and sends the SDH optical signals to fibers for transmission.
The SPI detects the R_LOS alarm and provides the function of shutting down the laser.
CDR Module
This module restores the data signal and the clock signal.
RST sub-module
In the receive direction, the RST sub-module detects the frame alignment bytes (A1 and
A2), performs descrambling, restores the regenerator section trace byte (J0), detects a
J0 mismatch, and counts BIP-8 errored blocks.
In the transmit direction, the RST sub-module inserts the frame alignment bytes, inserts
the J0 byte, performs scrambling, and performs BIP-8 calculation and insertion.
MST sub-module
In the receive direction, the MST sub-module counts BIP-24 errored blocks, restores
the MS_REI, and detects the MS_RDI, MS_AIS, and MS-EXC.
In the transmit direction, the MST sub-module performs BIP-24 calculation and
insertion and inserts the MS_REI, MS_RDI, and MS_AIS.
The MST sub-module extracts or inserts the K1, K2, E2, D4D12, S1, B2, and M1
bytes.
MSA sub-module
In the receive direction, the MSA sub-module interprets the AU-4 pointer, detects the
LOP and AIS, and performs pointer justifications.
In the transmit direction, the MSA sub-module assembles the AUG and generates the
AU-4 pointer and the AU_AIS.
HPT sub-module
Issue 02 (2009-07-30)
5-115
5 SDH Boards
l
Traces the clock signal from the active and standby cross-connect units.
Passes the orderwire and ECC bytes through an ADM that consists of two paired slots when
the CXL is not online.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
5-116
Issue 02 (2009-07-30)
5 SDH Boards
SLQ4A
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1 IN1
OUT2 IN2
OUT3 IN3
OUT4 IN4
SLQ4A
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the SLQ4A has four optical interfaces. Table 5-60 describes the types and
usage of the optical interfaces of the SLQ4A.
Issue 02 (2009-07-30)
5-117
5 SDH Boards
Type of
Interface
Usage
IN1IN4
LC
OUT1OUT4
LC
The SLQ4A can use the swappable optical modules to facilitate maintenance.
Feature Code
SSN1SLQ4A10
10
S-4.1
SSN1SLQ4A11
11
L-4.1
SSN1SLQ4A12
12
L-4.2
SSN1SLQ4A13
13
Ve-4.2
SSN1SLQ4A14
14
I-4
J0
J1
J2
C2
Issue 02 (2009-07-30)
5 SDH Boards
Value
622080 kbit/s
Line code
pattern
NRZ
Application
code
I-4
S-4.1
L-4.1
L-4.2
Ve-4.2
Transmission
distance (km)
0 to 2
2 to 15
20 to 40
50 to 80
80 to 100
Type of fiber
Singlemode LC
Singlemode LC
Singlemode LC
Singlemode LC
Single-mode
LC
Operating
wavelength
range (nm)
1261 to
1360
1274 to
1356
1280 to
1335
1480 to
1580
1480 to 1580
Launched
optical power
range (dBm)
-15 to -8
-15 to -8
-3 to +2
-3 to +2
-3 to +2
Receiver
sensitivity
(dBm)
-23
-28
-28
-28
-34
Minimum
overload (dBm)
-8
-8
-8
-8
-13
Minimum
extinction ratio
(dB)
8.2
8.2
10
10
10.5
Mechanical Specifications
The mechanical specifications of the SLQ4A are as follows:
Issue 02 (2009-07-30)
5-119
5 SDH Boards
l
Power Consumption
The maximum power consumption of the SLQ4A at room temperature (25C) is 17 W.
5.15 SL16
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SL16 (1xSTM-16 optical interface board).
5.15.1 Version Description
The SL16 is available in three functional versions, namely, N1, N2, and N3. The difference
between the three versions is with regard to whether they support the TCM function and AU-3
services. The N1SL16 and N2SL16 are no longer manufactured.
5.15.2 Functions and Features
The SL16 receives and transmits 1xSTM-16 optical signals and processes overhead bytes.
5.15.3 Working Principle and Signal Flow
The SL16 consists of the O/E converting module, MUX/DEMUX module, SDH overhead
processing module, logic and control module, DC/DC converter, and other modules.
5.15.4 Front Panel
The front panel of the SL16 has indicators, interfaces, a bar code, a laser safety class label, and
an APD alarm label.
5.15.5 Valid Slots
The SL16 can be installed in slots 28 and 1116 in the subrack.
5.15.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the SL16 indicates the type of optical interface.
5.15.7 Parameter Settings
You can set the parameters for the SL16 by using the T2000.
5.15.8 Technical Specifications
The technical specifications of the SL16 include the parameters specified for optical interfaces,
laser safety class, mechanical specifications, and power consumption.
5-120
Issue 02 (2009-07-30)
5 SDH Boards
Description
Functional
versions
The SL16 is available in three functional versions, namely, N1, N2, and
N3.
Differences
The N1SL16 does not support the TCM function or AU-3 services.
The N2SL16 supports the TCM function and AU-3 services, but the
TCM function and AU-3 services cannot be available at the same
time.
The N3SL16 supports the TCM function but does not support AU-3
services.
Substitution
When the AU-3 services are not required, the N3SL16 can substitute
for the N2SL16.
NOTE
In the case of the board of different versions, adhere to the following principles when configuring the MSP
or SNCP:
l
You cannot configure the N1SL16 as the protection board if the working board is the N2SL16 or
N3SL16 on which the TCM function is enabled. Otherwise, the services are interrupted when a
switching operation is performed.
You cannot configure the N1SL16 or N3SL16 as the protection board if the working board is the
N2SL16 on which the AU-3 services are configured. Otherwise, the services are interrupted when a
switching operation is performed.
Issue 02 (2009-07-30)
Function and
Feature
SL16
Basic functions
5-121
5 SDH Boards
Function and
Feature
SL16
Specifications
of the optical
interface
Supports the output of the standard wavelengths that comply with ITUT G.692. The U-16.2Je optical interface can be directly connected to
the dense wavelength division multiplexing (DWDM) equipment.
Supports the detection and query of the information about the optical
module.
Provides the ALS function. The optical interface supports the setting of
the on/off state of a laser.
Supports the usage and detection of the SFP optical module, which
facilitates the maintenance and upgrading of the optical module.
Supports the setting and query of the J0, J1, J2, and C2 bytes.
Specifications
of the optical
module
Service
processing
Overhead
processing
5-122
Alarms and
performance
events
Specifications
of the REG
The N2SL16 and N3SL16 support the setting and query of the REG
working mode.
Protection
schemes
Supports the two-fiber ring MSP, four-fiber ring MSP, linear MSP,
SNCP, SNCTP, and SNCMP.
Supports the fiber-shared MSP and SNCP and processes two sets of K
bytes. One SL16 supports a maximum of two MSP protection rings.
Issue 02 (2009-07-30)
5 SDH Boards
Function and
Feature
SL16
Maintenance
features
Supports warm resets and cold resets. The warm reset does not affect
services.
2.488
Gbit/s
2.488
Gbit/s
K1 and K2
K1 and K2 insertion/
extraction
16x155
Mbit/s
DEMUX
O/E
S
P
I
2.488
Gbit/s
Reference clock
155 MHz
PLL
2.488
Gbit/s
16x155
Mbit/s
MUX
E/O
High-speed
bus
RST
MST
MSA
HPT
High-speed
bus
DCC
IIC
LOS
Laser shutdown
Logic and
control module
+3.3 V
DC/DC
converter
Issue 02 (2009-07-30)
DC/DC
converter
Frame header
Communication
Fuse
Cross-connect
unit
Cross-connect
unit
Cross-connect
unit A
Cross-connect
unit A
SCC unit
Cross-connect
unit
SCC unit
-48 V/-60 V
-48 V/-60 V
5-123
5 SDH Boards
RST: regenerator section
termination
In the receive direction, the module converts the received optical signals into electrical
signals.
In the transmit direction, the module converts the electrical signals into SDH optical signals
and sends the SDH optical signals to fibers for transmission.
The SPI detects the R_LOS alarm and provides the function of shutting down the laser.
MUX/DEMUX Module
l
In the receive direction, the DEMUX part demultiplexes the high-rate electrical signals into
multiple parallel electrical signals and restores the clock signal at the same time.
In the transmit direction, the MUX part multiplexes the parallel electrical signals received
from the SDH overhead processing module into high-rate electrical signals.
5-124
RST sub-module
In the receive direction, the RST sub-module detects the frame alignment bytes (A1 and
A2), performs descrambling, restores the regenerator section trace byte (J0), detects a
J0 mismatch, and counts BIP-8 errored blocks.
In the transmit direction, the RST sub-module inserts the frame alignment bytes, inserts
the J0 byte, performs scrambling, and performs BIP-8 calculation and insertion.
MST sub-module
In the receive direction, the MST sub-module counts BIP-24 errored blocks, restores
the MS_REI, and detects the MS_RDI, MS_AIS, and MS-EXC.
In the transmit direction, the MST sub-module performs BIP-24 calculation and
insertion and inserts the MS_REI, MS_RDI, and MS_AIS.
The MST sub-module extracts or inserts the K1, K2, E2, D4D12, S1, B2, and M1
bytes.
MSA sub-module
In the receive direction, the MSA sub-module interprets the AU-4 pointer, detects the
LOP and AIS, and performs pointer justifications.
In the transmit direction, the MSA sub-module assembles the AUG and generates the
AU-4 pointer and the AU_AIS.
HPT sub-module
Issue 02 (2009-07-30)
5 SDH Boards
Traces the clock signal from the active and standby cross-connect units.
Passes the orderwire and ECC bytes through an ADM that consists of two paired slots when
the CXL is not online.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
Issue 02 (2009-07-30)
5-125
5 SDH Boards
SL16
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
APD
Receiver
MAX:-9dBm
OUT
IN
SL16
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the SL16 has one optical interface. Table 5-65 describes the types and usage
of the optical interfaces of the SL16.
5-126
Issue 02 (2009-07-30)
5 SDH Boards
Type of Interface
Usage
IN
LC
OUT
LC
Feature Code
SSN1SL1601, SSN2SL1601
and SSN3SL1601
01
L-16.2
SSN1SL1602, SSN2SL1602
and SSN3SL1602
02
L-16.2Je
SSN1SL1603, SSN2SL1603
and SSN3SL1603
03
V-16.2Je
SSN1SL1604, SSN2SL1604
and SSN3SL1604
04
U-16.2
J0
J1
J2
C2
Issue 02 (2009-07-30)
5-127
5 SDH Boards
5-128
Parameter
Value
Nominal bit
rate
2488320 kbit/s
Line code
pattern
NRZ
Application
code
L-16.2
L-16.2Je
V-16.2Je (BA)
U-16.2Je (BA+PA)
Transmissio
n distance
(km)
50 to 80
80 to 100
105 to 140
145 to 170
Type of fiber
Singlemode LC
Singlemode LC
Single-mode LC
Single-mode LC
Operating
wavelength
range (nm)
1500 to
1580
1530 to
1560
1530 to 1565
1550.12
Launched
optical
power range
(dBm)
-2 to +3
5 to 7
-2 to +3
(without
the BA)
-2 to +3
(without
the BA
or PA)
15 to 18
(with the
BA)
Receiver
sensitivity
(dBm)
-28
-28
-28
-28
(without
the PA
or BA)
-32 (with
the PA)
Minimum
overload
(dBm)
-9
-9
-9
-9
(without
the PA
or BA)
-10 (with
the PA)
Minimum
extinction
ratio (dB)
8.2
8.2
8.2
8.2
13 to 15
(with the
BA)
Issue 02 (2009-07-30)
Parameter
5 SDH Boards
Value
Note: The optical interface of the Le-16.2 type is the same as the optical interface of the
L-16.2Je type.
The launched optical power of the optical interface of the V-16.2Je type is measured when
the BA is added. The launched optical power of the optical interface of the U-16.2Je type is
measured when the BA and PA are added. When no amplifier is added, the launched optical
power of the optical interfaces of the V-16.2Je and U-16.2Je types ranges from -2 dBm to 3
dBm.
Table 5-68 lists the parameters specified for the colored optical interfaces of the SL16.
Table 5-68 Parameters specified for the optical interfaces that comply with the standard
wavelengths specified in ITU-T G.692
Parameter
Value
2488320 kbit/s
170
640.a
-2 to +3
-5 to -1
-28
-28
-9
-9
Maximum allowed
dispersion (ps/nm)
3400
10880
8.2
10
Mechanical Specifications
The mechanical specifications of the SL16 are as follows:
l
Power Consumption
The maximum power consumption of the N1SL16 and N2SL16 at room temperature (25C) is
20 W.
Issue 02 (2009-07-30)
5-129
5 SDH Boards
5.16 SL16A
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SL16A (1xSTM-16 optical interface board).
5.16.1 Version Description
The SL16A is available in functional versions, namely, N3, N2, and N1. The difference between
the versions is with regard to whether they support the TCM function and AU-3 services. The
N1SL16A and N2SL16A are no longer manufactured.
5.16.2 Functions and Features
The SL16A receives and transmits 1xSTM-16 optical signals, processes overhead bytes, and
performs the MSP.
5.16.3 Working Principle and Signal Flow
The N1SL16A/N2SL16A/N3SL16A consists of the O/E converting module, MUX/DEMUX
module, SDH overhead processing module, logic and control module, and other modules.
5.16.4 Front Panel
The front panel of the SL16A has indicators, interfaces, a bar code, a laser safety class label,
and an APD alarm label.
5.16.5 Valid Slots
The SL16A can be installed in slots 28 and 1116 in the subrack.
5.16.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the SL16A indicates the type of optical interface.
5.16.7 Parameter Settings
You can set the parameters for the SL16A by using the T2000.
5.16.8 Technical Specifications
The technical specifications of the SL16A include the parameters specified for optical interfaces,
laser safety class, mechanical specifications, and power consumption.
5-130
Item
Description
Functional versions
Issue 02 (2009-07-30)
5 SDH Boards
Item
Description
Differences
The N1SL16A does not support the TCM function or AU-3 services.
The N2SL16A supports the TCM function and AU-3 services, but
the TCM function and AU-3 services cannot be available at the same
time.
The N3SL16A supports the TCM function but does not support
AU-3 services.
Substitution
When the AU-3 services are not required, the N3SL16A can
substitute for the N2SL16A.
NOTE
In the case of the board of different versions, adhere to the following principles when configuring the MSP
or SNCP:
l
You cannot configure the N1SL16A as the protection board if the working board is the N2SL16A or
N3SL16A on which the TCM function is enabled. Otherwise, the services are interrupted when a
switching operation is performed.
You cannot configure the N3SL16A or N1SL16A as the protection board if the working board is the
N2SL16A on which the AU-3 services are configured. Otherwise, the services are interrupted when a
switching operation is performed.
Issue 02 (2009-07-30)
Function and
Feature
SL16A
Basic functions
Specifications of the
optical interface
5-131
5 SDH Boards
Function and
Feature
SL16A
Specifications of the
optical module
Supports the setting and query of the J0, J1, J2, and C2 bytes.
Service processing
Overhead processing
Alarms and
performance events
Specifications of the
REG
The N2SL16A and N3SL16A support the setting and query of the
REG working mode.
Protection schemes
Supports the fiber-shared MSP and SNCP and processes two sets
of K bytes.
Supports warm resets and cold resets. The warm reset does not
affect services.
Maintenance features
5-132
Issue 02 (2009-07-30)
5 SDH Boards
2.488
Gbit/s
2.488
Gbit/s
K1 and K2
K1 and K2 insertion/
extraction
16x155
Mbit/s
DEMUX
O/E
S
P
I
2.488
Gbit/s
Reference clock
155 MHz
PLL
2.488
Gbit/s
16x155
Mbit/s
MUX
E/O
High-speed
bus
RST
MST
MSA
HPT
High-speed
bus
DCC
IIC
LOS
Laser shutdown
Frame header
Logic and
control module
+3.3 V
DC/DC
converter
Communication
Fuse
DC/DC
converter
Cross-connect
unit
Cross-connect
unit
Cross-connect
unit A
Cross-connect
unit A
SCC unit
Cross-connect
unit
SCC unit
-48 V/-60 V
-48 V/-60 V
In the receive direction, the module converts the received optical signals into electrical
signals.
In the transmit direction, the module converts the electrical signals into SDH optical signals
and sends the SDH optical signals to fibers for transmission.
The SPI detects the R_LOS alarm and provides the function of shutting down the laser.
MUX/DEMUX Module
l
Issue 02 (2009-07-30)
In the receive direction, the DEMUX part demultiplexes the high-rate electrical signals into
multiple parallel electrical signals and restores the clock signal at the same time.
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
5-133
5 SDH Boards
l
In the transmit direction, the MUX part multiplexes the parallel electrical signals received
from the SDH overhead processing module into high-rate electrical signals.
RST sub-module
In the receive direction, the RST sub-module detects the frame alignment bytes (A1 and
A2), performs descrambling, restores the regenerator section trace byte (J0), detects a
J0 mismatch, and counts BIP-8 errored blocks.
In the transmit direction, the RST sub-module inserts the frame alignment bytes, inserts
the J0 byte, performs scrambling, and performs BIP-8 calculation and insertion.
MST sub-module
In the receive direction, the MST sub-module counts BIP-24 errored blocks, restores
the MS_REI, and detects the MS_RDI, MS_AIS, and MS-EXC.
In the transmit direction, the MST sub-module performs BIP-24 calculation and
insertion and inserts the MS_REI, MS_RDI, and MS_AIS.
The MST sub-module extracts or inserts the K1, K2, E2, D4D12, S1, B2, and M1
bytes.
MSA sub-module
In the receive direction, the MSA sub-module interprets the AU-4 pointer, detects the
LOP and AIS, and performs pointer justifications.
In the transmit direction, the MSA sub-module assembles the AUG and generates the
AU-4 pointer and the AU_AIS.
HPT sub-module
5-134
Traces the clock signal from the active and standby cross-connect units.
Passes the orderwire and ECC bytes through an ADM that consists of two paired slots when
the CXL is not online.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
Issue 02 (2009-07-30)
5 SDH Boards
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
SL16A
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
APD
Receiver
MAX:-9dBm
OUT
IN
SL16A
Issue 02 (2009-07-30)
5-135
5 SDH Boards
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the SL16A has one optical interface. Table 5-71 describes the types and usage
of the optical interfaces of the SL16A.
Table 5-71 Optical interfaces of the SL16A
Interface
Type of Interface
Usage
IN
LC
OUT
LC
Feature Code
SSN3SL16A01
01
I-16
SSN3SL16A02
02
S-16.1
SSN3SL16A03
03
L-16.1
SSN3SL16A04
04
L-16.2
Issue 02 (2009-07-30)
5 SDH Boards
You can set the following parameters for the SL16A by using the T2000:
l
J0
J1
J2
C2
Issue 02 (2009-07-30)
Parameter
Value
Nominal bit
rate
2488320 kbit/s
Application
code
I-16
S-16.1
L-16.1
L-16.2
Transmission
distance (km)
0 to 2
2 to 15
25 to 40
50 to 80
Type of fiber
Single-mode
LC
Single-mode
LC
Single-mode LC
Single-mode LC
Operating
wavelength
range (nm)
1266 to 1360
1260 to 1360
1280 to 1335
1500 to 1580
Launched
optical power
range (dBm)
-10 to -3
-5 to 0
-2 to +3
-2 to +3
Receiver
sensitivity
(dBm)
-18
-18
-27
-28
Minimum
overload
(dBm)
-3
-9
-9
Minimum
extinction
ratio (dB)
8.2
8.2
8.2
8.2
5-137
5 SDH Boards
Mechanical Specifications
The mechanical specifications of the SL16A are as follows:
l
Power Consumption
The maximum power consumption of the N1SL16A at room temperature (25C) is 20 W.
The maximum power consumption of the N3SL16A at room temperature (25C) is 22 W.
The maximum power consumption of the N2SL16A at room temperature (25C) is 20 W.
5.17 SLD16
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SLD16 (2xSTM-16 optical interface board).
5.17.1 Version Description
The SLD16 is available in one functional version, namely, N1.
5.17.2 Functions and Features
The SLD16 receives and transmits 2xSTM-16 optical signals, processes overhead bytes, and
performs the MSP.
5.17.3 Working Principle and Signal Flow
The SLD16 consists of the O/E converting module, MUX/DEMUX module, SDH overhead
processing module, logic and control module, DC/DC converter, and other modules.
5.17.4 Front Panel
The front panel of the SLD16 has indicators, interfaces, a bar code, and a laser safety class label.
5.17.5 Valid Slots
The slots valid for the SLD16 vary with the cross-connect capacity of the subrack.
5.17.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the SLD16 indicates the type of optical interface.
5.17.7 Parameter Settings
You can set the parameters for the SLD16 by using the T2000.
5.17.8 Technical Specifications
The technical specifications of the SLD16 include the parameters specified for optical interfaces,
laser safety class, mechanical specifications, and power consumption.
5-138
Issue 02 (2009-07-30)
5 SDH Boards
SLD16
Basic functions
Specifications
of the optical
interface
Supports the output of the standard wavelengths that comply with ITUT G.692.
Supports the detection and query of the information about the optical
module.
Provides the ALS function. The optical interface supports the setting of
the on/off state of a laser.
Supports the usage and detection of the SFP optical module, which
facilitates the maintenance and upgrading of the optical module.
Specifications
of the optical
module
Issue 02 (2009-07-30)
Service
processing
Overhead
processing
Supports the setting and query of the J0, J1, J2, and C2 bytes.
Alarms and
performance
events
Specifications
of the REG
5-139
5 SDH Boards
Function and
Feature
SLD16
Protection
schemes
Supports the two-fiber ring MSP, four-fiber ring MSP, linear MSP,
SNCP, SNCTP, and SNCMP.
Supports the fiber-shared MSP and SNCP and processes four sets of K
bytes. A single optical interface supports two MSP protection rings, and
one SLD16 supports a maximum of four MSP protection rings.
Supports warm resets and cold resets. The warm reset does not affect
services.
Maintenance
features
5-140
Issue 02 (2009-07-30)
5 SDH Boards
2.488
Gbit/s
2.488
Gbit/s
K1 and K2
K1 and K2 insertion/
extraction
16x155
Mbit/s
DEMUX
O/E
S
P
I
2.488
Gbit/s
Reference clock
155 MHz
PLL
2.488
Gbit/s
16x155
Mbit/s
MUX
E/O
High-speed
bus
RST
MST
MSA
HPT
High-speed
bus
DCC
IIC
LOS
Laser shutdown
Frame header
Logic and
control module
+3.3 V
DC/DC
converter
Communication
Fuse
DC/DC
converter
Cross-connect
unit
Cross-connect
unit
Cross-connect
unit A
Cross-connect
unit A
SCC unit
Cross-connect
unit
SCC unit
-48 V/-60 V
-48 V/-60 V
In the receive direction, the module converts the received optical signals into electrical
signals.
In the transmit direction, the module converts the electrical signals into SDH optical signals
and sends the SDH optical signals to fibers for transmission.
The SPI detects the R_LOS alarm and provides the function of shutting down the laser.
MUX/DEMUX Module
l
In the receive direction, the DEMUX part demultiplexes the high-rate electrical signals into
multiple parallel electrical signals and restores the clock signal at the same time.
In the transmit direction, the MUX part multiplexes the parallel electrical signals received
from the SDH overhead processing module into high-rate electrical signals.
Issue 02 (2009-07-30)
RST sub-module
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
5-141
5 SDH Boards
In the receive direction, the RST sub-module detects the frame alignment bytes (A1 and
A2), performs descrambling, restores the regenerator section trace byte (J0), detects a
J0 mismatch, and counts BIP-8 errored blocks.
In the transmit direction, the RST sub-module inserts the frame alignment bytes, inserts
the J0 byte, performs scrambling, and performs BIP-8 calculation and insertion.
MST sub-module
In the receive direction, the MST sub-module counts BIP-24 errored blocks, restores
the MS_REI, and detects the MS_RDI, MS_AIS, and MS-EXC.
In the transmit direction, the MST sub-module performs BIP-24 calculation and
insertion and inserts the MS_REI, MS_RDI, and MS_AIS.
The MST sub-module extracts or inserts the K1, K2, E2, D4D12, S1, B2, and M1
bytes.
MSA sub-module
In the receive direction, the MSA sub-module interprets the AU-4 pointer, detects the
LOP and AIS, and performs pointer justifications.
In the transmit direction, the MSA sub-module assembles the AUG and generates the
AU-4 pointer and the AU_AIS.
HPT sub-module
Traces the clock signal from the active and standby cross-connect units.
Passes the orderwire and ECC bytes through an ADM that consists of two paired slots when
the GSCC is not online.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
Issue 02 (2009-07-30)
5 SDH Boards
SLD16
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
SLD16
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
5-143
5 SDH Boards
Interfaces
The front panel of the SLD16 has two optical interfaces. Table 5-75 describes the types and
usage of the optical interfaces of the SLD16.
Table 5-75 Optical interfaces of the SLD16
Interface
Type of
Interface
Usage
IN1IN2
LC
OUT1OUT2
LC
When the cross-connect capacity is 60 Gbit/s, the SLD16 can be installed in slots 28 and
1116. When the SLD16 is installed in slots 27 and 1116, one optical interface can be
configured. When the SLD16 is installed in slot 8, one or two optical interfaces can be
configured.
When the cross-connect capacity is 110 Gbit/s, the SLD16 can be installed in slots 28 and
1116. In this case, one or two optical interfaces can be configured.
Feature Code
SSN1SLD1600
00
SSN1SLD1601
01
I-16
SSN1SLD1602
02
S-16.1
SSN1SLD1603
03
L-16.1
SSN1SLD1604
04
L-16.2
Issue 02 (2009-07-30)
5 SDH Boards
You can set the following parameters for the SLD16 by using the T2000:
l
J0
J1
J2
C2
Issue 02 (2009-07-30)
Parameter
Value
Nominal bit
rate
2488320 kbit/s
Application
code
I-16
S-16.1
L-16.1
L-16.2
Transmissio
n distance
(km)
0 to 2
2 to 15
25 to 40
50 to 80
Type of fiber
Single-mode LC
Single-mode LC
Single-mode LC
Single-mode LC
Operating
wavelength
range (nm)
1266 to 1360
1260 to 1360
1280 to 1335
1500 to 1580
Launched
optical
power range
(dBm)
-10 to -3
-5 to 0
-2 to +3
-2 to +3
Receiver
sensitivity
(dBm)
-18
-18
-27
-28
Minimum
overload
(dBm)
-3
-9
-9
Minimum
extinction
ratio (dB)
8.2
8.2
8.2
8.2
5-145
5 SDH Boards
Mechanical Specifications
The mechanical specifications of the SLD16 are as follows:
l
Power Consumption
The maximum power consumption of the SLD16 at room temperature (25C) is 23 W.
5.18 SLQ16
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SLQ16 (4xSTM-16 optical interface board).
5.18.1 Version Description
The SLQ16 is available in two functional versions, namely, N1 and N2. The difference between
the two versions is with regard to whether they support the TCM function and AU-3 services.
The N2SLQ16 is no longer manufactured.
5.18.2 Functions and Features
The SLQ16 receives and transmits 4xSTM-16 optical signals, processes overhead bytes, and
performs the MSP.
5.18.3 Working Principle and Signal Flow
The SLQ16 consists of the O/E converting module, MUX/DEMUX module, SDH overhead
processing module, logic and control module, DC/DC converter, and other modules.
5.18.4 Front Panel
The front panel of the SLQ16 has indicators, interfaces, a bar code, and a laser safety class label.
5.18.5 Valid Slots
The slots valid for the SLQ16 vary with the cross-connect capacity of the subrack.
5.18.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the SLQ16 indicates the type of optical interface.
5.18.7 Parameter Settings
You can set the parameters for the SLQ16 by using the T2000.
5.18.8 Technical Specifications
The technical specifications of the SLQ16 include the parameters specified for optical interfaces,
laser safety class, mechanical specifications, and power consumption.
5-146
Issue 02 (2009-07-30)
5 SDH Boards
Description
Functional Versions
Differences
The N2SLQ16 supports the TCM function and AU-3 services, but
the TCM function and AU-3 services cannot be available at the
same time.
Substitution
When the AU-3 services and TCM function are not required, the
N1SLQ16 and N2SLQ16 can be substituted with each other.
NOTE
When you configure the MSP or SNCP, you cannot configure the N1SLQ16 as the protection board if the
working board is the N2SLQ16 on which the TCM function is enabled or AU-3 services are configured.
Otherwise, the services are interrupted when a switching operation is performed.
Issue 02 (2009-07-30)
Function and
Feature
SLQ16
Basic functions
Specifications of
the optical interface
5-147
5 SDH Boards
Function and
Feature
SLQ16
Specifications of
the optical module
Supports the detection and query of the information about the optical
module.
Provides the ALS function. The optical interface supports the setting
of the on/off state of a laser.
Supports the usage and detection of the SFP optical module, which
facilitates the maintenance and upgrading of the optical module.
Supports the setting and query of the J0, J1, J2, and C2 bytes.
Service processing
Overhead
processing
Alarms and
performance events
Specifications of
the REG
Protection schemes
Supports the two-fiber ring MSP, four-fiber ring MSP, linear MSP,
SNCP, SNCTP, and SNCMP.
Supports the fiber-shared MSP and SNCP and processes eight sets
of K bytes. A single optical interface supports two MSP protection
rings. One SLQ16 supports a maximum of eight MSP protection
rings.
Supports warm resets and cold resets. The warm reset does not affect
services.
Maintenance
features
5-148
Issue 02 (2009-07-30)
5 SDH Boards
155 MHz
2.488
Gbit/s
2.488
Gbit/s
O/E
2.488
Gbit/s
2.488
Gbit/s
E/O
O/E
converting
module
16x155
Mbit/s
MUX
Cross-connect
unit
K1 and K2
Cross-connect
unit
K1 and K2
insertion/extraction
DEMU 16x155
X
Mbit/s
SPI
Reference clock
High-speed
bus
RST MST MSA HPT
High-speed
bus
DCC
SDH overhead
processing module
MUX/
DEMUX
IIC
LOS
Laser shutdown
Logic and
control module
+3.3 V
DC/DC
Converter
Frame header
Communication
Fuse
DC/DC
Converter
Cross-connect
unit A
Cross-connect
unit B
SCC unit
Cross-connect
unit
SCC unit
-48 V/-60
V
-48 V/-60 V
In the receive direction, the module converts the received optical signals into electrical
signals.
In the transmit direction, the module converts the electrical signals into SDH optical signals
and sends the SDH optical signals to fibers for transmission.
The SPI detects the R_LOS alarm and provides the function of shutting down the laser.
MUX/DEMUX Module
l
In the receive direction, the DEMUX part demultiplexes the high-rate electrical signals into
multiple parallel electrical signals and restores the clock signal at the same time.
In the transmit direction, the MUX part multiplexes the parallel electrical signals received
from the SDH overhead processing module into high-rate electrical signals.
Issue 02 (2009-07-30)
5-149
5 SDH Boards
RST sub-module
In the receive direction, the RST sub-module detects the frame alignment bytes (A1 and
A2), performs descrambling, restores the regenerator section trace byte (J0), detects a
J0 mismatch, and counts BIP-8 errored blocks.
In the transmit direction, the RST sub-module inserts the frame alignment bytes, inserts
the J0 byte, performs scrambling, and performs BIP-8 calculation and insertion.
MST sub-module
In the receive direction, the MST sub-module counts BIP-24 errored blocks, restores
the MS_REI, and detects the MS_RDI, MS_AIS, and MS-EXC.
In the transmit direction, the MST sub-module performs BIP-24 calculation and
insertion and inserts the MS_REI, MS_RDI, and MS_AIS.
The MST sub-module extracts or inserts the K1, K2, E2, D4D12, S1, B2, and M1
bytes.
MSA sub-module
In the receive direction, the MSA sub-module interprets the AU-4 pointer, detects the
LOP and AIS, and performs pointer justifications.
In the transmit direction, the MSA sub-module assembles the AUG and generates the
AU-4 pointer and the AU_AIS.
HPT sub-module
Traces the clock signal from the active and standby cross-connect units.
Passes the orderwire and ECC bytes through an ADM that consists of two paired slots when
the GSCC is not online.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
5-150
Issue 02 (2009-07-30)
5 SDH Boards
SLQ16
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
OUT3
IN3
OUT4
IN4
SLQ16
Figure 5-44 shows the appearance of the front panel of the N2SLQ16.
Issue 02 (2009-07-30)
5-151
5 SDH Boards
SLQ16
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
OUT3
IN3
OUT4
IN4
SLQ16
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the SLQ16 has four optical interfaces. Table 5-80 describes the types and
usage of the optical interfaces of the SLQ16.
5-152
Issue 02 (2009-07-30)
5 SDH Boards
Type of
Interface
Usage
IN1IN4
LC
OUT1OUT4
LC
When the cross-connect capacity is 60 Gbit/s, the SLQ16 can be installed in slot 8. In this
case, one or two optical interfaces can be configured.
When the cross-connect capacity is 110 Gbit/s, the SLQ16 can be installed in slots 28 and
1116. When the SLQ16 is installed in slots 26 and 1316, one or two optical interfaces
can be configured. When the SLQ16 is installed in slots 7, 8, 11, and 12, one to four optical
interfaces can be configured.
Issue 02 (2009-07-30)
Board
Feature Code
SSN1SLQ1601 and
SSN2SLQ1601
01
I-16
SSN1SLQ1602 and
SSN2SLQ1602
02
S-16.1
SSN1SLQ1603 and
SSN2SLQ1603
03
L-16.1
SSN1SLQ1604 and
SSN2SLQ1604
04
L-16.2
SSN1SLQ16A10
10
I-16
SSN1SLQ16A11
11
S-16.1
SSN1SLQ16A12
12
L-16.1
SSN1SLQ16A13
13
L-16.2
5-153
5 SDH Boards
J0
J1
J2
C2
5-154
Parameter
Value
2488320 kbit/s
Application code
I-16
S-16.1
L-16.1
L-16.2
Transmission
distance (km)
0 to 2
2 to 15
25 to 40
50 to 80
Type of fiber
Single-mode
LC
Single-mode
LC
Single-mode LC
Single-mode
LC
Operating
wavelength range
(nm)
1266 to 1360
1260 to 1360
1280 to 1335
1500 to 1580
Launched optical
power range (dBm)
-10 to -3
-5 to 0
-2 to +3
-2 to +3
Receiver sensitivity
(dBm)
-18
-18
-27
-28
Minimum overload
(dBm)
-3
-9
-9
Minimum extinction
ratio (dB)
8.2
8.2
8.2
8.2
Issue 02 (2009-07-30)
5 SDH Boards
Mechanical Specifications
The mechanical specifications of the SLQ16 are as follows:
l
Power Consumption
The maximum power consumption of the N1SLQ16 at room temperature (25C) is 20 W.
The maximum power consumption of the N2SLQ16 at room temperature (25C) is 35 W.
5.19 SF16
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SF16 (1xSTM-16 optical interface board with the out-band FEC
function).
5.19.1 Version Description
The SF16 is available in one functional version, namely, N1.
5.19.2 Functions and Features
The SF16 receives and transmits 1xOTU1 optical signals (2.666 Gbit/s with the FEC function)
and processes overhead bytes.
5.19.3 Working Principle and Signal Flow
The SF16 consists of the O/E converting module, MUX/DEMUX module, FEC module, SDH
overhead processing module, logic and control module, DC/DC converter, and other modules.
5.19.4 Front Panel
The front panel of the SF16 has indicators, interfaces, a bar code, and a laser safety class label.
5.19.5 Valid Slots
The SF16 can be installed in slots 28 and 1116 in the OptiX OSN 3500 II subrack.
5.19.6 Parameter Settings
You can set the parameters for the SF16 by using the T2000.
5.19.7 Technical Specifications
The technical specifications of the SF16 include the parameters specified for optical interfaces,
laser safety class, mechanical specifications, and power consumption.
Issue 02 (2009-07-30)
5-155
5 SDH Boards
SF16
Basic functions
Receives and transmits 1xOTU1 optical signals (2.666 Gbit/s with the
FEC function).
Supports the output of the standard wavelengths that comply with ITUT G.692 and can be directly connected to the DWDM equipment.
Specifications
of the optical
module
Supports the detection and query of the information about the optical
module.
Provides the ALS function. The optical interface supports the setting of
the on/off state of a laser.
Service
processing
Encapsulates and encodes the signals with the FEC function, and
processes overhead bytes, which comply with ITU-T G.709.
Supports the processing of the OTU, ODU, and OPU overhead bytes,
performance monitoring, and alarm detection, which comply with ITUT G.709.
Supports the setting and query of the J0, J1, J2, and C2 bytes.
Alarms and
performance
events
Supports the alarms and performance events that are related to the OTU
layer, ODU layer, OPU layer, and FEC function.
Specifications
of the REG
Specifications
of the optical
interface
Overhead
processing
5-156
Issue 02 (2009-07-30)
5 SDH Boards
Function and
Feature
SF16
Protection
schemes
Supports the two-fiber ring MSP, four-fiber ring MSP, linear MSP,
SNCP, SNCTP, and SNCMP.
Supports the fiber-shared MSP and SNCP and processes two sets of K
bytes. One SF16 supports a maximum of two MSP protection rings.
Supports warm resets and cold resets. The warm reset does not affect
services.
Maintenance
features
2.666
Gbit/s
2.666
Gbit/s
2.666
Gbit/s
O/E
S
P
I
DEMUX
16x166
Mbit/s
Reference clock
K1 and K2 insertion/
extraction
16x155
Mbit/s
K1 and K2
High-speed
bus
FEC
2.666
Gbit/s
E/O
16x166
Mbit/s
155 MHz
16x155
Mbit/s
RST
MST
MSA
HPT
High-speed
bus
MUX
DCC
SDH overhead processing
module
Frame header
Logic and
control module
+3.3 V
DC/DC
converter
Issue 02 (2009-07-30)
Communication
DC/DC
converter
Fuse
Cross-connect
unit
Cross-connect
unit
Cross-connect
unit
Cross-connect
unit
SCC unit
Cross-connect
unit
SCC unit
-48 V/-60 V
-48 V/-60 V
5-157
5 SDH Boards
RST: regenerator section
termination
In the receive direction, the module converts the received 2.666 Gbit/s FEC optical signals
into electrical signals.
In the transmit direction, the module converts the electrical signals into SDH optical signals
and sends the SDH optical signals to fibers for transmission.
The SPI detects the R_LOS alarm and provides the function of shutting down the laser.
MUX/DEMUX Module
l
In the receive direction, the DEMUX part demultiplexes the high-rate electrical signals into
multiple parallel electrical signals and restores the clock signal at the same time.
In the transmit direction, the MUX part multiplexes the parallel electrical signals received
from the FEC module into high-rate electrical signals.
In the downstream direction, the FEC encoding and decoding module receives 2.488 Gbit/
s SDH signals, which are sent by the SDH overhead processing module. After frame
searching, FEC encoding, data packet encapsulation, and scrambling, the 2.488 Gbit/s SDH
signals are converted into 2.666 Gbit/s signals and then transmitted to the MUX module.
In the upstream direction, the reverse process is performed. The FEC encoding and
decoding module receives the 2.666 Gbit/s signals from the DEMUX module. After frame
searching, FEC encoding, data packets encapsulation, and scrambling in the FEC module,
the 2.488 Gbit/s signals are recovered and then transmitted to the SDH overhead processing
module. The frame format of the 2.666 Gbit/s signals complies with ITU G.709.
The FEC processing module is connected to the logic and control module through a CPU
bus. The CPU controls the working modes of the FEC module by configuring the internal
register. The working mode can be the regenerator mode, namely, REG mode. The CPU
can monitor the performance through the internal register.
FEC Module
5-158
RST sub-module
In the receive direction, the RST sub-module detects the frame alignment bytes (A1 and
A2), performs descrambling, restores the regenerator section trace byte (J0), detects a
J0 mismatch, and counts BIP-8 errored blocks.
In the transmit direction, the RST sub-module inserts the frame alignment bytes, inserts
the J0 byte, performs scrambling, and performs BIP-8 calculation and insertion.
MST sub-module
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
Issue 02 (2009-07-30)
5 SDH Boards
In the receive direction, the MST sub-module counts BIP-24 errored blocks, restores
the MS_REI, and detects the MS_RDI, MS_AIS, and MS-EXC.
In the transmit direction, the MST sub-module performs BIP-24 calculation and
insertion and inserts the MS_REI, MS_RDI, and MS_AIS.
The MST sub-module extracts or inserts the K1, K2, E2, D4D12, S1, B2, and M1
bytes.
MSA sub-module
In the receive direction, the MSA sub-module interprets the AU-4 pointer, detects the
LOP and AIS, and performs pointer justifications.
In the transmit direction, the MSA sub-module assembles the AUG and generates the
AU-4 pointer and the AU_AIS.
HPT sub-module
Traces the clock signal from the active and the standby cross-connect unit.
Passes the orderwire and ECC bytes through an ADM that consists of two paired slots when
the CXL is not online.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
Issue 02 (2009-07-30)
5-159
5 SDH Boards
SF16
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT
IN
SF16
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the SF16 has one optical interface. Table 5-84 describes the types and usage
of the optical interfaces of the SF16.
5-160
Issue 02 (2009-07-30)
5 SDH Boards
NOTE
Type of
Interface
Usage
IN
LC
OUT
LC
J0
J1
J2
C2
Issue 02 (2009-07-30)
Parameter
Value
2666057.143 kbit/s
Processing capability
NRZ
Application codea
Ue-16.2c
Ue-16.2d
Ue-16.2f
FEC + BA (14) +
PA
FEC + BA (17) +
PA
FEC + BA (17) + RA + PA
5-161
5 SDH Boards
Parameter
Value
Type of fiber
Single-mode LC
Operating
wavelength range
(nm)
1550.12
Launched optical
power range (dBm)b
Single-mode LC
Single-mode LC
-5 to -1
-5 to -1
-5 to -1
Launched optical
power range (dBm)c
13 to 15
13 to 15
15 to 18
Receiver sensitivity
(dBm)b
-27.5
-27.5
-27.5
Receiver sensitivity
(dBm)d
-37
-37
-42
Minimum overload
(dBm)d
-10
-10
-10
Minimum extinction
ratio (dB)b
10
10
10
a: The numbers in the brackets indicate the corresponding parameter values. For example,
"BA (14)" indicates that the optical power amplified by the BA is 14 dBm. "FEC + BA + PA
+ RA" indicates that the specifications of the optical interface are measured when the FEC,
BA, PA, and Raman amplifier are used.
b: The parameter values are applicable only to the optical modules. The parameter values of
the amplifier are not provided.
c: The parameter values are applicable to the BA.
d: The parameter values are applicable to the PA.
Table 5-86 lists the parameters specified for the colored optical interfaces of the SF16.
Table 5-86 Parameters specified for the optical interfaces that comply with the standard
wavelengths specified in ITU-T G.692
5-162
Parameter
Value
2666057.143 kbit/s
640
-5 to -1
-28
-9
Issue 02 (2009-07-30)
Parameter
Value
Maximum allowed
dispersion (ps/nm)
10880
8.2
5 SDH Boards
Mechanical Specifications
The mechanical specifications of the SF16 are as follows:
l
Power Consumption
The maximum power consumption of the SF16 at room temperature (25C) is 26 W.
5.20 SL64
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SL64 (1xSTM-64 optical interface board).
5.20.1 Version Description
The SL64 is available in one functional version, namely, N1.
5.20.2 Functions and Features
The SL64 receives and transmits 1xSTM-64 optical signals and processes overhead bytes.
5.20.3 Working Principle and Signal Flow
The N1SL64 consists of the O/E converting module, MUX/DEMUX Module, SDH overhead
processing module, logic and control module, lower order alarm processing module, DC/DC
converter, and other modules.
5.20.4 Front Panel
The front panel of the SL64 has indicators, interfaces, a bar code, a laser safety class label, and
an APD alarm label.
5.20.5 Valid Slots
The slots valid for the SL64 vary with the cross-connect capacity of the subrack.
5.20.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the SL64 indicates the type of optical interface.
5.20.7 Parameter Settings
You can set the parameters for the SL64 by using the T2000.
Issue 02 (2009-07-30)
5-163
5 SDH Boards
5-164
Function and
Feature
SL64
Basic functions
Specifications of the
optical interface
Specifications of the
optical module
Service processing
Overhead processing
Supports the setting and query of the J0, J1, J2, and C2 bytes.
Alarms and
performance events
Specifications of the
REG
Protection schemes
Supports the two-fiber ring MSP, four-fiber ring MSP, linear MSP,
SNCP, SNCTP, and SNCMP.
Supports the fiber-shared SNCP and MSP and processes two sets
of K bytes. One SL64 supports a maximum of two MSP protection
rings.
Issue 02 (2009-07-30)
5 SDH Boards
Function and
Feature
SL64
Maintenance
features
Supports warm resets and cold resets. The warm reset does not
affect services.
622 MHz
9.953
Gbit/s
SPI 9.953
E/O
Gbit/s
O/E
SPI
E/
O
O/E
converting
module
9.953
Gbit/s
MUX
16x622
Mbit/s
Cross-connect
unit
K1 and K2
Cross-connect
unit
K1 and K2
insertion/extraction
DEMU 16x622
X
Mbit/s
. .
. .
9.953
Gbit/s
O/E
Reference clock
High-speed
bus
RST MST MSA HPT
High-speed
bus
DCC
SDH overhead
processing module
MUX/
DEMUX
IIC
LOS
Laser shutdown
Logic and
control module
+3.3 V
DC/DC
Converter
Frame header
Communication
Fuse
DC/DC
Converter
Cross-connect
unit A
Cross-connect
unit B
SCC unit
Cross-connect
unit
SCC unit
-48 V/-60
V
-48 V/-60 V
Issue 02 (2009-07-30)
5-165
5 SDH Boards
In the receive direction, the module converts the received optical signals into electrical
signals.
In the transmit direction, the module converts the electrical signals into SDH optical signals
and sends the SDH optical signals to fibers for transmission.
The SPI detects the R_LOS alarm and provides the function of shutting down the laser.
MUX/DEMUX Module
l
In the receive direction, the DEMUX part demultiplexes the high-rate electrical signals into
multiple parallel electrical signals and restores the clock signal at the same time.
In the transmit direction, the MUX part multiplexes the parallel electrical signals received
from the SDH overhead processing module into high-rate electrical signals.
5-166
RST sub-module
In the receive direction, the RST sub-module detects the frame alignment bytes (A1 and
A2), performs descrambling, restores the regenerator section trace byte (J0), detects a
J0 mismatch, and counts BIP-8 errored blocks.
In the transmit direction, the RST sub-module inserts the frame alignment bytes, inserts
the J0 byte, performs scrambling, and performs BIP-8 calculation and insertion.
MST sub-module
In the receive direction, the MST sub-module counts BIP-24 errored blocks, restores
the MS_REI, and detects the MS_RDI, MS_AIS, and MS-EXC.
In the transmit direction, the MST sub-module performs BIP-24 calculation and
insertion and inserts the MS_REI, MS_RDI, and MS_AIS.
The MST sub-module extracts or inserts the K1, K2, E2, D4D12, S1, B2, and M1
bytes.
MSA sub-module
In the receive direction, the MSA sub-module interprets the AU-4 pointer, detects the
LOP and AIS, and performs pointer justifications.
In the transmit direction, the MSA sub-module assembles the AUG and generates the
AU-4 pointer and the AU_AIS.
HPT sub-module
Issue 02 (2009-07-30)
5 SDH Boards
Traces the clock signal from the active and standby cross-connect units.
Passes the orderwire and ECC bytes through an ADM that consists of two paired slots when
the is not online.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
Issue 02 (2009-07-30)
5-167
5 SDH Boards
SL64
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
APD
Receiver
MAX:-9dBm
OUT
IN
SL64
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the SL64 has one optical interface. Table 5-88 describes the types and usage
of the optical interfaces of the SL64.
5-168
Issue 02 (2009-07-30)
5 SDH Boards
Type of
Interface
Usage
IN
LC
OUT
LC
When the cross-connect capacity is 60 Gbit/s, the SL64 cannot be installed in any slot of
the subrack.
When the cross-connect capacity is 110 Gbit/s or 200 Gbit/s, the SL64 can be installed in
slots 7, 8, 11, and 12.
Issue 02 (2009-07-30)
Board
Feature Code
SSN1SL6400
00
Fixed-wavelength optical
interface
SSN1SL6401
01
I-64.2
SSN1SL6402
02
S-64.2b
SSN1SL6403
03
Le-64.2
SSN1SL6404
04
Ls-64.2
SSN1SL6405
05
L-64.2b
SSN1SL6406
06
V-64.2b
SSN2SL6400
00
Fixed-wavelength optical
interface
SSN2SL6411
11
I-64.2
SSN2SL6412
12
S-64.2b
SSN2SL6413
13
Le-64.2
5-169
5 SDH Boards
Board
Feature Code
SSN2SL6404
04
Ls-64.2
SSN2SL6415
15
L-64.2b
SSN2SL6416
16
V-64.2b
SSN3SL6401
01
I-64.1
SSN3SL6402
02
S-64.2b
J0
J1
J2
C2
5-170
Paramet
er
Value
Nominal
bit rate
9953280 kbit/s
Applicati
on code
I-64.1
I-64.2
S-64.
2b
L-64.2b (BA)
Le-64
.2
Ls-64
.2
V-64.2b (BA +
PA + DCU)a
Transmiss
ion
distance
(km)
0 to 2
0 to
25
2 to 40
35 to 80
35 to
60
55 to
80
80 to 120
Issue 02 (2009-07-30)
5 SDH Boards
Paramet
er
Value
Type of
fiber
Singl
emode
LC
Singl
emode
LC
Single
-mode
LC
Single-mode
LC
Singl
emode
LC
Singl
emode
LC
Single-mode LC
Operating
wavelengt
h range
(nm)
1290
to
1330
1530
to
1565
1530
to
1565
1530 to 1565
1530
to
1565
1530
to
1565
1550.12
Mean
launched
optical
power
(dBm)
-6 to
-1
-5 to
-1
-1 to
+2
-4 to +2
(without the
BA)
2 to 4
4 to 7
-4 to -1 (without
the BA, PA, or
DCU)
Receiver
sensitivity
(dBm)
-11
Minimum
overload
(dBm)
-1
-1
-1
-1
-8
-8
-1
Minimum
extinction
ratio (dB)
8.2
8.2
8.2
8.2
8.2
8.2
Maximum
dispersion
tolerance
(ps/nm)
6.6
500
800
1600
1200
1600
2040c
13 to 15 (with
the BA)
-14
-14
-14
13 to 15 (with the
BA)
-21
-21
a: "BA + PA + DCU" indicates that the specifications of the V-64.2b optical interface are
measured when the BA, PA, and DCU are used.
c: The dispersion coefficient is 17 ps/nm when signals are transmitted by the G.652 fibers at
the wavelength of 1550.12 nm. Hence, the dispersion tolerance is 2040 ps/nm for a 120-km
distance.
Table 5-91 lists the parameters specified for the colored optical interfaces of the SL64.
Table 5-91 Parameters specified for the optical interfaces that comply with the standard
wavelengths specified in ITU-T G.692
Issue 02 (2009-07-30)
Parameter
Value
9953280 kbit/s
40
5-171
5 SDH Boards
Parameter
Value
-4 to -1
-14
-1
800
10
Mechanical Specifications
The mechanical specifications of the SL64 are as follows:
l
Power Consumption
The maximum power consumption of the N1SL64 at room temperature (25C) is 30 W.
The maximum power consumption of the N2SL64 at room temperature (25C) is 32 W.
5.21 SF64
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SF64 (1xSTM-64 optical interface board with the FEC function).
5.21.1 Version Description
The SF64 is available in one functional version, namely, N1.
5.21.2 Functions and Features
The SF64 receives and transmits 1xSTM-64 optical signals and processes overhead bytes.
5.21.3 Working Principle and Signal Flow
The SF64 consists of the O/E converting module, MUX/DEMUX module, SDH overhead
processing module, logic and control module, DC/DC converter, and other modules.
5.21.4 Front Panel
The front panel of the SF64 has indicators, interfaces, a bar code, and a laser safety class label.
5.21.5 Valid Slots
The slots valid for the SF64 vary with the cross-connect capacity of the subrack.
5.21.6 Parameter Settings
5-172
Issue 02 (2009-07-30)
5 SDH Boards
You can set the parameters for the SF64 by using the T2000.
5.21.7 Technical Specifications
The technical specifications of the SF64 include the parameters specified for optical interfaces,
laser safety class, mechanical specifications, and power consumption.
SF64
Basic functions
Supports the detection and query of the information about the optical
module.
Provides the ALS function. The optical interface supports the setting
of the on/off state of a laser.
Specifications of
the optical interface
Specifications of
the optical module
Issue 02 (2009-07-30)
Service processing
Overhead
processing
Supports the setting and query of the J0, J1, J2, and C2 bytes.
Alarms and
performance events
Specifications of
the REG
5-173
5 SDH Boards
Function and
Feature
SF64
Protection schemes
Supports the two-fiber ring MSP, four-fiber ring MSP, linear MSP,
SNCP, SNCTP, and SNCMP.
Supports the fiber-shared MSP and SNCP and processes two sets of
K bytes. One SF64 supports a maximum of two MSP protection
rings.
Supports warm resets and cold resets. The warm reset does not affect
services.
Maintenance
features
O/E
10.71
Gbit/s
DEMU
X
16x622
Mbit/s
10.71
Gbit/s
MUX
16x622
Mbit/s
SPI
10.71
Gbit/s
E/O
O/E
converting
module
K1 and K2
Cross-connect
unit
High-speed
bus
DCC
SDH overhead
processing module
669 MHz
PLL
IIC
LOS
Laser shutdown
Logic and
control module
+3.3 V
DC/DC
Converter
5-174
Cross-connect
unit
High-speed
bus
MUX/
DEMUX
Reference clock
K1 and K2
insertion/extraction
16x669
Mbit/s
FEC 16x669
Mbit/s
622 MHz
PLL
DC/DC
Converter
Frame header
Communication
Fuse
Cross-connect
unit A
Cross-connect
unit B
SCC unit
Cross-connect
unit
SCC unit
-48 V/-60 V
-48 V/-60 V
Issue 02 (2009-07-30)
5 SDH Boards
In the receive direction, the module converts the received optical signals into electrical
signals.
In the transmit direction, the module converts the electrical signals into SDH optical signals
and sends the SDH optical signals to fibers for transmission.
The SPI detects the R_LOS alarm and provides the function of shutting down the laser.
MUX/DEMUX Module
l
In the receive direction, the DEMUX part demultiplexes the high-rate electrical signals into
multiple parallel electrical signals and restores the clock signal at the same time.
In the transmit direction, the MUX part multiplexes the parallel electrical signals received
from the SDH overhead processing module into high-rate electrical signals.
Traces the clock signal from the active and standby cross-connect units.
Passes the orderwire and ECC bytes through an ADM that consists of two paired slots when
the is not online.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
5-175
5 SDH Boards
SF64
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT
IN
SF64
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the SF64 has one optical interface. Table 5-93 describes the types and usage
of the optical interfaces of the SF64.
5-176
Issue 02 (2009-07-30)
5 SDH Boards
Type of
Interface
Usage
IN
LC
OUT
LC
When the cross-connect capacity is 60 Gbit/s, the SF64 cannot be installed in any slot of
the subrack.
When the cross-connect capacity is 110 Gbit/s, the SF64 can be installed in slots 7, 8, 11,
and 12.
J0
J1
J2
C2
Issue 02 (2009-07-30)
Parameter
Value
10.709 Gbit/s
Application
codea
Ue-64.2c
Ue-64.2d
Ue-64.2e
Type of fiber
Single-mode LC
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
5-177
5 SDH Boards
Parameter
Value
Operating
wavelength
range (nm)
1550.12
Launched optical -4 to -1
power range
(dBm)c
Minimum
extinction ratio
(dB)
10
a: The numbers in the brackets indicate the corresponding parameter values. For example,
"BA (14 dB)" indicates that the optical power amplified by the BA is 14 dBm.
b: "FEC + BA + PA + RA" indicates that the specifications of the optical interface are
measured when the FEC, BA, PA, and Raman amplifier are used.
c: The parameters are only for the optical modules. The parameters of the amplifier are not
provided.
Table 5-95 lists the parameters specified for the colored optical interfaces of the SF64.
Table 5-95 Parameters specified for the optical interfaces that comply with the standard
wavelengths specified in ITU-T G.692
Parameter
Value
10.709 Gbit/s
40
-4 to -1
-14
-1
800
10
Mechanical Specifications
The mechanical specifications of the SF64 are as follows:
5-178
Issue 02 (2009-07-30)
5 SDH Boards
Power Consumption
At room temperature (25C), the maximum power consumption of the SF64 is 33 W.
5.22 SF64A
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SF64A (1xSTM-64 optical interface board with the FEC function).
5.22.1 Version Description
The SF64A is available in one functional version, namely, N1.
5.22.2 Functions and Features
The SF64A receives and transmits 1xSTM-64 optical signals and processes overhead bytes.
5.22.3 Working Principle and Signal Flow
The SF64A consists of the O/E converting module, MUX/DEMUX module, SDH overhead
processing module, logic and control module, DC/DC converter, and other modules.
5.22.4 Front Panel
The front panel of the SF64A has indicators, interfaces, a bar code, and a laser safety class label.
5.22.5 Valid Slots
The slots valid for the SF64A vary with the cross-connect capacity of the subrack.
5.22.6 Parameter Settings
You can set the parameters for the SF64A by using the T2000.
5.22.7 Technical Specifications
The technical specifications of the SF64A include the parameters specified for optical interfaces,
laser safety class, mechanical specifications, and power consumption.
Issue 02 (2009-07-30)
Function and
Feature
SF64A
Basic functions
5-179
5 SDH Boards
Function and
Feature
SF64A
Specifications of
the optical interface
Supports the detection and query of the information about the optical
module.
Provides the ALS function. The optical interface supports the setting
of the on/off state of a laser.
Specifications of
the optical module
Service processing
Overhead
processing
Supports the setting and query of the J0, J1, J2, and C2 bytes.
Alarms and
performance events
Specifications of
the REG
Protection schemes
Supports the two-fiber ring MSP, four-fiber ring MSP, linear MSP,
SNCP, SNCTP, and SNCMP.
Supports the fiber-shared MSP and SNCP and processes two sets of
K bytes. One SF64A supports a maximum of two MSP protection
rings.
Supports warm resets and cold resets. The warm reset does not affect
services.
Maintenance
features
5-180
Issue 02 (2009-07-30)
5 SDH Boards
10.71
Gbit/s
O/E
16x622
Mbit/s
MUX
FEC 16x669
16x622
Mbit/s
Mbit/s
SPI
10.71
Gbit/s
E/O
10.71
Gbit/s
O/E
converting
module
Reference clock
Cross-connect
unit
K1 and K2
Cross-connect
unit
K1 and K2
insertion/extraction
16x669
Mbit/s
DEMU
X
622 MHz
PLL
High-speed
bus
RST MST MSA HPT
High-speed
bus
DCC
SDH overhead
processing module
MUX/
DEMUX
669 MHz
PLL
IIC
LOS
Laser shutdown
Logic and
control module
+3.3 V
DC/DC
Converter
DC/DC
Converter
Frame header
Communication
Fuse
Cross-connect
unit A
Cross-connect
unit B
SCC unit
Cross-connect
unit
SCC unit
-48 V/-60 V
-48 V/-60 V
In the receive direction, the module converts the received optical signals into electrical
signals.
In the transmit direction, the module converts the electrical signals into SDH optical signals
and sends the SDH optical signals to fibers for transmission.
The SPI detects the R_LOS alarm and provides the function of shutting down the laser.
MUX/DEMUX Module
l
In the receive direction, the DEMUX part demultiplexes the high-rate electrical signals into
multiple parallel electrical signals and restores the clock signal at the same time.
In the transmit direction, the MUX part multiplexes the parallel electrical signals received
from the SDH overhead processing module into high-rate electrical signals.
Issue 02 (2009-07-30)
5-181
5 SDH Boards
Traces the clock signal from the active and standby cross-connect units.
Passes the orderwire and ECC bytes through an ADM that consists of two paired slots when
the is not online.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
5-182
Issue 02 (2009-07-30)
5 SDH Boards
SF64A
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT
IN
SF64A
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the SF64A has one optical interface. Table 5-97 describes the types and usage
of the optical interfaces of the SF64A.
Issue 02 (2009-07-30)
5-183
5 SDH Boards
Type of
Interface
Usage
IN
LC
OUT
LC
TX
LC
RX
LC
When the cross-connect capacity is 60 Gbit/s, the SF64A cannot be installed in any slot of
the subrack.
When the cross-connect capacity is 110 Gbit/s, the SF64A can be installed in slots 7, 8, 11,
and 12.
J0
J1
J2
C2
5-184
Parameter
Value
10.709 Gbit/s
DRZ
Issue 02 (2009-07-30)
5 SDH Boards
Parameter
Value
Application
codea
Ue-64.2c
Ue-64.2d
Ue-64.2e
Type of fiber
Single-mode LC
Operating
wavelength
range (nm)
1550.120.08
Launched optical -4 to -1
power range
(dBm)c
Receiver
sensitivity (dBm)
-24
Minimum
overload (dBm)
Minimum
extinction ratio
(dB)
13.5
a: The numbers in the brackets indicate the corresponding parameter values. For example,
"BA (14)" indicates that the optical power amplified by the BA is 14 dBm.
b: "FEC + BA + PA + RA" indicates that the specifications of the optical interface are
measured when the FEC, BA, PA, and Raman amplifier are used.
c: The parameters are only for the optical modules. The parameters of the amplifier are not
provided.
Table 5-99 lists the parameters specified for the colored optical interfaces of the SF64A.
Table 5-99 Parameters specified for the optical interfaces that comply with the standard
wavelengths specified in ITU-T G.692
Issue 02 (2009-07-30)
Parameter
Value
10.709 Gbit/s
80
-4 to -1
-14
800
5-185
5 SDH Boards
Parameter
Value
13.5
Mechanical Specifications
The mechanical specifications of the SF64A are as follows:
l
Power Consumption
At room temperature (25C), the maximum power consumption of the SF64 is 33 W.
5.23 SLQ41
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SLQ41 (4xSTM-4/STM-1 optical interface board).
5.23.1 Version Description
The SLQ41 is available in one functional version, namely, N3. The SLQ41 supports the autosensing of optical interfaces.
5.23.2 Functions and Features
The SLQ41 transmits and receives STM-1 or STM-4 optical signals, performs O/E conversion
for the STM-1 or STM-4 optical signals, extracts and inserts overhead bytes, and generates alarm
signals on the line.
5.23.3 Working Principle and Signal Flow
The SLQ41 consists of the O/E converting module, CDR module, SDH overhead processing
module, logic and control module, DC/DC converter, and other modules.
5.23.4 Front Panel
The front panel of the SLQ41 has indicators, interfaces, a bar code, and a laser safety class label.
5.23.5 Valid Slots
The SLQ41 can be installed in slots 28 and 1116 in the subrack.
5.23.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the SLQ41 indicates the type of optical interface.
5.23.7 Parameter Settings
You can set the parameters for the SLQ41 by using the T2000.
5.23.8 Technical Specifications
5-186
Issue 02 (2009-07-30)
5 SDH Boards
The technical specifications of the SLQ41 include the parameters specified for optical interfaces,
laser safety class, mechanical specifications, and power consumption.
SLQ41
Basic functions
Specifications of the
optical interface
Specifications of the
optical module
Service processing
Issue 02 (2009-07-30)
Supports the usage and detection of the SFP optical module, which
facilitates the maintenance and upgrading of the optical module.
When the STM-1 optical module is used, the SLQ41 supports the
VC-12 services, VC-3 services, and VC-4 services.
When the STM-4 optical module is used, the SLQ41 supports the
VC-12 services, VC-3 services, VC-4 services, and VC-4-4c
concatenation services.
5-187
5 SDH Boards
Function and
Feature
SLQ41
Overhead processing
Supports the setting and query of the J0, J1, J2, and C2 bytes.
Alarms and
performance events
Protection schemes
Supports the two-fiber ring MSP, four-fiber ring MSP, linear MSP,
SNCP, SNCTP, and SNCMP.
Maintenance
features
Supports warm resets and cold resets. The warm reset does not
affect services.
5-188
Issue 02 (2009-07-30)
5 SDH Boards
STM-1/
STIM-4
E/O
E/O
K1 and K2
Cross-connect
unit
High-speed
bus
....
....
O/E
STM-1/
STIM-4
Cross-connect
unit
K1 and K2
insertion/extraction
CDR
SPI
Reference clock
CDR
SPI
High-speed
bus
DCC
SDH overhead
processing module
O/E converting
module
IIC
LOS
Logic and
control module
Frame header
Communication
Laser shutdown
+3.3 V
DC/DC
Converter
DC/DC
Converter
Fuse
Cross-connect
unit A
Cross-connect
unit B
SCC unit
Cross-connect
unit
SCC unit
-48 V/-60
V
-48 V/-60 V
In the receive direction, the module converts the received optical signals into electrical
signals.
In the transmit direction, the module converts the electrical signals into SDH optical signals
and sends the SDH optical signals to fibers for transmission.
The SPI detects the R_LOS alarm and provides the function of shutting down the laser.
CDR Module
This module restores the data signal and the clock signal.
RST sub-module
Issue 02 (2009-07-30)
In the receive direction, the RST sub-module detects the frame alignment bytes (A1 and
A2), performs descrambling, restores the regenerator section trace byte (J0), detects a
J0 mismatch, and counts BIP-8 errored blocks.
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
5-189
5 SDH Boards
In the transmit direction, the RST sub-module inserts the frame alignment bytes, inserts
the J0 byte, performs scrambling, and performs BIP-8 calculation and insertion.
MST sub-module
In the receive direction, the MST sub-module counts BIP-24 errored blocks, restores
the MS_REI, and detects the MS_RDI, MS_AIS, and MS-EXC.
In the transmit direction, the MST sub-module performs BIP-24 calculation and
insertion and inserts the MS_REI, MS_RDI, and MS_AIS.
The MST sub-module extracts or inserts the K1, K2, E2, D4D12, S1, B2, and M1
bytes.
MSA sub-module
In the receive direction, the MSA sub-module interprets the AU-4 pointer, detects the
LOP and AIS, and performs pointer justifications.
In the transmit direction, the MSA sub-module assembles the AUG and generates the
AU-4 pointer and the AU_AIS.
HPT sub-module
Traces the clock signal from the active and standby cross-connect units.
Passes the orderwire and ECC bytes through an ADM that consists of two paired slots when
the CXL is not online.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
Issue 02 (2009-07-30)
5 SDH Boards
SLQ41
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1 IN1
OUT2 IN2
OUT3 IN3
OUT4 IN4
SLQ41
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the SLQ41 has four optical interfaces. Table 5-101 describes the types and
usage of the optical interfaces of the SLQ41.
Issue 02 (2009-07-30)
5-191
5 SDH Boards
Type of
Interface
Usage
IN1IN4
LC
OUT1OUT4
LC
Feature Code
SSN3SLQ414
14
I-4
SSN3SLQ410
10
S-4.1
SSN3SLQ411
11
L-4.1
SSN3SLQ412
12
L-4.2
SSN3SLQ413
13
Ve-4.2
SSN3SLQ114
14
I-1
SSN3SLQ110
10
S-1.1
SSN3SLQ111
11
L-1.1
SSN3SLQ112
12
L-1.2
SSN3SLQ113
13
Ve-1.2
5-192
J0
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
Issue 02 (2009-07-30)
J1
J2
C2
5 SDH Boards
Value
155520 kbit/s
Line code
pattern
NRZ
Application
code
I-1
S-1.1
L-1.1
L-1.2
Ve-1.2
Transmission
distance (km)
0 to 2
2 to 15
20 to 40
60 to 80
80 to 100
Type of fiber
Single-mode LC
Single-mode LC
Single-mode LC
Single-mode LC
Single-mode LC
Operating
wavelength
range (nm)
1260 to 1360
1261 to 1360
1263 to 1360
1480 to 1580
1480 to 1580
Launched
optical power
range (dBm)
-15 to -8
-15 to -8
-5 to 0
-5 to 0
-3 to 0
Receiver
sensitivity
(dBm)
-23
-28
-34
-34
-34
Minimum
overload (dBm)
-8
-8
-10
-10
-10
Minimum
extinction ratio
(dB)
8.2
8.2
10
10
10
Issue 02 (2009-07-30)
5-193
5 SDH Boards
Table 5-104 lists the parameters specified for the optical interfaces of the SLQ41 when the
STM-4 optical module is used.
Table 5-104 Parameters specified for the optical interfaces of the SLQ41 when the STM-4
optical module is used
Parameter
Value
622080 kbit/s
NRZ
Application code
I-4
S-4.1
L-4.1
L-4.2
Ve-4.2
Transmission
distance (km)
0 to 2
2 to 15
20 to 40
50 to 80
80 to 100
Operating
wavelength range
(nm)
1261 to
1360
1274 to
1356
1280 to
1335
1480 to
1580
1480 to
1580
Type of fiber
Singlemode LC
Singlemode LC
Singlemode LC
Singlemode LC
Singlemode LC
Mean launched
optical power
(dBm)
-15 to -8
-15 to -8
-3 to -2
-3 to -2
-3 to -2
Receiver
sensitivity (dBm)
-23
-28
-28
-28
-34
Minimum
overload (dBm)
-8
-8
-8
-8
-13
Minimum
extinction ratio
(dB)
8.2
8.2
10
10
10.5
Mechanical Specifications
The mechanical specifications of the SLQ41 are as follows:
l
Power Consumption
The maximum power consumption of the SLQ41 at room temperature (25C) is 12 W.
5-194
Issue 02 (2009-07-30)
6 PDH Boards
PDH Boards
6-1
6 PDH Boards
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the DXA (DDN service converging and processing board).
6.10 SPQ4
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SPQ4 (4xE4/STM-1 electrical processing board).
6-2
Issue 02 (2009-07-30)
6 PDH Boards
6.1 PQ1
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the PQ1 (63xE1 service processing board).
6.1.1 Version Description
The PQ1 is available in two functional versions, namely, N1 and N2. The difference between
the two versions is with regard to their functions. The N1PQ1 is no longer manufactured.
6.1.2 Functions and Features
The PQ1 processes E1 signals, processes overhead bytes, reports alarms and performance events,
provides maintenance features, and supports the TPS protection.
6.1.3 Working Principle and Signal Flow
The PQ1 consists of the PPI module, E1 mapping/demapping module, interface converting
module, logic and control module, DC/DC converter, and other modules.
6.1.4 Front Panel
The front panel of the PQ1 has indicators.
6.1.5 Valid Slots
The PQ1 can be installed in slots 27 and 1216 in the subrack.
6.1.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the PQ1 indicates the type of interface impedance.
6.1.7 Board Protection
The PQ1 supports the 1:N TPS protection.
6.1.8 Parameter Settings
You can set the parameters for the PQ1 by using the T2000.
6.1.9 Technical Specifications
The technical specifications of the PQ1 include the parameters specified for electrical interfaces,
mechanical specifications, and power consumption.
Description
Functional versions
Differences
The N2PQ1 supports the E13 function and the board version
replacement function.
The N2PQ1 does not perform the tributary re-timing function.
Issue 02 (2009-07-30)
6-3
6 PDH Boards
Item
Description
Substitution
Note: The PQ1 boards are classified into the PQ1A boards (75 ohms) and PQ1B boards (120
ohms) according to the interface impedance. When the interface impedance is not considered,
the PQ1A and PQ1B are called PQ1 hereafter.
6-4
Function
and
Feature
PQ1
N1PQ1
N2PQ1
Basic
functions
Processes 63xE1
signals.
Service
processing
Processes 63xE1
electrical signals
when working with
the interface board.
Overhead
processing
Supports the processing of the path overheads at the VC-12 level, such as the
J2 byte.
Alarms and
performanc
e events
Maintenan
ce features
Supports warm resets and cold resets. The warm reset does not affect
services.
Issue 02 (2009-07-30)
6 PDH Boards
Function
and
Feature
PQ1
Protection
schemes
Supports the TPS protection when working with the interface board.
N1PQ1
N2PQ1
The N1PQ1 supports hybrid protection. When the working board is the
N1PQ1, the protection board can be the N1PQ1, N2PQ1, or N1PQM.
The N2PQ1 does not support hybrid protection. When the working board is
the N2PQ1, the protection board can only be the N2PQ1.
E1
E1
LIU
LIU
P
P
I
155 MHz
PLL
63x2 Mbit/s
E1 mapping/
demapping
module
63x2 Mbit/s
LOS
Outloop/Inloop
control
155 Mbit/s
155 Mbit/s
HighInterface
speed bus
converting
module
Highspeed bus
Frame header
Communication
Logic and
control module
+3.3 V
DC/DC
converter
Reference
clock
DC/DC
converter
Fuse
Cross-connect unit
Cross-connect unit A
Cross-connect unit B
Cross-connect unit
SCC Unit
-48 V/-60 V
-48 V/-60 V
Figure 6-2 shows the functional block diagram of the E1 mapping/demapping module.
Issue 02 (2009-07-30)
6-5
6 PDH Boards
LPA
PDH AIS
detector
HPA
LPT
LPOH(V5/J2/N2/
K4) insertion
LPOH(V5/J2/N2/
K4) extraction
E1
LPA
HPT
STM-1
TU-AIS/TULOP detector
LPT
HPA
HPT
STM-1
PPI Module
The PPI module consists of LIUs and provides the inloop and outloop functions. The PPI module
performs the following functions:
l
E1 Mapping/Demapping Module
6-6
LPA sub-module
LPT sub-module
The virtual container (VC-12) is formatted. The VC-12 is structured so that its octets are
distributed within a 125 us interval (for example, one STM1 period), and consists of the
VC-12 container and POH. The POH contains nine octets equally distributed within the
frame bytes for VC-12, namely, V5, J2, N2, and K4.
HPA sub-module
The HPA sub-module generates and processes the channel-level TU-PTR. In the receive
direction, the signals are split into VC-12s, which are located and isolated in TU-12s. The
TU-PTR is processed. TU-AIS and TU-LOP alarms are monitored. In the transmit
direction, VC-12s are located precisely and added with the TU-PTR. Sixty-three TUG-3s
are multiplexed into a VC-4 by bytes interleaving. The sequence is as follows: TUG2>TUG3->VC-4
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
Issue 02 (2009-07-30)
6 PDH Boards
HPT sub-module
The virtual container (VC-4) is formatted. The VC-4 is structured so that its octets are
distributed within a 125 us interval (for example, one STM1 period), and consists of the
C4 container and POH.
These sub-modules are required to create a proprietary STM1 signal so that the E1
mapping/demapping module can interface with the multiplex unit.
Traces the clock signal from the active and standby cross-connect units.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
Issue 02 (2009-07-30)
6-7
6 PDH Boards
PQ1
STAT
ACT
PROG
SRV
PQ1
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the PQ1 does not have an interface.
6-8
Issue 02 (2009-07-30)
6 PDH Boards
The D75S, D12S, and D12B provide 75-ohm or 120-ohm E1 interfaces for the PQ1. For details,
see the topics that describe the D75S, D12S, and D12B.
Slot 2
Slot 3
Slot 4
Slot 5
Slot 6
Slot 7
Slot 12
Slot 13
Slot 14
Slot 15
Slot 16
Issue 02 (2009-07-30)
6-9
6 PDH Boards
NOTE
Slot 2 can house a protection board for the TPS protection. The board in slot 2 protects the boards in
slots 37 and 1216.
If the interface board for the boards in slots 37 and 1216 is the D12B, the boards in slots 37 and
1216 cannot be protected by the TPS protection scheme.
Feature Code
A01
75-ohm
B01
120-ohm
Protection Principle
The PQ1 boards work with the D75S or D12S boards to realize 1:N (N10) TPS protection.
Figure 6-4 shows the TPS protection provided by the PQ1.
6-10
Issue 02 (2009-07-30)
6 PDH Boards
S
L
E1 protection bus O
T
2
1
S
L
O
T
2
2
S
L
O
T
2
3
S
L
O
T
2
4
S
L
O
T
2
5
S
L
O
T
2
6
S
L
O
T
2
8
S
L
O
T
2
7
S
L
O
T
2
9
S
L
O
T
3
1
S
L
O
T
3
0
S
L
O
T
3
2
S
L
O
T
3
3
S
L
O
T
3
4
S
L
O
T
3
5
S
L
O
T
3
6
S
L
O
T
3
7
S
L
O
T
3
8
S
L
O
T
3
9
S
L
O
T
4
0
D12S
D12S
D12S
D12S
D12S
D12S
D12S
D12S
D12S
D12S
D12S
D12S
D12S
D12S
D12S
D12S
D12S
D12S
D12S
D12S
E1 service bus
Working
Working
Working
Working
S
L
O
T
1
2
Failed
S
L
O
T
1
3
S
L
O
T
1
4
S
L
O
T
1
5
S
L
O
T
1
6
Working
Protection
S
L
O
T
7
Working
S
L
O
T
6
Working
S
L
O
T
5
Working
S
L
O
T
4
Working
S
L
O
T
3
Working
S
L
O
T
2
Detecting a
board fault
Cross-connect and timing board
When the cross-connect and timing board detects that a working PQ1 is faulty, the cross-connect
and timing board issues a service switching command to control the access board to switch the
services from the faulty PQ1 to the protection PQ1, which realizes the protection of the services.
Hardware Configuration
Table 6-5 shows the slot configuration for the 1:10 TPS protection of the PQ1.
Table 6-5 Slot configuration for the 1:10 TPS protection of the PQ1
Issue 02 (2009-07-30)
Working Board
Protection Board
Slot Configuration
PQ1A (75-ohm)
PQ1A (75-ohm)
PQ1B (120-ohm)
6-11
6 PDH Boards
Figure 6-5 Slot configuration for the 1:10 TPS protection of the PQ1
S
L
O
T
28
S
L
O
T
29
S
L
O
T
32
S S S S
L L L L
O O O O
T T T T
33 34 35 36
SLOT 43 EOW
S S S S
L L L L
O O O O
T T T T
13 14 15 16
SLOT 42AUX
working
working
S S
L L
O O
T T
11 12
working
S
L
O
T
10
working
S
L
O
T
9
working
working
working
S
L
O
T
8
CXL
working
S
L
O
T
7
FAN
CXL
S
L
O
T
6
working
S S
L L
O O
T T
4 5
working
SLOT 41 PIU
S
L
O
T
3
Protection
SLOT 1 PIU
S
L
O
T
2
S
L
O
T
40
D12S
FAN
S S S
L L L
O O O
T T T
37 38 39
D12S
D12S
D12S
D12S
D12S
FAN
S S
L L
O O
T T
30 31
D12S
D12S
D12S
D12S
S
L
O
T
27
D12S
D12S
S S
L L
O O
T T
25 26
D12S
D12S
S
L
O
T
24
D12S
D12S
S
L
O
T
23
D12S
S
L
O
T
22
D12S
D12S
D12S
S
L
O
T
21
J2 byte
V5 byte
Tributary loopback
Issue 02 (2009-07-30)
6 PDH Boards
Mechanical Specifications
The mechanical specifications of the PQ1 are as follows:
l
Power Consumption
The maximum power consumption of the N1PQ1 at room temperature (25C) is 19 W.
The maximum power consumption of the N2PQ1 at room temperature (25C) is 13 W.
6.2 PO1
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the PO1 (126xE1 service processing board).
6.2.1 Version Description
The PO1 is available in one functional version, namely, N2.
6.2.2 Functions and Features
The PO1 processes E1 signals, processes overhead bytes, reports alarms and performance events,
provides maintenance features, and supports the TPS protection.
6.2.3 Working Principle and Signal Flow
The PO1 consists of the PPI module, E1 mapping/demapping module, interface converting
module, logic and control module, DC/DC converter, and other modules.
6.2.4 Front Panel
The front panel of the PO1 has indicators.
6.2.5 Valid Slots
The PO1 can be used with the D12S or D12B.
6.2.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the PO1 indicates the type of interface impedance.
6.2.7 Parameter Settings
You can set the parameters for the PO1 by using the T2000.
6.2.8 Technical Specifications
The technical specifications of the PO1 include the parameters specified for electrical interfaces,
mechanical specifications, and power consumption.
6-13
6 PDH Boards
PO1
Basic
functions
Service
processing
Processes 126xE1 electrical signals and 3xE13 signals when working with the
interface board. The interface board accesses the 1st to 63rd E1s. The PO1
accesses the 64th to 126th E1s on its front panel.
Overhead
processing
Supports the processing of the path overheads at the VC-12 level, such as the
J2 byte.
Alarms and
performanc
e events
Maintenan
ce features
Supports warm resets and cold resets. The warm reset does not affect
services.
6-14
Issue 02 (2009-07-30)
6 PDH Boards
E1
LIU
E1
LIU
P
P
I
155 MHz
PLL
63x2 Mbit/s
E1 mapping/
demapping
module
63x2 Mbit/s
LOS
Outloop/Inloop
control
155 Mbit/s
155 Mbit/s
Reference
clock
HighInterface
speed bus
converting
module
Highspeed bus
Frame header
Communication
Logic and
control module
+3.3 V
DC/DC
converter
DC/DC
converter
Fuse
Cross-connect unit
Cross-connect unit A
Cross-connect unit B
Cross-connect unit
SCC Unit
-48 V/-60 V
-48 V/-60 V
Figure 6-7 shows the functional block diagram of the E1 mapping/demapping module.
Figure 6-7 Functional block diagram of the E1 mapping/demapping module
E1 mapping/demapping module
E1
LPA
PDH AIS
detector
E1
LPA
HPA
LPT
LPOH(V5/J2/N2/
K4) insertion
LPOH(V5/J2/N2/
K4) extraction
HPT
STM-1
TU-AIS/TU-LOP
detector
LPT
HPA
HPT
STM-1
Issue 02 (2009-07-30)
6-15
6 PDH Boards
PPI Module
The PPI module consists of LIUs and provides the inloop and outloop functions. The PPI module
performs the following functions:
l
E1 Mapping/Demapping Module
l
LPA sub-module
LPT sub-module
The virtual container (VC-12) is formatted. The VC-12 is structured so that its octets are
distributed within a 125 us interval (for example, one STM1 period), and consists of the
VC-12 container and POH. The POH contains nine octets equally distributed within the
frame bytes for VC-12, namely, V5, J2, N2, and K4.
HPA sub-module
The HPA sub-module generates and processes the channel-level TU-PTR. In the receive
direction, the signals are split into VC-12s, which are located and isolated in TU-12s. The
TU-PTR is processed. TU-AIS and TU-LOP alarms are monitored. In the transmit
direction, VC-12s are located precisely and added with the TU-PTR. Sixty-three TUG-3s
are multiplexed into a VC-4 by bytes interleaving. The sequence is as follows: TUG2>TUG3->VC-4
HPT sub-module
The virtual container (VC-4) is formatted. The VC-4 is structured so that its octets are
distributed within a 125 us interval (for example, one STM1 period), and consists of the
C4 container and POH.
These sub-modules are required to create a proprietary STM1 signal so that the E1
mapping/demapping module can interface with the multiplex unit.
6-16
Traces the clock signal from the active and standby cross-connect units.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
Issue 02 (2009-07-30)
6 PDH Boards
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
PO1
STAT
ACT
PROG
SRV
64
84
85
105
106
126
PO1
Issue 02 (2009-07-30)
6-17
6 PDH Boards
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the PO1 has three interfaces for 21xE1 96-pin connectors. Table 6-7 describes
the types and usage of the interfaces of the PO1.
Table 6-7 Interfaces of the PO1
Interface
Type of Interface
Usage
2 mm FB
2 mm FB
2 mm FB
The D12S and D12B provide 120-ohm E1 interfaces for the PO1. The PO1 supports only the
120-ohm interface board. For details, see the topics that describe the D12S and D12B.
Slot 3
Slot 4
6-18
Issue 02 (2009-07-30)
6 PDH Boards
Slot 5
Slot 6
Slot 7
Slot 12
Slot 13
Slot 14
Slot 15
Slot 16
Feature Code
SSN2PO1B01
B01
120-ohm
J2 byte
V5 byte
Issue 02 (2009-07-30)
6-19
6 PDH Boards
l
Tributary loopback
Mechanical Specifications
The mechanical specifications of the PO1 are as follows:
l
Power Consumption
The maximum power consumption of the N2PO1 at room temperature (25C) is 32 W.
6.3 PQM
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the PQM (63xE1/T1 service processing board).
6.3.1 Version Description
The PQM is available in one functional version, namely, N1.
6.3.2 Functions and Features
The PQM processes E1/T1 signals, processes overhead bytes, reports alarms and performance
events, provides maintenance features, and supports the TPS protection.
6.3.3 Working Principle and Signal Flow
The PQM consists of the PPI module, E1/T1 mapping/demapping module, interface converting
module, logic and control module, DC/DC converter, and other modules.
6.3.4 Front Panel
The front panel of the PQM has indicators.
6.3.5 Valid Slots
The PQM can be installed in slots 27 and 1216, and must be used with the D12S or D12B.
6.3.6 Board Protection
The PQM supports the 1:N TPS protection.
6.3.7 Parameter Settings
You can set the parameters for the PQM by using the T2000.
6.3.8 Technical Specifications
6-20
Issue 02 (2009-07-30)
6 PDH Boards
The technical specifications of the PQM include the parameters specified for electrical
interfaces, mechanical specifications, and power consumption.
PQM
Basic
functions
Service
processing
Accesses and processes 63xE1/T1 electrical signals when working with the
interface board. Each channel can be configured as E1 or T1.
Overhead
processing
Supports the processing of the path overheads at the VC-12 level, such as
the J2 byte.
Alarms and
performance
events
Maintenance
features
Supports warm resets and cold resets. The warm reset does not affect
services.
Protection
schemes
Supports the TPS protection when working with the interface board.
l
When the working board is the N1PQ1, the protection board can be the
N1PQ1, N2PQ1 or N1PQM. In this case, the hybrid protection is
provided.
When the working board is the N1PQM, the protection board can only be
the N1PQM.
6-21
6 PDH Boards
E1/T1
E1/T1
LIU
LIU
155 MHz
PLL
63x1.5 Mbit/s/
63x2 Mbit/s
P
P
I
63x1.5 Mbit/
s/
63x2 Mbit/s
LOS
E1/T1
mapping/
demapping
module
155 Mbit/s
155 Mbit/s
Highspeed bus
Interface
converting
module
Highspeed bus
Frame header
Communication
Logic and
control module
Outloop/Inloop
control
Reference
clock
+3.3 V
DC/DC
converter
DC/DC
converter
Fuse
Cross-connect unit
Cross-connect unit A
Cross-connect unit B
Cross-connect unit
SCC Unit
-48 V/-60 V
-48 V/-60 V
Figure 6-10 shows the functional block diagram of the E1/T1 mapping/demapping module.
Figure 6-10 Functional block diagram of the E1/T1 mapping/demapping module
Mapping/demapping module
E1/T1
LPA
PDH AIS
detector
HPA
LPT
LPOH(V5/J2/N2/
K4) insertion
LPOH(V5/J2/N2/
K4) extraction
STM-1
TU-AIS/TULOP detector
E1/T1
LPA
HPT
LPT
HPA
HPT
STM-1
6-22
Issue 02 (2009-07-30)
6 PDH Boards
PPI Module
The PPI module consists of LIUs and provides the inloop and outloop functions. The PPI module
performs the following functions:
l
LPA sub-module
LPT sub-module
The virtual container (VC-12) is formatted. The VC-12 is structured so that its octets are
distributed within a 125 us interval (for example, one STM1 period), and consists of the
VC-12 container and POH. The POH contains nine octets equally distributed within the
frame bytes for VC-12, namely, V5, J2, N2, and K4.
HPA sub-module
The HPA sub-module generates and processes the channel-level TU-PTR. In the receive
direction, the signals are split into VC-12s, which are located and isolated in TU-12s. The
TU-PTR is processed. TU-AIS and TU-LOP alarms are monitored. In the transmit
direction, VC-12s are located precisely and added with the TU-PTR. Sixty-three TUG-3s
are multiplexed into a VC-4 by bytes interleaving. The sequence is as follows: TUG2>TUG3->VC-4
HPT sub-module
The virtual container (VC-4) is formatted. The VC-4 is structured so that its octets are
distributed within a 125 us interval (for example, one STM1 period), and consists of the
C4 container and POH.
These sub-modules are required to create a proprietary STM1 signal so that the E1
mapping/demapping module can interface with the multiplex unit.
Traces the clock signal from the active and standby cross-connect units.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
Issue 02 (2009-07-30)
6-23
6 PDH Boards
l
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
PQM
STAT
ACT
PROG
SRV
PQM
6-24
Issue 02 (2009-07-30)
6 PDH Boards
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the PQM does not have an interface. The D12S and D12B provide 120-ohm
E1 interfaces or 100-ohm T1 interfaces for the PQM. For details, see the topics that describe the
D12S and D12B.
Slot 2
Slot 3
Slot 4
Slot 5
Slot 6
Slot 7
Slot 12
Slot 13
Issue 02 (2009-07-30)
6-25
6 PDH Boards
Slot 14
Slot 15
Slot 16
NOTE
Slot 2 can house a protection board for the TPS protection. The board in slot 2 protects the boards in
slots 37 and 1216.
If the interface board for the boards in slots 37 and 1216 is the D12B, the boards in slots 37 and
1216 cannot be protected by the TPS protection scheme.
Protection Principle
The PQM boards work with the D12S boards to realize 1:N (N10) TPS protection. Figure
6-12 shows the TPS protection provided by the PQM.
6-26
Issue 02 (2009-07-30)
6 PDH Boards
E1 protection bus
S
L
O
T
2
1
S
L
O
T
2
2
S
L
O
T
2
3
S
L
O
T
2
4
S
L
O
T
2
5
S
L
O
T
2
6
S
L
O
T
2
7
S
L
O
T
2
8
S
L
O
T
2
9
S
L
O
T
3
0
S
L
O
T
3
1
S
L
O
T
3
2
S
L
O
T
3
3
S
L
O
T
3
4
S
L
O
T
3
5
S
L
O
T
3
6
S
L
O
T
3
7
S
L
O
T
3
8
S
L
O
T
3
9
S
L
O
T
4
0
D12S
D12S
D12S
D12S
D12S
D12S
D12S
D12S
D12S
D12S
D12S
D12S
D12S
D12S
D12S
D12S
D12S
D12S
D12S
D12S
S
L
O
T
5
S
L
O
T
6
S
L
O
T
7
S
L
O
T
1
2
Failed
S
L
O
T
1
5
S
L
O
T
1
6
Working
S
L
O
T
1
4
Working
Working
Working
Working
Working
Working
Working
Protection
S
L
O
T
1
3
Working
S
L
O
T
3
Working
S
L
O
T
2
Detecting a
board f ault
Cross-connect and timing board
When the cross-connect and timing board detects that a working PQM is faulty, the cross-connect
and timing board issues a service switching command to control the access board to switch the
services from the faulty PQM to the protection PQM, which realizes the protection of the
services.
Hardware Configuration
Table 6-12 shows the slot configuration for the 1:10 TPS protection of the PQM.
Table 6-12 Slot configuration for the 1:10 TPS protection of the PQM
Issue 02 (2009-07-30)
Working
Board
Protection Board
Slot Configuration
PQM (E1)
PQM (E1)
PQM (T1)
PQM (T1)
6-27
6 PDH Boards
Figure 6-13 Slot configuration for the 1:10 TPS protection of the PQM
S
L
O
T
28
S
L
O
T
29
S
L
O
T
32
S S S S
L L L L
O O O O
T T T T
33 34 35 36
SLOT 43 EOW
S S S S
L L L L
O O O O
T T T T
13 14 15 16
SLOT 42AUX
working
working
S S
L L
O O
T T
11 12
working
S
L
O
T
10
working
S
L
O
T
9
working
working
working
S
L
O
T
8
CXL
working
S
L
O
T
7
FAN
CXL
S
L
O
T
6
working
S S
L L
O O
T T
4 5
working
SLOT 41 PIU
S
L
O
T
3
Protection
SLOT 11 PIU
S
L
O
T
2
S
L
O
T
40
D12S
FAN
S S S
L L L
O O O
T T T
37 38 39
D12S
D12S
D12S
D12S
D12S
FAN
S S
L L
O O
T T
30 31
D12S
D12S
D12S
D12S
S
L
O
T
27
D12S
D12S
S S
L L
O O
T T
25 26
D12S
D12S
S
L
O
T
24
D12S
D12S
S
L
O
T
23
D12S
S
L
O
T
22
D12S
D12S
D12S
S
L
O
T
21
J2 byte
V5 byte
Tributary loopback
6-28
Issue 02 (2009-07-30)
6 PDH Boards
Mechanical Specifications
The mechanical specifications of the PQM are as follows:
l
Power Consumption
The maximum power consumption of the PQM at room temperature (25C) is 22 W.
6.4 PL3
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the PL3 (3xE3/T3 service processing board).
6.4.1 Version Description
The PL3 is available in two functional versions, namely, N1 and N2. The difference between
the two versions is with regard to their functions. The N1PL3 is no longer manufactured.
6.4.2 Functions and Features
The PL3 processes E3/T3 signals, processes overhead bytes, reports alarms and performance
events, provides maintenance features, and supports the TPS protection.
6.4.3 Working Principle and Signal Flow
The PL3 consists of the PPI module, E3/T3 mapping/demapping module, interface converting
module, logic and control module, DC/DC converter, and other modules.
6.4.4 Front Panel
The front panel of the PL3 has indicators.
6.4.5 Valid Slots
The PL3 can be installed in slots 37 and 1216, and must be used with the C34S.
6.4.6 Board Protection
The PL3 supports the 1:N TPS protection.
6.4.7 Parameter Settings
You can set the parameters for the PL3 by using the T2000.
6.4.8 Technical Specifications
The technical specifications of the PL3 include the parameters specified for electrical interfaces,
mechanical specifications, and power consumption.
6-29
6 PDH Boards
Description
Functional versions
Differences
Substitution
PL3
Basic functions
Service processing
Overhead
processing
Supports the setting and query of all the path overhead bytes at the VC-3
level.
Alarms and
performance
events
Maintenance
features
Supports warm resets and cold resets. The warm reset does not affect
services.
Protection
schemes
6-30
Supports the TPS protection when working with the interface board and
the switching and bridging board.
Issue 02 (2009-07-30)
6 PDH Boards
E3/T3
E3/T3
LIU
LIU
P
I
155 MHz
PLL
3x34 Mbit/s/
3x45 Mbit/s
2x155 Mbit/s
E3/T3
Interface
mapping/
converting
3x34 Mbit/s/
demapping
module
2x155 Mbit/s
3x45 Mbit/s
module
LOS
+3.3 V
DC/DC
converter
OSC: Oscillator
Cross-connect unit
Highspeed bus
Cross-connect unit A
Highspeed bus
Cross-connect unit B
Frame header
Communication
Logic and
control module
Outloop/Inloop
control
Reference
clock
DC/DC
converter
Cross-connect unit
SCC Unit
Fuse
-48 V/-60 V
-48 V/-60 V
Figure 6-15 shows the functional block diagram of the E3/T3 mapping/demapping module.
Figure 6-15 Functional block diagram of the E3/T3 mapping/demapping module
Mapping/demapping module
E3/T3
LPA
LPT
PDH AIS
detector
E3/T3
LPA
LPOH (J1/C2/
B3) insertion
LPOH (J1/C2/
B3) extraction
LPT
Issue 02 (2009-07-30)
HPA
HPT
STM-1
TU-AIS/TULOP detector
HPA
HPT
STM-1
6-31
6 PDH Boards
HPA: High order path adaptation
PPI Module
The PPI module consists of LIUs and provides the inloop and outloop functions. The PPI module
performs the following functions:
l
LPA sub-module
LPT sub-module
The virtual container (VC-3) is formatted. The VC-3 is structured so that its octets are
distributed within a 125 us interval (for example, one STM1 period), and consists of the
VC-3 container and POH. The POH contains nine octets equally distributed within the
frame bytes for VC-3, namely, J1, B3, C2, G1, F2, H4, F3, K3, and N1.
HPA sub-module
The HPA sub-module generates and processes the channel-level TU-PTR. In the receive
direction, the signals are split into VC-3s, which are located and isolated in TU-3s. The
TU-PTR is processed. In the transmit direction, VC-3s are located precisely and added with
the TU-PTR. Three TUG-3s are multiplexed into a VC-4 by bytes interleaving. The
sequence is as follows: TU-3->TUG3->VC-4
HPT sub-module
The virtual container (VC-4) is formatted. The VC-4 is structured so that its octets are
distributed within a 125 us interval (for example, one STM1 period), and consists of the
C4 container and POH.
These sub-modules are required to create a proprietary STM1 signal so that the interface
converting module can be connected.
6-32
Issue 02 (2009-07-30)
6 PDH Boards
Traces the clock signal from the active and standby cross-connect units.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
PL3
STAT
ACT
PROG
SRV
PL3
Issue 02 (2009-07-30)
6-33
6 PDH Boards
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the PL3 does not have an interface.
The C34S provides E3/T3 interfaces for the PL3. For details, see the topic that describes the
C34S.
Slot 3
Slot 21
Slot 4
Slot 23
Slot 5
Slot 25
Slot 6
Slot 27
Slot 7
Slot 29
Slot 12
Slot 31
Slot 13
Slot 33
Slot 14
Slot 35
Slot 15
Slot 37
Slot 16
Slot 39
Issue 02 (2009-07-30)
6 PDH Boards
Protection Principle
The PL3 can be configured into two 1:N (N3) TPS protection groups when the PL3 works
with the C34S and TSB8/TSB4. Figure 6-17 shows the TPS protection provided by the PL3.
Figure 6-17 TPS protection provided by the PL3
3xE3/T3
TSB8/
TSB4
3 2
3xE3/T3
C34S
3xE3/T3
Switching
control
C34S
signal
C34S
1
Crossconnect
and
timing
board
Slot 9/10
Protection
PL3
Working
PL3
Working
PL3
Working
PL3
Failed
Slot 3
Slot 4
Slot 5
Slot 6
Normal state
When each working board functions normally, the traffic signal is directly transmitted to
the PL3 through position 1 of the control switch on the C34S.
Switching state
When a working board detects a failure and requires the switching operation, the control
switch of the corresponding C34S switches from position 1 to position 2. At the same time,
the control switch of the TSB8/TSB4 switches to the corresponding position so that the
protection board can protect the failed working board.
Issue 02 (2009-07-30)
6-35
6 PDH Boards
Hardware Configuration
Figure 6-18 Slot configuration for the two 1:3 TPS protection groups of the PL3
S
L
O
T
23
S
L
O
T
24
S
L
O
T
25
S
L
O
T
26
S
L
O
T
27
S
L
O
T
28
S
L
O
T
29
FAN
S
L
O
T
9
S
L
O
T
37
S
L
O
T
38
S
L
O
T
39
S
L
O
T
40
FAN
S
L
O
T
10
S S
L L
O O
T T
11 12
S S S S
L L L
L
O O O O
T T T T
13 14 15 16
SLOT 43 EOW
S
L
O
T
8
SLOT 42 AUX
Working 2
Protection 2
Working 2
Working 2
XCS
XCS
Working 1
Working 1
Working 1
SLOT 41PIU
S S S S
L L L L
O O O O
T T T T
4 5 6 7
Protection 1
SLOT 1 PIU
S
L
O
T
3
S
L
O
T
36
TSB8/TSB4
S
L
O
T
35
C34S
S S S
L L L
O O O
T T T
32 33 34
C34S
C34S
C34S
TSB8/TSB4
FAN
S
L
O
T
2
S S
L L
O O
T T
30 31
C34S
S
L
O
T
22
C34S
S
L
O
T
21
In Figure 6-18, the board in slot 3 protects the boards in slots 46. The board in slot 16 protects
the boards in slots 1315.
Table 6-16 lists the slots for the PL3, C34S, and TSB8/TSB4.
Table 6-16 Slots for the PL3, C34S, and TSB8/TSB4
6-36
Board
Protection Group 1
Protection Group 2
Slots 46
Slot 1315
PL3/PD3 (protection
board)
Slot 3
Slot 16
TSB8/TSB4
Slot 21
Slot 39
C34S
Issue 02 (2009-07-30)
6 PDH Boards
J1 byte
C2 byte
Tributary loopback
Mechanical Specifications
The mechanical specifications of the PL3 are as follows:
l
Power Consumption
The maximum power consumption of the N1PL3 at room temperature (25C) is 15 W.
The maximum power consumption of the N2PL3 at room temperature (25C) is 12 W.
6.5 PL3A
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the PL3A (3xE3/T3 service processing board with the interfaces on
the front panel).
6.5.1 Version Description
The PL3A is available in two functional versions, namely, N1 and N2. The difference between
the two versions is with regard to whether they support the E13/M13 function. The N1PL3A is
no longer manufactured.
6.5.2 Functions and Features
The PL3A processes E3/T3 signals, processes overhead bytes, reports alarms and performance
events, provides maintenance features, and supports the TPS protection.
6.5.3 Working Principle and Signal Flow
Issue 02 (2009-07-30)
6-37
6 PDH Boards
The PL3A consists of the PPI module, E3/T3 mapping/demapping module, interface converting
module, logic and control module, DC/DC converter, and other modules.
6.5.4 Front Panel
The front panel of the PL3A has indicators and interfaces.
6.5.5 Valid Slots
The PL3A can be installed in slots 28 and 1116 in the subrack.
6.5.6 Parameter Settings
You can set the parameters for the PL3A by using the T2000.
6.5.7 Technical Specifications
The technical specifications of the PL3A include the parameters specified for electrical
interfaces, mechanical specifications, and power consumption.
Description
Functional versions
Differences
Substitution
6-38
Issue 02 (2009-07-30)
6 PDH Boards
PL3A
Basic functions
Service processing
Overhead
processing
Supports the setting and query of all the path overhead bytes at the
VC-3 level.
Alarms and
performance events
Maintenance
features
Supports warm resets and cold resets. The warm reset does not
affect services.
Issue 02 (2009-07-30)
6-39
6 PDH Boards
E3/T3
E3/T3
LIU
LIU
P
I
155 MHz
PLL
3x34 Mbit/s/
3x45 Mbit/s
2x155 Mbit/s
E3/T3
Interface
mapping/
converting
3x34 Mbit/s/
demapping
module
2x155 Mbit/s
3x45 Mbit/s
module
LOS
+3.3 V
DC/DC
converter
OSC: Oscillator
Cross-connect unit
Highspeed bus
Cross-connect unit A
Highspeed bus
Cross-connect unit B
Frame header
Communication
Logic and
control module
Outloop/Inloop
control
Reference
clock
DC/DC
converter
Cross-connect unit
SCC Unit
Fuse
-48 V/-60 V
-48 V/-60 V
Figure 6-20 shows the functional block diagram of the E3/T3 mapping/demapping module.
Figure 6-20 Functional block diagram of the E3/T3 mapping/demapping module
Mapping/demapping module
E3/T3
LPA
HPA
LPT
PDH AIS
detector
E3/T3
LPA
LPOH (J1/C2/
B3) insertion
LPOH (J1/C2/
B3) extraction
HPT
STM-1
TU-AIS/TULOP detector
HPA
LPT
HPT
STM-1
Issue 02 (2009-07-30)
6 PDH Boards
PPI Module
The PPI module consists of LIUs and provides the inloop and outloop functions. The PPI module
performs the following functions:
l
LPA sub-module
LPT sub-module
The virtual container (VC-3) is formatted. The VC-3 is structured so that its octets are
distributed within a 125 us interval (for example, one STM1 period), and consists of the
VC-3 container and POH. The POH contains nine octets equally distributed within the
frame bytes for VC-3, namely, J1, B3, C2, G1, F2, H4, F3, K3, and N1.
HPA sub-module
The HPA sub-module generates and processes the channel-level TU-PTR. In the receive
direction, the signals are split into VC-3s, which are located and isolated in TU-3s. The
TU-PTR is processed. In the transmit direction, VC-3s are located precisely and added with
the TU-PTR. Three TUG-3s are multiplexed into a VC-4 by bytes interleaving. The
sequence is as follows: TU-3->TUG3->VC-4
HPT sub-module
The virtual container (VC-4) is formatted. The VC-4 is structured so that its octets are
distributed within a 125 us interval (for example, one STM1 period), and consists of the
C4 container and POH.
These sub-modules are required to create a proprietary STM1 signal so that the interface
converting module can be connected.
Traces the clock signal from the active and standby cross-connect units.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
Issue 02 (2009-07-30)
6-41
6 PDH Boards
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
PL3A
STAT
ACT
PROG
SRV
OUT1
IN1
OUT2
IN2
OUT3
IN3
PL3A
Indicators
The front panel of the board has the following indicators:
6-42
Issue 02 (2009-07-30)
6 PDH Boards
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the PL3A has three pairs of 75-ohm unbalanced interfaces, which are of the
SMB type.
J1 byte
C2 byte
Tributary loopback
Issue 02 (2009-07-30)
Nominal Bit
Rate
Line Code
Pattern
Signal Bit
Rate at the
Output
Interface
34368 kbit/s
HDB3
44736 kbit/s
B3ZS
Allowed
Frequency
Deviation
at the
Input
Interface
Allowed
Attenuatio
n at the
Input
Interface
Input
Jitter
Tolerance
6-43
6 PDH Boards
Mechanical Specifications
The mechanical specifications of the PL3A are as follows:
l
Power Consumption
The maximum power consumption of the N1PL3A at room temperature (25C) is 15 W.
The maximum power consumption of the N2PL3A at room temperature (25C) is 12 W.
6.6 PD3
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the PD3 (6xE3/T3 service processing board).
6.6.1 Version Description
The PD3 is available in two functional versions, namely, N1 and N2. The difference between
the two versions is with regard to whether they support the E13/M13 function. The N1PD3 is
no longer manufactured.
6.6.2 Functions and Features
The PD3 processes E3/T3 signals, processes overhead bytes, reports alarms and performance
events, provides maintenance features, and supports the TPS protection.
6.6.3 Working Principle and Signal Flow
The PD3 consists of the PPI module, E3/T3 mapping/demapping module, interface converting
module, logic and control module, DC/DC converter, and other modules.
6.6.4 Front Panel
The front panel of the PD3 has indicators.
6.6.5 Valid Slots
The PD3 can be installed in slots 37 and 1216, and must be used with the D34S.
6.6.6 Board Protection
The PD3 supports the 1:N TPS protection.
6.6.7 Parameter Settings
You can set the parameters for the PD3 by using the T2000.
6.6.8 Technical Specifications
The technical specifications of the PD3 include the parameters specified for electrical interfaces,
mechanical specifications, and power consumption.
Issue 02 (2009-07-30)
6 PDH Boards
Description
Functional versions
Differences
Substitution
Issue 02 (2009-07-30)
Function
and Feature
PD3
Basic
functions
Service
processing
Overhead
processing
Supports the setting and query of all the path overhead bytes at the VC-3
level.
Alarms and
performance
events
Maintenance
features
Supports warm resets and cold resets. The warm reset does not affect
services.
6-45
6 PDH Boards
Function
and Feature
PD3
Protection
schemes
Supports the TPS protection when working with the interface board and the
switching and bridging board.
E3/T3
E3/T3
LIU
LIU
P
I
155 MHz
PLL
6x34 Mbit/s/
6x45 Mbit/s
2x155 Mbit/s
E3/T3
Interface
mapping/
converting
6x34 Mbit/s/
demapping
module
2x155 Mbit/s
6x45 Mbit/s
module
LOS
Outloop/Inloop
control
+3.3 V
OSC: Oscillator
DC/DC
converter
Cross-connect unit
Highspeed bus
Cross-connect unit A
Highspeed bus
Cross-connect unit B
Frame header
Communication
Logic and
control module
DC/DC
converter
Reference
clock
Fuse
Cross-connect unit
SCC Unit
-48 V/-60 V
-48 V/-60 V
Figure 6-23 shows the functional block diagram of the E3/T3 mapping/demapping module.
6-46
Issue 02 (2009-07-30)
6 PDH Boards
LPA
HPA
LPT
PDH AIS
detector
LPOH (J1/C2/
B3) insertion
LPOH (J1/C2/
B3) extraction
E3/T3
LPA
HPT
STM-1
TU-AIS/TULOP detector
HPA
LPT
HPT
STM-1
PPI Module
The PPI module consists of LIUs and provides the inloop and outloop functions. The PPI module
performs the following functions:
l
LPA sub-module
LPT sub-module
The virtual container (VC-3) is formatted. The VC-3 is structured so that its octets are
distributed within a 125 us interval (for example, one STM1 period), and consists of the
VC-3 container and POH. The POH contains nine octets equally distributed within the
frame bytes for VC-3, namely, J1, B3, C2, G1, F2, H4, F3, K3, and N1.
HPA sub-module
The HPA sub-module generates and processes the channel-level TU-PTR. In the receive
direction, the signals are split into VC-3s, which are located and isolated in TU-3s. The
TU-PTR is processed. In the transmit direction, VC-3s are located precisely and added with
the TU-PTR. Three TUG-3s are multiplexed into a VC-4 by bytes interleaving. The
sequence is as follows: TU-3->TUG3->VC-4
HPT sub-module
Issue 02 (2009-07-30)
6-47
6 PDH Boards
l
The virtual container (VC-4) is formatted. The VC-4 is structured so that its octets are
distributed within a 125 us interval (for example, one STM1 period), and consists of the
C4 container and POH.
These sub-modules are required to create a proprietary STM1 signal so that the interface
converting module can be connected.
Traces the clock signal from the active and standby cross-connect units.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
6-48
Issue 02 (2009-07-30)
6 PDH Boards
PD3
STAT
ACT
PROG
SRV
PD3
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the PD3 does not have an interface.
Issue 02 (2009-07-30)
6-49
6 PDH Boards
The D34S provides E3/T3 interfaces for the PD3. For details, see the topic that describes the
D34S.
Slot 3
Slot 21
Slot 4
Slot 23
Slot 5
Slot 25
Slot 6
Slot 27
Slot 7
Slot 29
Slot 12
Slot 31
Slot 13
Slot 33
Slot 14
Slot 35
Slot 15
Slot 37
Slot 16
Slot 39
Protection Principle
The PD3 can be configured into two 1:N (N3) TPS protection groups when the PD3 works
with the D34S and TSB8. Figure 6-25 shows the TPS protection provided by the PD3.
6-50
Issue 02 (2009-07-30)
6 PDH Boards
TSB8
6xE3/T3
D34S
6xE3/T3
Sw itching
control
D34S
signal
D34S
Crossconnect
and timing
board
Slot 9/10
Protection
PD3
Working
PD3
Working
PD3
Working
PD3
Failed
Slot 2
Slot 3
Slot 4
Slot 5
Normal state
When each working board functions normally, the traffic signal is directly transmitted to
the PD3 through position 1 of the control switch on the D34S.
Switching state
When a working board detects a failure and requires the switching operation, the control
switch of the corresponding D34S switches from position 1 to position 2. At the same time,
the control switch of the TSB8 switches to the corresponding position so that the protection
board can protect the failed working board.
Hardware Configuration
Table 6-23 shows the slot configuration for the 1:3 TPS protection of the PD3.
Table 6-23 Slot configuration for the two 1:3 TPS protection groups of the PD3
Issue 02 (2009-07-30)
Working
Board
Protection Board
Slot Configuration
PD3 (E3)
PD3 (E3)
PD3 (T3)
PD3 (T3)
6-51
6 PDH Boards
Figure 6-26 Slot configuration for the two 1:3 TPS protection groups of the PD3
S
L
O
T
23
S
L
O
T
24
S
L
O
T
28
S
L
O
T
29
S S S S
L L L L
O O O O
T T T T
33 34 35 36
S
L
O
T
6
S
L
O
T
7
S
L
O
T
8
S
L
O
T
9
S
L
O
T
38
S
L
O
T
39
S
L
O
T
40
FAN
S
L
O
T
10
S S S S S S
L
L L L L
L
O O O O O O
T T T T T T
11 12 13 14 15 16
SLOT 43 EOW
S
L
O
T
5
S
L
O
T
37
TSB8
FAN
SLOT 42 AUX
Protection 2
Working 2
Working 2
Working 2
CXL
CXL
Working 1
Working 1
Working 1
SLOT 41 PIU
S
L
O
T
4
Protection 1
SLOT 1 PIU
S
L
O
T
3
S
L
O
T
32
D34S
FAN
S
L
O
T
2
S S
L L
O O
T T
30 31
D34S
S
L
O
T
27
D34S
D34S
TSB8
S S
L L
O O
T T
25 26
D34S
S
L
O
T
22
D34S
S
L
O
T
21
In Figure 6-26, the board in slot 3 protects the boards in slots 46. The board in slot 16 protects
the boards in slots 1315.
Table 6-24 lists the slots for the PD3, D34S, and TSB8.
Table 6-24 Slots for the PD3, D34S, and TSB8
Board
Protection Group 1
Protection Group 2
Slots 46
Slots 1315
Slot 3
Slot 16
TSB8
Slot 21
Slot 39
D34S
Issue 02 (2009-07-30)
J1 byte
C2 byte
Tributary loopback
6 PDH Boards
Mechanical Specifications
The mechanical specifications of the PD3 are as follows:
l
Power Consumption
The maximum power consumption of the N1PD3 at room temperature (25C) is 19 W.
The maximum power consumption of the N2PD3 at room temperature (25C) is 12 W.
6.7 PQ3
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the PQ3 (12xE3/T3 service processing board).
6.7.1 Version Description
The PQ3 is available in one functional version, namely, N2.
6.7.2 Functions and Features
The PQ3 processes E3/T3 signals, processes overhead bytes, reports alarms and performance
events, provides maintenance features, and supports the TPS protection.
6.7.3 Working Principle and Signal Flow
The PQ3 consists of the PPI module, E3/T3 mapping/demapping module, interface converting
module, logic and control module, DC/DC converter, and other modules.
6.7.4 Front Panel
The front panel of the PQ3 has indicators.
6.7.5 Valid Slots
The PQ3 can be installed in slots 37 and 1216, and must be used with the D34S.
Issue 02 (2009-07-30)
6-53
6 PDH Boards
PQ3
Basic functions
Service
processing
Overhead
processing
Supports the setting and query of all the path overhead bytes at the VC-3
level.
Alarms and
performance
events
Maintenance
features
Supports warm resets and cold resets. The warm reset does not affect
services.
Protection
schemes
6-54
Supports the TPS protection when working with the interface board and the
switching and bridging board.
Issue 02 (2009-07-30)
6 PDH Boards
E3/T3
E3/T3
LIU
LIU
P
I
155 MHz
PLL
12x34 Mbit/s/
12x45 Mbit/s
2x155 Mbit/s
E3/T3
Interface
mapping/
converting
12x34 Mbit/s/
demapping
module
2x155 Mbit/s
12x45 Mbit/s
module
LOS
Outloop/Inloop
control
+3.3 V
OSC: Oscillator
Cross-connect unit
Highspeed bus
Cross-connect unit A
Highspeed bus
Cross-connect unit B
Frame header
Communication
Logic and
control module
DC/DC
converter
Reference
clock
DC/DC
converter
Cross-connect unit
SCC Unit
Fuse
-48 V/-60 V
-48 V/-60 V
Figure 6-28 shows the functional block diagram of the E3/T3 mapping/demapping module.
Figure 6-28 Functional block diagram of the E3/T3 mapping/demapping module
Mapping/demapping module
E3/T3
LPA
LPT
PDH AIS
detector
E3/T3
LPA
LPOH (J1/C2/
B3) insertion
LPOH (J1/C2/
B3) extraction
LPT
Issue 02 (2009-07-30)
HPA
HPT
STM-1
TU-AIS/TULOP detector
HPA
HPT
STM-1
6-55
6 PDH Boards
HPA: High order path adaptation
PPI Module
The PPI module consists of LIUs and provides the inloop and outloop functions. The PPI module
performs the following functions:
l
LPA sub-module
LPT sub-module
The virtual container (VC-3) is formatted. The VC-3 is structured so that its octets are
distributed within a 125 us interval (for example, one STM1 period), and consists of the
VC-3 container and POH. The POH contains nine octets equally distributed within the
frame bytes for VC-3, namely, J1, B3, C2, G1, F2, H4, F3, K3, and N1.
HPA sub-module
The HPA sub-module generates and processes the channel-level TU-PTR. In the receive
direction, the signals are split into VC-3s, which are located and isolated in TU-3s. The
TU-PTR is processed. In the transmit direction, VC-3s are located precisely and added with
the TU-PTR. Three TUG-3s are multiplexed into a VC-4 by bytes interleaving. The
sequence is as follows: TU-3->TUG3->VC-4
HPT sub-module
The virtual container (VC-4) is formatted. The VC-4 is structured so that its octets are
distributed within a 125 us interval (for example, one STM1 period), and consists of the
C4 container and POH.
These sub-modules are required to create a proprietary STM1 signal so that the interface
converting module can be connected.
6-56
Issue 02 (2009-07-30)
6 PDH Boards
Traces the clock signal from the active and standby cross-connect units.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
PQ3
STAT
ACT
PROG
SRV
PQ3
Issue 02 (2009-07-30)
6-57
6 PDH Boards
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the PQ3 does not have an interface.
The D34S provides E3/T3 interfaces for the PQ3. For details, see the topic that describes the
D34S.
Slot 3
Slots 21 and 22
Slot 4
Slots 23 and 24
Slot 5
Slots 25 and 26
Slot 6
Slots 27 and 28
Slot 7
Slots 29 and 30
Slot 12
Slots 31 and 32
Slot 13
Slots 33 and 34
Slot 14
Slots 35 and 36
Slot 15
Slots 37 and 38
Slot 16
Slots 39 and 40
Issue 02 (2009-07-30)
6 PDH Boards
Protection Principle
The PQ3 boards can be configured into two 1:N (N3) TPS protection groups when the PQ3
boards work with two D34S boards and two TSB8 boards. Figure 6-30 shows the TPS protection
provided by the PQ3.
Figure 6-30 TPS protection provided by the PQ3
12xE3/T3 12xE3/T3 12xE3/T3 12xE3/T3 12xE3/T3 12xE3/T3
TSB8
TSB8
3 2
D34S
D34S
D34S
D34S
Sw itching
control
D34S signal
D34S
Crossconnect
and timing
board
Slot 9/10
Protection
Working
PQ3
PQ3
Slot 3
Slot 4
Working
PQ3
Failed
Slot 5
Working
PQ3
Slot 6
Normal state
When each working board functions normally, the traffic signal is directly transmitted to
the PQ3 through position 1 of the control switch on the D34S.
Switching state
When a working board detects a failure and requires the switching operation, the control
switch of the corresponding D34S switches from position 1 to position 2. At the same time,
the control switch of the TSB8 switches to the corresponding position so that the protection
board can protect the failed working board.
Hardware Configuration
NOTE
When you configure the N2PQ3 as the TPS protection board, two TSB8 boards are required.
Table 6-27 shows the slot configuration for the 1:3 TPS protection of the PQ3.
Issue 02 (2009-07-30)
6-59
6 PDH Boards
Table 6-27 Slot configuration for the 1:3 TPS protection of the PQ3
Working
Board
Protection Board
Slot Configuration
PQ3 (E3)
PQ3 (E3)
PQ3 (T3)
PQ3 (T3)
Figure 6-31 Slot configuration for the two 1:3 TPS protection groups of the PQ3
S
L
O
T
29
FAN
S
L
O
T
32
S S S S
L L L L
O O O O
T T T T
33 34 35 36
S
L
O
T
37
S
L
O
T
38
S
L
O
T
39
S
L
O
T
40
FAN
S
L
O
T
10
S S S S S S
L
L L L L
L
O O O O O O
T T T T T T
11 12 13 14 15 16
SLOT 43 EOW
S
L
O
T
9
SLOT 42 AUX
Protection 2
Working 2
Working 1
S
L
O
T
8
Working 2
Working 1
S
L
O
T
7
Working 2
S
L
O
T
6
FAN
CXL
S
L
O
T
5
CXL
S
L
O
T
4
Working 1
SLOT 41 PIU
S
L
O
T
3
Protection 1
SLOT 1 PIU
S
L
O
T
2
S S
L L
O O
T T
30 31
TSB8
S
L
O
T
28
TSB8
D34S
D34S
S
L
O
T
27
D34S
TSB8
S S
L L
O O
T T
25 26
D34S
D34S
D34S
TSB8
S
L
O
T
24
D34S
S
L
O
T
23
D34S
S
L
O
T
22
D34S
D34S
D34S
D34S
S
L
O
T
21
In Figure 6-31, the board in slot 3 protects the boards in slots 46. The board in slot 16 protects
the boards in slots 1315.
Table 6-28 lists the slots for the PQ3, D34S, and TSB8.
Table 6-28 Slots for the PQ3, D34S, and TSB8
6-60
Board
Protection Group 1
Protection Group 2
Slots 46
Slots 1315
Slot 3
Slot 16
Issue 02 (2009-07-30)
6 PDH Boards
Board
Protection Group 1
Protection Group 2
TSB8
Slots 21 and 22
Slots 39 and 40
D34S
Slots 2328
Slots 3338
J1 byte
C2 byte
Tributary loopback
Mechanical Specifications
The mechanical specifications of the PQ3 are as follows:
l
Power Consumption
The maximum power consumption of the PQ3 at room temperature (25C) is 13 W.
6.8 DX1
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the DX1 (DDN service accessing and converging board).
6.8.1 Version Description
The DX1 is available in one functional version, namely, N1.
6.8.2 Functions and Features
Issue 02 (2009-07-30)
6-61
6 PDH Boards
The DX1 cross-connects 48xE1 signals at the 64 kbit/s level on the system side.
6.8.3 Working Principle and Signal Flow
The DX1 consists of the interface and frame processing module, encoding/decoding module,
timeslot cross-connect module, framing/deframing module, mapping/demapping module, logic
and control module, and power module.
6.8.4 Front Panel
The front panel of the DX1 has indicators.
6.8.5 Valid Slots
The DX1 can be installed in slots 27 and 1216, and must be used with the DM12.
6.8.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the DX1 indicates the type of interface impedance.
6.8.7 Board Protection
The DX1 supports the 1:N TPS protection.
6.8.8 Parameter Settings
You can set the parameters for the DX1 by using the T2000.
6.8.9 Technical Specifications
The technical specifications of the DX1 include the parameters specified for electrical interfaces,
mechanical specifications, and power consumption.
6-62
Function
and
Feature
DX1
Basic
functions
Working
with the
interface
board
Alarms and
performance
events
Issue 02 (2009-07-30)
6 PDH Boards
Function
and
Feature
DX1
Connectors
The DB28 connectors and DB44 connectors are present on the front panel of
the DM12. The DB28 connector is used for the Nx64 kbit/s signals, and the
DB44 connector is used for the framed E1 signals.
Loopback
function
DM12
Framed E1
interface
module
8xframed E1
4xNx64 kbit/s
Nx64 kbit/s
interface
module
4xNx64 kbit/s
DM12
Nx64 kbit/s
interface
module
Power
Backplane
DX1
Framed E1
encoding/decoding
and frame
processing module
Nx64k bit/s
interface and
frame
processing
module
64 kbit/s
timeslot
crossconnect
module
Mapping/
Demapping
module for 48
channels of
signals
Framing/
Deframing
module
Power
Framed E1
interface
module
+3.3 V
Power
module
Power
module
Cross-connect
unit
SCC unit
Fuse
-48 V/-60 V
-48 V/-60 V
6-63
6 PDH Boards
connects and grooms the signals at the 64 kbit/s granularity, and transmits the signals that need
to be dropped on the local NE to the interface module.
Power Module
The power module provides all the modules of the DX1 with the required DC voltages.
6-64
Issue 02 (2009-07-30)
6 PDH Boards
DX1
STAT
ACT
PROG
SRV
DX1
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the DX1 does not have an interface.
The DX1 needs to work with the DM12 to receive and transmit the framed E1 signals and Nx64
kbit/s signals. For details, see the topic that describes the DM12.
Issue 02 (2009-07-30)
6-65
6 PDH Boards
Slot 3
Slots 21 and 22
Slot 4
Slots 23 and 24
Slot 5
Slots 25 and 26
Slot 6
Slots 27 and 28
Slot 7
Slots 29 and 30
Slot 12
Slots 31 and 32
Slot 13
Slots 33 and 34
Slot 14
Slots 35 and 36
Slot 15
Slots 37 and 38
slot 16
Slots 39 and 40
NOTE
Slot 2 can house a protection board for the TPS protection. The board in slot 2 protects the boards in
slots 37 and 1216.
One DX1 needs to work with two DM12 boards to access eight channels of Nx64 kbit/s signals. The
DM12 in the slot with a smaller slot number is used to access eight channels of framed E1 signals and
four channels of Nx64 kbit/s signals. The DM12 in the slot with a larger slot number is used to access
four channels of Nx64 kbit/s signals.
6-66
Board
Feature Code
SSN1DX1A01
A01
75-ohm
SSN1DX1B01
B01
120-ohm
Issue 02 (2009-07-30)
6 PDH Boards
Protection Principle
The DX1 can be configured into one 1:N (N8) TPS protection group when the DX1 works
with the DM12. Figure 6-34 shows the TPS protection provided by the DX1.
Figure 6-34 TPS protection provided by the DX1
E1protection bus
S
L
O
T
2
1
S
L
O
T
2
2
S
L
O
T
2
3
S
L
O
T
2
4
S
L
O
T
2
5
S
L
O
T
2
6
S
L
O
T
2
7
S
L
O
T
2
8
S
L
O
T
2
9
S
L
O
T
3
0
S
L
O
T
3
1
S
L
O
T
3
2
S
L
O
T
3
3
S
L
O
T
3
4
S
L
O
T
3
5
S
L
O
T
3
6
S
L
O
T
3
7
S
L
O
T
3
8
S
L
O
T
3
9
S
L
O
T
4
0
DM12
DM12
DM12
DM12
DM12
DM12
DM12
DM12
DM12
DM12
DM12
DM12
DM12
DM12
DM12
DM12
DM12
DM12
DM12
DM12
E1 service bus
S
L
O
T
2
S
L
O
T
3
S
L
O
T
4
S
L
O
T
5
S
L
O
T
6
S
L
O
T
7
S
L
O
T
1
2
S
L
O
T
1
3
S
L
O
T
1
4
S
L
O
T
1
5
S
L
O
T
1
6
Working
Working
Working
Working
Working
Working
Working
Working
Working
Working
Protection
Failed
Detecting a
board fault
Cross-connect and timing board
TPS
control
bus
NOTE
The DX1 supports only one 1:8 TPS protection group. The DX1 board in slot 2 can protect the DX1 boards
that are inserted in any eight slots of slots 37, and 1216.
When the cross-connect and timing board detects that a working DX1 is faulty, the cross-connect
and timing board issues a service switching command to control the access board to switch the
services from the faulty DX1 to the protection DX1, which realizes the protection of the services.
Hardware Configuration
Figure 6-35 shows the slot configuration for the 1:8 TPS protection of the DX1.
Issue 02 (2009-07-30)
6-67
6 PDH Boards
Figure 6-35 Slot configuration for the 1:8 TPS protection of the DX1
S
L
O
T
21
S
L
O
T
22
S
L
O
T
23
S
L
O
T
24
S S
L L
O O
T T
25 26
S
L
O
T
27
S
L
O
T
28
S
L
O
T
29
S S S S
L L L L
O O O O
T T T T
33 34 35 36
S
L
O
T
39
S
L
O
T
40
DM12
S S
L L
O O
T T
13 14
S S
L L
O O
T T
15 16
SLOT 42 AUX
Working
Working
Working
S S
L L
O O
T T
11 12
Working
CXL
S
L
O
T
10
SLOT 43 EOW
S
L
O
T
9
Working
S
L
O
T
8
S
L
O
T
38
FAN
CXL
S
L
O
T
7
S
L
O
T
37
DM12
DM12
DM12
DM12
DM12
DM12
DM12
DM12
DM12
S
L
O
T
6
Working
S S
L L
O O
T T
4 5
Working
Working
Working
Protection
SLOT 41 PIU
S
L
O
T
3
S
L
O
T
32
FAN
Working
SLOT 1 PIU
S
L
O
T
2
DM12
DM12
DM12
DM12
DM12
DM12
DM12
DM12
DM12
DM12
FAN
S S
L L
O O
T T
30 31
In Figure 6-35, the board in slot 2 protects the boards in slots 3-7 and 12-16.
Table 6-32 lists the slots for the DX1 and DM12.
Table 6-32 Slots for the DX1 and DM12
Board
Protection Group
Slot 2
DM12
Slots 2140
6-68
J2 byte
Tributary loopback
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
Issue 02 (2009-07-30)
6 PDH Boards
Mechanical Specifications
The mechanical specifications of the DX1 are as follows:
l
Power Consumption
The maximum power consumption of the DX1 at room temperature (25C) is 15 W.
6.9 DXA
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the DXA (DDN service converging and processing board).
6.9.1 Version Description
The DXA is available in one functional version, namely, N1.
6.9.2 Functions and Features
The DXA cross-connects 63xE1 signals at the 64 kbit/s level on the system side.
6.9.3 Working Principle and Signal Flow
The DXA consists of the timeslot cross-connect module, framing/deframing module, mapping/
demapping module, logic and control module, and power module.
6.9.4 Front Panel
The front panel of the DXA has indicators.
6.9.5 Valid Slots
The DXA can be installed in slots 28 and 1116 in the subrack.
6.9.6 Parameter Settings
You can set the parameters for the DXA by using the T2000.
6.9.7 Technical Specifications
The technical specifications of the DXA include the mechanical specifications and power
consumption.
Issue 02 (2009-07-30)
6-69
6 PDH Boards
DXA
Basic functions
Alarms and
performance events
Loopback function
PRBS self-test
function
64 kbit/s
timeslot
cross-connect
module
Framing/
Deframing
module
Signal
mapping/
demapping
module
6-70
Power
module
Crossconnect unit
SCC unit
Fuse
-48 V/-60 V
-48 V/-60 V
Issue 02 (2009-07-30)
6 PDH Boards
Power Module
The power module provides all the modules of the DX1 with the required DC voltages.
Issue 02 (2009-07-30)
6-71
6 PDH Boards
DXA
STAT
ACT
PROG
SRV
DXA
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the DXA does not have an interface.
6-72
Issue 02 (2009-07-30)
6 PDH Boards
J2 byte
Tributary loopback
Mechanical Specifications
The mechanical specifications of the DXA are as follows:
l
Power Consumption
The maximum power consumption of the DXA at room temperature (25C) is 10 W.
6.10 SPQ4
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SPQ4 (4xE4/STM-1 electrical processing board).
6.10.1 Version Description
The SPQ4 is available in two functional versions, namely, N1 and N2. The difference between
the two versions is with regard to their functions. The N1SPQ4 is no longer manufactured.
6.10.2 Functions and Features
The SPQ4 processes 4xE4/STM-1 electrical signals, processes overhead bytes, reports alarms
and performance events, provides maintenance features, and supports protection schemes.
6.10.3 Working Principle and Signal Flow
The SPQ4 consists of the PPI/SPI module, 140M mapping/demapping module, SDH overhead
processing module, interface converting module, logic and control module, DC/DC converter,
and other modules.
6.10.4 Front Panel
Issue 02 (2009-07-30)
6-73
6 PDH Boards
Description
Functional versions
Differences
Substitution
The N1SPQ4 can be replaced with the N2SPQ4. When the N1SPQ4
is replaced with the N2SPQ4, the NE software needs to be upgraded.
6-74
Function and
Feature
SPQ4
Basic functions
Service
processing
Issue 02 (2009-07-30)
6 PDH Boards
Function and
Feature
SPQ4
Overhead
processing
Processes the section overheads of the STM-1 signals, such as B1, B2,
K1, K2, M1, F1, and D1D12.
Supports the setting and query of the J0, J1, and C2 bytes.
Alarms and
performance
events
Protection
schemes
Supports the TPS protection when working with the interface board
and the switching and bridging board.
Supports warm resets and cold resets. The warm reset does not affect
services.
Maintenance
features
Issue 02 (2009-07-30)
6-75
6 PDH Boards
34 MHz
OSC
LIU
LIU
PPI/SPI
E4/STM-1
4x139
Mbit/s
4x155
Mbit/s
140M mapping/
demapping
SDH overhead
processing module
Reference clock
4x155
Mbit/s
Highspeed bus
Interface
converting
module
4x155
Mbit/s
Highspeed bus
DCC
K1 and K2
EN 140M/155M
LOS
Outloop/Inloop control
+3.3 V
DC/DC
converter
Communication
DC/DC
converter
Cross-connect unit A
Cross-connect unit B
SCC unit
Cross-connect unit
Frame header
Cross-connect unit
Fuse
Cross-connect unit
SCC unit
-48 V/-60 V
-48 V/-60 V
155 Mbit/s
LPA
139 Mbit/s
6-76
SIPO
HPT
PG
J1/C2/B3
E4 AIS
insertion
LPA
HPT
MST
RST
MST
RST
155 Mbit/s
Issue 02 (2009-07-30)
6 PDH Boards
Figure 6-40 Functional block diagram of the SDH overhead processing module
SDH overhead processing module
K1 and K2 insertion/
extraction
Cross-connect unit
155 Mbit/s
155 Mbit/s
155 Mbit/s
RST
MST
MSA
HPT
155 Mbit/s
DCC
SCC unit
The functional modules of the E4/STM-1 electrical interface units are described as follows:
PPI/SPI Module
The PPI module consists of LIUs and provides the inloop and outloop functions. The PPI module
performs the following functions:
l
The SPI module consists of LIUs and provides the inloop and outloop functions. The SPI module
performs the following functions:
l
RST Sub-Module
l
Issue 02 (2009-07-30)
In the receive direction, the RST sub-module detects the frame alignment bytes (A1 and
A2), restores the regenerator section trace byte (J0), detects a J0 mismatch, and counts
BIP-8 errored blocks.
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
6-77
6 PDH Boards
l
In the transmit direction, the RST sub-module inserts the frame alignment bytes, inserts
the J0 byte, and performs BIP-8 calculation and insertion.
MST Sub-Module
l
In the receive direction, the MST sub-module counts BIP-24 errored blocks, restores the
MS_REI, and detects the MS_RDI and MS_AIS.
In the transmit direction, the MST sub-module performs BIP-24 calculation and insertion
and inserts the MS_REI, MS_RDI, and MS_AIS.
MSA Sub-Module
l
In the receive direction, the MSA sub-module interprets the AU-4 pointer, detects the LOP
and AIS, and performs pointer justifications.
In the transmit direction, the MSA sub-module assembles the AUG and generates the AU-4
pointer and the AU_AIS.
HPT Sub-Module
l
LPA Sub-Module
The 140 Mbit/s plesiochronous stream is inserted in a C4 container to be adapted so that the
stream can be transported to the synchronous network. The PDH AIS is monitored and the E4
AIS in inserted.
HPT Sub-Module
The virtual container (VC-4) is formatted. The VC-4 is structured so that its octets are distributed
within a 125 us interval (for example, one STM1 period), and consists of the C4 container and
POH. The POH contains nine octets equally distributed within the frame. The following
overhead bytes can be extracted: J1, B3. C2, G1, F2, H4, F3, K3, and N1. The E4 AIS can be
inserted in the downstream direction.
Pointer generator (PG)
A fixed pointer value is inserted in the SOH to structure the AU-4 signal.
6-78
Issue 02 (2009-07-30)
6 PDH Boards
Traces the clock signal from the active and standby cross-connect units.
Passes the orderwire and ECC bytes through an ADM that consists of two paired slots when
the GSCC is not online.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
Issue 02 (2009-07-30)
6-79
6 PDH Boards
SPQ4
STAT
ACT
PROG
SRV
SPQ4
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the SPQ4 does not have an interface. Hence, the SPQ4 needs to work with
the MU04 to receive and transmit the E4/STM-1 signals. For details, see the topic that describes
the MU04.
6-80
Issue 02 (2009-07-30)
6 PDH Boards
Slot 3
Slot 21
Slot 4
Slot 23
Slot 5
Slot 25
Slot 6
Slot 27
Slot 7
Slot 29
Slot 12
Slot 31
Slot 13
Slot 33
Slot 14
Slot 35
Slot 15
Slot 37
Slot 16
Slot 39
Protection Principle
The SPQ4 can be configured into two 1:N (N3) TPS protection groups when the SPQ4 works
with the MU04 and TSB8/TSB4. Figure 6-42 shows the TPS protection provided by the SPQ4.
Issue 02 (2009-07-30)
6-81
6 PDH Boards
TSB8/
TSB4
3 2
4xE4/STM-1
MU04
4xE4/STM-1
Switching
control
MU04 signal
MU04
1
Crossconnect
and
timing
board
Slot 9/10
Protection
SPQ4
Working
SPQ4
Working
SPQ4
Working
SPQ4
Failed
Slot 3
Slot 4
Slot 5
Slot 6
Normal state
When each working board functions normally, the traffic signal is directly transmitted to
the SPQ4 through position 1 of the control switch on the MU04.
Switching state
When a working board detects a failure and requires the switching operation, the control
switch of the corresponding MU04 switches from position 1 to position 2. At the same
time, the control switch of the TSB8/TSB4 switches to the corresponding position so that
the protection board can protect the failed working board.
Hardware Configuration
Figure 6-43 shows the slot configuration for the 1:3 TPS protection of the SPQ4.
6-82
Issue 02 (2009-07-30)
6 PDH Boards
Figure 6-43 Slot configuration for the two 1:3 TPS protection groups of the SPQ4
S
L
O
T
23
S
L
O
T
24
S
L
O
T
25
S
L
O
T
26
S
L
O
T
27
S
L
O
T
28
S
L
O
T
29
FAN
S
L
O
T
38
S
L
O
T
39
S
L
O
T
40
S S S S
L L L
L
O O O O
T T T T
13 14 15 16
SLOT 43 EOW
S S
L L
O O
T T
11 12
SLOT 42 AUX
Working 2
Protection 2
Working 2
S
L
O
T
10
Working 2
S
L
O
T
9
CXL
S
L
O
T
8
S
L
O
T
37
FAN
CXL
Working 1
Working 1
Working 1
SLOT 41 PIU
S S S S
L L L L
O O O O
T T T T
4 5 6 7
Protection 1
SLOT 1 PIU
S
L
O
T
3
S
L
O
T
36
TSB8/TSB4
S
L
O
T
35
MU04
S S S
L L L
O O O
T T T
32 33 34
MU04
MU04
MU04
TSB8/TSB4
FAN
S
L
O
T
2
S S
L L
O O
T T
30 31
MU04
S
L
O
T
22
MU04
S
L
O
T
21
In Figure 6-43, the board in slot 3 protects the boards in slots 46. The board in slot 16 protects
the boards in slots 1315.
Table 6-37 lists the slots for the SPQ4, MU04, and TSB8/TSB4.
Table 6-37 Slots for the SPQ4, MU04, and TSB8/TSB4
Board
Protection Group 1
Protection Group 2
SPQ4 (working
board)
Slots 46
Slots 1315
SPQ4 (protection
board)
Slot 3
Slot 16
MU04
TSB8/TSB4
Slot 21
Slot 39
6-83
6 PDH Boards
You can set the following parameters for the SPQ4 by using the T2000:
l
J1 byte
C2 byte
Mechanical Specifications
The mechanical specifications of the SPQ4 are as follows:
l
Power Consumption
The maximum power consumption of the SPQ4 at room temperature (25C) is 24 W.
6-84
Issue 02 (2009-07-30)
7 Data Boards
Data Boards
7-1
7 Data Boards
7.10 EGS4
This topic describes the version, functions, working principle, valid slots, and technical
specification of the EGS4 (4xGE switching and processing board).
7.11 EGR2
This topic describes the version, functions, working principle, valid slots, and technical
specification of the EGR2 (2xGE ring processing board).
7.12 EMR0
This topic describes the version, functions, working principle, valid slots, and technical
specification of the EMR0 (12xFE and 1xGE ring processing board).
7.13 EAS2
This topic describes the version, functions, working principle, valid slots, and technical
specification of the EAS2 (2-port 10xGE Layer 2 switching and processing board).
7.14 ADL4
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the ADL4 (1xSTM-4 ATM service processing board).
7.15 ADQ1
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the ADQ1 (4xSTM-1 ATM service processing board).
7.16 IDL4
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the IDL4 (1xSTM-4 ATM service processing board).
7.17 IDL4A
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the IDL4A (1xSTM-4 ATM service processing board).
7.18 IDQ1
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the IDQ1 (4xSTM-1 ATM service processing board).
7.19 IDQ1A
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the IDQ1A (4xSTM-1 ATM service processing board).
7-2
Issue 02 (2009-07-30)
7 Data Boards
7.1 EFT8
This topic describes the version, functions, working principle, valid slots, and technical
specification of the EFT8 (8xFE/16xFE transparent transmission board).
7.1.1 Version Description
The EFT8 is available in one functional version, namely, N1.
7.1.2 Functions and Features
The EFT8 supports the transparent transmission of Ethernet services, LCAS function, and test
frames.
7.1.3 Working Principle and Signal Flow
The EFT8 consists of the Ethernet access module, mapping module, interface converting
module, logic and control module, clock module, and power module.
7.1.4 Front Panel
The front panel of the EFT8 has indicators, interfaces, and a bar code.
7.1.5 Valid Slots
The slots valid for the EFT8 vary with the cross-connect capacity of the subrack and whether
the EFT8 works with an interface board.
7.1.6 Parameter Settings
You can set the parameters for the EFT8 by using the T2000.
7.1.7 Technical Specifications
The technical specifications of the EFT8 include the Ethernet performance specifications,
mechanical specifications, and power consumption.
Issue 02 (2009-07-30)
Function and
Feature
EFT8
Basic functions
7-3
7 Data Boards
Function and
Feature
EFT8
Functions when
being used with the
interface board
Supports Ethernet II, IEEE 802.3, and IEEE 802.1q TAG formats.
Supports the Jumbo frame with a length less than 9600 bytes.
Specifications of the
optical interface
Format of service
frames
Maximum uplink
bandwidth
The maximum uplink bandwidth is 1.25 Gbit/s. The EFT8 can adapt
to the bandwidth of the slot.
VCTRUNKs
7-4
Encapsulation
format
Mapping
granularities
Issue 02 (2009-07-30)
7 Data Boards
Function and
Feature
EFT8
MTU
Supports the setting of the packet length, which ranges from 1518
bytes to 1535 bytes. After the setting becomes valid, the length of the
packets that enter or exit the IP ports is limited.
MPLS
VLAN
LPT
CAR
Flow control
function
LCAS function
ETH-OAM function
Test frames
Loopback function
Ethernet
performance
monitoring
Alarms and
performance events
Issue 02 (2009-07-30)
7-5
7 Data Boards
FE
Ethernet
access
module
Cross-connect unit
ENCP
Interface
converting
module
VCP
DENCP
Cross-connect unit
Mapping module
Laser
shutdown
LOS
Logic and
control module
Communication
Reference clock and frame header
+3.3 V
Clock module
50 77 125 155
MHz MHz MHz MHz
Power
module
Power
module
SCC unit
SCC unit
Fuse
-48 V/-60 V
-48 V/-60 V
Mapping Module
The mapping module performs encapsulation and mapping functions.
In the upstream direction, this module first encapsulates Ethernet signals in LAPS, HDLC, or
GFP format. The concatenation is performed. Then, the Ethernet signals are converted into SDH
signals.
In the downstream direction, SDH signals are demapped. The delay of virtual concatenation is
compensated. After aligning, packets are decapsulated according to the encapsulation format.
The decapsulated data is finally transmitted to the network processor module in packets.
7-6
Issue 02 (2009-07-30)
7 Data Boards
The control module also contains basic logic units. This module performs the following
functions:
l
Checks the in-service state of the cross-connect, SCC, and line boards.
Implements communication.
Controls indicators.
Clock Module
The clock module traces the system reference clock and generates the required working clock
for each chip. The frequency of the clock can be 50 MHz, 77 MHz, 125 MHz, or 155 MHz.
Power Module
It converts the 48 V/60 V power supply into the DC voltages that the modules of the board
require.
Issue 02 (2009-07-30)
7-7
7 Data Boards
EFT8
STAT
ACT
PROG
SRV
FE1
FE2
FE3
FE4
FE5
FE6
FE7
FE8
EFT8
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
7-8
Issue 02 (2009-07-30)
7 Data Boards
Interfaces
The front panel of the EFT8 has eight FE interfaces. Table 7-2 describes the types and usage of
the interfaces of the EFT8.
Table 7-2 Interfaces of the EFT8
Interface
Type of
Interface
Usage
FE1
RJ-45
FE2
RJ-45
FE3
RJ-45
FE4
RJ-45
FE5
RJ-45
FE6
RJ-45
FE7
RJ-45
FE8
RJ-45
Issue 02 (2009-07-30)
Pin
Description
Grounding
Grounding
Grounding
Grounding
7-9
7 Data Boards
When the EFT8 does not work with an interface board, the EFT8 can be installed in slots
27 and 1216. In this case, the bandwidth is 622 Mbit/s.
When the EFT8 works with an interface board, the EFT8 can be installed in slots 37 and
1216. In this case, the bandwidth is 1.25 Gbit/s.
Working mode
LCAS
Mapping protocol
Tested
equipment 2
Port 2
Port 1
Port 2
Data network
performance
analyzer
Figure 7-4 shows the connection for testing the back-to-back specifications of the EFT8.
7-10
Issue 02 (2009-07-30)
7 Data Boards
Port 1
Port 2
Data network
performance
analyzer
Table 7-4 lists the throughput specifications of the EFT8. Table 7-5 lists the packet loss ratio
in the case of overloading of the EFT8. Table 7-6 lists the latency specifications of the EFT8.
Table 7-7 lists the back-to-back specifications of the EFT8.
NOTE
The specifications vary according to the configuration and networking of the test environment and
the VC services bound on the VCG side. The specifications that are obtained in the actual environment
are used.
The specifications in the following tables are obtained in the following scenario: EPL services are
configured and 63 VC-12s are bound on the FE port.
The specifications of a board of a specific version are not provided because the board version has
negligible effect on the specifications.
The specifications in the following tables are obtained by using the Smart Application.
Issue 02 (2009-07-30)
Frame Size
(Byte)
Passed Rate
(%)
(01,01,01) to
(01,01,02) (pks/
sec)
(01,01,02) to
(01,01,01) (pks/
sec)
Total (pks/
sec)
64
100.00
148810
148810
297620
128
100.00
84459
84459
168918
256
100.00
45290
45290
90580
512
100.00
23496
23496
46992
1024
100.00
11973
11973
23946
1280
100.00
9615
9615
19230
1518
100.00
8127
8127
16254
7-11
7 Data Boards
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The permitted packet loss ratio is set to 0% and the resolution rate is set to 0.1%.
Table 7-5 Packet loss ratio in the case of overloading of the EFT8
Frame Size
(Byte)
Rate Tested
(%)
(01,01,01) to
(01,01,02) (%)
(01,01,02) to
(01,01,01) (%)
Average (%)
64
100.00
0.000
0.000
0.000
128
100.00
0.000
0.000
0.000
256
100.00
0.000
0.000
0.000
512
100.00
0.000
0.000
0.000
1024
100.00
0.000
0.000
0.000
1280
100.00
0.000
0.000
0.000
1518
100.00
0.000
0.000
0.000
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The tested traffic starts from the throughput and increases to 100% in 10% steps.
7-12
Frame
Size
(Byte)
Rate
Tested
(%)
(01,01,01) to
(01,01,02) (us)CT (us)
Average
(CT) (us)
(01,01,01) to
(01,01,02)
(us)-S&F (us)
Average
(S&F) (us)
64
100.00
506.4
506.4
501.2
501.2
128
100.00
518.8
518.8
508.5
508.5
256
100.00
536.2
536.2
515.8
515.8
512
100.00
578.9
578.9
538.0
538.0
1024
100.00
653.4
653.4
571.4
571.4
1280
100.00
688.1
688.1
585.6
585.6
1518
100.00
720.6
720.6
599.1
599.1
Issue 02 (2009-07-30)
7 Data Boards
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The latency modes are classified into two modes, namely, cut through mode and store forward mode.
In cut through mode, the analyzer calculates the difference between the time when the first bit of the
transmitted frame reaches the output port and the time when the first bit of the transmitted frame reaches
the input port. In store forward mode, the analyzer calculates the difference between the time when the
first bit of the transmitted frame reaches the output port and the time when the last bit of the transmitted
frame reaches the input port. In the preceding table, the CT values are obtained in cut through mode
and the S&F values are obtained in store forward mode.
Rate Tested
(%)
(01,01,01) to
(01,01,02) Burst
Size (Number of
Frames)
(01,01,02) to
(01,01,01)
(Number of
Frames)
Total
(Number of
Frames)
64
100.00
297620
297620
595240
128
100.00
168918
168918
337836
256
100.00
90580
90580
181160
512
100.00
46992
46992
93984
1024
100.00
23946
23946
47892
1280
100.00
19230
19230
38460
1518
100.00
16254
16254
32508
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The frame size is set to the range from 64 bytes to 1518 bytes, the packet transmission rate is set to
100%, the test duration is set to 2 seconds, and the number of repetitions is set to a value more than 50
on the Smart Application.
Mechanical Specifications
The mechanical specifications of the EFT8 are as follows:
l
Power Consumption
The maximum power consumption of the EFT8 at room temperature (25C) is 26 W.
Issue 02 (2009-07-30)
7-13
7 Data Boards
7.2 EFT8A
This topic describes the version, functions, working principle, valid slots, and technical
specification of the EFT8A (8xFE transparent transmission board).
7.2.1 Version Description
The EFT8A is available in one functional version, namely, N1.
7.2.2 Functions and Features
The EFT8A supports the transparent transmission of Ethernet services, LCAS function, and test
frames.
7.2.3 Working Principle and Signal Flow
The EFT8A consists of the Ethernet access module, mapping module, interface converting
module, logic and control module, clock module, and power module.
7.2.4 Front Panel
The front panel of the EFT8A has indicators, interfaces, and a bar code.
7.2.5 Valid Slots
The EFT8A can be installed in slots 28 and 1116 in the subrack. In this case, the bandwidth
is 622 Mbit/s.
7.2.6 Parameter Settings
You can set the parameters for the EFT8A by using the T2000.
7.2.7 Technical Specifications
The technical specifications of the EFT8A include the Ethernet performance specifications,
mechanical specifications, and power consumption.
7-14
Function and
Feature
EFT8A
Basic functions
Specifications of the
optical interface
Issue 02 (2009-07-30)
7 Data Boards
Function and
Feature
EFT8A
Format of service
frames
Supports Ethernet II, IEEE 802.3, and IEEE 802.1q TAG formats.
The first four ports support the frame with a length ranging from
64 bytes to 1535 bytes and the last four ports support the frame with
a length ranging from 64 bytes to 9600 bytes.
Supports the Jumbo frame with a length less than 9600 bytes.
Maximum uplink
bandwidth
622 Mbit/s
VCTRUNKs
Issue 02 (2009-07-30)
Encapsulation
format
Mapping
granularities
MTU
Supports the setting of the packet length, which ranges from 1518
bytes to 1535 bytes. After the setting becomes valid, the length of the
packets that enter or exit the IP ports is limited.
MPLS
VLAN
LPT
CAR
Flow control
function
LCAS function
ETH-OAM
Test frames
7-15
7 Data Boards
Function and
Feature
EFT8A
Loopback function
Ethernet
performance
monitoring
Alarms and
performance events
FE
Ethernet
access
module
ENCP
Interface
converting
module
VCP
DENCP
Cross-connect unit
Cross-connect unit
Mapping module
LOS
Logic and
control module
Communication
Reference clock and frame header
SCC unit
SCC unit
Fuse
-48 V/-60 V
+3.3 V
Clock
module
Power
module
Power
module
-48 V/-60 V
50 77 125 155
MHz MHz MHz MHz
7-16
Issue 02 (2009-07-30)
7 Data Boards
Mapping Module
The mapping module performs encapsulation and mapping functions.
In the upstream direction, this module first encapsulates Ethernet signals in LAPS, HDLC, or
GFP format. The concatenation is performed. Then, the Ethernet signals are converted into SDH
signals.
In the downstream direction, SDH signals are demapped. The delay of virtual concatenation is
compensated. After aligning, packets are decapsulated according to the encapsulation format.
The decapsulated data is finally transmitted to the network processor module in packets.
The control module also contains basic logic units. This module performs the following
functions:
l
Checks the in-service state of the cross-connect, SCC, and line boards.
Implements communication.
Controls indicators.
Clock Module
The clock module traces the system reference clock and generates the required working clock
for each chip. The frequency of the clock can be 50 MHz, 77 MHz, 125 MHz, or 155 MHz.
Issue 02 (2009-07-30)
7-17
7 Data Boards
Power Module
It converts the 48 V/60 V power supply into the DC voltages that the modules of the board
require.
EFT8A
STAT
ACT
PROG
SRV
FE1
FE2
FE3
FE4
FE5
FE6
FE7
FE8
EFT8A
Indicators
The front panel of the board has the following indicators:
7-18
Issue 02 (2009-07-30)
7 Data Boards
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the EFT8A has eight FE interfaces. Table 7-9 describes the types and usage
of the interfaces of the EFT8A.
Table 7-9 Interfaces of the EFT8A
Interface
Type of
Interface
Usage
FE1
RJ-45
FE2
RJ-45
FE3
RJ-45
FE4
RJ-45
FE5
RJ-45
FE6
RJ-45
FE7
RJ-45
FE8
RJ-45
Issue 02 (2009-07-30)
Pin
Description
7-19
7 Data Boards
Pin
Description
Grounding
Grounding
Grounding
Grounding
Working mode
LCAS
Mapping protocol
7-20
Issue 02 (2009-07-30)
7 Data Boards
Figure 7-7 Connection for testing the throughput specifications, packet loss ratio in the case of
overloading, and latency specifications
Port 1
Tested
equipment 1
Tested
equipment 2
Port 2
Port 1
Port 2
Data network
performance
analyzer
Figure 7-8 shows the connection for testing the back-to-back specifications of the EFT8A.
Figure 7-8 Connection for testing the back-to-back specifications
Tested
equipment 1
Port 1
Port 2
Data network
performance
analyzer
Table 7-11 lists the throughput specifications of the EFT8A. Table 7-12 lists the packet loss
ratio in the case of overloading of the EFT8A. Table 7-13 lists the latency specifications of the
EFT8A. Table 7-14 lists the back-to-back specifications of the EFT8A.
NOTE
Issue 02 (2009-07-30)
The specifications vary according to the configuration and networking of the test environment and
the VC services bound on the VCG side. The specifications that are obtained in the actual environment
are used.
The specifications in the following tables are obtained in the following scenario: EPL services are
configured and 63 VC-12s are bound on the FE port.
The specifications of a board of a specific version are not provided because the board version has
negligible effect on the specifications.
The specifications in the following tables are obtained by using the Smart Application.
7-21
7 Data Boards
Passed Rate
(%)
(01,01,01) to
(01,01,02) (pks/
sec)
(01,01,02) to
(01,01,01) (pks/
sec)
Total (pks/
sec)
64
100.00
148810
148810
297620
128
100.00
84459
84459
168918
256
100.00
45290
45290
90580
512
100.00
23496
23496
46992
1024
100.00
11973
11973
23946
1280
100.00
9615
9615
19230
1518
100.00
8127
8127
16254
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The permitted packet loss ratio is set to 0% and the resolution rate is set to 0.1%.
Table 7-12 Packet loss ratio in the case of overloading of the EFT8A
Frame Size
(Byte)
Rate Tested
(%)
(01,01,01) to
(01,01,02) (%)
(01,01,02) to
(01,01,01) (%)
Average (%)
64
100.00
0.000
0.000
0.000
128
100.00
0.000
0.000
0.000
256
100.00
0.000
0.000
0.000
512
100.00
0.000
0.000
0.000
1024
100.00
0.000
0.000
0.000
1280
100.00
0.000
0.000
0.000
1518
100.00
0.000
0.000
0.000
NOTE
7-22
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The tested traffic starts from the throughput and increases to 100% in 10% steps.
Issue 02 (2009-07-30)
7 Data Boards
Rate
Tested
(%)
(01,01,01) to
(01,01,02) (us)CT (us)
Average
(CT) (us)
(01,01,01) to
(01,01,02)
(us)-S&F (us)
Average
(S&F) (us)
64
100.00
506.4
506.4
501.2
501.2
128
100.00
518.8
518.8
508.5
508.5
256
100.00
536.2
536.2
515.8
515.8
512
100.00
578.9
578.9
538.0
538.0
1024
100.00
653.4
653.4
571.4
571.4
1280
100.00
688.1
688.1
585.6
585.6
1518
100.00
720.6
720.6
599.1
599.1
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The latency modes are classified into two modes, namely, cut through mode and store forward mode.
In cut through mode, the analyzer calculates the difference between the time when the first bit of the
transmitted frame reaches the output port and the time when the first bit of the transmitted frame reaches
the input port. In store forward mode, the analyzer calculates the difference between the time when the
first bit of the transmitted frame reaches the output port and the time when the last bit of the transmitted
frame reaches the input port. In the preceding table, the CT values are obtained in cut through mode
and the S&F values are obtained in store forward mode.
Issue 02 (2009-07-30)
Frame Size
(Byte)
Rate Tested
(%)
(01,01,01) to
(01,01,02) Burst
Size (Number of
Frames)
(01,01,02) to
(01,01,01)
(Number of
Frames)
Total
(Number of
Frames)
64
100.00
297620
297620
595240
128
100.00
168918
168918
337836
256
100.00
90580
90580
181160
512
100.00
46992
46992
93984
1024
100.00
23946
23946
47892
1280
100.00
19230
19230
38460
1518
100.00
16254
16254
32508
7-23
7 Data Boards
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The frame size is set to the range from 64 bytes to 1518 bytes, the packet transmission rate is set to
100%, the test duration is set to 2 seconds, and the number of repetitions is set to a value more than 50
on the Smart Application.
Mechanical Specifications
The mechanical specifications of the EFT8A are as follows:
l
Power Consumption
The maximum power consumption of the EFT8A at room temperature (25C) is 26 W.
7.3 EGT2
This topic describes the version, functions, working principle, valid slots, and technical
specification of the EGT2 (2xGE transparent transmission board).
7.3.1 Version Description
The EGT2 is available in two functional versions, namely, N1 and N2.
7.3.2 Functions and Features
The EGT2 supports the transparent transmission of Ethernet services, LCAS function, and test
frames.
7.3.3 Working Principle and Signal Flow
The EGT2 consists of the Ethernet access module, mapping module, interface converting
module, logic and control module, clock module, and power module.
7.3.4 Front Panel
The front panel of the EGT2 has indicators, interfaces, a bar code, and a laser safety class label.
7.3.5 Valid Slots
The EGT2 can be installed in slots 28 and 1116 in the subrack.
7.3.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the EGT2 indicates the type of interface.
7.3.7 Parameter Settings
You can set the parameters for the EGT2 by using the T2000.
7.3.8 Technical Specifications
The technical specifications of the EGT2 include the parameters specified for optical interfaces,
laser safety class, Ethernet performance specifications, mechanical specifications, and power
consumption.
7-24
Issue 02 (2009-07-30)
7 Data Boards
EGT2
Basic functions
Specifications of
the optical
interface
Supports Ethernet II, IEEE 802.3, and IEEE 802.1q TAG formats.
Supports the frame with a length ranging from 64 bytes to 9600 bytes.
Supports the Jumbo frame with a length less than 9600 bytes.
Format of service
frames
Maximum uplink
bandwidth
The maximum uplink bandwidth is 2.5 Gbit/s. The EGT2 can adapt to
the bandwidth of the slot.
VCTRUNKs
Encapsulation
format
Issue 02 (2009-07-30)
7-25
7 Data Boards
Function and
Feature
EGT2
Mapping
granularities
Ethernet service
type
MPLS
MTU
Supports the setting of the packet length, which ranges from 1518 bytes
to 9600 bytes. After the setting becomes valid, the length of the packets
that enter or exit the IP ports is limited.
VLAN
LPT
CAR
Flow control
function
LCAS function
ETH-OAM
function
Test frames
Port mirroring
Loopback
function
Supports inloops on Ethernet ports (at the PHY layer or MAC layer).
Ethernet
performance
monitoring
Alarms and
performance
events
7-26
Issue 02 (2009-07-30)
7 Data Boards
GE
Ethernet
access
module
ENCP
Interface
converting
module
VCP
DENCP
Cross-connect unit
Cross-connect unit
Mapping module
Laser
shutdown
LOS
Communication
Reference clock and frame header
Logic and
control module
+3.3 V
Clock module
Power
module
Power
module
Fuse
SCC unit
SCC unit
-48 V/-60 V
-48 V/-60 V
50 77 125 155
MHz MHz MHz MHz
Mapping Module
The mapping module performs encapsulation and mapping functions.
In the upstream direction, this module first encapsulates Ethernet signals in LAPS, HDLC, or
GFP format. The concatenation is performed. Then, the Ethernet signals are converted into SDH
signals.
In the downstream direction, SDH signals are demapped. The delay of virtual concatenation is
compensated. After aligning, packets are decapsulated according to the encapsulation format.
The decapsulated data is finally transmitted to the network processor module in packets.
Issue 02 (2009-07-30)
7-27
7 Data Boards
The control module also contains basic logic units. This module performs the following
functions:
l
Checks the in-service state of the cross-connect, SCC, and line boards.
Implements communication.
Controls indicators.
Clock Module
The clock module traces the system reference clock and generates the required working clock
for each chip. The frequency of the clock can be 50 MHz, 77 MHz, 125 MHz, or 155 MHz.
Power Module
It converts the 48 V/60 V power supply into the DC voltages that the modules of the board
require.
7-28
Issue 02 (2009-07-30)
7 Data Boards
Figure 7-10 Front panel of the N1EGT2/N2EGT2 that is installed with the GE optical interface
EGT2
STAT
ACT
PROG
SRV
LINK1
ACT1
LINK2
ACT2
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
EGT2
The N2EGT2 can also be installed with the GE electrical interface. Figure 7-11 shows the
appearance of the front panel of the N2EGT2 that is installed with the GE electrical interface.
Issue 02 (2009-07-30)
7-29
7 Data Boards
Figure 7-11 Front panel of the N2EGT2 that is installed with the GE electrical interface
EGT2
STAT
ACT
PROG
SRV
LINK1
ACT1
LINK2
ACT2
OUT1
IN1
OUT2
IN2
EGT2
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
7-30
Issue 02 (2009-07-30)
7 Data Boards
Interfaces
The front panel of the N1EGT2/N2EGT2 has two GE optical interfaces. Table 7-16 describes
the types and usage of the optical interfaces of the N1EGT2/N2EGT2.
Table 7-16 Optical interfaces of the N1EGT2/N2EGT2
Interface
Type of Interface
Usage
IN1/OUT1
LC (swappable)
IN2/OUT2
LC (swappable)
The two GE electrical interfaces of the N2EGT2 are of the same type and have the same usage.
Table 7-17 describes the types and usage of the electrical interfaces of the N2EGT2.
Table 7-17 Electrical interfaces of the N2EGT2
Interface
Type of Interface
Usage
GE
RJ-45 (swappable)
Table 7-18 provides the pin assignments of the RJ-45 interface of the N2EGT2.
Table 7-18 Pin assignments of the RJ-45 interface of the N2EGT2
Pin
Description
BI_DA+
BI_DA
BI_DB+
BI_DC+
BI_DC
BI_DB
BI_DD+
BI_DD
7-31
7 Data Boards
Feature Code
Type of Interface
SSN1EGT210 and
SSN2EGT210
10
SSN1EGT211 and
SSN2EGT211
11
SSN1EGT212 and
SSN2EGT212
12
SSN1EGT213 and
SSN2EGT213
13
SSN2EGT214
14
1000BASE-T (100 m)
Working mode
LCAS
Mapping protocol
7-32
Issue 02 (2009-07-30)
7 Data Boards
Table 7-20 Parameters specified for the optical interfaces of the EGT2
Parameter
Value
Type of optical
interface
1000BASE-EX
(40 km)
1000BASE-SX
(0.5 km)
Type of fiber
Single-mode
LC
Single-mode
LC
Single-mode
LC
Multi-mode LC
Launched
optical power
range (dBm)
-2 to +5
-5.0 to 0
-9.5 to -3
-9.5 to -2.5
Operating
wavelength
range (nm)
1500 to 1580
1275 to 1350
1270 to 1355
770 to 860
Minimum
overload (dBm)
-3
-3
-3
Receiver
sensitivity
(dBm)
-23
-23
-20
-17
Minimum
extinction ratio
(dB)
Tested
equipment 2
Port 2
Port 1
Port 2
Data network
performance
analyzer
Issue 02 (2009-07-30)
7-33
7 Data Boards
Figure 7-13 shows the connection for testing the back-to-back specifications of the EGT2.
Figure 7-13 Connection for testing the back-to-back specifications
Tested
equipment 1
Port 1
Port 2
Data network
performance
analyzer
Table 7-21 lists the throughput specifications of the EGT2. Table 7-22 lists the packet loss ratio
in the case of overloading of the EGT2. Table 7-23 lists the latency specifications of the EGT2.
Table 7-24 lists the back-to-back specifications of the EGT2.
NOTE
The specifications vary according to the configuration and networking of the test environment and
the VC services bound on the VCG side. The specifications that are obtained in the actual environment
are used.
The specifications in the following tables are obtained in the following scenario: EPL services are
configured and 24 VC-3s are bound on the GE port.
The specifications of a board of a specific version are not provided because the board version has
negligible effect on the specifications.
The specifications in the following tables are obtained by using the Smart Application.
7-34
Frame Size
(Byte)
Passed Rate
(%)
(01,02,01) to
(01,02,02) (pks/
sec)
(01,02,02) to
(01,02,01) (pks/
sec)
Total (pks/
sec)
64
100.00
1488095
1488095
2976190
128
100.00
844595
844595
1689190
256
100.00
452899
452899
905798
512
100.00
234962
234962
469924
1024
100.00
119732
119732
239464
1280
100.00
96154
96154
192308
1518
100.00
81274
81274
162548
Issue 02 (2009-07-30)
7 Data Boards
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The permitted packet loss ratio is set to 0% and the resolution rate is set to 0.1%.
Table 7-22 Packet loss ratio in the case of overloading of the EGT2
Frame Size
(Byte)
Rate Tested
(%)
(01,02,01) to
(01,02,02) (%)
(01,02,02) to
(01,02,01) (%)
Average (%)
64
100.00
0.000
0.000
0.000
128
100.00
0.000
0.000
0.000
256
100.00
0.000
0.000
0.000
512
100.00
0.000
0.000
0.000
1024
100.00
0.000
0.000
0.000
1280
100.00
0.000
0.000
0.000
1518
100.00
0.000
0.000
0.000
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The tested traffic starts from the throughput and increases to 100% in 10% steps.
Issue 02 (2009-07-30)
Frame
Size
(Byte)
Rate
Tested
(%)
(01,02,01) to
(01,02,02) (us)CT (us)
Average
(CT) (us)
(01,02,02) to
(01,02,01)
(us)-S&F (us)
Average
(S&F) (us)
64
100.00
35.7
35.7
35.2
35.2
128
100.00
37.1
37.1
36.1
36.1
256
100.00
39.5
39.5
37.4
37.4
512
100.00
44.1
44.1
40.1
40.1
1024
100.00
53.2
53.2
45.1
45.1
1280
100.00
57.6
57.6
47.4
47.4
1518
100.00
61.9
61.9
49.7
49.7
7-35
7 Data Boards
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The latency modes are classified into two modes, namely, cut through mode and store forward mode.
In cut through mode, the analyzer calculates the difference between the time when the first bit of the
transmitted frame reaches the output port and the time when the first bit of the transmitted frame reaches
the input port. In store forward mode, the analyzer calculates the difference between the time when the
first bit of the transmitted frame reaches the output port and the time when the last bit of the transmitted
frame reaches the input port. In the preceding table, the CT values are obtained in cut through mode
and the S&F values are obtained in store forward mode.
Rate Tested
(%)
(01,02,01) to
(01,02,02) Burst
Size (Number of
Frames)
(01,02,02) to
(01,02,01)
(Number of
Frames)
Total
(Number of
Frames)
64
100.00
2976190
2976190
5952380
128
100.00
1689190
1689190
3378380
256
100.00
905798
905798
1811596
512
100.00
469924
469924
939848
1024
100.00
239464
239464
478928
1280
100.00
192308
192308
384616
1518
100.00
162548
162548
325096
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The frame size is set to the range from 64 bytes to 1518 bytes, the packet transmission rate is set to
100%, the test duration is set to 2 seconds, and the number of repetitions is set to a value more than 50
on the Smart Application.
Mechanical Specifications
The mechanical specifications of the EGT2 are as follows:
l
Power Consumption
The maximum power consumption of the N1EGT2 at room temperature (25C) is 29 W.
7-36
Issue 02 (2009-07-30)
7 Data Boards
7.4 EFS0
This topic describes the version, functions, working principle, valid slots, and technical
specification of the EFS0 (8xFE switching and processing board).
7.4.1 Version Description
The EFS0 is available in four functional versions, namely, N1, N2, N4, and N5. The N1EFS0
and N2EFS0 are no longer manufactured.
7.4.2 Functions and Features
The EFS0 supports the Layer 2 switching, MPLS, and broadcast functions.
7.4.3 Working Principle and Signal Flow
The EFS0 consists of the Ethernet access module, network processor module, mapping module,
interface converting module, logic and control module, clock module, and power module.
7.4.4 Front Panel
The front panel of the EFS0 has indicators and a bar code.
7.4.5 Valid Slots
The EFS0 can be installed in slots 37 and 1216 in the subrack. The bandwidth of the N1EFS0
is 622 Mbit/s and the bandwidth of the N2EFS0/N4EFS0/N5EFS0 is 1.25 Gbit/s.
7.4.6 Board Protection
The EFS0 supports the 1:1 TPS protection.
7.4.7 Parameter Settings
You can set the parameters for the EFS0 by using the T2000.
7.4.8 Technical Specifications
The technical specifications of the EFS0 include the dimensions, weight, and power
consumption.
Issue 02 (2009-07-30)
Item
Description
Functional
versions
The EFS0 is available in four functional versions, namely, N1, N2, N4,
and N5.
7-37
7 Data Boards
Item
Description
Differences
The N2EFS0 supports the board version replacement function and can
substitute for the N1EFS0.
Substitution
The N4EFS0 supports the board version replacement function and can
substitute for the N2EFS0/N1EFS0.
The N5EFS0 supports the board version replacement function and can
substitute for the N4EFS0/N2EFS0/N1EFS0.
7-38
Function and
Feature
EFS0
Basic functions
Functions when
being used with the
interface board
Accesses 8xFE signals through the optical interface when the EFS0
is used with the EFF8.
Provides the TPS protection for the 8xFE signals through the
electrical interface when the EFS0 is used with the ETS8 and TSB8.
The N5EFS0 can access 8xFE signals through the electrical interface
when it is used with the ETF8A.
The N5EFS0 can access 8xFE signals through the optical interface
when it is used with the EFF8A.
Issue 02 (2009-07-30)
7 Data Boards
Function and
Feature
EFS0
Specifications of
the optical interface
Supports Ethernet II, IEEE 802.3, and IEEE 802.1 q/p formats.
Supports the Jumbo frame with a length less than 9600 bytes.
Format of service
frames
Maximum uplink
bandwidth
VCTRUNKs
Issue 02 (2009-07-30)
A VC-4 cannot be bound with VC-3 and VC-12 paths at the same
time.
Mapping
granularities
Encapsulation
format
EPL services
EVPL services
7-39
7 Data Boards
Function and
Feature
EFS0
EPLAN services
The services that are based on the IEEE 802.1d MAC bridge are
referred to as EPLAN services.
EVPLAN
7-40
The N4EFS0 does not support the query of the dynamic MAC
address.
Supports the creation, deletion, and query of the VB. The maximum
number of supported VBs is 16. The maximum number of logical
ports for each VB is 30.
MTU
Supports the setting of the packet length, which ranges from 1518 bytes
to 9600 bytes. After the setting becomes valid, the length of the packets
that enter or exit the IP ports is limited.
MPLS
VLAN
VLAN
convergence
RSTP
Link aggregation
function
Multicast function
Issue 02 (2009-07-30)
7 Data Boards
Function and
Feature
EFS0
ETH-OAM
function
The N4EFS0 and N5EFS0 support continuity check (CC) for the
multicast service, loopback (LB) test for the unicast service, link
trace (LT) test, loop detection (LD), auto-negotiation, fault
diagnosis, and link performance detection. The ETH-OAM function
complies with IEEE 802.1ag and IEEE 802.3ah.
CAR
Service-based
QoS flow
classification
LCAS function
LPT function
Flow control
function
Supports the port-based flow control function that complies with IEEE
802.3x.
High-precision
time
The N1EFS0, N2EFS0, and N4EFS0 do not support the highprecision time.
Test frames
Loopback function
Supports inloops on Ethernet ports (at the PHY layer or MAC layer).
Ethernet
performance
monitoring
Alarms and
performance events
7-41
7 Data Boards
Switch
fabric
Data
Network processor module
Laser
shutdown
VCP
Control
DENCP
Network
processor
ENCP
Ethernet
FE
access
module
Interface
converting
module
Cross-connect unit
Cross-connect unit
Mapping module
LOS
Communication
Reference clock and frame header
Logic and
control module
+3.3 V
Clock module
Power Fuse
module
Power
module
SCC unit
SCC unit
-48 V/-60 V
-48 V/-60 V
50 77 125 155
MHz MHz MHz MHz
7-42
L2 MPLS VPN
Ethernet/VLAN
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
Issue 02 (2009-07-30)
7 Data Boards
In the receive direction, services are mapped and forwarded after the Tunnel and VC tags are
added according to the service configuration. In the transmit direction, the Tunnel or VC tag is
extracted based on the level (P or PE) of the equipment. Services are then routed or forwarded.
The network processor module supports the following functions:
l
Mapping Module
The mapping module performs encapsulation and mapping functions.
In the upstream direction, this module first encapsulates Ethernet signals in LAPS or GFP format.
The concatenation is performed. Then, the Ethernet signals are converted into SDH signals.
In the downstream direction, SDH signals are demapped. The delay of virtual concatenation is
compensated. After aligning, packets are decapsulated according to the encapsulation format.
The decapsulated data is finally transmitted to the network processor module in packets.
The control module also contains basic logic units. This module performs the following
functions:
l
Checks the in-service state of the cross-connect, SCC, and line boards.
Implements communication.
Controls indicators.
Issue 02 (2009-07-30)
7-43
7 Data Boards
Clock Module
The clock module traces the system reference clock and generates the required working clock
for each chip. The frequency of the clock can be 50 MHz, 77 MHz, 125 MHz, or 155 MHz.
Power Module
It converts the 48 V/60 V power supply into the DC voltages that the modules of the board
require.
EFS0
STAT
ACT
PROG
SRV
EFS0
7-44
Issue 02 (2009-07-30)
7 Data Boards
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the EFS0 has no interfaces. The interfaces are available on the ETF8 or on
the EFF8. When the N5EFS0 is used with the ETF8A or EFF8A, the interfaces are available on
the ETF8A or on the EFF8A.
Issue 02 (2009-07-30)
Slot 3
Slot 21
Slot 4
Slot 23
Slot 5
Slot 25
Slot 6
Slot 27
Slot 7
Slot 29
Slot 12
Slot 32
Slot 13
Slot 34
Slot 14
Slot 36
Slot 15
Slot 38
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
7-45
7 Data Boards
Slot 16
Slot 40
S
L
O
T
21
S
L
O
T
22
S
L
O
T
23
S
L
O
T
24
S S
L L
O O
T T
25 26
S
L
O
T
27
S
L
O
T
28
S
L
O
T
29
S S
L L
O O
T T
30 31
S
L
O
T
32
S
L
O
T
33
S
L
O
T
34
S
L
O
T
35
S
L
O
T
36
S S S
L L L
O O O
T T T
37 38 39
S
L
O
T
7
S
L
O
T
8
S S
L L
O O
T T
11 12
S S
L L
O O
T T
13 14
S S
L L
O O
T T
15 16
SLOT 42 AUX
Protection 2
S
L
O
T
10
Working 2
S
L
O
T
9
SLOT 43 EOW
S
L
O
T
6
CXL
S
L
O
T
5
FA
N
CXL
S
L
O
T
4
Working 1
SLOT 41 PIU
S
L
O
T
3
Protection 1
SLOT 1 PIU
S
L
O
T
2
FA
N
TSB8
ETS8
ETS8
TSB8
FA
N
S
L
O
T
40
In Figure 7-16, the board in slot 3 protects the board in slot 4 and the board in slot 16 protects
the board in slot 15. The ETS8 is used with the working EFS0 and the TSB8 is used with the
protection EFS0. Table 7-28 lists the slots for the EFS0, ETS8, and TSB8.
Table 7-28 Slots for the EFS0, ETS8, and TSB8
7-46
Board
Protection Group 1
Protection Group 2
EFS0 (protection)
Slot 3
Slot 16
Issue 02 (2009-07-30)
7 Data Boards
Board
Protection Group 1
Protection Group 2
EFS0 (working)
Slot 4
Slot 15
TSB8
Slot 21
Slot 39
ETS8
Slot 23
Slot 37
Working mode
LCAS
Mapping protocol
Tested
equipment 2
Port 1
Port 2
Data network
performance
analyzer
Table 7-29 lists the throughput specifications of the EFS0. Table 7-30 lists the packet loss ratio
in the case of overloading of the EFS0. Table 7-31 lists the latency specifications of the EFS0.
Table 7-32 lists the back-to-back specifications of the EFS0.
Issue 02 (2009-07-30)
7-47
7 Data Boards
NOTE
The specifications vary according to the configuration and networking of the test environment, port
rate, and VC services bound on the VCG side. The specifications that are obtained in the actual
environment are used.
The specifications in the following tables are obtained in the following scenario: EPL services are
configured and five VC-12s are bound on the FE port.
The specifications of a board of a specific version are not provided because the board version has
negligible effect on the specifications.
The specifications in the following tables are obtained by using the Smart Application.
Passed Rate
(%)
(01,02,03) to
(01,02,05) (pks/
sec)
(01,02,05) to
(01,02,03) (pks/
sec)
Total (pks/
sec)
64
11.48
17088
17088
34176
128
11.25
9502
9502
19004
256
11.13
5042
5042
10084
512
11.12
2613
2613
5226
1024
11.07
1326
1326
2652
1280
11.10
1067
1067
2134
1518
11.12
904
904
1808
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The permitted packet loss ratio is set to 0% and the resolution rate is set to 0.1%.
Number of pairs: 1
Mode: bidirectional
Table 7-30 Packet loss ratio in the case of overloading of the EFS0
7-48
Frame Size
(Byte)
Rate Tested
(%)
(01,02,03) to
(01,02,05) (%)
(01,02,05) to
(01,02,03) (%)
Average (%)
64
100.00
88.507
88.507
88.507
Issue 02 (2009-07-30)
7 Data Boards
Frame Size
(Byte)
Rate Tested
(%)
(01,02,03) to
(01,02,05) (%)
(01,02,05) to
(01,02,03) (%)
Average (%)
128
100.00
88.730
88.745
88.737
256
100.00
88.851
88.831
88.841
512
100.00
88.876
88.846
88.861
1024
100.00
88.901
88.890
88.895
1280
100.00
88.878
88.878
88.878
1518
100.00
88.850
88.844
88.847
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The tested traffic starts from the throughput and increases to 100% in 10% steps.
Number of pairs: 1
Mode: bidirectional
Issue 02 (2009-07-30)
Frame
Size
(Byte)
Rate
Tested
(%)
(01,02,03) to
(01,02,05) (us)CT (us)
Average
(CT) (us)
(01,02,03) to
(01,02,05)
(us)-S&F (us)
Average
(S&F) (us)
64
10.00
561.4
561.4
556.2
556.2
128
10.00
644.4
644.4
634.2
634.2
256
10.00
738.4
738.4
718.0
718.0
512
10.00
948.8
948.8
907.9
907.9
1024
10.00
1371.5
1371.5
1289.6
1289.6
1280
10.00
1604.1
1604.1
1501.7
1501.7
1518
10.00
1790.4
1790.4
1669.0
1669.0
7-49
7 Data Boards
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The latency modes are classified into two modes, namely, cut through mode and store forward mode.
In cut through mode, the analyzer calculates the difference between the time when the first bit of the
transmitted frame reaches the output port and the time when the first bit of the transmitted frame reaches
the input port. In store forward mode, the analyzer calculates the difference between the time when the
first bit of the transmitted frame reaches the output port and the time when the last bit of the transmitted
frame reaches the input port. In the preceding table, the CT values are obtained in cut through mode
and the S&F values are obtained in store forward mode.
Number of pairs: 1
Mode: bidirectional
7-50
Frame Size
(Byte)
Rate Tested
(%)
(01,02,03) to
(01,02,05) Burst
Size (Number of
Frames)
(01,02,05) to
(01,02,03)
(Number of
Frames)
Total
(Number of
Frames)
64
100.00
1333
1335
2668
128
100.00
848
850
1698
256
100.00
586
587
1173
512
100.00
445
447
892
1024
100.00
224
224
448
1280
100.00
211
212
423
1518
100.00
201
201
402
Issue 02 (2009-07-30)
7 Data Boards
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The frame size is set to the range from 64 bytes to 1518 bytes, the packet transmission rate is set to
100%, the test duration is set to 2 seconds, and the number of repetitions is set to a value more than 50
on the Smart Application.
Number of pairs: 1
Mode: bidirectional
Mechanical Specifications
The mechanical specifications of the EFS0 are as follows:
l
Power Consumption
The maximum power consumption of the N1EFS0 at room temperature (25C) is 35 W.
The maximum power consumption of the N2EFS0 and N4EFS0 at room temperature (25C) is
35 W.
The maximum power consumption of the N5EFS0 at room temperature (25C) is 22 W.
7.5 EFS0A
This topic describes the version, functions, working principle, valid slots, and technical
specification of the EFS0A (16xFE switching and processing board).
7.5.1 Version Description
The EFS0A is available in one functional version, namely, N1.
7.5.2 Functions and Features
The EFS0A supports the Layer 2 switching, MPLS, and broadcast functions.
7.5.3 Working Principle and Signal Flow
Issue 02 (2009-07-30)
7-51
7 Data Boards
The EFS0A consists of the Ethernet access module, network processor module, mapping
module, interface converting module, logic and control module, clock module, and power
module.
7.5.4 Front Panel
The front panel of the EFS0A has indicators and a bar code.
7.5.5 Valid Slots
The EFS0A can be installed in slots 37 and 1216 in the subrack.
7.5.6 Board Protection
The EFS0A supports the 1:1 TPS protection.
7.5.7 Parameter Settings
You can set the parameters for the EFS0A by using the T2000.
7.5.8 Technical Specifications
The technical specifications of the EFS0A include the dimensions, weight, and power
consumption.
EFS0A
Basic functions
Provides the TPS protection for the 16xFE signals through the
electrical interface when the EFS0A is used with the ETS8 and
TSB8.
Specifications of the
optical interface
7-52
Issue 02 (2009-07-30)
7 Data Boards
Function and
Feature
EFS0A
Format of service
frames
Supports Ethernet II, IEEE 802.3, and IEEE 802.1 q/p formats.
Supports the Jumbo frame with a length less than 9600 bytes.
Maximum uplink
bandwidth
VCTRUNKs
Issue 02 (2009-07-30)
A VC-4 cannot be bound with VC-3 and VC-12 paths at the same
time.
Mapping granularities
Encapsulation format
EPL services
EVPL services
EPLAN services
The services that are based on the IEEE 802.1d MAC bridge are
referred to as EPLAN service.
l
7-53
7 Data Boards
Function and
Feature
EFS0A
MTU
Supports the setting of the packet length, which ranges from 1518
bytes to 9600 bytes. After the setting becomes valid, the length of
the packets that enter or exit the IP ports is limited.
MPLS
VLAN
VLAN convergence
RSTP
Link aggregation
function
Multicast function
ETH-OAM function
Supports CC for the multicast service, LB test for the unicast service,
LT test, LD, auto-negotiation, fault diagnosis, and link performance
detection.
CAR
Service-based
QoS flow
classification
7-54
LCAS function
LPT function
Test frames
Port mirroring
Loopback function
Supports inloops on Ethernet ports (at the PHY layer or MAC layer).
Ethernet performance
monitoring
Alarms and
performance events
Issue 02 (2009-07-30)
7 Data Boards
Control
Switch
fabric
Data
Network processor module
Laser
shutdown
VCP
Network
processor
DENCP
Ethernet
access
module
ENCP
FE
Interface
converting
module
Cross-connect unit
Cross-connect unit
Mapping module
LOS
Logic and
control module
Communication
Reference clock and frame header
+3.3 V
Clock module
Power Fuse
module
Power
module
SCC unit
SCC unit
-48 V/-60 V
-48 V/-60 V
50 77 125 155
MHz MHz MHz MHz
7-55
7 Data Boards
After the striped Ethernet frames enter the core of network processor, the flow is classified
according to the service type and configuration requirement. The frames are encapsulated or
decapsulated. The following formats are supported:
l
MPLS
L2 MPLS VPN
Ethernet/VLAN
In the receive direction, services are mapped and forwarded after the Tunnel and VC tags are
added according to the service configuration. In the transmit direction, the Tunnel or VC tag is
extracted based on the level (P or PE) of the equipment. Services are then routed or forwarded.
The network processor module supports the following functions:
l
WFQ
Four CoSs
Mapping Module
The mapping module performs encapsulation and mapping functions.
In the upstream direction, this module first encapsulates Ethernet signals in LAPS or GFP format.
The concatenation is performed. Then, the Ethernet signals are converted into SDH signals.
In the downstream direction, SDH signals are demapped. The delay of virtual concatenation is
compensated. After aligning, packets are decapsulated according to the encapsulation format.
The decapsulated data is finally transmitted to the network processor module in packets.
The control module also contains basic logic units. This module performs the following
functions:
7-56
Issue 02 (2009-07-30)
Checks the in-service state of the cross-connect, SCC, and line boards.
Implements communication.
Controls indicators.
7 Data Boards
Clock Module
The clock module traces the system reference clock and generates the required working clock
for each chip. The frequency of the clock can be 50 MHz, 77 MHz, 125 MHz, or 155 MHz.
Power Module
It converts the 48 V/60 V power supply into the DC voltages that the modules of the board
require.
Issue 02 (2009-07-30)
7-57
7 Data Boards
EFS0A
STAT
ACT
PROG
SRV
EFS0A
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the EFS0A has no interfaces. The interfaces are available on the ETF8 board
or on the EFF8 board.
7-58
Issue 02 (2009-07-30)
7 Data Boards
Slot 3
Slots 21 and 22
Slot 4
Slots 23 and 24
Slot 5
Slots 25 and 26
Slot 6
Slots 27 and 28
Slot 7
Slots 29 and 30
Slot 12
Slots 31 and 32
Slot 13
Slots 33 and 34
Slot 14
Slots 35 and 36
Slot 15
Slots 37 and 38
Slot 16
Slots 39 and 40
Issue 02 (2009-07-30)
7-59
7 Data Boards
Figure 7-20 Slot configuration for the 1:1 TPS protection for the EFS0A
TSB8
TSB8
ETS8
ETS8
S
L
O
T
24
S S
L L
O O
T T
25 26
S
L
O
T
27
S
L
O
T
28
S
L
O
T
29
S S
L L
O O
T T
30 31
FA
N
S
L
O
T
33
S
L
O
T
34
FA
N
S
L
O
T
35
S
L
O
T
36
S S S
L L L
O O O
T T T
37 38 39
S
L
O
T
7
S
L
O
T
8
S S
L L
O O
T T
11 12
S S
L L
O O
T T
13 14
S S
L L
O O
T T
15 16
SLOT 42 AUX
Protection 2
S
L
O
T
10
Working 2
S
L
O
T
9
SLOT 43 EOW
S
L
O
T
6
CXL
S
L
O
T
5
S
L
O
T
40
FA
N
CXL
S
L
O
T
4
Working 1
SLOT 41 PIU
S
L
O
T
3
Protection 1
SLOT 1 PIU
S
L
O
T
2
S
L
O
T
32
TSB8
S
L
O
T
23
TSB8
ETS8
S
L
O
T
22
ETS8
S
L
O
T
21
The board in slot 3 protects the board in slot 4. The board in slot 16 protects the board in slot
15. The ETS8 is used with the working EFS0A and the TSB8 is used with the protection EFS0A.
Table 7-35 lists the slots for the EFS0A, ETS8, and TSB8.
Table 7-35 Slots for the EFS0A, ETS8, and TSB8
Board
Protection Group 1
Protection Group 2
EFS0A (protection)
Slot 3
Slot 16
EFS0A (working)
Slot 4
Slot 15
TSB8
Slots 21 and 22
Slots 39 and 40
ETS8
Slots 23 and 24
Slots 37 and 38
Issue 02 (2009-07-30)
Working mode
LCAS
Mapping protocol
7 Data Boards
Tested
equipment 2
Port 1
Port 2
Data network
performance
analyzer
Table 7-36 lists the throughput specifications of the EFS0A. Table 7-37 lists the packet loss
ratio in the case of overloading of the EFS0A. Table 7-38 lists the latency specifications of the
EFS0A. Table 7-39 lists the back-to-back specifications of the EFS0A.
NOTE
Issue 02 (2009-07-30)
The specifications vary according to the configuration and networking of the test environment, port
rate, and VC services bound on the VCG side. The specifications that are obtained in the actual
environment are used.
The specifications in the following tables are obtained in the following scenario: EPL services are
configured, one VC-3 is bound on the FE port, and the MAC port is set to auto-negotiation mode.
The specifications of a board of a specific version are not provided because the board version has
negligible effect on the specifications.
The specifications in the following tables are obtained by using the Smart Application.
7-61
7 Data Boards
Passed Rate
(%)
(01,11,01) to
(01,11,02) (pks/
sec)
(01,11,02) to
(01,11,01) (pks/
sec)
Total (pks/
sec)
64
53.50
79618
79618
159236
128
51.21
43253
43253
86506
256
49.95
22624
22624
45248
512
49.31
11585
11585
23170
1024
49.14
5884
5884
11768
1280
49.15
4726
4726
9452
1518
49.19
3998
3998
7996
NOTE
Number of pairs: 1
Mode: bidirectional
Table 7-37 Packet loss ratio in the case of overloading of the EFS0A
7-62
Frame Size
(Byte)
Rate Tested
(%)
(01,11,01) to
(01,11,02) (%)
(01,11,02) to
(01,11,01) (%)
Average (%)
64
100.00
46.497
46.497
46.497
128
100.00
48.820
48.820
48.820
256
100.00
50.127
50.127
50.127
512
100.00
50.804
50.804
50.804
1024
100.00
51.115
51.115
51.115
1280
100.00
51.159
51.159
51.159
1518
100.00
51.176
51.176
51.176
Issue 02 (2009-07-30)
7 Data Boards
NOTE
Number of pairs: 1
Mode: bidirectional
Issue 02 (2009-07-30)
Frame
Size
(Byte)
Rate
Tested
(%)
(01,11,01) to
(01,11,02) (us)CT (us)
Average
(CT) (us)
(01,11,01) to
(01,11,02)
(us)-S&F (us)
Average
(S&F) (us)
64
40.00
164.3
164.3
159.2
159.2
128
40.00
199.0
199.0
188.8
188.8
256
40.00
247.0
247.0
226.6
226.6
512
40.00
357.6
357.6
357.6
357.6
1024
40.00
514.8
514.8
432.9
432.9
1280
40.00
613.1
613.1
510.7
510.7
1518
40.00
699.4
699.4
578.0
578.0
7-63
7 Data Boards
NOTE
The latency modes are classified into two modes, namely, cut through mode and store forward mode.
In cut through mode, the analyzer calculates the difference between the time when the first bit of the
transmitted frame reaches the output port and the time when the first bit of the transmitted frame reaches
the input port. In store forward mode, the analyzer calculates the difference between the time when the
first bit of the transmitted frame reaches the output port and the time when the last bit of the transmitted
frame reaches the input port. In the preceding table, the CT values are obtained in cut through mode
and the S&F values are obtained in store forward mode.
Number of pairs: 1
Mode: bidirectional
7-64
Frame Size
(Byte)
Rate Tested
(%)
(01,11,01) to
(01,11,02) Burst
Size (Number of
Frames)
(01,11,02) to
(01,11,01)
(Number of
Frames)
Total
(Number of
Frames)
64
100.00
353
353
706
128
100.00
342
342
684
256
100.00
380
380
761
512
100.00
368
368
736
1024
100.00
282
282
564
1280
100.00
279
279
559
1518
100.00
291
291
582
Issue 02 (2009-07-30)
7 Data Boards
NOTE
Number of pairs: 1
Mode: bidirectional
Mechanical Specifications
The mechanical specifications of the EFS0A are as follows:
l
Power Consumption
The maximum power consumption of the EFS0A at room temperature (25C) is 32 W.
7.6 EFS4
This topic describes the version, functions, working principle, valid slots, and technical
specification of the EFS4 (4xFE switching and processing board).
7.6.1 Version Description
The EFS4 is available in three functional versions, namely, N1, N2 and N3. The difference
between the three versions is their different maximum uplink bandwidths. The N1EFS4 is no
longer manufactured.
7.6.2 Functions and Features
The EFS4 supports the Layer 2 switching, MPLS, and broadcast functions.
7.6.3 Working Principle and Signal Flow
The EFS4 consists of the Ethernet access module, network processor module, mapping module,
interface converting module, logic and control module, clock module, and power module.
7.6.4 Front Panel
The front panel of the EFS4 has indicators, interfaces, and a bar code.
7.6.5 Valid Slots
The EFS4 can be installed in slots 28 and 1116 in the subrack.
7.6.6 Parameter Settings
You can set the parameters for the EFS4 by using the T2000.
7.6.7 Technical Specifications
The technical specifications of the EFS4 include the dimensions, weight, and power
consumption.
Issue 02 (2009-07-30)
7-65
7 Data Boards
Description
Functional
version
Differences
Substitution
EFS4
Basic functions
Specifications of the
optical interface
Format of service
frames
Supports Ethernet II, IEEE 802.3, and IEEE 802.1 q/p formats.
Supports the frame with a length ranging from 64 bytes to 9600 bytes.
Supports the Jumbo frame with a length less than 9600 bytes.
Maximum uplink
bandwidth
7-66
Issue 02 (2009-07-30)
7 Data Boards
Function and
Feature
EFS4
VCTRUNKs
A VC-4 cannot be bound with VC-3 and VC-12 paths at the same
time.
Mapping
granularities
Encapsulation
format
EPL services
EVPL services
EPLAN services
The services that are based on the IEEE 802.1d MAC bridge are
referred to as EPLAN services.
MTU
Issue 02 (2009-07-30)
The N1EFS4 and N3EFS4 support the query of the dynamic MAC
address.
The N2EFS4 does not support the query of the dynamic MAC
address.
Supports the creation, deletion, and query of the VB. The maximum
number of supported VBs is 16. The maximum number of logical
ports for each VB is 30.
The packet length can be set from 1518 bytes to 9600 bytes. After the
packet length setting takes effect, the maximum length of the packets
entering or going out from the IP port are limited by the MTU setting.
7-67
7 Data Boards
Function and
Feature
EFS4
MPLS
VLAN
Link aggregation
Multicast function
ETH-OAM
function
CAR
Service-based QoS
flow classification
7-68
LCAS function
LPT function
The N2EFS4 and N3EFS4 support the P2P LPT and P2MP LPT.
Flow control
function
Supports the port-based flow control function that complies with IEEE
802.3x.
Test frames
Loopback function
Supports inloops on Ethernet ports (at the PHY layer or MAC layer).
Ethernet
performance
monitoring
Alarms and
performance events
Issue 02 (2009-07-30)
7 Data Boards
Data
Network processor module
VCP
Switch
fabric
DENCP
Network
processor
Control
ENCP
Ethernet
FE
access
module
Interface
converting
module
Cross-connect unit
Cross-connect unit
Mapping module
LOS
Logic and
control module
Communication
Reference clock and frame header
+3.3 V
Clock module
Power Fuse
module
Power
module
SCC unit
SCC unit
-48 V/-60 V
-48 V/-60 V
50 77 125 155
MHz MHz MHz MHz
7-69
7 Data Boards
After the striped Ethernet frames enter the core of network processor, the flow is classified
according to the service type and configuration requirement. The frames are encapsulated or
decapsulated. The following formats are supported:
l
MPLS
L2 MPLS VPN
Ethernet/VLAN
In the receive direction, services are mapped and forwarded after the Tunnel and VC tags are
added according to the service configuration. In the transmit direction, the Tunnel or VC tag is
extracted based on the level (P or PE) of the equipment. Services are then routed or forwarded.
The network processor module supports the following functions:
l
WFQ
Four CoSs
Mapping Module
The mapping module performs encapsulation and mapping functions.
In the upstream direction, this module first encapsulates Ethernet signals in LAPS or GFP format.
The concatenation is performed. Then, the Ethernet signals are converted into SDH signals.
In the downstream direction, SDH signals are demapped. The delay of virtual concatenation is
compensated. After aligning, packets are decapsulated according to the encapsulation format.
The decapsulated data is finally transmitted to the network processor module in packets.
The control module also contains basic logic units. This module performs the following
functions:
7-70
Issue 02 (2009-07-30)
Checks the in-service state of the cross-connect, SCC, and line boards.
Implements communication.
Controls indicators.
7 Data Boards
Clock Module
The clock module traces the system reference clock and generates the required working clock
for each chip. The frequency of the clock can be 50 MHz, 77 MHz, 125 MHz, or 155 MHz.
Power Module
It converts the 48 V/60 V power supply into the DC voltages that the modules of the board
require.
Issue 02 (2009-07-30)
7-71
7 Data Boards
EFS4
STAT
ACT
PROG
SRV
FE1
FE2
FE3
FE4
EFS4
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
7-72
Issue 02 (2009-07-30)
7 Data Boards
Interfaces
The front panel of the EFS4 has four FE interfaces. Table 7-42 describes the types and usage
of the interfaces of the EFS4.
Table 7-42 Interfaces of the EFS4
Interface
Type of
Interface
Usage
FE1
RJ-45
FE2
RJ-45
FE3
RJ-45
FE4
RJ-45
Description
Grounding
Grounding
Grounding
Grounding
Issue 02 (2009-07-30)
When the N1EFS4 is installed in slots 28 and 1116, the bandwidth is 622 Mbit/s.
7-73
7 Data Boards
l
When the N2EFS4 or N3EFS4 is installed in slots 28 and 1116, the bandwidth is 1.25
Gbit/s.
Working mode
LCAS
Mapping protocol
Tested
equipment 2
Port 1
Port 2
Data network
performance
analyzer
Table 7-44 lists the throughput specifications of the EFS4. Table 7-45 lists the packet loss ratio
in the case of overloading of the EFS4. Table 7-46 lists the latency specifications of the EFS4.
Table 7-47 lists the back-to-back specifications of the EFS4.
7-74
Issue 02 (2009-07-30)
7 Data Boards
NOTE
The specifications vary according to the configuration and networking of the test environment, port
rate, and VC services bound on the VCG side. The specifications that are obtained in the actual
environment are used.
The specifications in the following tables are obtained in the following scenario: EPL services are
configured and five VC-12s are bound on the FE port.
The specifications of a board of a specific version are not provided because the board version has
negligible effect on the specifications.
The specifications in the following tables are obtained by using the Smart Application.
Passed Rate
(%)
(01,02,03) to
(01,02,05) (pks/
sec)
(01,02,05) to
(01,02,03) (pks/
sec)
Total (pks/
sec)
64
11.41
16984
16984
33968
128
11.18
9441
9441
18882
256
11.10
5026
5026
10052
512
11.09
2605
2605
5210
1024
11.00
1317
1317
2634
1280
11.09
1066
1066
2132
1518
11.07
900
900
1800
NOTE
Number of pairs: 1
Mode: bidirectional
Table 7-45 Packet loss ratio in the case of overloading of the EFS4
Issue 02 (2009-07-30)
Frame Size
(Byte)
Rate Tested
(%)
(01,02,03) to
(01,02,05) (%)
(01,02,05) to
(01,02,03) (%)
Average (%)
64
100.00
88.510
88.513
88.512
128
100.00
88.724
88.729
88.726
7-75
7 Data Boards
Frame Size
(Byte)
Rate Tested
(%)
(01,02,03) to
(01,02,05) (%)
(01,02,05) to
(01,02,03) (%)
Average (%)
256
100.00
88.858
88.859
88.859
512
100.00
88.858
88.861
88.859
1024
100.00
88.888
88.914
88.901
1280
100.00
88.895
88.875
88.885
1518
100.00
88.870
88.871
88.870
NOTE
Number of pairs: 1
Mode: bidirectional
7-76
Frame
Size
(Byte)
Rate
Tested
(%)
(01,02,03) to
(01,02,05) (us)CT (us)
Average
(CT) (us)
(01,02,03) to
(01,02,05)
(us)-S&F (us)
Average
(S&F) (us)
64
10.00
586.1
586.1
581.0
581.0
128
10.00
644.4
644.4
634.2
634.2
256
10.00
726.3
726.3
705.9
705.9
512
10.00
969.0
969.0
928.1
928.1
1024
10.00
1382.6
1382.6
1300.6
1300.6
1280
10.00
1609.0
1609.0
1506.6
1506.6
1518
10.00
1804.9
1804.9
1683.4
1683.4
Issue 02 (2009-07-30)
7 Data Boards
NOTE
The latency modes are classified into two modes, namely, cut through mode and store forward mode.
In cut through mode, the analyzer calculates the difference between the time when the first bit of the
transmitted frame reaches the output port and the time when the first bit of the transmitted frame reaches
the input port. In store forward mode, the analyzer calculates the difference between the time when the
first bit of the transmitted frame reaches the output port and the time when the last bit of the transmitted
frame reaches the input port. In the preceding table, the CT values are obtained in cut through mode
and the S&F values are obtained in store forward mode.
Number of pairs: 1
Mode: bidirectional
Issue 02 (2009-07-30)
Frame Size
(Byte)
Rate Tested
(%)
(01,02,03) to
(01,02,05) Burst
Size (Number of
Frames)
(01,02,05) to
(01,02,03)
(Number of
Frames)
Total
(Number of
Frames)
64
100.00
1337
1339
2676
128
100.00
852
852
1704
256
100.00
583
583
1166
512
100.00
441
441
882
1024
100.00
225
228
453
1280
100.00
210
210
420
1518
100.00
200
200
400
7-77
7 Data Boards
NOTE
Number of pairs: 1
Mode: bidirectional
Mechanical Specifications
The mechanical specifications of the EFS4 are as follows:
l
Power Consumption
The maximum power consumption of the N1EFS4 and N2EFS4 at room temperature (25C) is
30 W.
The maximum power consumption of the N3EFS4 at room temperature (25C) is 18 W.
7.7 EGS2
This topic describes the version, functions, working principle, valid slots, and technical
specification of the EGS2 (2xGE switching and processing board).
7.7.1 Version Description
The EGS2 is available in two functional versions, namely, N2 and N3.
7.7.2 Functions and Features
The EGS2 supports the Layer 2 switching, MPLS, and broadcast functions.
7.7.3 Working Principle and Signal Flow
The EGS2 consists of the Ethernet access module, network processor module, mapping module,
interface converting module, logic and control module, clock module, and power module.
7.7.4 Front Panel
The front panel of the EGS2 has indicators, interfaces, a bar code, and a laser safety class label.
7.7.5 Valid Slots
The EGS2 can be installed in slots 28 and 1116 in the subrack.
7.7.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the EGS2 indicates the type of interface.
7-78
Issue 02 (2009-07-30)
7 Data Boards
EGS2
Basic functions
Specifications of
the optical
interface
Supports the frame with a length ranging from 64 bytes to 9600 bytes.
Supports the Jumbo frame with a length less than 9600 bytes.
Format of service
frames
Maximum uplink
bandwidth
Issue 02 (2009-07-30)
The maximum uplink bandwidth is 2.5 Gbit/s. The EGS2 can adapt to
the bandwidth of the slot.
7-79
7 Data Boards
Function and
Feature
EGS2
VCTRUNKs
7-80
A VC-4 cannot be bound with VC-3 and VC-12 paths at the same
time.
Mapping
granularities
Encapsulation
format
EPL services
EVPL services
EPLAN services
The services that are based on the IEEE 802.1d MAC bridge are referred
to as EPLAN service.
l
Supports the creation, deletion, and query of the VB. The maximum
number of supported VBs is 2. The maximum number of logical ports
for each VB is 30.
MTU
Supports the setting of the packet length, which ranges from 1518 bytes
to 9600 bytes. After the setting becomes valid, the length of the packets
that enter or exit the IP ports is limited.
MPLS
VLAN
VLAN
convergence
Issue 02 (2009-07-30)
7 Data Boards
Function and
Feature
EGS2
RSTP
Link aggregation
function
Multicast function
ETH-OAM
function
The N3EGS2 supports CC for the multicast service, LB test for the
unicast service, LT test, LD, auto-negotiation, fault diagnosis, and
link performance detection. The ETH-OAM function complies with
IEEE 802.1ag and IEEE 802.3ah.
CAR
Service- based
QoS flow
classification
LCAS function
LPT function
Flow control
function
Supports the port-based flow control function that complies with IEEE
802.3x.
Test frames
Loopback
function
Supports inloops on Ethernet ports (at the PHY layer or MAC layer).
The N2EGS2 supports inloops and outloops at the VC-3 level, but the
N3EGS2 does not support inloops and outloops at the VC-3 level.
Ethernet
performance
monitoring
Alarms and
performance
events
7-81
7 Data Boards
Laser
shutdown
Cross-connect unit
Interface
converting
module
VCP
DENCP
GE Ethernet
access
module
ENCP
Cross-connect unit
Mapping module
LOS
Communication
Logic and
control module
+3.3 V
Clock module
50
77
MHz MHz
SCC unit
Power
module
Power
module
Fuse
SCC unit
-48 V/-60 V
-48 V/-60 V
125 155
MHz MHz
7-82
MPLS
L2 MPLS VPN
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
Issue 02 (2009-07-30)
7 Data Boards
Ethernet/VLAN
In the receive direction, services are mapped and forwarded after the Tunnel and VC tags are
added according to the service configuration. In the transmit direction, the Tunnel or VC tag is
extracted based on the level (P or PE) of the equipment. Services are then routed or forwarded.
The network processor module supports the following functions:
l
WFQ
Four CoSs
Mapping Module
The mapping module performs encapsulation and mapping functions.
In the upstream direction, this module first encapsulates Ethernet signals in LAPS or GFP format.
The concatenation is performed. Then, the Ethernet signals are converted into SDH signals.
In the downstream direction, SDH signals are demapped. The delay of virtual concatenation is
compensated. After aligning, packets are decapsulated according to the encapsulation format.
The decapsulated data is finally transmitted to the network processor module in packets.
The control module also contains basic logic units. This module performs the following
functions:
l
Checks the in-service state of the cross-connect, SCC, and line boards.
Implements communication.
Controls indicators.
Issue 02 (2009-07-30)
7-83
7 Data Boards
Clock Module
The clock module traces the system reference clock and generates the required working clock
for each chip. The frequency of the clock can be 50 MHz, 77 MHz, 125 MHz, or 155 MHz.
Power Module
It converts the 48 V/60 V power supply into the DC voltages that the modules of the board
require.
EGS2
STAT
ACT
PROG
SRV
LINK1
ACT1
LINK2
ACT2
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
EGS2
7-84
Issue 02 (2009-07-30)
7 Data Boards
The N3EGS2 can also be installed with the GE electrical interface. Figure 7-27 shows the
appearance of the front panel of the N3EGS2 that is installed with the GE electrical interface.
Figure 7-27 Front panel of the N3EGS2 that is installed with the GE electrical interface
EGS2
STAT
ACT
PROG
SRV
LINK1
ACT1
LINK2
ACT2
OUT1
IN1
OUT2
IN2
EGS2
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Issue 02 (2009-07-30)
7-85
7 Data Boards
l
Interfaces
The front panel of the N2EGS2/N3EGS2 has two GE optical interfaces. Table 7-49 describes
the types and usage of the optical interfaces of the N2EGS2/N3EGS2.
Table 7-49 Optical interfaces of the N2EGS2/N3EGS2
Interface
Type of
Interface
Usage
OUT1/IN1
LC (swappable)
OUT2/IN2
LC (swappable)
When the N3EGS2 is installed with the electrical interfaces, the two GE electrical interfaces are
of the same type and have the same usage. Table 7-50 describes the types and usage of the
electrical interfaces of the N3EGS2.
Table 7-50 Electrical interfaces of the N3EGS2
Interface
Type of
Interface
Usage
GE
RJ-45 (swappable)
Table 7-51 provides the pin assignments of the RJ-45 interface of the N3EGS2.
Table 7-51 Pin assignments of the RJ-45 interface of the N3EGS2
7-86
Pin
Description
BI_DA+
BI_DA
BI_DB+
BI_DC+
BI_DC
BI_DB
BI_DD+
BI_DD
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
Issue 02 (2009-07-30)
7 Data Boards
Feature Code
Type of Interface
SSN2EGS210 and
SSN2EGS310
10
SSN2EGS211 and
SSN2EGS311
11
SSN2EGS212 and
SSN2EGS312
12
SSN2EGS213 and
SSN2EGS213
13
SSN3EGS214
14
1000BASE-T (100 m)
Working mode
LCAS
Mapping protocol
7-87
7 Data Boards
Value
Type of optical
interface
1000BASE-ZX
(80 km)
1000BASE-SX
(0.5 km)
Type of fiber
Single-mode LC
Single-mode
LC
Single-mode
LC
Multi-mode LC
Launched optical
power range
(dBm)
-2 to +5
-5.0 to 0
-9.5 to -3
-9.5 to -2.5
Operating
wavelength range
(nm)
1500 to 1580
1275 to 1350
1270 to 1355
770 to 860
Minimum
overload (dBm)
-3
-3
-3
Receiver
sensitivity (dBm)
-23
-23
-20
-17
Minimum
extinction ratio
(dB)
Tested
equipment 2
Port 1
Port 2
Data network
performance
analyzer
7-88
Issue 02 (2009-07-30)
7 Data Boards
Table 7-54 lists the throughput specifications of the EGS2. Table 7-55 lists the packet loss ratio
in the case of overloading of the EGS2. Table 7-56 lists the latency specifications of the EGS2.
Table 7-57 lists the back-to-back specifications of the EGS2.
NOTE
The specifications vary according to the configuration and networking of the test environment and
the VC services bound on the VCG side. The specifications that are obtained in the actual environment
are used.
The specifications in the following tables are obtained in the following scenario: EPL services are
configured and five VC-12s are bound on the GE port.
The specifications of a board of a specific version are not provided because the board version has
negligible effect on the specifications.
The specifications in the following tables are obtained by using the Smart Application.
Passed Rate
(%)
(01,01,01) to
(01,01,02) (pks/
sec)
(01,01,02) to
(01,01,01) (pks/
sec)
Total (pks/
sec)
64
1.15
17086
17086
34172
128
1.12
9501
9501
19002
256
1.12
5094
5094
10188
512
1.13
2660
2660
5320
1024
1.12
1346
1346
2692
1280
1.13
1088
1088
2176
1518
1.14
925
925
1850
NOTE
Issue 02 (2009-07-30)
Number of pairs: 1
Mode: bidirectional
7-89
7 Data Boards
Table 7-55 Packet loss ratio in the case of overloading of the EGS2
Frame Size
(Byte)
Rate Tested
(%)
(01,01,01) to
(01,01,02) (%)
(01,01,02) to
(01,01,01) (%)
Average (%)
64
100.00
98.846
98.846
98.846
128
100.00
98.869
98.868
98.868
256
100.00
98.874
98.875
98.874
512
100.00
98.866
98.863
98.865
1024
100.00
98.870
98.870
98.870
1280
100.00
98.863
98.861
98.862
1518
100.00
98.855
98.855
98.855
NOTE
Number of pairs: 1
Mode: bidirectional
7-90
Frame
Size
(Byte)
Rate
Tested
(%)
(01,01,01) to
(01,01,02) (us)CT (us)
Average
(CT) (us)
(01,01,01) to
(01,01,02)
(us)-S&F (us)
Average
(S&F) (us)
64
1.00
555.8
555.8
555.3
555.3
128
1.00
615.2
615.2
614.2
614.2
256
1.00
734.6
734.6
732.6
732.6
512
1.00
914.0
914.0
909.9
909.9
1024
1.00
1313.7
1313.7
1305.6
1305.6
1280
1.00
1523.1
1523.1
1512.9
1512.9
1518
1.00
1706.6
1706.6
1694.4
1694.4
Issue 02 (2009-07-30)
7 Data Boards
NOTE
The latency modes are classified into two modes, namely, cut through mode and store forward mode.
In cut through mode, the analyzer calculates the difference between the time when the first bit of the
transmitted frame reaches the output port and the time when the first bit of the transmitted frame reaches
the input port. In store forward mode, the analyzer calculates the difference between the time when the
first bit of the transmitted frame reaches the output port and the time when the last bit of the transmitted
frame reaches the input port. In the preceding table, the CT values are obtained in cut through mode
and the S&F values are obtained in store forward mode.
Number of pairs: 1
Mode: bidirectional
Issue 02 (2009-07-30)
Frame Size
(Byte)
Rate Tested
(%)
(01,01,01) to
(01,01,02) Burst
Size (Number of
Frames)
(01,01,02) to
(01,01,01)
(Number of
Frames)
Total
(Number of
Frames)
64
100.00
1236
1236
2472
128
100.00
1321
1323
2644
256
100.00
1070
1070
2140
512
100.00
934
934
1868
1024
100.00
468
468
936
1280
100.00
458
458
916
1518
100.00
450
453
903
7-91
7 Data Boards
NOTE
Number of pairs: 1
Mode: bidirectional
Mechanical Specifications
The mechanical specifications of the EGS2 are as follows:
l
Power Consumption
The maximum power consumption of the N2EGS2 at room temperature (25C) is 43 W.
The maximum power consumption of the N3EGS2 at room temperature (25C) is 25 W.
7.8 EMS2
This topic describes the version, functions, working principle, valid slots, and technical
specification of the EMS2 (2xGE and 16xFE switching and processing board).
7.8.1 Version Description
The EMS2 is available in one functional version, namely, N1.
7.8.2 Functions and Features
The EMS2 supports the Layer 2 switching, link convergence, and multicast functions.
7.8.3 Working Principle and Signal Flow
The EMS2 consists of the Ethernet access module, network processor module, mapping module,
interface converting module, logic and control module, clock module, and power module.
7.8.4 Front Panel
The front panel of the EMS2 has indicators, interfaces, a bar code, and a laser safety class label.
7.8.5 Valid Slots
The EMS2 can be installed in slots 27 and 1216 in the subrack.
7.8.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the EMS2 indicates the type of interface.
7.8.7 Parameter Settings
7-92
Issue 02 (2009-07-30)
7 Data Boards
You can set the parameters for the EMS2 by using the T2000.
7.8.8 Technical Specifications
The technical specifications of the EMS2 include the parameters specified for optical interfaces,
laser safety class, dimensions, weight, and power consumption.
EMS2
Basic functions
Specifications of the
optical interface
Issue 02 (2009-07-30)
7-93
7 Data Boards
Function and
Feature
EMS2
Format of service
frames
Supports the Jumbo frame with a length less than 9600 bytes.
Maximum uplink
bandwidth
2.5 Gbit/s
Mapping granularities
VCTRUNKs
Encapsulation format
EPL services
EVPL services
The services that are based on the IEEE 802.1d MAC bridge are
referred to as EPLAN service.
l
EPLAN
EVPLAN
7-94
The services that are based on the IEEE 802.1d MAC bridge are
referred to as EPLAN service.
l
Issue 02 (2009-07-30)
Function and
Feature
EMS2
VLAN
7 Data Boards
Supports the setting of the packet length, which ranges from 1518
bytes to 9600 bytes. After the setting becomes valid, the length of
the packets that enter or exit the IP ports is limited.
RSTP
Multicast function
ETH-OAM function
Supports CC for the multicast service, LB test for the unicast service,
LT test, LD, auto-negotiation, fault diagnosis, and link performance
detection. The ETH-OAM function complies with IEEE 802.1ag and
IEEE 802.3ah.
Test frames
Port mirroring
Link aggregation
function
VLAN convergence
Protection
CAR
Issue 02 (2009-07-30)
Flow classification
LCAS function
LPT function
Inter-board link
aggregation
Loopback function
Ethernet performance
monitoring
Alarms and
performance events
7-95
7 Data Boards
Cross-connect unit
Interface
converting
module
VCP
Laser
shutdown
DENCP
ENCP
GE/FE Ethernet
access
module
Cross-connect unit
Mapping module
LOS
Communication
Logic and
control module
+3.3 V
Clock module
77
50
MHz MHz
SCC unit
Power
module
Power
module
Fuse
SCC unit
-48 V/-60 V
-48 V/-60 V
125 155
MHz MHz
Issue 02 (2009-07-30)
7 Data Boards
WFQ
Four CoSs
Mapping Module
The mapping module performs encapsulation and mapping functions.
In the upstream direction, this module first encapsulates Ethernet signals in LAPS, GFP-F, or
HDLC format. The concatenation is performed. The LCAS function is supported. Then, the
Ethernet signals are converted into SDH signals.
In the downstream direction, SDH signals are demapped. The delay of virtual concatenation is
compensated. After aligning, packets are decapsulated according to the encapsulation format.
The decapsulated data is finally transmitted to the network processor module in packets.
The control module also contains basic logic units. This module performs the following
functions:
l
Issue 02 (2009-07-30)
7-97
7 Data Boards
l
Checks the in-service state of the cross-connect, SCC, and line boards.
Implements communication.
Controls indicators.
Clock Module
The clock module traces the system reference clock and generates the required working clock
for each chip. The frequency of the clock can be 50 MHz, 77 MHz, 125 MHz, or 155 MHz.
Power Module
It converts the 48 V/60 V power supply into the DC voltages that the modules of the board
require.
7-98
Issue 02 (2009-07-30)
7 Data Boards
Figure 7-30 Front panel of the EMS2 that is installed with the GE optical interface
EMS2
STAT
ACT
PROG
SRV
LINK1
ACT1
LINK2
ACT2
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
EMS2
Figure 7-31 shows the appearance of the front panel of the EMS2 that is installed with the GE
electrical interface.
Issue 02 (2009-07-30)
7-99
7 Data Boards
Figure 7-31 Front panel of the EMS2 that is installed with the GE electrical interface
EMS2
STAT
ACT
PROG
SRV
LINK1
ACT1
LINK2
ACT2
OUT1
IN1
OUT2
IN2
EMS2
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
7-100
Issue 02 (2009-07-30)
7 Data Boards
Interfaces
The front panel of the EMS2 has two interfaces. Table 7-59 describes the types and usage of
the interfaces of the EMS2 when the EMS2 is installed with the optical interfaces. When the
EMS2 is installed with the electrical interfaces, the two GE electrical interfaces are of the same
type and have the same usage. Table 7-60 describes the types and usage of the electrical
interfaces of the EMS2.
Table 7-59 Optical interfaces of the EMS2
Interface
Type of
Interface
Usage
OUT1/IN1
LC (swappable)
OUT2/IN2
LC (swappable)
Type of
Interface
Usage
GE
RJ-45
(swappable)
Table 7-61 provides the pin assignments of the RJ-45 interface of the EMS2.
Table 7-61 Pin assignments of the RJ-45 interface of the EMS2
Issue 02 (2009-07-30)
Pin
Description
BI_DA+
BI_DA
BI_DB+
BI_DC+
BI_DC
BI_DB
BI_DD+
BI_DD
7-101
7 Data Boards
Slot 2
Slot 3
Slots 21 and 22
Slot 4
Slots 23 and 24
Slot 5
Slots 25 and 26
Slot 6
Slots 27 and 28
Slot 7
Slots 28 and 29
Slot 12
Slots 31 and 32
Slot 13
Slots 33 and 34
Slot 14
Slots 35 and 36
Slot 15
Slots 37 and 38
Slot 16
Slots 39 and 40
7-102
Board
Feature Code
Type of Interface
SSN1EMS210
10
SSN1EMS211
11
SSN1EMS212
12
SSN1EMS213
13
SSN1EMS214
14
1000BASE-T (100 m)
Issue 02 (2009-07-30)
7 Data Boards
Working mode
LCAS
Mapping protocol
Value
Type of optical
interface
1000BASE-ZX
(80 km)
1000BASE-SX
(0.5 km)
Type of fiber
Single-mode LC
Single-mode
LC
Single-mode
LC
Multi-mode LC
Launched optical
power range
(dBm)
-2 to +5
-5.0 to 0
-9.5 to -3
-9.5 to -2.5
Operating
wavelength range
(nm)
1500 to 1580
1275 to 1350
1270 to 1355
770 to 860
Minimum
overload (dBm)
-3
-3
-3
Receiver
sensitivity (dBm)
-23
-23
-20
-17
Minimum
extinction ratio
(dB)
7-103
7 Data Boards
Mechanical Specifications
The mechanical specifications of the EMS2 are as follows:
l
Power Consumption
The maximum power consumption of the EMS2 at room temperature (25C) is 40 W.
7.9 EMS4
This topic describes the version, functions, working principle, valid slots, and technical
specification of the EMS4 (4xGE and 16xFE switching and processing board).
7.9.1 Version Description
The EMS4 is available in one functional version, namely, N1.
7.9.2 Functions and Features
The EMS4 supports the Layer 2 switching, link convergence, and multicast functions.
7.9.3 Working Principle and Signal Flow
The EMS4 consists of the Ethernet access module, network processor module, mapping module,
interface converting module, logic and control module, clock module, and power module.
7.9.4 Front Panel
The front panel of the EMS4 has indicators, interfaces, a bar code, and a laser safety class label.
7.9.5 Valid Slots
The EMS4 can be installed in slots 27 and 1216 in the subrack.
7.9.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the EMS4 indicates the type of interface.
7.9.7 Board Protection
The EMS4 supports the BPS and PPS.
7.9.8 Parameter Settings
You can set the parameters for the EMS4 by using the T2000.
7.9.9 Technical Specifications
The technical specifications of the EMS4 include the parameters specified for optical interfaces,
laser safety class, Ethernet performance specifications, mechanical specifications, and power
consumption.
Issue 02 (2009-07-30)
7 Data Boards
EMS4
Basic functions
Specifications of the
optical interface
Format of service
frames
Issue 02 (2009-07-30)
Supports the Jumbo frame with a length less than 9216 bytes.
Maximum uplink
bandwidth
2.5 Gbit/s.
Mapping granularities
Number of supported
VCTRUNKs
64
Encapsulation format
7-105
7 Data Boards
Function and
Feature
EMS4
EPL services
EVPL services
EPLAN services
EVPLAN services
VLAN
The services that are based on the IEEE 802.1d MAC bridge are
referred to as EPLAN service.
l
Supports the blacklist with a capacity of 512 bytes and the static
MAC address table with a capacity of 512 bytes.
The services that are based on the IEEE 802.1q virtual bridge and
IEEE 802.1ad provider bridge are referred to as EVPLAN services.
l
7-106
MTU
Supports the setting of the packet length, which ranges from 1518
bytes to 9216 bytes. After the setting becomes valid, the length of
the packets that enter or exit the IP ports is limited.
RSTP
Multicast function
ETH-OAM function
Supports CC for the multicast service, LB test for the unicast service,
remote loopback, auto-negotiation, LD, fault diagnosis, and link
performance detection. The ETH-OAM function complies with
IEEE 802.1ag and IEEE 802.3ah.
Issue 02 (2009-07-30)
7 Data Boards
Function and
Feature
EMS4
Test frames
Service mirroring
Link aggregation
function
VLAN convergence
Protection
CAR
Flow classification
LCAS function
LPT function
Inter-board link
aggregation
Loopback function
Ethernet performance
monitoring
Alarms and
performance events
Issue 02 (2009-07-30)
7-107
7 Data Boards
Cross-connect unit
Interface
converting
module
VCP
Laser
shutdown
DENCP
ENCP
GE/FE Ethernet
access
module
Cross-connect unit
Mapping module
LOS
Communication
Logic and
control module
+3.3 V
Clock module
77
50
MHz MHz
SCC unit
Power
module
Power
module
Fuse
SCC unit
-48 V/-60 V
-48 V/-60 V
125 155
MHz MHz
Issue 02 (2009-07-30)
WFQ
Four CoSs
7 Data Boards
Mapping Module
The mapping module performs encapsulation and mapping functions.
In the upstream direction, this module first encapsulates Ethernet signals in LAPS, GFP-F, or
HDLC format. The concatenation is performed. The LCAS function is supported. Then, the
Ethernet signals are converted into SDH signals.
In the downstream direction, SDH signals are demapped. The delay of virtual concatenation is
compensated. After aligning, packets are decapsulated according to the encapsulation format.
The decapsulated data is finally transmitted to the network processor module in packets.
The control module also contains basic logic units. This module performs the following
functions:
l
Checks the in-service state of the cross-connect, SCC, and line boards.
Implements communication.
Controls indicators.
Clock Module
The clock module traces the system reference clock and generates the required working clock
for each chip. The frequency of the clock can be 50 MHz, 77 MHz, 125 MHz, or 155 MHz.
Issue 02 (2009-07-30)
7-109
7 Data Boards
Power Module
It converts the 48 V/60 V power supply into the DC voltages that the modules of the board
require.
EMS4
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
OUT3
IN3
OUT4
IN4
LINK ACT
1
2
3
4
EMS4
Figure 7-34 shows the appearance of the front panel of the EMS4 that is installed with the GE
electrical interface.
7-110
Issue 02 (2009-07-30)
7 Data Boards
Figure 7-34 Front panel of the EMS4 that is installed with the GE electrical interface
EMS4
STAT
ACT
PROG
SRV
OUT1
IN1
OUT2
IN2
OUT3
IN3
OUT4
IN4
LINK ACT
1
2
3
4
EMS4
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Issue 02 (2009-07-30)
7-111
7 Data Boards
Interfaces
The front panel of the EMS4 has four interfaces. Table 7-66 describes the types and usage of
the optical interfaces of the EMS4. When the EMS4 is installed with the electrical interfaces,
the four GE electrical interfaces are of the same type and have the same usage. Table 7-67
describes the types and usage of the electrical interfaces of the EMS4.
Table 7-66 Optical interfaces of the EMS4
Interface
Type of
Interface
Usage
OUT1/IN1
LC (swappable)
OUT2/IN2
LC (swappable)
OUT3/IN3
LC (swappable)
OUT4/IN4
LC (swappable)
Type of
Interface
Usage
GE
RJ-45
(swappable)
Table 7-68 provides the pin assignments of the RJ-45 interface of the EMS4.
Table 7-68 Pin assignments of the RJ-45 interface of the EMS4
7-112
Pin
Description
BI_DA+
BI_DA
BI_DB+
BI_DC+
BI_DC
BI_DB
BI_DD+
BI_DD
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
Issue 02 (2009-07-30)
7 Data Boards
Slot 2
Slot 3
Slots 21 and 22
Slot 4
Slots 23 and 24
Slot 5
Slots 25 and 26
Slot 65
Slots 27 and 28
Slot 7
Slots 29 and 30
Slot 12
Slots 31 and 32
Slot 13
Slots 33 and 34
Slot 14
Slots 35 and 36
Slot 15
Slots 37 and 38
Slot 16
Slots 39 and 40
Issue 02 (2009-07-30)
Board
Feature Code
Type of Interface
SSN1EMS410
10
SSN1EMS411
11
SSN1EMS412
12
7-113
7 Data Boards
Board
Feature Code
Type of Interface
SSN1EMS413
13
SSN1EMS414
14
1000BASE-T (100 m)
Protection Principle
When the BPS protection is provided for the EMS4, the GE and FE ports are protected by using
the single-fed and selective-receiving scheme. The EMS4 has four GE ports and 16 FE ports
and hence may be connected to many sets of communication equipment. Normally, the active
board is working and services are transmitted in two directions of the active link. On the backup
link, the EMS4 disables the transmission of all ports. In this case, the ports of the opposite board
are in the linkdown state. In addition, the opposite board enables the transmission but does not
transmit services. In this manner, the receive ports of the backup EMS4 are not in the linkdown
state. The solid lines in Figure 7-35 show how the EMS4 normally works.
Figure 7-35 Normal working of the EMS4
No.1
Active
EMS4
Active
communication
equipment
Standby
communication
equipment
No.2
No.3
Active
communication
equipment
XCS
B
Standby
communication
equipment
No.1
No.2
Standby
EMS4
No.3
Active
communication
equipment
Standby
communication
equipment
7-114
Issue 02 (2009-07-30)
7 Data Boards
BPS Protection
When the BPS protection is provided, if the active board detects the linkdown state of any link
or any fault in the board, the cross-connect board switches all the services to the standby board.
In this manner, services are protected. The solid lines in Figure 7-36 show how the BPS
protection functions. The services numbered 1, 2 and 3 are all switched to the standby EMS4
and the corresponding communication equipment.
Figure 7-36 Principle of the BPS protection for the EMS4
No.1
Active
EMS4
Active
communication
equipment
Standby
communication
equipment
No.2
No.3
Active
communication
equipment
XCS
B
Standby
communication
equipment
No.1
No.2
Standby
EMS4
No.3
Active
communication
equipment
Standby
communication
equipment
PPS Protection
When the PPS protection is provided, if the active board detects the linkdown state of any link,
any fault in the board, or the offline state of any board, the cross-connect board switches all the
services to the standby board. In this manner, services are protected. The solid lines in Figure
7-37 show how the PPS protection functions. Only the service numbered 1 is switched to the
standby EMS4 and the standby communication equipment.
Issue 02 (2009-07-30)
7-115
7 Data Boards
No.1
Active
communication
equipment
Active
EMS4
Standby
communication
equipment
No.2
No.3
Active
communication
equipment
XCS
B
Standby
communication
equipment
No.1
No.2
Standby
EMS4
No.3
Active
communication
equipment
Standby
communication
equipment
The conditions that trigger the protection for the EMS4 are as follows:
l
Fault at the PHY layer of the MAC port, that is, linkdown state
Fault in key hardware units of the board, such as the power module, optical module, and
clock
WARNING
When the board-level protection is performed, the FE ports support only the 100M full-duplex
mode and the GE ports support the auto-negotiation and 1000M full-duplex mode.
Board Configuration
Two EMS4 boards should be configured to provide the board-level protection. One EMS4 is the
active board and the other is the standby board. When you configure the EMS4 board protection,
ensure that the access capacity of the slot that houses the standby board must not be less than
the access capacity of the slot that houses the active board.
7-116
Issue 02 (2009-07-30)
7 Data Boards
Working mode
LCAS
Mapping protocol
Issue 02 (2009-07-30)
Parameter
Value
Type of optical
interface
1000BASE-ZX
(80 km)
1000BASE-SX
(0.5 km)
Type of fiber
Single-mode LC
Single-mode
LC
Single-mode
LC
Multi-mode LC
Launched optical
power range
(dBm)
-2 to +5
-5.0 to 0
-9.5 to -3
-9.5 to -2.5
Operating
wavelength range
(nm)
1500 to 1580
1275 to 1350
1270 to 1355
770 to 860
Minimum
overload (dBm)
-3
-3
-3
Receiver
sensitivity (dBm)
-23
-23
-20
-17
Minimum
extinction ratio
(dB)
7-117
7 Data Boards
Tested
equipment 2
Port 2
Port 1
Port 2
Data network
performance
analyzer
Figure 7-39 shows the connection for testing the back-to-back specifications of the EMS4.
Figure 7-39 Connection for testing the back-to-back specifications
Tested
equipment 1
Port 1
Port 2
Data network
performance
analyzer
Table 7-72 and Table 7-73 list the throughput specifications of the EMS4. Table 7-74 and
Table 7-75 list the packet loss ratio in the case of overloading of the EMS4. Table 7-76 and
Table 7-77 list the latency specifications of the EMS4. Table 7-78 and Table 7-79 list the backto-back specifications of the EMS4.
7-118
Issue 02 (2009-07-30)
7 Data Boards
NOTE
The specifications vary according to the configuration and networking of the test environment and
the VC services bound on the VCG side. The specifications that are obtained in the actual environment
are used.
The specifications in the following tables are obtained in the following scenario: EPL services are
configured and one VC-4 is bound on the FE port, or EPL services are configured and 24 VC-3s are
bound on the GE port.
The specifications of a board of a specific version are not provided because the board version has
negligible effect on the specifications.
The specifications in the following tables are obtained by using the Smart Application.
Table 7-72 Throughput specifications of the EMS4 (one VC-4 is bound on the FE port)
Frame Size
(Byte)
(01,01,03) to (01,01,06)
(pks/sec)
Total (pks/sec)
64
100.00
148810
148810
128
100.00
84459
84459
256
100.00
45290
45290
512
100.00
23496
23496
1024
100.00
11973
11973
1280
100.00
9615
9615
1518
100.00
8127
8127
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The permitted packet loss ratio is set to 0% and the resolution rate is set to 0.1%.
Number of pairs: 1
Mode: unidirectional
Table 7-73 Throughput specifications of the EMS4 (24 VC-3s are bound on the GE port)
Issue 02 (2009-07-30)
Frame Size
(Byte)
(01,03,01) to (01,03,02)
(pks/sec)
Total (pks/sec)
64
100.00
1488095
1488095
7-119
7 Data Boards
Frame Size
(Byte)
(01,03,01) to (01,03,02)
(pks/sec)
Total (pks/sec)
128
100.00
844595
844595
256
100.00
452899
452899
512
100.00
234962
234962
1024
100.00
119732
119732
1280
100.00
96154
96154
1518
100.00
81274
81274
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The permitted packet loss ratio is set to 0% and the resolution rate is set to 0.1%.
Number of pairs: 1
Mode: unidirectional
Table 7-74 Packet loss ratio in the case of overloading of the EMS4 (one VC-4 is bound on the
FE port)
7-120
Frame Size
(Byte)
(01,01,03) to (01,01,06)
(%)
Average (%)
64
100.00
0.000
0.000
128
100.00
0.000
0.000
256
100.00
0.000
0.000
512
100.00
0.000
0.000
1024
100.00
0.000
0.000
1518
100.00
0.000
0.000
Issue 02 (2009-07-30)
7 Data Boards
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The tested traffic starts from the throughput and increases to 100% in 10% steps.
Number of pairs: 1
Mode: unidirectional
Table 7-75 Packet loss ratio in the case of overloading of the EMS4 (24 VC-3s are bound on
the GE port)
Issue 02 (2009-07-30)
Frame Size
(Byte)
(01,03,01) to (01,03,02)
(%)
Average (%)
64
100.00
0.000
0.000
128
100.00
0.000
0.000
256
100.00
0.000
0.000
512
100.00
0.000
0.000
1024
100.00
0.000
0.000
1280
100.00
0.000
0.000
1518
100.00
0.000
0.000
7-121
7 Data Boards
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The tested traffic starts from the throughput and increases to 100% in 10% steps.
Number of pairs: 1
Mode: unidirectional
Table 7-76 Latency specifications of the EMS4 (one VC-4 is bound on the FE port)
7-122
Frame
Size
(Byte)
Rate
Tested
(%)
(01,01,03) to
(01,01,06) (us)CT (us)
Average
(CT) (us)
(01,01,03) to
(01,01,06)
(us)-S&F (us)
Average
(S&F) (us)
64
100.00
110.6
110.6
105.5
105.5
128
100.00
123.8
123.8
113.6
113.6
256
100.00
149.2
149.2
128.8
128.8
512
100.00
195.5
195.5
154.6
154.6
1024
100.00
285.6
285.6
203.7
203.7
1518
100.00
373.1
373.1
251.7
251.7
Issue 02 (2009-07-30)
7 Data Boards
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The latency modes are classified into two modes, namely, cut through mode and store forward mode.
In cut through mode, the analyzer calculates the difference between the time when the first bit of the
transmitted frame reaches the output port and the time when the first bit of the transmitted frame reaches
the input port. In store forward mode, the analyzer calculates the difference between the time when the
first bit of the transmitted frame reaches the output port and the time when the last bit of the transmitted
frame reaches the input port. In the preceding table, the CT values are obtained in cut through mode
and the S&F values are obtained in store forward mode.
Number of pairs: 1
Mode: unidirectional
Table 7-77 Latency specifications of the EMS4 (24 VC-3s are bound on the GE port)
Issue 02 (2009-07-30)
Frame
Size
(Byte)
Rate
Tested
(%)
(01,03,01) to
(01,03,02) (us)CT (us)
Average
(CT) (us)
(01,03,01) to
(01,03,02)
(us)-S&F (us)
Average
(S&F) (us)
64
100.00
80.9
80.9
80.4
80.4
128
100.00
83.0
83.0
82.0
82.0
256
100.00
86.9
86.9
84.9
84.9
512
100.00
94.9
94.9
90.9
90.9
1024
100.00
108.8
108.8
100.7
100.7
1280
100.00
115.2
115.2
105.0
105.0
1518
100.00
120.7
120.7
108.6
108.6
7-123
7 Data Boards
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The latency modes are classified into two modes, namely, cut through mode and store forward mode.
In cut through mode, the analyzer calculates the difference between the time when the first bit of the
transmitted frame reaches the output port and the time when the first bit of the transmitted frame reaches
the input port. In store forward mode, the analyzer calculates the difference between the time when the
first bit of the transmitted frame reaches the output port and the time when the last bit of the transmitted
frame reaches the input port. In the preceding table, the CT values are obtained in cut through mode
and the S&F values are obtained in store forward mode.
Number of pairs: 1
Mode: unidirectional
Table 7-78 Back-to-back specifications of the EMS4 (one VC-4 is bound on the FE port)
7-124
Frame Size
(Byte)
(01,01,03) to (01,01,06)
Burst Size (Number of
Frames)
Total (Number of
Frames)
64
100.00
1488100
1488100
128
100.00
844590
844590
256
100.00
452900
452900
512
100.00
234960
234960
1024
100.00
119730
119730
1518
100.00
81270
81270
Issue 02 (2009-07-30)
7 Data Boards
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The frame size is set to the range from 64 bytes to 1518 bytes, the packet transmission rate is set to
100%, the test duration is set to 2 seconds, and the number of repetitions is set to a value more than 50
on the Smart Application.
Number of pairs: 1
Mode: unidirectional
Table 7-79 Back-to-back specifications of the EMS4 (24 VC-3s are bound on the GE port)
Issue 02 (2009-07-30)
Frame Size
(Byte)
(01,03,01) to (01,03,02)
Burst Size (Number of
Frames)
Total (Number of
Frames)
64
100.00
2976190
2976190
128
100.00
1689190
1689190
256
100.00
905798
905798
512
100.00
469924
469924
1024
100.00
239464
239464
1280
100.00
192308
192308
1518
100.00
162548
162548
7-125
7 Data Boards
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The frame size is set to the range from 64 bytes to 1518 bytes, the packet transmission rate is set to
100%, the test duration is set to 2 seconds, and the number of repetitions is set to a value more than 50
on the Smart Application.
Number of pairs: 1
Mode: unidirectional
Mechanical Specifications
The mechanical specifications of the EMS4 are as follows:
l
Power Consumption
The maximum power consumption of the EMS4 at room temperature (25C) is 65 W.
7.10 EGS4
This topic describes the version, functions, working principle, valid slots, and technical
specification of the EGS4 (4xGE switching and processing board).
7.10.1 Version Description
The EGS4 is available in three functional versions, namely, N1, N3 and N4. The N1EGS4 is no
longer manufactured.
7.10.2 Functions and Features
The EGS4 supports the Layer 2 switching, link aggregation, and multicast functions.
7.10.3 Working Principle and Signal Flow
The EGS4 consists of the Ethernet access module, network processor module, mapping module,
interface converting module, logic and control module, clock module, and power module.
7.10.4 Front Panel
The front panel of the EGS4 has indicators, interfaces, a bar code, and a laser safety class label.
7.10.5 Valid Slots
The EGS4 can be installed in slot 28 and 1116 in the subrack.
7-126
Issue 02 (2009-07-30)
7 Data Boards
Description
Functional versions
Differences
Substitution
VC-12 binding: VC-4s are divided into two areas, namely, VC-4-1
to VC-4-4 and VC-4-9 to VC-4-12. The VC-12s in these two areas
cannot be bound at one time.
Issue 02 (2009-07-30)
7-127
7 Data Boards
EGS4
Basic functions
Specifications of the
optical interface
Supports the Jumbo frame with a length less than 9216 bytes.
Format of service
frames
7-128
Maximum uplink
bandwidth
2.5 Gbit/s
Mapping
granularities
Number of supported
VCTRUNKs
64
Encapsulation format
EPL services
EVPL services
Issue 02 (2009-07-30)
7 Data Boards
Function and
Feature
EGS4
EPLAN services
EVPLAN
VLAN
MTU
Supports the setting of the packet length, which ranges from 1518
bytes to 9216 bytes. After the setting becomes valid, the length of the
packets that enter or exit the IP ports is limited.
RSTP
Multicast function
ETH-OAM function
Test frames
Service mirroring
Link aggregation
function
VLAN convergence
Protection
CAR
Issue 02 (2009-07-30)
7-129
7 Data Boards
Function and
Feature
EGS4
Flow classification
LCAS function
LPT function
The N4EGS4 supports the P2P LPT and the P2MP LPT.
Inter-board link
aggregation
Flow control
function
Loopback function
Ethernet
performance
monitoring
Supports RMON of the Ethernet performance at the port level and the
VCTRUNK level.
Alarms and
performance events
7-130
Issue 02 (2009-07-30)
7 Data Boards
Laser
shutdown
Cross-connect unit
Interface
converting
module
VCP
DENCP
GE Ethernet
access
module
ENCP
Cross-connect unit
Mapping module
LOS
Communication
Logic and
control module
+3.3 V
Clock module
50
77
MHz MHz
Power
module
Power
module
Fuse
SCC unit
SCC unit
-48 V/-60 V
-48 V/-60 V
125 155
MHz MHz
Issue 02 (2009-07-30)
7-131
7 Data Boards
l
WFQ
Three CoSs
Mapping Module
The mapping module performs encapsulation and mapping functions.
In the upstream direction, this module first encapsulates Ethernet signals in LAPS, GFP-F, or
HDLC format. The concatenation is processed. The LCAS function is supported. Then, the
Ethernet signals are converted into SDH signals.
In the downstream direction, SDH signals are demapped. The delay of virtual concatenation is
compensated. After aligning, packets are decapsulated according to the encapsulation format.
The decapsulated data is finally transmitted to the network processor module in packets.
The control module also contains basic logic units. This module has the following functions:
l
Checks the in-service state of the cross-connect, SCC, and line boards.
Implements communication.
Controls indicators.
Clock Module
The clock module traces the system reference clock and generates the required working clock
for each chip. The frequency of the clock can be 50 MHz, 77 MHz, 125 MHz, or 155 MHz.
Power Module
It converts the 48 V/60 V power supply into the DC voltages that the modules of the board
require.
7-132
Issue 02 (2009-07-30)
7 Data Boards
EGS4
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
OUT3
IN3
OUT4
IN4
LINK ACT
1
2
3
4
EGS4
The N1EGS4/N4EGS4 can also be installed with the GE electrical interface. Figure 7-42 shows
the appearance of the front panel of the N1EGS4/N4EGS4 that is installed with the GE electrical
interface.
Issue 02 (2009-07-30)
7-133
7 Data Boards
Figure 7-42 front panel of the N1EGS4/N4EGS4 that is installed with the GE electrical interface
EGS4
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
OUT3
IN3
OUT4
IN4
LINK ACT
1
2
3
4
EGS4
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
7-134
Issue 02 (2009-07-30)
7 Data Boards
Interfaces
The front panel of the N1EGS4/N3EGS4/N4EGS4 has four GE optical interfaces. Table 7-82
describes the types and usage of the optical interfaces of the N1EGS4/N3EGS4/N4EGS4.
Table 7-82 Optical interfaces of the N1EGS4/N3EGS4/N4EGS4
Interface
Type of
Interface
Usage
OUT1/IN1
LC (swappable)
OUT2/IN2
LC (swappable)
OUT3/IN3
LC (swappable)
OUT4/IN4
LC (swappable)
The four GE electrical interfaces of the N1EGS4/N4EGS4 are of the same type and have the
same usage. Table 7-83 describes the types and usage of the electrical interfaces of the N1EGS4/
N4EGS4.
Table 7-83 Electrical interfaces of the N1EGS4/N4EGS4
Interface
Type of
Interface
Usage
GE
RJ-45
(swappable)
Table 7-84 provides the pin assignments of the RJ-45 interface of the N1EGS4/N4EGS4.
Table 7-84 Pin assignments of the RJ-45 interface of the N1EGS4/N4EGS4
Issue 02 (2009-07-30)
Pin
Description
BI_DA+
BI_DA
BI_DB+
BI_DC+
BI_DC
BI_DB
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
7-135
7 Data Boards
Pin
Description
BI_DD+
BI_DD
Feature Code
Type of Interface
SSN1EGS410,
SSN3EGS41O, and
SSN4EGS10
10
SSN1EGS411,
SSN3EGS411, and
SSN4EGS411
11
SSN1EGS412,
SSN3EGS412, and
SSN4EGS412
12
SSN1EGS413,
SSN3EGS413, and
SSN4EGS413
13
SSN1EGS414 and
SSN4EGS414
14
1000BASE-T (100 m)
Protection Principle
When the BPS protection is provided for the EGS4, the GE and FE ports are protected by using
the single-fed and selective-receiving scheme. The EGS4 may be connected to many sets of
communication equipment. Normally, the active board is working and services are transmitted
in two directions of the active link. On the backup link, the EGS4 disables the transmission of
7-136
Issue 02 (2009-07-30)
7 Data Boards
all ports. In this case, the ports of the opposite board are in the linkdown state. In addition, the
opposite board enables the transmission but does not transmit services. In this manner, the
receive ports of the backup EGS4 are not in the linkdown state. The solid lines in Figure 7-43
show how the EGS4 normally works.
Figure 7-43 Normal working of the EGS4
No.1
Active
EGS4
Active
communication
equipment
Standby
communication
equipment
No.2
No.3
Active
communication
equipment
XCS
B
Standby
communication
equipment
No.1
No.2
Standby
EGS4
No.3
Active
communication
equipment
Standby
communication
equipment
BPS Protection
When the BPS protection is provided, if the active board detects the linkdown state of any link
or any fault in the board, the cross-connect board switches all the services to the standby board.
In this manner, services are protected. The solid lines in Figure 7-44 show how the BPS
protection functions. The services numbered 1, 2 and 3 are all switched to the standby EGS4
and the corresponding communication equipment.
Issue 02 (2009-07-30)
7-137
7 Data Boards
No.1
Active
EGS4
Active
communication
equipment
Standby
communication
equipment
No.2
No.3
Active
communication
equipment
XCS
B
Standby
communication
equipment
No.1
No.2
Standby
EGS4
No.3
Active
communication
equipment
Standby
communication
equipment
PPS Protection
When the PPS protection is provided, if the active board detects the linkdown state of any link,
any fault in the board, or the offline state of any board, the cross-connect board switches all the
services to the standby board. In this manner, services are protected. The solid lines in Figure
7-45 show how the PPS protection functions. Only the service numbered 1 is switched to the
standby EGS4 and the standby communication equipment.
7-138
Issue 02 (2009-07-30)
7 Data Boards
No.1
Active
communication
equipment
Active
EGS4
Standby
communication
equipment
No.2
No.3
Active
communication
equipment
XCS
B
Standby
communication
equipment
No.1
No.2
Standby
EGS4
No.3
Active
communication
equipment
Standby
communication
equipment
The conditions that trigger the protection for the EGS4 are as follows:
l
Fault at the PHY layer of the MAC port, that is, linkdown state
Fault in key hardware units of the board, such as the power module, optical module, and
clock
WARNING
When the board-level protection is performed, the GE ports support the auto-negotiation and
1000M full-duplex mode.
Board Configuration
Two EGS4 boards should be configured to provide the board-level protection. One EGS4 is the
active board and the other is the standby board. When you configure the EGS4 board protection,
ensure that the access capacity of the slot that houses the standby board must not be less than
the access capacity of the slot that houses the active board.
Issue 02 (2009-07-30)
7-139
7 Data Boards
Working mode
LCAS
Mapping protocol
7-140
Parameter
Value
Type of optical
interface
1000BASE-ZX
(80 km)
1000BASE-SX
(0.5 km)
Type of fiber
Single-mode LC
Single-mode
LC
Single-mode
LC
Multi-mode LC
Launched optical
power range
(dBm)
-2 to +5
-5.0 to 0
-9.5 to -3
-9.5 to -2.5
Operating
wavelength range
(nm)
1500 to 1580
1275 to 1350
1270 to 1355
770 to 860
Minimum
overload (dBm)
-3
-3
-3
Receiver
sensitivity (dBm)
-23
-23
-20
-17
Minimum
extinction ratio
(dB)
Issue 02 (2009-07-30)
7 Data Boards
Tested
equipment 2
Port 2
Port 1
Port 2
Data network
performance
analyzer
Figure 7-47 shows the connection for testing the back-to-back specifications of the EGS4.
Figure 7-47 Connection for testing the back-to-back specifications
Tested
equipment 1
Port 1
Port 2
Data network
performance
analyzer
Table 7-87 and Table 7-88 list the throughput specifications of the EGS4. Table 7-89 and Table
7-90 list the packet loss ratio in the case of overloading of the EGS4. Table 7-91 and Table
7-92 list the latency specifications of the EGS4. Table 7-93 and Table 7-94 list the back-toback specifications of the EGS4.
Issue 02 (2009-07-30)
7-141
7 Data Boards
NOTE
The specifications vary according to the configuration and networking of the test environment and
the VC services bound on the VCG side. The specifications that are obtained in the actual environment
are used.
The specifications in the following tables are obtained in the following scenario: EPL services are
configured and one VC-4 is bound on the FE port, or EPL services are configured and 24 VC-3s are
bound on the GE port.
The specifications of a board of a specific version are not provided because the board version has
negligible effect on the specifications.
The specifications in the following tables are obtained by using the Smart Application.
Table 7-87 Throughput specifications of the EGS4 (one VC-4 is bound on the FE port)
Frame Size
(Byte)
(01,01,03) to (01,01,06)
(pks/sec)
Total (pks/sec)
64
100.00
148810
148810
128
100.00
84459
84459
256
100.00
45290
45290
512
100.00
23496
23496
1024
100.00
11973
11973
1280
100.00
9615
9615
1518
100.00
8127
8127
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The permitted packet loss ratio is set to 0% and the resolution rate is set to 0.1%.
Number of pairs: 1
Mode: unidirectional
Table 7-88 Throughput specifications of the EGS4 (24 VC-3s are bound on the GE port)
7-142
Frame Size
(Byte)
(01,03,01) to (01,03,02)
(pks/sec)
Total (pks/sec)
64
100.00
1488095
1488095
Issue 02 (2009-07-30)
7 Data Boards
Frame Size
(Byte)
(01,03,01) to (01,03,02)
(pks/sec)
Total (pks/sec)
128
100.00
844595
844595
256
100.00
452899
452899
512
100.00
234962
234962
1024
100.00
119732
119732
1280
100.00
96154
96154
1518
100.00
81274
81274
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The permitted packet loss ratio is set to 0% and the resolution rate is set to 0.1%.
Number of pairs: 1
Mode: unidirectional
Table 7-89 Packet loss ratio in the case of overloading of the EGS4 (one VC-4 is bound on the
FE port)
Issue 02 (2009-07-30)
Frame Size
(Byte)
(01,01,03) to (01,01,06)
(%)
Average (%)
64
100.00
0.000
0.000
128
100.00
0.000
0.000
256
100.00
0.000
0.000
512
100.00
0.000
0.000
1024
100.00
0.000
0.000
1518
100.00
0.000
0.000
7-143
7 Data Boards
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The tested traffic starts from the throughput and increases to 100% in 10% steps.
Number of pairs: 1
Mode: unidirectional
Table 7-90 Packet loss ratio in the case of overloading of the EGS4 (24 VC-3s are bound on the
GE port)
7-144
Frame Size
(Byte)
(01,03,01) to (01,03,02)
(%)
Average (%)
64
100.00
0.000
0.000
128
100.00
0.000
0.000
256
100.00
0.000
0.000
512
100.00
0.000
0.000
1024
100.00
0.000
0.000
1280
100.00
0.000
0.000
1518
100.00
0.000
0.000
Issue 02 (2009-07-30)
7 Data Boards
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The tested traffic starts from the throughput and increases to 100% in 10% steps.
Number of pairs: 1
Mode: unidirectional
Table 7-91 Latency specifications of the EGS4 (one VC-4 is bound on the FE port)
Issue 02 (2009-07-30)
Frame
Size
(Byte)
Rate
Tested
(%)
(01,01,03) to
(01,01,06) (us)CT (us)
Average
(CT) (us)
(01,01,03) to
(01,01,06)
(us)-S&F (us)
Average
(S&F) (us)
64
100.00
110.6
110.6
105.5
105.5
128
100.00
123.8
123.8
113.6
113.6
256
100.00
149.2
149.2
128.8
128.8
512
100.00
195.5
195.5
154.6
154.6
1024
100.00
285.6
285.6
203.7
203.7
1518
100.00
373.1
373.1
251.7
251.7
7-145
7 Data Boards
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The latency modes are classified into two modes, namely, cut through mode and store forward mode.
In cut through mode, the analyzer calculates the difference between the time when the first bit of the
transmitted frame reaches the output port and the time when the first bit of the transmitted frame reaches
the input port. In store forward mode, the analyzer calculates the difference between the time when the
first bit of the transmitted frame reaches the output port and the time when the last bit of the transmitted
frame reaches the input port. In the preceding table, the CT values are obtained in cut through mode
and the S&F values are obtained in store forward mode.
Number of pairs: 1
Mode: unidirectional
Table 7-92 Latency specifications of the EGS4 (24 VC-3s are bound on the GE port)
7-146
Frame
Size
(Byte)
Rate
Tested
(%)
(01,03,01) to
(01,03,02) (us)CT (us)
Average
(CT) (us)
(01,03,01) to
(01,03,02)
(us)-S&F (us)
Average
(S&F) (us)
64
100.00
80.9
80.9
80.4
80.4
128
100.00
83.0
83.0
82.0
82.0
256
100.00
86.9
86.9
84.9
84.9
512
100.00
94.9
94.9
90.9
90.9
1024
100.00
108.8
108.8
100.7
100.7
1280
100.00
115.2
115.2
105.0
105.0
1518
100.00
120.7
120.7
108.6
108.6
Issue 02 (2009-07-30)
7 Data Boards
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The latency modes are classified into two modes, namely, cut through mode and store forward mode.
In cut through mode, the analyzer calculates the difference between the time when the first bit of the
transmitted frame reaches the output port and the time when the first bit of the transmitted frame reaches
the input port. In store forward mode, the analyzer calculates the difference between the time when the
first bit of the transmitted frame reaches the output port and the time when the last bit of the transmitted
frame reaches the input port. In the preceding table, the CT values are obtained in cut through mode
and the S&F values are obtained in store forward mode.
Number of pairs: 1
Mode: unidirectional
Table 7-93 Back-to-back specifications of the EGS4 (one VC-4 is bound on the FE port)
Issue 02 (2009-07-30)
Frame Size
(Byte)
(01,01,03) to (01,01,06)
Burst Size (Number of
Frames)
Total (Number of
Frames)
64
100.00
1488100
1488100
128
100.00
844590
844590
256
100.00
452900
452900
512
100.00
234960
234960
1024
100.00
119730
119730
1518
100.00
81270
81270
7-147
7 Data Boards
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The frame size is set to the range from 64 bytes to 1518 bytes, the packet transmission rate is set to
100%, the test duration is set to 2 seconds, and the number of repetitions is set to a value more than 50
on the Smart Application.
Number of pairs: 1
Mode: unidirectional
Table 7-94 Back-to-back specifications of the EGS4 (24 VC-3s are bound on the GE port)
7-148
Frame Size
(Byte)
(01,03,01) to (01,03,02)
Burst Size (Number of
Frames)
Total (Number of
Frames)
64
100.00
2976190
2976190
128
100.00
1689190
1689190
256
100.00
905798
905798
512
100.00
469924
469924
1024
100.00
239464
239464
1280
100.00
192308
192308
1518
100.00
162548
162548
Issue 02 (2009-07-30)
7 Data Boards
NOTE
The specifications in the preceding table are obtained in the scenario wherein point-to-point transparent
transmission services are configured and the flow control function is disabled.
The frame size is set to the range from 64 bytes to 1518 bytes, the packet transmission rate is set to
100%, the test duration is set to 2 seconds, and the number of repetitions is set to a value more than 50
on the Smart Application.
Number of pairs: 1
Mode: unidirectional
Mechanical Specifications
The mechanical specifications of the EGS4 are as follows:
l
Power Consumption
The maximum power consumption of the N1EGS4 and N3EGS4 at room temperature (25C) is
70 W.
The maximum power consumption of the N4EGS4 at room temperature (25C) is 34 W.
7.11 EGR2
This topic describes the version, functions, working principle, valid slots, and technical
specification of the EGR2 (2xGE ring processing board).
7.11.1 Version Description
The EGR2 is available in one functional version, namely, N2.
7.11.2 Functions and Features
The EGR2 supports the Layer 2 switching, port aggregation, and RPR functions.
7.11.3 Working Principle and Signal Flow
The EGR2 consists of the Ethernet access module, network processor module, RPR protocol
processing module, mapping module, interface converting module, logic and control module,
clock module, and power module.
7.11.4 Front Panel
Issue 02 (2009-07-30)
7-149
7 Data Boards
The front panel of the EGR2 has indicators, interfaces, a bar code, and a laser safety class label.
7.11.5 Valid Slots
The EGR2 can be installed in slots 28 and 1116 in the subrack.
7.11.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the EGR2 indicates the type of optical interface.
7.11.7 Parameter Settings
You can set the parameters for the EGR2 by using the T2000.
7.11.8 Technical Specifications
The technical specifications of the EGR2 include the parameters specified for optical interfaces,
laser safety class, Ethernet performance specifications, mechanical specifications, and power
consumption.
EGR2
Basic functions
Specifications of the
optical interface
Format of service
frames
7-150
The optical interfaces use the SFP optical module and support hot
swapping.
The optical modules that can meet different requirements for the
transmission distance such as 40 km and 80 km can also be used.
Supports Ethernet II, IEEE 802.3, and IEEE 802.1q TAG formats.
Supports the Jumbo frame with a length less than 9600 bytes.
Issue 02 (2009-07-30)
Function and
Feature
EGR2
Maximum uplink
bandwidth
2.5 Gbit/s
The EGR2 can adapt to the bandwidth of the slot.
Mapping
granularities
Encapsulation
format
EVPL services
Supports the creation, deletion, and query of the VB. The maximum
number of supported VBs is 16. The maximum number of logical
ports for each VB is 32.
EVPLAN services
Issue 02 (2009-07-30)
7 Data Boards
MTU
Supports the setting of the packet length, which ranges from 1518
bytes to 9600 bytes. After the setting becomes valid, the length of the
packets that enter or exit the IP ports is limited.
MPLS
Supports MartinioE.
Stack VLAN
VLAN
Supports 4096 VLAN tags, and the addition, deletion, and exchanging
of VLAN tags in compliance with IEEE 802.1q.
VLAN convergence
VLAN tag
exchanging
Port aggregation
7-151
7 Data Boards
Function and
Feature
EGR2
RPR
Supports the self-learning of routes on the ring, that is, supports the
learning of mapping relationship between MAC addresses and
node numbers.
RSTP
Multicast function
CAR
7-152
Flow classification
LCAS function
Flow control
function
Supports the echo function specified in the RPR OAM function, which
is used to test the connectivity of the link.
Loopback function
Supports inloops on Ethernet ports (at the PHY layer or MAC layer).
Ethernet
performance
monitoring
Alarms and
performance events
Weighted fairness
algorithm
Automatic discovery
of topologies
Issue 02 (2009-07-30)
7 Data Boards
Function and
Feature
EGR2
Maximum number of
supported nodes
255
Service priority
levels
RPR protocol
processing module
Cross-connect
unit
Communication
Logic and
control module
SCC unit
50 MHz
77 MHz
125 MHz Clock module
100 MHz
Crossconnect unit
Mapping module
Laser shutdown
LOS
Interface
converting
module
VCP
RPR
MAC
(west)
DENCP
RPR
MAC
(east)
ENCP
GE/FE Ethernet
access
module
Control
Network signal Switch
processor
fabric
Data
+3.3 V
Power
module
Power
module
Fuse
Cross-connect
unit
-48 V/-60 V
-48 V/-60 V
7-153
7 Data Boards
In the transmit direction, the parallel signals are converted into serial signals. At the PHY layer,
signals are encoded and converted from electrical signals to optical signals.
MPLS
L2 MPLS VPN
Ethernet/VLAN
In the receive direction, services are mapped and forwarded after the Tunnel and VC tags are
added according to the service configuration. In the transmit direction, the Tunnel or VC tag is
extracted based on the level (P or PE) of the equipment. Services are then routed or forwarded.
The network processor module supports the following functions:
l
WFQ
Four CoSs
Mapping Module
The mapping module performs encapsulation and mapping functions.
In the upstream direction, virtual concatenation services support the LCAS function. The
encapsulation formats are LAPS and GFP-F.
7-154
Issue 02 (2009-07-30)
7 Data Boards
In the downstream direction, SDH signals are demapped. The delay of virtual concatenation is
compensated. After aligning, packets are decapsulated according to the encapsulation format.
The decapsulated data is finally transmitted to the RPR protocol processing module in packets.
The control module also contains basic logic units. This module performs the following
functions:
l
Checks the in-service state of the cross-connect, SCC, and line boards.
Implements communication.
Controls indicators.
Clock Module
The clock module traces the system reference clock and generates the required working clock
for each chip. The frequency of the clock can be 50 MHz, 77 MHz, 125 MHz, or 100 MHz.
Power Module
It converts the 48 V/60 V power supply into the DC voltages that the modules of the board
require.
7-155
7 Data Boards
EGR2
STAT
ACT
PROG
SRV
LINK1
ACT1
LINK2
ACT2
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
EGR2
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
7-156
Issue 02 (2009-07-30)
7 Data Boards
Interfaces
The front panel of the EGR2 has two optical interfaces. Table 7-96 describes the types and usage
of the optical interfaces of the EGR2.
Table 7-96 Optical interfaces of the EGR2
Interface
Type of Interface
Usage
OUT1/IN1
LC (swappable)
OUT2/IN2
LC (swappable)
Feature Code
SSN2EGR210
10
SSN2EGR211
11
SSN2EGR212
12
SSN2EGR213
13
Working mode
LCAS
Mapping protocol
7-157
7 Data Boards
Value
Type of optical
interface
1000BASE-ZX
(80 km)
1000BASE-SX
(0.5 km)
Type of fiber
Single-mode LC
Single-mode
LC
Single-mode
LC
Multi-mode LC
Launched optical
power range
(dBm)
-2 to +5
-5.0 to 0
-9.5 to -3
-9.5 to -2.5
Operating
wavelength range
(nm)
1500 to 1580
1275 to 1350
1270 to 1355
770 to 860
Minimum
overload (dBm)
-3
-3
-3
Receiver
sensitivity (dBm)
-23
-23
-20
-17
Minimum
extinction ratio
(dB)
7-158
Issue 02 (2009-07-30)
7 Data Boards
Figure 7-50 Connection for testing the throughput specifications, packet loss ratio in the case
of overloading, latency specifications, and back-to-back specifications
Tested
equipment 1
Tested
equipment 2
Port 1
Port 2
Data network
performance
analyzer
Table 7-99 lists the throughput specifications of the EGR2. Table 7-100 lists the packet loss
ratio in the case of overloading of the EGR2. Table 7-101 lists the latency specifications of the
EGR2. Table 7-102 lists the back-to-back specifications of the EGR2.
NOTE
The specifications vary according to the configuration and networking of the test environment and
the VC services bound on the VCG side. The specifications that are obtained in the actual environment
are used.
The specifications in the following tables are obtained in the following scenario: EVPL bidirectional
unicast services are configured and eight VC-4s are bound on the GE port.
The specifications of a board of a specific version are not provided because the board version has
negligible effect on the specifications.
The specifications in the following tables are obtained by using the Smart Application.
Issue 02 (2009-07-30)
Frame Size
(Byte)
Passed Rate
(%)
(01,08,01) to
(01,08,02) (pks/
sec)
(01,08,02) to
(01,08,01) (pks/
sec)
Total (pks/
sec)
64
80.77
1201923
1201923
2403846
128
94.87
801282
801282
1602564
256
100.00
452899
452899
905798
512
100.00
234962
234962
469924
1024
100.00
119732
119732
239464
1280
100.00
196154
96154
192308
1518
100.00
81274
81274
162548
7-159
7 Data Boards
NOTE
Number of pairs: 1
Mode: bidirectional
Table 7-100 Packet loss ratio in the case of overloading of the EGR2
Frame Size
(Byte)
Rate Tested
(%)
(01,08,01) to
(01,08,02) (%)
(01,08,02) to
(01,08,01) (%)
Average (%)
64
100.00
16.719
16.720
16.719
128
100.00
4.315
4.328
4.321
256
100.00
0.000
0.000
0.000
512
100.00
0.000
0.000
0.000
1024
100.00
0.000
0.000
0.000
1280
100.00
0.000
0.000
0.000
1518
100.00
0.000
0.000
0.000
NOTE
7-160
Number of pairs: 1
Mode: bidirectional
Issue 02 (2009-07-30)
7 Data Boards
Rate
Tested
(%)
(01,08,01) to
(01,08,02) (us)CT (us)
Average
(CT) (us)
(01,08,01) to
(01,08,02)
(us)-S&F (us)
Average
(S&F) (us)
64
80.77
117.8
117.8
117.3
117.3
128
94.87
121.2
121.2
120.2
120.2
256
100.00
126.6
126.6
124.6
124.6
512
100.00
137.7
137.7
133.7
133.7
1024
100.00
159.9
159.9
151.8
151.8
1280
100.00
170.2
170.2
160.0
160.0
1518
100.00
182.9
182.9
170.8
170.8
NOTE
The latency modes are classified into two modes, namely, cut through mode and store forward mode.
In cut through mode, the analyzer calculates the difference between the time when the first bit of the
transmitted frame reaches the output port and the time when the first bit of the transmitted frame reaches
the input port. In store forward mode, the analyzer calculates the difference between the time when the
first bit of the transmitted frame reaches the output port and the time when the last bit of the transmitted
frame reaches the input port. In the preceding table, the CT values are obtained in cut through mode
and the S&F values are obtained in store forward mode.
Number of pairs: 1
Mode: bidirectional
Issue 02 (2009-07-30)
Frame Size
(Byte)
Rate Tested
(%)
(01,08,01) to
(01,08,02) Burst
Size (Number of
Frames)
(01,08,02) to
(01,08,01)
(Number of
Frames)
Total
(Number of
Frames)
64
100.00
298
300
598
128
100.00
650
650
1300
7-161
7 Data Boards
Frame Size
(Byte)
Rate Tested
(%)
(01,08,01) to
(01,08,02) Burst
Size (Number of
Frames)
(01,08,02) to
(01,08,01)
(Number of
Frames)
Total
(Number of
Frames)
256
100.00
905798
905798
1811596
512
100.00
469924
469924
939848
1024
100.00
239464
239464
478928
1280
100.00
192308
192308
384616
1518
100.00
162548
162548
325096
NOTE
Number of pairs: 1
Mode: bidirectional
Mechanical Specifications
The mechanical specifications of the EGR2 are as follows:
l
Power Consumption
The maximum power consumption of the EGR2 at room temperature (25C) is 40 W.
7.12 EMR0
This topic describes the version, functions, working principle, valid slots, and technical
specification of the EMR0 (12xFE and 1xGE ring processing board).
7.12.1 Version Description
The EMR0 is available in one functional versions, namely, N2.
7.12.2 Functions and Features
The EMR0 supports the Layer 2 switching, port aggregation, and RPR functions.
7.12.3 Working Principle and Signal Flow
7-162
Issue 02 (2009-07-30)
7 Data Boards
The EMR0 consists of the Ethernet access module, network processor module, RPR protocol
processing module, mapping module, interface converting module, logic and control module,
clock module, and power module.
7.12.4 Front Panel
The front panel of the EMR0 has indicators, interfaces, a bar code, and a laser safety class label.
7.12.5 Valid Slots
Without the interface board, the EMR0 can be installed in slots 28 and 1116 in the subrack.
With the interface board, the EMR0 can be installed in slots 37 and 1216 in the subrack. In
this case, the bandwidth is 2.5 Gbit/s.
7.12.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the EMR0 indicates the type of optical interface.
7.12.7 Parameter Settings
You can set the parameters for the EMR0 by using the T2000.
7.12.8 Technical Specifications
The technical specifications of the EMR0 include the parameters specified for optical interfaces,
laser safety class, Ethernet performance specifications, mechanical specifications, and power
consumption.
EMR0
Basic functions
Functions when
being used with the
interface board
Specifications of the
optical interface
Issue 02 (2009-07-30)
7-163
7 Data Boards
Function and
Feature
EMR0
Format of service
frames
Supports Ethernet II, IEEE 802.3, and IEEE 802.1q TAG formats.
Supports the Jumbo frame with a length less than 9600 bytes.
Maximum uplink
bandwidth
2.5 Gbit/s
The EMR0 can adapt to the bandwidth of the slot.
Mapping
granularities
Encapsulation format
EVPL services
EVPLAN services
7-164
MTU
Supports the setting of the packet length, which ranges from 1518
bytes to 9600 bytes. After the setting becomes valid, the length of the
packets that enter or exit the IP ports is limited.
MPLS
Supports MartinioE.
Stack VLAN
VLAN
VLAN convergence
VLAN tag
exchanging
Port aggregation
Issue 02 (2009-07-30)
7 Data Boards
Function and
Feature
EMR0
RPR
RSTP
Multicast function
CAR
Issue 02 (2009-07-30)
Flow classification
LCAS function
Loopback function
Supports inloops on Ethernet ports (at the PHY layer or MAC layer).
Ethernet
performance
monitoring
Alarms and
performance events
Weighted fairness
algorithm
Automatic discovery
of topologies
7-165
7 Data Boards
Function and
Feature
EMR0
RPR protocol
processing module
Cross-connect
unit
Communication
Logic and
control module
SCC unit
50 MHz
77 MHz
125 MHz Clock module
100 MHz
Crossconnect unit
Mapping module
Laser shutdown
LOS
Interface
converting
module
VCP
RPR
MAC
(west)
DENCP
RPR
MAC
(east)
ENCP
GE/FE Ethernet
access
module
Control
Network signal Switch
processor
fabric
Data
+3.3 V
Power
module
Power
module
Fuse
Cross-connect
unit
-48 V/-60 V
-48 V/-60 V
Issue 02 (2009-07-30)
7 Data Boards
In the transmit direction, the parallel signals are converted into serial signals. At the PHY layer,
signals are encoded and converted from electrical signals to optical signals.
MPLS
L2 MPLS VPN
Ethernet/VLAN
In the receive direction, services are mapped and forwarded after the Tunnel and VC tags are
added according to the service configuration. In the transmit direction, the Tunnel or VC tag is
extracted based on the level (P or PE) of the equipment. Services are then routed or forwarded.
The network processor module supports the following functions:
l
WFQ
Three CoSs
Mapping Module
The mapping module performs encapsulation and mapping functions.
In the upstream direction, virtual concatenation services support the LCAS function. The
encapsulation formats are LAPS and GFP-F.
Issue 02 (2009-07-30)
7-167
7 Data Boards
In the downstream direction, virtual concatenation services are received. The delay of virtual
concatenation is compensated. After aligning, packets are decapsulated according to the
encapsulation format. The decapsulated data is finally transmitted to the RPR protocol
processing module in packets.
The control module also contains basic logic units. This module performs the following
functions:
l
Checks the in-service state of the cross-connect, SCC, and line boards.
Implements communication.
Controls indicators.
Clock Module
The clock module traces the system reference clock and generates the required working clock
for each chip. The frequency of the clock can be 50 MHz, 77 MHz, 125 MHz, or 100 MHz.
Power Module
It converts the 48 V/60 V power supply into the DC voltages that the modules of the board
require.
Issue 02 (2009-07-30)
7 Data Boards
EMR0
STAT
ACT
PROG
SRV
LINK
ACT
CLASS 1
LASER
PRODUCT
OUT1
IN1
FE1
FE2
FE3
FE4
EMR0
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Issue 02 (2009-07-30)
7-169
7 Data Boards
Interfaces
The front panel of the EMR0 has five interfaces. Table 7-104 describes the types and usage of
the interfaces of EMR0.
Table 7-104 Interfaces of the EMR0
Interface
Type of
Interface
Usage
OUT1/IN1
LC (swappable)
FE1
RJ-45
FE2
RJ-45
FE3
RJ-45
FE4
RJ-45
7-170
Slot 2
Slot 3
Slot 21
Slot 4
Slot 23
Slot 5
Slot 25
Slot 6
Slot 27
Slot 7
Slot 29
lot 8
Issue 02 (2009-07-30)
7 Data Boards
Slot 11
Slot 12
Slot 32
Slot 13
Slot 34
Slot 14
Slot 36
Slot 15
Slot 38
Slot 16
Slot 40
Feature Code
SSN2EMR010
10
SSN2EMR011
11
SSN2EMR012
12
SSN2EMR013
13
Working mode
LCAS
Mapping protocol
Issue 02 (2009-07-30)
7-171
7 Data Boards
Value
Type of optical
interface
1000BASE-ZX
(80 km)
1000BASE-EX
(40 km)
1000BASE-SX
(0.55 km)
Type of fiber
Single-mode
LC
Single-mode LC
Single-mode
LC
Multi-mode LC
Launched optical
power range
(dBm)
-2 to +5
-5.0 to 0
-9.5 to -3
-9.5 to -2.5
Operating
wavelength
range (nm)
1500 to 1580
1275 to 1350
1270 to 1355
770 to 860
Minimum
overload (dBm)
-3
-3
-3
Receiver
sensitivity (dBm)
-23
-23
-20
-17
Minimum
extinction ratio
(dB)
7-172
Issue 02 (2009-07-30)
7 Data Boards
Figure 7-53 Connection for testing the throughput specifications, packet loss ratio in the case
of overloading, latency specifications, and back-to-back specifications
Tested
equipment 1
Tested
equipment 2
Port 1
Port 2
Data network
performance
analyzer
Table 7-108 and Table 7-109 list the throughput specifications of the EMR0. Table 7-110 and
Table 7-111 list the packet loss ratio in the case of overloading of the EMR0. Table 7-112 and
Table 7-113 list the latency specifications of the EMR0. Table 7-114 and Table 7-115 list the
back-to-back specifications of the EMR0.
NOTE
The specifications vary according to the configuration and networking of the test environment and
the VC services bound on the VCG side. The specifications that are obtained in the actual environment
are used.
The specifications in the following tables are obtained in the following scenario: EVPL bidirectional
unicast services are configured and eight VC-4s are bound on the FE port, or EVPL bidirectional
unicast services are configured and eight VC-4s are bound on the GE port.
The specifications of a board of a specific version are not provided because the board version has
negligible effect on the specifications.
The specifications in the following tables are obtained by using the Smart Application.
Table 7-108 Throughput specifications of the EMR0 (eight VC-4s are bound on the FE port)
Issue 02 (2009-07-30)
Frame Size
(Byte)
Passed Rate
(%)
(01,06,05) to
(01,06,06) (pks/
sec)
(01,06,06) to
(01,06,05) (pks/
sec)
Total (pks/
sec)
64
100.00
148810
148810
297620
128
100.00
84459
84459
168918
256
100.00
45290
45290
90580
512
100.00
23496
23496
46992
1024
100.00
11973
11973
23946
1280
100.00
9615
9615
19230
1518
100.00
8127
8127
16254
7-173
7 Data Boards
NOTE
Number of pairs: 1
Mode: bidirectional
Table 7-109 Throughput specifications of the EMR0 (eight VC-4s are bound on the GE port)
Frame Size
(Byte)
Passed Rate
(%)
(01,01,01) to
(01,04,01) (pks/
sec)
(01,04,01) to
(01,01,01) (pks/
sec)
Total (pks/
sec)
64
72.41
1077586
1077586
2155172
128
94.87
801282
801282
1602564
256
100.00
452899
452899
905798
512
100.00
234962
234962
469924
1024
100.00
119732
119732
239464
1280
100.00
96154
96154
192308
1518
100.00
81274
81274
162548
NOTE
7-174
Number of pairs: 1
Mode: bidirectional
Issue 02 (2009-07-30)
7 Data Boards
Table 7-110 Packet loss ratio in the case of overloading of the EMR0 (eight VC-4s are bound
on the FE port)
Frame Size
(Byte)
Rate Tested
(%)
(01,06,05) to
(01,06,06) (%)
(01,06,06) to
(01,06,05) (%)
Average (%)
64
100.00
0.000
0.000
0.000
128
100.00
0.000
0.000
0.000
256
100.00
0.000
0.000
0.000
512
100.00
0.000
0.000
0.000
1024
100.00
0.000
0.000
0.000
1280
100.00
0.000
0.000
0.000
1518
100.00
0.000
0.000
0.000
NOTE
Number of pairs: 1
Mode: bidirectional
Table 7-111 Packet loss ratio in the case of overloading of the EMR0 (eight VC-4s are bound
on the GE port)
Issue 02 (2009-07-30)
Frame Size
(Byte)
Rate Tested
(%)
(01,01,01) to
(01,04,01) (%)
(01,04,01) to
(01,01,01) (%)
Average (%)
64
100.00
29.833
29.827
29.830
128
100.00
4.306
4.309
4.307
256
100.00
0.000
0.000
0.000
512
100.00
0.000
0.000
0.000
1024
100.00
0.000
0.000
0.000
1280
100.00
0.000
0.000
0.000
1518
100.00
0.000
0.000
0.000
7-175
7 Data Boards
NOTE
Number of pairs: 1
Mode: bidirectional
Table 7-112 Latency specifications of the EMR0 (eight VC-4s are bound on the FE port)
7-176
Frame
Size
(Byte)
Rate
Tested
(%)
(01,06,05) to
(01,06,06) (us)CT (us)
Average
(CT) (us)
(01,06,05) to
(01,06,06)
(us)-S&F (us)
Average
(S&F) (us)
64
100.00
126.1
126.1
121.0
121.0
128
100.00
131.0
131.0
120.8
120.8
256
100.00
149.2
149.2
128.8
128.8
512
100.00
176.9
176.9
136.0
136.0
1024
100.00
237.0
237.0
155.1
155.1
1280
100.00
266.7
266.7
164.3
164.3
1518
100.00
289.3
289.3
167.9
167.9
Issue 02 (2009-07-30)
7 Data Boards
NOTE
The latency modes are classified into two modes, namely, cut through mode and store forward mode.
In cut through mode, the analyzer calculates the difference between the time when the first bit of the
transmitted frame reaches the output port and the time when the first bit of the transmitted frame reaches
the input port. In store forward mode, the analyzer calculates the difference between the time when the
first bit of the transmitted frame reaches the output port and the time when the last bit of the transmitted
frame reaches the input port. In the preceding table, the CT values are obtained in cut through mode
and the S&F values are obtained in store forward mode.
Number of pairs: 1
Mode: bidirectional
Table 7-113 Latency specifications of the EMR0 (eight VC-4s are bound on the GE port)
Issue 02 (2009-07-30)
Frame
Size
(Byte)
Rate
Tested
(%)
(01,01,01) to
(01,04,01) (us)CT (us)
Average
(CT) (us)
(01,01,01) to
(01,04,01)
(us)-S&F (us)
Average
(S&F) (us)
64
72.41
130.1
130.1
129.6
129.6
128
94.87
143.1
143.1
142.1
142.1
256
100.00
123.4
123.4
121.4
121.4
512
100.00
130.7
130.7
126.7
126.7
1024
100.00
154.4
154.4
146.3
146.3
1280
100.00
164.6
164.6
154.4
154.4
1518
100.00
174.4
174.4
162.3
162.3
7-177
7 Data Boards
NOTE
The latency modes are classified into two modes, namely, cut through mode and store forward mode.
In cut through mode, the analyzer calculates the difference between the time when the first bit of the
transmitted frame reaches the output port and the time when the first bit of the transmitted frame reaches
the input port. In store forward mode, the analyzer calculates the difference between the time when the
first bit of the transmitted frame reaches the output port and the time when the last bit of the transmitted
frame reaches the input port. In the preceding table, the CT values are obtained in cut through mode
and the S&F values are obtained in store forward mode.
Number of pairs: 1
Mode: bidirectional
Table 7-114 Back-to-back specifications of the EMR0 (eight VC-4s are bound on the FE port)
7-178
Frame Size
(Byte)
Rate Tested
(%)
(01,06,05) to
(01,06,06) Burst
Size (Number of
Frames)
(01,06,06) to
(01,06,05)
(Number of
Frames)
Total
(Number of
Frames)
64
100.00
297620
297620
595240
128
100.00
168918
168918
337836
256
100.00
90580
90580
181160
512
100.00
46992
46992
93984
1024
100.00
23946
23946
47892
1280
100.00
19230
19230
38460
1518
100.00
16254
16254
32508
Issue 02 (2009-07-30)
7 Data Boards
NOTE
Number of pairs: 1
Mode: bidirectional
Table 7-115 Back-to-back specifications of the EMR0 (eight VC-4s are bound on the GE port)
Frame Size
(Byte)
Rate Tested
(%)
(01,01,01) to
(01,04,01) Burst
Size (Number of
Frames)
(01,04,01) to
(01,01,01)
(Number of
Frames)
Total
(Number of
Frames)
64
100.00
3410
3410
6820
128
100.00
29054
29054
58108
256
100.00
905798
905798
1811596
512
100.00
469924
469924
939848
1024
100.00
239464
239464
478928
1280
100.00
192308
192308
384616
1518
100.00
162548
162548
325096
NOTE
Number of pairs: 1
Mode: bidirectional
Mechanical Specifications
The mechanical specifications of the EMR0 are as follows:
Issue 02 (2009-07-30)
7-179
7 Data Boards
l
Power Consumption
The maximum power consumption of the EMR0 at room temperature (25C) is 50 W.
7.13 EAS2
This topic describes the version, functions, working principle, valid slots, and technical
specification of the EAS2 (2-port 10xGE Layer 2 switching and processing board).
7.13.1 Version Description
The EAS2 is available in one functional version, namely, N1.
7.13.2 Functions and Features
The EAS2 supports the access of 10 GE Ethernet services, LCAS, and test frame functions.
7.13.3 Working Principle and Signal Flow
The EAS2 consists of the interface processing module, mapping module, interface converting
module, logic and control module, clock module, and power module.
7.13.4 Front Panel
The front panel of the EAS2 has indicators, interfaces, a bar code, and a laser safety class label.
7.13.5 Valid Slots
The valid slots for the EAS2 board vary with the cross-connect capacity of the subrack.
7.13.6 Parameter Settings
You can set the parameters for the EAS2 by using the T2000.
7.13.7 Technical Specifications
The technical specifications of the EAS2 include the parameters specified for optical interfaces,
dimensions, weight, and power consumption.
EAS2
Basic functions
Specifications of the The optical interfaces are 10GBASE-LR and 10GBASE-LW Ethernet
optical interface
optical interfaces, which comply with IEEE 802.3ae.
7-180
Issue 02 (2009-07-30)
7 Data Boards
Function and
Feature
EAS2
Format of service
frames
Supports the Jumbo frame with a length less than 9600 bytes.
Maximum uplink
bandwidth
10 Gbit/s
The EAS2 can adapt to the bandwidth of the slot.
Number of
supported
VCTRUNKs
24
Encapsulation
format
Mapping
granularities
EPL services
EVPL services
Supports the creation, deletion, and query of the VB. The maximum
number of supported VBs is 1.
Supports the setting and query of the aging time of the MAC address
EPLAN services
EVPLAN services
MTU
Supports the setting of the packet length, which ranges from 1518
bytes to 9600 bytes. After the setting becomes valid, the length of the
packets that enter or exit the IP ports is limited.
MPLS
VLAN
LPT function
CAR
Flow control
function
Issue 02 (2009-07-30)
Supports the port-based flow control function that complies with IEEE
802.3x.
7-181
7 Data Boards
Function and
Feature
EAS2
LCAS function
Multicast function
RSTP
ETH-OAM function
Supports CC for the multicast service, LB test for the unicast service,
and LT test. The ETH-OAM function complies with IEEE 802.1ag.
Link aggregation
Inter-board link
aggregation
Test frames
Ethernet
performance
monitoring
(RMON)
Alarms and
performance events
7-182
Issue 02 (2009-07-30)
7 Data Boards
10GE
Interface
processing
module
Laser
shutdown
Service
processing
module
Interface
converting
module
Encapsulation
module
Digital encapsulation module
Mapping module
Virtual
concatenation
processing
module
Cross-connect unit
Cross-connect unit
LOS
Logic and
control module
Communication
Clock reference and frame delimitation
+3.3 V
Clock module
Power
module
Power
module
Fuse
SCC unit
SCC unit
-48 V/-60 V
-48 V/-60 V
Clock Module
The clock module traces the system reference clock, and generates the required clock signals
when the board is working.
Power Module
It converts the 48 V/60 V power supply into the DC voltages that the modules of the board
require.
Issue 02 (2009-07-30)
7-183
7 Data Boards
EAS2
STAT
ACT
PROG
SRV
LINK1
ACT1
LINK2
ACT2
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
EAS2
Indicators
The front panel of the board has the following indicators:
7-184
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
Issue 02 (2009-07-30)
7 Data Boards
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the EAS2 has two 10 GE interfaces. Table 7-117 describes the types and
usage of the interfaces of the EAS2.
Table 7-117 Interfaces of the EAS2
Interface
Type of Interface
Usage
IN1IN2
LC
Receives 10 GE signals.
OUT1OUT2
LC
Transmits 10 GE signals.
When the cross-connect capacity is 110 Gbit/s, the EAS2 can be installed in slots 7, 8, 11,
and 12 in the subrack. In this case, the bandwidth is 10 Gbit/s.
Working mode
LCAS
Mapping protocol
7-185
7 Data Boards
Table 7-118 Parameters specified for the optical interfaces of the EAS2
Parameter
Value
Transmission rate
Processing capability
2x10GE signals
10GBASE-LR/LX
Type of fiber
Single-mode LC
Operating wavelength
range (nm)
1290 to 1330
10
-1
-6
-11
Connector type
LC
Tested
equipment 2
Port 1
Port 2
Data network
performance
analyzer
7-186
Issue 02 (2009-07-30)
7 Data Boards
Table 7-119 lists the throughput specifications of the EAS2. Table 7-120 lists the packet loss
ratio in the case of overloading of the EAS2. Table 7-121 lists the latency specifications of the
EAS2.
NOTE
The specifications vary according to the configuration and networking of the test environment and
the VC services bound on the VCG side. The specifications that are obtained in the actual environment
are used.
The specifications in the following tables are obtained in the following scenario: EPL services are
configured and 64 VC-4s are bound on the 10xGE port.
The specifications of a board of a specific version are not provided because the board version has
negligible effect on the specifications.
The specifications in the following tables are obtained by using the Smart Flow software.
Passed Rate
(%)
Number of Tx
Frames (pks/sec)
Number of Rx
Frames (pks/sec)
Total (%)
64
100.00000
148809440
148613326
99.29688
128
100.00000
84459360
84457314
99.29688
256
99.29687
44974080
44719807
98.59375
512
97.89062
23001600
22892340
97.1875
1024
96.48437
11552000
11552000
96.48438
1280
96.48437
9277280
9277280
96.48438
1518
96.48437
7841440
7831693
95.78125
Table 7-120 Packet loss ratio in the case of overloading of the EAS2
Issue 02 (2009-07-30)
Frame Size
(Byte)
Rate Tested
(%)
Number of Tx
Frames (pks/sec)
Number of Rx
Frames (pks/sec)
Total (%)
64
100.00000
148809440
148614523
0.13
128
100.00000
84459360
84457396
0.00
256
100.00000
45289760
44709723
1.28
512
100.00000
23496160
22868728
2.67
1024
100.00000
11973120
11566750
3.39
1280
100.00000
9615360
9274900
3.54
1518
100.00000
8127360
7832064
3.63
7-187
7 Data Boards
Rate
Tested
(%)
Number
of Tx
Frames
(pks/sec)
Number of
Rx Frames
(pks/sec)
Minimum
Latency
(ms)
Average
Latency
(ms)
Maximu
m
Latency
(ms)
64
100.0000
0
14880950
14880950
59.7
90.798
98.2
128
100.0000
0
8445940
8445940
55.9
92.201
99.5
256
100.0000
0
4528980
4528980
61
96.178
103.7
512
100.0000
0
2349620
2349620
72.7
102.403
109.9
1024
100.0000
0
1197310
1197310
81.8
116.101
123.7
1280
100.0000
0
961530
961530
88.2
122.479
130.2
1518
100.0000
0
812740
812740
99.1
128.928
136.3
Mechanical Specifications
The mechanical specifications of the EAS2 board are as follows:
l
Power Consumption
The maximum power consumption of the EAS2 at room temperature (25C) is 70 W.
7.14 ADL4
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the ADL4 (1xSTM-4 ATM service processing board).
7.14.1 Version Description
The ADL4 is available in one functional version, namely, N1.
7.14.2 Functions and Features
The ADL4 supports the ATM switching and ATM protection.
7.14.3 Working Principle and Signal Flow
The ADL4 consists of the O/E converting module, physical layer module, ATM module, E3
module, mapping module, logic and control module, clock module, and power module.
7-188
Issue 02 (2009-07-30)
7 Data Boards
Issue 02 (2009-07-30)
Function and
Feature
ADL4
Basic functions
Type of optical
interface
Connector type
LC
SFP
E3 ATM interface
Supports 12xE3 signals, which are accessed through the PD3, PL3,
or N1PL3A.
IMA function
Maximum uplink
bandwidth
ATM switching
capability
1.2 Gbit/s
Mapping granularities
Service types
7-189
7 Data Boards
Function and
Feature
ADL4
Number of supported
ATM connections
2048
Statistical multiplexing
ATM multicast
connection
Maintenance features
Alarms and
performance events
7-190
Issue 02 (2009-07-30)
7 Data Boards
E/O
622
Mbit/s
622
Mbit/s
High-speed
bus
Physical
layer
622 module
Mbit/s
O/E
Cross-connect unit
Mapping
module
ATM
module
E3
module
High-speed
bus
Cross-connect unit
O/E converting
module
LOS
Laser shutdown
Logic and
control module
Communication
Cross-connect unit
SCC unit
50 MHz
77 MHz
100 MHz
Clock
module
+3.3 V
Power
module
Fuse
-48 V/-60 V
-48 V/-60 V
Power
module
Implements the following functions at the ATM service physical layer: cell delimitation,
and test and generation of header error control (HEC) sequence.
ATM Module
The ATM module mainly performs the following ATM layer functions that are specified in
ATM protocols:
l
Flow control
ATM switching
Issue 02 (2009-07-30)
7-191
7 Data Boards
E3 Module
The E3 module mainly processes ATM services at the E3 rate. This module performs the
following functions:
l
Implements functions at the ATM physical layer for ATM services at the E3 rate.
Mapping Module
The mapping module performs the following functions:
l
Clock Module
This module mainly generates the required working clock for each chip. The frequency of the
clock can be 50 MHz, 77 MHz, or 100 MHz.
Power Module
It converts the 48 V/60 V power supply into the DC voltages that the modules of the board
require.
Issue 02 (2009-07-30)
7 Data Boards
ADL4
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1 IN1
ADL4
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the ADL4 has one optical interface. Table 7-123 describes the type and usage
of the optical interface of the ADL4.
Issue 02 (2009-07-30)
7-193
7 Data Boards
Type of
Interface
Usage
OUT1/IN1
LC
(swappable)
Feature Code
SSN1ADL410
10
S-4.1
SSN1ADL411
11
L-4.1
SSN1ADL412
12
L-4.2
SSN1ADL413
13
Ve-4.2
Port type
Flow type
Service type
Issue 02 (2009-07-30)
7 Data Boards
Value
Type of optical
interface
S-4.1
L-4.1
L-4.2
Ve-4.2
Type of fiber
Single-mode LC
Single-mode
LC
Single-mode
LC
Single-mode
LC
Operating
wavelength range
(nm)
1274 to 1356
1280 to 1335
1480 to 1580
1480 to 1580
Launched optical
power range
(dBm)
-15 to -8
-3 to +2
-3 to +2
-3 to +2
Minimum
overload (dBm)
-8
-8
-8
-13
Receiver
sensitivity (dBm)
-28
-28
-28
-34
Minimum
extinction ratio
(dB)
8.2
10
10
10.5
Mechanical Specifications
The mechanical specifications of the ADL4 are as follows:
l
Power Consumption
The maximum power consumption of the ADL4 at room temperature (25C) is 41 W.
Issue 02 (2009-07-30)
7-195
7 Data Boards
7.15 ADQ1
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the ADQ1 (4xSTM-1 ATM service processing board).
7.15.1 Version Description
The ADQ1 is available in one functional version, namely, N1.
7.15.2 Functions and Features
The ADQ1 supports the ATM switching and ATM protection.
7.15.3 Working Principle and Signal Flow
The ADQ1 consists of the O/E converting module, physical layer module, ATM module, E3
module, mapping module, logic and control module, clock module, and power module.
7.15.4 Front Panel
The front panel of the ADQ1 has indicators, interfaces, a bar code, and a laser safety class label.
7.15.5 Valid Slots
The ADQ1 can be installed in slots 28 and 1116. In this case, the bandwidth is 1.25 Gbit/s.
7.15.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the ADQ1 indicates the type of optical interface.
7.15.7 Parameter Settings
You can set the parameters for the ADQ1 by using the T2000.
7.15.8 Technical Specifications
The technical specifications of the ADQ1 include the parameters specified for optical interfaces,
laser safety class, mechanical specifications, and power consumption.
7-196
Function and
Feature
ADQ1
Basic functions
Issue 02 (2009-07-30)
7 Data Boards
Function and
Feature
ADQ1
Type of optical
interface
Connector type
LC
SFP
E3 ATM interface
Supports 12xE3 signals, which are accessed through the PD3, PL3,
or N1PL3A.
IMA function
Maximum uplink
bandwidth
ATM switching
capability
1.2 Gbit/s
Mapping granularities
Service types
Number of supported
ATM connections
2048
Statistical
multiplexing
ATM multicast
connection
Maintenance features
Alarms and
performance events
Issue 02 (2009-07-30)
7-197
7 Data Boards
4x155
Mbit/s
E/O
4x155
Mbit/s
O/E
Physical
layer
4x155 module
Mbit/s
ATM
module
High-speed
bus
Cross-connect unit
High-speed
bus
Cross-connect unit
Mapping
module
E3
module
O/E converting
module
LOS
Laser shutdown
Logic and
control module
Communication
Cross-connect unit
SCC unit
50 MHz
77 MHz
100 MHz
Clock
module
+3.3 V
Power
module
Fuse
-48 V/-60 V
-48 V/-60 V
Power
module
Implements the following functions at the ATM service physical layer: cell delimitation,
and test and generation of HEC sequence.
ATM Module
The ATM module mainly performs the following ATM layer functions that are specified in
ATM protocols:
7-198
Issue 02 (2009-07-30)
Flow control
ATM switching
7 Data Boards
E3 Module
The E3 module mainly processes ATM services at the E3 rate. This module performs the
following functions:
l
Implements functions at the ATM physical layer for ATM services at the E3 rate.
Mapping Module
The mapping module performs the following functions:
l
Clock Module
This module mainly generates the required working clock for each chip. The frequency of the
clock can be 50 MHz, 77 MHz, or 100 MHz.
Power Module
It converts the 48 V/60 V power supply into the DC voltages that the modules of the board
require.
7-199
7 Data Boards
ADQ1
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
OUT3
IN3
OUT4
IN4
ADQ1
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Issue 02 (2009-07-30)
7 Data Boards
Interfaces
The front panel of the ADQ1 has four optical interfaces. Table 7-127 describes the types and
usage of the optical interfaces of the ADQ1.
Table 7-127 Optical interfaces of the ADQ1
Interface
Type of
Interface
Usage
OUT1/IN1
LC (swappable)
OUT2/IN2
LC (swappable)
OUT3/IN3
LC (swappable)
OUT4/IN4
LC (swappable)
Feature Code
SSN1ADQ110
10
S-1.1
SSN1ADQ111
11
L-1.1
SSN1ADQ112
12
L-1.2
SSN1ADQ113
13
Ve-1.2
SSN1ADQ114
14
Ie-1
Port type
Flow type
Issue 02 (2009-07-30)
7-201
7 Data Boards
l
Service type
PCR
SCR
CDVT
Value
Type of optical
interface
Ie-1
S-1.1
L-1.1
L-1.2
Ve-1.2
Type of fiber
Multimode LC
Single-mode
LC
Single-mode
LC
Singlemode LC
Single-mode
LC
Operating
wavelength
range (nm)
1270 to
1380
1261 to 1360
1263 to 1360
1480 to
1580
1480 to 1580
Transmission
distance (km)
0 to 0.5
2 to 15
15 to 40
40 to 80
80 to 100
Launched
optical power
range (dBm)
-19 to -14
-15 to -8
-5 to 0
-5 to 0
-3 to 0
Receive optical
power (dBm)
-30
-28
-34
-34
-34
Minimum
overload (dBm)
-14
-8
-10
-10
-10
Minimum
extinction ratio
(dB)
10
8.2
10
10
10
Issue 02 (2009-07-30)
7 Data Boards
Mechanical Specifications
The mechanical specifications of the ADQ1 are as follows:
l
Power Consumption
The maximum power consumption of the ADQ1 at room temperature (25C) is 41 W.
7.16 IDL4
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the IDL4 (1xSTM-4 ATM service processing board).
7.16.1 Version Description
The IDL4 is available in one functional version, namely, N1.
7.16.2 Functions and Features
The IDL4 supports the ATM switching, IMA, and ATM protection.
7.16.3 Working Principle and Signal Flow
The IDL4 consists of the O/E converting module, physical layer module, ATM module, IMA
module, mapping module, logic and control module, clock module, and power module.
7.16.4 Front Panel
The front panel of the IDL4 has indicators, interfaces, a bar code, and a laser safety class label.
7.16.5 Valid Slots
The IDL4 can be installed in slots 28 and 1116 in the subrack. In this case, the bandwidth is
1.25 Gbit/s.
7.16.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the SL1 indicates the type of optical interface.
7.16.7 Board Protection
The IDL4 supports the 1+1 board-level protection. The working IDL4 and protection IDL4
should be installed in paired slots.
7.16.8 Parameter Settings
You can set the parameters for the IDL4 by using the T2000.
7.16.9 Technical Specifications
The technical specifications of the IDL4 include the parameters specified for optical interfaces,
laser safety class, mechanical specifications, and power consumption.
7-203
7 Data Boards
7-204
Function and
Feature
IDL4
Basic functions
Type of optical
interface
Connector type
LC
SFP
E3 ATM interface
IMA functions
(ATM Forum IMA
1.1)
Accesses and processes IMA services when the IDL4 is used with
the E1 service processing board N1PQ1 or N1PQM.
Maximum uplink
bandwidth
ATM switching
capability
1.0 Gbit/s
The IDL4 can adapt to the bandwidth of the slot.
Mapping
granularities
Service types
Number of supported
ATM connections
2048
Statistical
multiplexing
ATM multicast
connection
ATM protection
(ITU-T I.630)
Board-level 1+1
protection
Issue 02 (2009-07-30)
7 Data Boards
Function and
Feature
IDL4
OAM functions
(ITU-T I.610)
Maintenance
features
Alarms and
performance events
Note: The IMA function can encapsulate ATM cells into E1 signals. The IMA group can
coexist with a single E1 signal. The IMA group can dynamically increase or decrease the
bandwidth to improve the bandwidth utilization. The IMA group can also be used to converge
2 Mbit/s services and to interconnect with other IMA equipment.
622
Mbit/s
622
Mbit/s
E/O
622
Mbit/s
O/E
Physical
layer
module
ATM
module
High-speed
bus
Cross-connect unit A
High-speed
bus
Cross-connect unit B
Mapping
module
IMA
module
O/E converting
module
LOS
Laser shutdown
Logic and
control module
Communication
Cross-connect unit
SCC unit
50 MHz
77 MHz
100 MHz
Clock
module
+3.3 V
Power
module
Fuse
-48 V/-60 V
-48 V/-60 V
Power
module
Issue 02 (2009-07-30)
7-205
7 Data Boards
Implements the following functions at the ATM service physical layer: cell delimitation,
and test and generation of HEC sequence.
ATM Module
The ATM module mainly performs the following ATM layer functions that are specified in
ATM protocols:
l
Flow control
ATM switching
IMA Module
This module mainly performs the following functions that are specified in IMA protocols:
l
Frame synchronization
Mapping Module
The mapping module performs the following functions:
l
7-206
Issue 02 (2009-07-30)
7 Data Boards
Clock Module
This module mainly generates the required working clock for each chip. The frequency of the
clock can be 50 MHz, 77 MHz, or 100 MHz.
Power Module
It converts the 48 V/60 V power supply into the DC voltages that the modules of the board
require.
Issue 02 (2009-07-30)
7-207
7 Data Boards
IDL4
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1
IN1
IDL4
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the IDL4 has one optical interface. Table 7-131 describes the type and usage
of the optical interface of the IDL4.
7-208
Issue 02 (2009-07-30)
7 Data Boards
Type of
Interface
Usage
OUT1/IN1
LC
(swappable)
Feature Code
SSN1IDL410
10
S-4.1
SSN1IDL411
11
L-4.1
SSN1IDL412
12
L-4.2
SSN1IDL413
13
Ve-4.2
Port type
Flow type
Service type
Issue 02 (2009-07-30)
7-209
7 Data Boards
l
PCR
SCR
CDVT
Value
Type of optical
interface
S-4.1
L-4.1
L-4.2
Ve-4.2
Type of fiber
Single-mode
LC
Single-mode
LC
Single-mode
LC
Single-mode
LC
Operating
wavelength range
(nm)
1274 to 1356
1280 to 1335
1480 to 1580
1480 to 1580
Launched optical
power range (dBm)
-15 to -8
-3 to +2
-3 to +2
-3 to +2
Receiver sensitivity
(dBm)
-28
-28
-28
-34
Minimum overload
(dBm)
-8
-8
-8
-13
Minimum extinction
ratio (dB)
8.2
10
10
10.5
Mechanical Specifications
The mechanical specifications of the IDL4 are as follows:
l
7-210
Issue 02 (2009-07-30)
7 Data Boards
Power Consumption
The maximum power consumption of the IDL4 at room temperature (25C) is 41 W.
7.17 IDL4A
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the IDL4A (1xSTM-4 ATM service processing board).
7.17.1 Version Description
The IDL4A is available in one functional version, namely, N1.
7.17.2 Functions and Features
The IDL4A supports the ATM switching, IMA, and ATM protection.
7.17.3 Working Principle and Signal Flow
The IDL4A consists of the O/E converting module, physical layer module, ATM module, IMA
module, mapping module, logic and control module, clock module, and power module.
7.17.4 Front Panel
The front panel of the IDL4A has indicators, interfaces, a bar code, and a laser safety class label.
7.17.5 Valid Slots
The IDL4A must be installed in a valid slot in the subrack. Otherwise, the IDL4A cannot work
normally.
7.17.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the IDL4A indicates the type of optical interface.
7.17.7 Board Protection
The IDL4A supports the intra-board PPS protection and inter-board PPS protection. The interboard PPS protection does not have specific restrictions on the available paired slots for the
IDL4A.
7.17.8 Parameter Settings
You can set the parameters for the IDL4A by using the T2000.
7.17.9 Technical Specifications
The technical specifications of the IDL4A include the parameters specified for optical interfaces,
laser safety class, dimensions, weight, and power consumption.
Issue 02 (2009-07-30)
7-211
7 Data Boards
IDL4A
Basic functions
Type of optical
interface
Connector type
Optical module
type
E3 ATM interface
IMA functions
(ATM Forum
IMA 1.1)
Accesses and processes IMA services when the IDL4A is used with
the E1 service processing board N1PQ1 or N1PQM.
Maximum uplink
bandwidth
7-212
ATM switching
capability
Capacity of the
ATM ring
600 Mbit/s
Mapping
granularities
Service types
Number of
supported ATM
connections
8192
Statistical
multiplexing
Issue 02 (2009-07-30)
7 Data Boards
Function and
Feature
IDL4A
ATM multicast
connection
ATM protection
(ITU-T I.630)
PPS protection
OAM functions
(ITU-T I.610)
Clock tracing
When the optical interface is connected to the RNC, the optical interface
supports the input and output of the clock source.
Maintenance
features
Alarms and
performance
events
Note: The IMA function can encapsulate ATM cells into E1 signals. The IMA group can
coexist with a single E1 signal. The IMA group can dynamically increase or decrease the
bandwidth to improve the bandwidth utilization. The IMA group can also be used to converge
2 Mbit/s services and to interconnect with other IMA equipment.
Issue 02 (2009-07-30)
7-213
7 Data Boards
622 Mbit/s
E/O
High-rate bus
622 Mbit/s
PHY
module
Mapping
ATM
module
module
High-rate bus
IMA
module
O/E
622 Mbit/s
622 Mbit/s
LOS
Logic and
control module
Laser shutdown
Cross-connect unit
A
Cross-connect unit B
Cross-connect unit
SCC unit
50 MHz
77 MHz
100 MHz
Clock
module
+3.3 V
Power
module
Fuse
-48 V/ -60 V
-48 V/ -60 V
Power
module
Implements the following functions at the ATM service physical layer: cell delimitation,
and test and generation of HEC sequence.
ATM Module
The ATM module mainly performs the following ATM layer functions that are specified in
ATM protocols:
7-214
Flow control
ATM switching
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
Issue 02 (2009-07-30)
7 Data Boards
IMA Module
This module mainly performs the following functions that are specified in IMA protocols:
l
Frame synchronization
Mapping Module
The mapping module performs the following functions:
l
Clock Module
This module mainly generates the required working clock for each chip. The frequency of the
clock can be 50 MHz, 77 MHz, or 100 MHz.
Power Module
It converts the 48 V/60 V power supply into the DC voltages that the modules of the board
require.
7-215
7 Data Boards
IDL4A
STA
AC
T
T
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1 IN1
IDL4A
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the IDL4A has one optical interface. Table 7-135 describes the type and usage
of the optical interface of the IDL4A.
7-216
Issue 02 (2009-07-30)
7 Data Boards
Type of
Interface
Usage
OUT1/IN1
LC
(swappable)
Feature Code
SSN1IDL4A10
10
S-4.1
SSN1IDL4A11
11
L-4.1
SSN1IDL4A12
12
L-4.2
SSN1IDL4A13
13
Ve-4.2
Port type
Flow type
Service type
Issue 02 (2009-07-30)
7-217
7 Data Boards
l
PCR
SCR
CDVT
MCR
Value
Type of optical
interface
S-4.1
L-4.1
L-4.2
Ve-4.2
Type of fiber
Single-mode
LC
Single-mode
LC
Single-mode
LC
Single-mode
LC
Operating
wavelength range
(nm)
1274 to 1356
1280 to 1335
1480 to 1580
1480 to 1580
Launched optical
power range (dBm)
15 to 8
3 to +2
3 to +2
3 to +2
Receiver sensitivity
(dBm)
28
28
28
34
Minimum overload
(dBm)
13
10
10
10.5
Mechanical Specifications
The mechanical specifications of the IDL4A are as follows:
7-218
Issue 02 (2009-07-30)
7 Data Boards
Power Consumption
The maximum power consumption of the IDL4A at room temperature (25C) is 60 W.
7.18 IDQ1
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the IDQ1 (4xSTM-1 ATM service processing board).
7.18.1 Version Description
The IDQ1 is available in one functional version, namely, N1.
7.18.2 Functions and Features
The IDQ1 supports the ATM switching, IMA, and ATM protection.
7.18.3 Working Principle and Signal Flow
The IDQ1 consists of the O/E converting module, physical layer module, ATM module, IMA
module, mapping module, logic and control module, clock module, and power module.
7.18.4 Front Panel
The front panel of the IDQ1 has indicators, interfaces, a bar code, and a laser safety class label.
7.18.5 Valid Slots
The IDQ1 can be installed in slots 28 and 1116. In this case, the bandwidth is 1.25 Gbit/s.
7.18.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the IDQ1 indicates the type of optical interface.
7.18.7 Board Protection
The IDQ1 supports the 1+1 board-level protection. The active and standby IDQ1 should be
housed in paired slots.
7.18.8 Parameter Settings
You can set the parameters for the IDQ1 by using the T2000.
7.18.9 Technical Specifications
The technical specifications of the IDQ1 include the parameters specified for optical interfaces,
laser safety class, mechanical specifications, and power consumption.
Issue 02 (2009-07-30)
7-219
7 Data Boards
7-220
Function and
Feature
IDQ1
Basic functions
Type of optical
interface
Connector type
LC
Optical module
type
SFP
E3 ATM interface
IMA functions
(ATM Forum
IMA 1.1)
Accesses and processes IMA services when the IDQ1 is used with
the E1 service processing board N1PQ1 or N1PQM.
Maximum uplink
bandwidth
ATM switching
capability
1.0 Gbit/s
Mapping
granularities
Service types
Number of
supported ATM
connections
2048
Statistical
multiplexing
ATM multicast
connection
ATM protection
(ITU-T I.630)
Issue 02 (2009-07-30)
7 Data Boards
Function and
Feature
IDQ1
Board-level 1+1
protection
OAM functions
(ITU-T I.610)
Maintenance
features
Alarm and
performance event
Note: The IMA function can encapsulate ATM cells into E1 signals. The IMA group can
coexist with a single E1 signal. The IMA group can dynamically increase or decrease the
bandwidth to improve the bandwidth utilization. The IMA group can also be used to converge
2 Mbit/s services and to interconnect with other IMA equipment.
4x155
Mbit/s
E/O
4x155
Mbit/s
O/E
Physical
layer
4x155 module
Mbit/s
ATM
module
High-speed
bus
Cross-connect unit A
High-speed
bus
Cross-connect unit B
Mapping
module
IMA
module
O/E converting
module
LOS
Laser shutdown
Logic and
control module
Communication
Cross-connect unit
SCC unit
50 MHz
77 MHz
100 MHz
Clock
module
+3.3 V
Power
module
Fuse
-48 V/-60 V
-48 V/-60 V
Power
module
Issue 02 (2009-07-30)
7-221
7 Data Boards
Implements the following functions at the ATM service physical layer: cell delimitation,
and test and generation of HEC sequence.
ATM Module
The ATM module mainly performs the following ATM layer functions that are specified in
ATM protocols:
l
Flow control
ATM switching
IMA Module
This module mainly performs the following functions that are specified in IMA protocols:
l
Frame synchronization
Mapping Module
The mapping module performs the following functions:
l
7-222
Issue 02 (2009-07-30)
7 Data Boards
Clock Module
This module mainly generates the required working clock for each chip. The frequency of the
clock can be 50 MHz, 77 MHz, or 100 MHz.
Power Module
It converts the 48 V/60 V power supply into the DC voltages that the modules of the board
require.
Issue 02 (2009-07-30)
7-223
7 Data Boards
IDQ1
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
OUT3
IN3
OUT4
IN4
IDQ1
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the IDQ1 has four optical interfaces. Table 7-139 describes the types and
usage of the optical interfaces of the IDQ1.
7-224
Issue 02 (2009-07-30)
7 Data Boards
Type of
Interface
Usage
OUT1/IN1
LC (swappable)
OUT2/IN2
LC (swappable)
OUT3/IN3
LC (swappable)
OUT4/IN4
LC (swappable)
Feature Code
SSN1IDQ110
10
S-1.1
SSN1IDQ111
11
L-1.1
SSN1IDQ112
12
L-1.2
SSN1IDQ113
13
Ve-1.2
SSN1IDQ114
14
Ie-1
Port type
Flow type
Issue 02 (2009-07-30)
7-225
7 Data Boards
l
Service type
PCR
SCR
CDVT
Value
Type of optical
interface
Ie-1
S-1.1
L-1.2
Ve-1.2
L-1.1
Type of fiber
Multimode LC
Singlemode LC
Singlemode LC
Single-mode
LC
Single-mode
LC
Operating
wavelength
range (nm)
1270 to
1380
1261 to
1360
1480 to
1580
1480 to 1580
1263 to 1360
Transmission
distance (km)
0 to 0.5
2 to 15
40 to 80
80 to 100
15 to 40
Launched optical
power range
(dBm)
-19 to -14
-15 to -8
-5 to 0
-3 to 0
-5 to 0
Receiver
sensitivity
(dBm)
-30
-28
-34
-34
-34
Minimum
overload (dBm)
-14
-8
-10
-10
-10
Minimum
extinction ratio
(dB)
10
8.2
10
10
10
Issue 02 (2009-07-30)
7 Data Boards
Mechanical Specifications
The mechanical specifications of the IDQ1 are as follows:
l
Power Consumption
The maximum power consumption of the IDQ1 at room temperature (25C) is 41 W.
7.19 IDQ1A
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the IDQ1A (4xSTM-1 ATM service processing board).
7.19.1 Version Description
The IDQ1A is available in one functional version, namely, N1.
7.19.2 Functions and Features
The IDQ1A supports the ATM switching, IMA, and ATM protection.
7.19.3 Working Principle and Signal Flow
The IDQ1A consists of the O/E converting module, physical layer module, ATM module, IMA
module, mapping module, logic and control module, clock module, and power module.
7.19.4 Front Panel
The front panel of the IDQ1A has indicators, interfaces, a bar code, and a laser safety class label.
7.19.5 Valid Slots
The IDQ1A must be installed in a valid slot in the subrack. Otherwise, the IDQ1A cannot work
normally.
7.19.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the IDQ1A indicates the type of optical interface.
7.19.7 Board Protection
The IDQ1A supports the intra-board PPS protection and inter-board PPS protection. The interboard PPS protection does not have specific restrictions on the available paired slots for the
IDL4A.
7.19.8 Parameter Settings
You can set the parameters for the IDQ1A by using the T2000.
7.19.9 Technical Specifications
The technical specifications of the IDQ1A include the parameters specified for optical interfaces,
laser safety class, dimensions, weight, and power consumption.
7-227
7 Data Boards
7-228
Function and
Feature
IDQ1A
Basic functions
Type of optical
interface
Connector type
Optical module
type
E3 ATM interface
IMA functions
(ATM Forum
IMA 1.1 standard)
Accesses and processes IMA services when the IDQ1A is used with
the E1 service processing board N1PQ1 or N1PQM.
Maximum uplink
bandwidth
ATM switching
capability
Capacity of the
ATM ring
600 Mbit/s
Mapping
granularities
Service types
Number of
supported ATM
connections
8192
Statistical
multiplexing
Issue 02 (2009-07-30)
7 Data Boards
Function and
Feature
IDQ1A
ATM multicast
connection
ATM protection
(ITU-T I.630)
PPS protection
OAM functions
(ITU-T I.610)
Clock tracing
function
When the optical interface is interconnected with the RNC, the optical
interface supports the input and output of the clock source.
Maintenance
features
Alarms and
performance
events
Note: The IMA function can encapsulate ATM cells into E1 signals. The IMA group can
coexist with a single E1 signal. The IMA group can dynamically increase or decrease the
bandwidth to improve the bandwidth utilization. The IMA group can also be used to converge
2 Mbit/s services and to interconnect with other IMA equipment.
Issue 02 (2009-07-30)
7-229
7 Data Boards
155 Mbit/s
E/O
High-rate bus
155 Mbit/s
PHY
module
Mapping
ATM
module
module
High-rate bus
IMA
module
O/E
155 Mbit/s
155 Mbit/s
LOS
Logic and
control module
Laser shutdown
Cross-connect unit
A
Cross-connect unit B
Cross-connect unit
SCC unit
50 MHz
77 MHz
100 MHz
Clock
module
+3.3 V
Power
module
Fuse
-48 V/ -60 V
-48 V/ -60 V
Power
module
Implements the following functions at the ATM service physical layer: cell delimitation,
and test and generation of HEC sequence.
ATM Module
The ATM module mainly performs the following ATM layer functions that are specified in
ATM protocols:
7-230
Flow control
ATM switching
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
Issue 02 (2009-07-30)
7 Data Boards
IMA Module
This module mainly performs the following functions that are specified in IMA protocols:
l
Frame synchronization
Mapping Module
The mapping module performs the following functions:
l
Clock Module
This module mainly generates the required working clock for each chip. The frequency of the
clock can be 50 MHz, 77 MHz, or 100 MHz.
Power Module
It converts the 48 V/60 V power supply into the DC voltages that the modules of the board
require.
7-231
7 Data Boards
IDQ1A
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
OUT3
IN3
OUT4
IN4
IDQ1A
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the IDQ1A has four optical interfaces. Table 7-143 describes the types and
usage of the optical interfaces of the IDQ1A.
7-232
Issue 02 (2009-07-30)
7 Data Boards
Type of
Interface
Usage
OUT1/IN1
LC (swappable)
OUT2/IN2
LC (swappable)
OUT3/IN3
LC (swappable)
OUT4/IN4
LC (swappable)
Feature Code
SSN1IDQ1A10
10
S-1.1
SSN1IDQ1A11
11
L-1.1
SSN1IDQ1A12
12
L-1.2
SSN1IDQ1A13
13
Ve-1.2
SSN1IDQ1A14
14
Ie-1
7-233
7 Data Boards
l
Port type
Flow type
Service type
PCR
SCR
CDVT
MCR
7-234
Parameter
Value
Type of optical
interface
Ie-1
S-1.1
L-1.2
Ve-1.2
L-1.1
Type of fiber
Singlemode LC
Singlemode LC
Singlemode LC
Single-mode
LC
Single-mode
LC
Operating
wavelength
range (nm)
1260 to
1360
1261 to
1360
1480 to
1580
1480 to 1580
1280 to 1335
Transmission
distance (km)
0 to 0.5
2 to 15
40 to 80
80 to 100
15 to 40
Launched optical
power range
(dBm)
19 to 14
15 to 8
5 to 0
3 to 0
5 to 0
Receiver
sensitivity
(dBm)
31
28
34
34
34
Minimum
overload (dBm)
14
10
10
10
Minimum
extinction ratio
(dB)
10
8.2
10
10
10
Issue 02 (2009-07-30)
7 Data Boards
Mechanical Specifications
The mechanical specifications of the IDQ1A are as follows:
l
Power Consumption
The maximum power consumption of the IDQ1A at room temperature (25C) is 46 W.
Issue 02 (2009-07-30)
7-235
8-1
8.9 MU04
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the MU04 (4xE4/STM-1 electrical interface board).
8.10 TSB4
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the TSB4 (4-channel electrical interface protection switching board).
8.11 TSB8
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the TSB8 (8-channel electrical interface protection switching board).
8.12 EFF8
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the EFF8 (8x100M Ethernet optical interface board).
8.13 EFF8A
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the EFF8A (8x100M Ethernet optical interface board).
8.14 ETF8
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the ETF8 (8x100M Ethernet twisted pair interface board).
8.15 ETF8A
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the ETF8A (8x100M Ethernet twisted pair interface board).
8.16 ETS8
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the ETS8 (8x10/100M Ethernet twisted pair interface switching
board).
8.17 DM12
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the DM12 (DDN service interface board).
8-2
Issue 02 (2009-07-30)
8.1 D12B
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the D12B (32xE1/T1 access board).
8.1.1 Version Description
The D12B is available in one functional version, namely, N1.
8.1.2 Functions and Features
The D12B receives and transmits 32xE1/T1 electrical signals. The D12B must work with the
PQ1, PO1, or PQM.
8.1.3 Working Principle and Signal Flow
The D12B has the interface module.
8.1.4 Front Panel
The front panel of the D12B has interfaces and a bar code.
8.1.5 Valid Slots
The D12B can be installed in slots 2140 in the subrack and works as the interface board of the
PQ1, PO1 or PQM.
8.1.6 Technical Specifications
The technical specifications of the D12B include the parameters specified for the electrical
interfaces, mechanical specifications and power consumption.
PQ1/PQM/PO1
Issue 02 (2009-07-30)
PQ1/PQM/PO1
8-3
Interface Module
The interface module receives and transmits the E1/T1 electrical signals.
D12B
1~8
9~16
17~24
25~32
D12B
8-4
Issue 02 (2009-07-30)
Interfaces
The front panel of the D12B has four DB44 interfaces. Table 8-1 describes the types and usage
of the interfaces of the D12B.
Table 8-1 Interfaces of the D12B
Interface
Type of
Interface
Usage
18
DB44
916
DB44
1724
DB44
2532
DB44
15
44
Pin
Usage
Pin
Usage
38
34
33
32
31
11
10
23
37
22
36
21
35
31
16
20
15
30
14
29
Issue 02 (2009-07-30)
19
18
17
16
26
25
8-5
Front View
Pin
Usage
Pin
Usage
13
28
12
27
24
Slot 3
Slots 21 and 22
Slot 4
Slots 23 and 24
Slot 5
Slots 25 and 26
Slot 6
Slots 27 and 28
Slot 7
Slots 29 and 30
Slot 12
Slots 31 and 32
Slot 13
Slots 33 and 34
Slot 14
Slots 35 and 36
Slot 15
Slots 37 and 38
Slot 16
Slots 39 and 40
8-6
Issue 02 (2009-07-30)
Value
Type of electrical
interface
1544 kbit/s
2048 kbit/s
B8ZS and
AMI
HDB3
Allowed frequency
deviation at the
input interface
Allowed attenuation
at the input interface
Input jitter tolerance
Mechanical Specifications
The mechanical specifications of the D12B are as follows:
l
Power Consumption
The maximum power consumption of the D12B at room temperature (25C) is 0 W.
8.2 D12S
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the D12S (32xE1/T1 switching access board).
8.2.1 Version Description
The D12S is available in one functional version, namely, N1.
8.2.2 Functions and Features
The D12S receives and transmits 32xE1/T1 electrical signals. The D12S must work with the
PQ1, PD1, PO1, or PQM.
8.2.3 Working Principle and Signal Flow
The D12S consists of the interface module, switch matrix module, and power access circuit.
8.2.4 Front Panel
The front panel of the D12S has interfaces and a bar code.
Issue 02 (2009-07-30)
8-7
Interfac
e
module
Switch
matrix
module
E1/T1 electrical
signal
PQ1/PD1/PQM
PQ1/PD1/PQM
+3.3 V
Fuse
+3.3 V power
Interface Module
The interface module receives and transmits the E1/T1 electrical signals.
Issue 02 (2009-07-30)
In the transmit direction, the switch matrix module performs the reverse process.
D12S
1~8
9~16
17~24
25~32
D12S
Issue 02 (2009-07-30)
8-9
Interfaces
The front panel of the D12S has four DB44 interfaces. Table 8-5 describes the types and usage
of the interfaces of the D12S.
Table 8-5 Interfaces of the D12S
Interface
Type of
Interface
Usage
18
DB44
916
DB44
1724
DB44
2532
DB44
15
44
Pin
Usage
Pin
Usage
38
34
33
32
31
11
10
23
37
22
36
21
35
31
16
20
15
30
14
29
8-10
19
18
17
16
26
25
Issue 02 (2009-07-30)
Front View
Pin
Usage
Pin
Usage
13
28
12
27
24
Slot 3
Slots 21 and 22
Slot 4
Slots 23 and 24
Slot 5
Slots 25 and 26
Slot 6
Slots 27 and 28
Slot 7
Slots 29 and 30
Slot 12
Slots 31 and 32
Slot 13
Slots 33 and 34
Slot 14
Slots 35 and 36
Slot 15
Slots 37 and 38
Slot 16
Slots 39 and 40
Issue 02 (2009-07-30)
8-11
Value
Type of electrical
interface
1544 kbit/s
2048 kbit/s
B8ZS and
AMI
HDB3
Allowed frequency
deviation at the
input interface
Allowed attenuation
at the input interface
Input jitter tolerance
Mechanical Specifications
The mechanical specifications of the D12S are as follows:
l
Power Consumption
At room temperature (25C), the maximum power consumption of the D12S is 0 W.
8.3 D75S
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the D75S (32xE1 switching access board).
8.3.1 Version Description
The D75S is available in one functional version, namely, N1.
8.3.2 Functions and Features
The D75S receives and transmits 32xE1 electrical signals. The D75S must work with the PQ1/
PD1.
8.3.3 Working Principle and Signal Flow
The D75S consists of the interface module, switch matrix module, and power access circuit.
8.3.4 Front Panel
The front panel of the D75S has interfaces and a bar code.
8-12
Issue 02 (2009-07-30)
Switch
matrix
module
E1 electrical signal
PQ1/PD1
PQ1/PD1
+3.3 V
Fuse
+3.3 V power
Interface Module
The interface module receives and transmits the E1 electrical signals.
8-13
module transmits the signal to the PQ1/PD1. When the TPS is performed, the switch matrix
module transmits the signal to the protection board for bridging.
In the transmit direction, the switch matrix module performs the reverse process.
D75S
1~8
9~16
17~24
25~32
D75S
8-14
Issue 02 (2009-07-30)
Interfaces
The front panel of the D75S has four DB44 interfaces. Table 8-9 describes the types and usage
of the interfaces of the D75S.
Table 8-9 Interfaces of the D75S
Interface
Type of
Interface
Usage
18
DB44
916
DB44
1724
DB44
2532
DB44
15
44
Pin
Usage
Pin
Usage
38
34
33
32
31
11
10
23
37
22
36
21
35
31
16
20
15
30
14
29
13
28
Issue 02 (2009-07-30)
19
18
17
16
26
25
24
Front View
Pin
Usage
Pin
Usage
12
27
Slot 3
Slots 21 and 22
Slot 4
Slots 23 and 24
Slot 5
Slots 25 and 26
Slot 6
Slots 27 and 28
Slot 7
Slots 29 and 30
Slot 12
Slots 31 and 32
Slot 13
Slots 33 and 34
Slot 14
Slots 35 and 36
Slot 15
Slots 37 and 38
Slot 16
Slots 39 and 40
8-16
Issue 02 (2009-07-30)
Value
Type of electrical
interface
2048 kbit/s
HDB3
Allowed frequency
deviation at the
input interface
Allowed attenuation
at the input interface
Input jitter tolerance
Mechanical Specifications
The mechanical specifications of the D75S are as follows:
l
Power Consumption
At room temperature (25C), the maximum power consumption of the D75S is 0 W.
8.4 D34S
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the D34S (6xE3/T3 switching access board).
8.4.1 Version Description
The D34S is available in one functional version, namely, N1.
8.4.2 Functions and Features
The D34S receives and transmits 6xE3/T3 electrical signals. The D34S must work with the PD3
or PQ3.
8.4.3 Working Principle and Signal Flow
The D34S consists of the interface module, switch matrix module, and power access circuit.
8.4.4 Front Panel
The front panel of the D34S has interfaces and a bar code.
8.4.5 Valid Slots
Issue 02 (2009-07-30)
8-17
Interface
module
Switch
matrix
module
+3.3 V
Fuse
E3/T3 electrical
signal
PD3/PQ3
TSB8
TSB8
PD3/PQ3
+3.3 V power
Interface Module
The interface module receives and transmits the E3/T3 electrical signals.
Issue 02 (2009-07-30)
D34S
OUT1
IN1
OUT2
IN2
OUT3
IN3
OUT4
IN4
OUT5
IN5
OUT6
IN6
D34S
Interfaces
The front panel of the D34S has six pairs of electrical interfaces.
Table 8-13 describes the types and usage of the interfaces of the D34S.
Issue 02 (2009-07-30)
8-19
Type of
Interface
Usage
IN1IN6
SMB
OUT1OUT6
SMB
Value
Mechanical Specifications
The mechanical specifications of the D34S are as follows:
l
Power Consumption
At room temperature (25C), the maximum power consumption of the D34S is 0 W.
8-20
Issue 02 (2009-07-30)
8.5 C34S
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the C34S (3xE3/T3 switching access board).
8.5.1 Version Description
The C34S is available in one functional version, namely, N1.
8.5.2 Functions and Features
The C34S receives and transmits 3xE3/T3 electrical signals. The C34S must work with the PL3.
8.5.3 Working Principle and Signal Flow
The C34S consists of the interface module, switch matrix module, and power access circuit.
8.5.4 Front Panel
The front panel of the C34S has interfaces and a bar code.
8.5.5 Valid Slots
The C34S can be installed in slots 21, 23, 25, 27, 29, 31, 33, 35, 37, and 39 in the subrack and
works as the interface board of the PL3.
8.5.6 Technical Specifications
The technical specifications of the C34S include the parameters specified for electrical
interfaces, mechanical specifications, and power consumption.
Interface
module
Switch
matrix
module
E3/T3 electrical
signal
+3.3 V
Issue 02 (2009-07-30)
Fuse
PL3
TSB4/TSB8
TSB4/TSB8
PL3
+3.3 V power
8-21
Interface Module
The interface module receives and transmits the E3/T3 electrical signals.
8-22
Issue 02 (2009-07-30)
C34S
OUT1
IN1
OUT2
IN2
OUT3
IN3
C34S
Interfaces
The front panel of the C34S has three pairs of electrical interfaces.
Table 8-15 describes the type and usage of the interface of the C34S.
Table 8-15 Interfaces of the C34S
Issue 02 (2009-07-30)
Interface
Type of Interface
Usage
IN1IN3
SMB
OUT1OUT3
SMB
8-23
Slot 3
Slot 21
Slot 4
Slot 23
Slot 5
Slot 25
Slot 6
Slot 27
Slot 7
Slot 29
Slot 8
Slot 31
Slot 13
Slot 33
Slot 14
Slot 35
Slot 15
Slot 37
slot 16
Slot 39
Value
Allowed frequency
deviation at the input
interface
8-24
Issue 02 (2009-07-30)
Parameter
Value
Mechanical Specifications
The mechanical specifications of the C34S are as follows:
l
Power Consumption
At room temperature (25C), the maximum power consumption of the C34S is 0 W.
8.6 EU04
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the EU04 (4xSTM-1 electrical interface board).
8.6.1 Version Description
The EU04 is available in one functional version, namely, N1.
8.6.2 Functions and Features
The EU04 receives and transmits 4xSTM-1 electrical signals. The EU04 must work with the
SEP.
8.6.3 Working Principle and Signal Flow
The EU04 consists of the interface module, switch matrix module, and power module.
8.6.4 Front Panel
The front panel of the EU04 has interfaces and a bar code.
8.6.5 Valid Slots
The EU04 can be installed in slots 21, 23, 25, 27, 29, 31, 33, 35, 37, and 39 in the subrack and
works as the interface board of the SEP.
8.6.6 Technical Specifications
The technical specifications of the EU04 include the parameters specified for electrical
interfaces, mechanical specifications, and power consumption.
8-25
Interface
module
Switch
matrix
module
STM-1 electrical
signal
+3.3 V
Power
module
Fuse
SEP
TSB4/TSB8
TSB4/TSB8
SEP
+3.3 V power
Interface Module
The interface module receives and transmits the STM-1 electrical signals.
Power Module
The power module provides all the modules of the EU04 with the required DC voltages.
Issue 02 (2009-07-30)
EUO4
OUT1
IN1
OUT2
IN2
OUT3
IN3
OUT4
IN4
EUO4
Interfaces
The front panel of the EU04 has four pairs of electrical interfaces.
Table 8-18 describes the types and usage of the interfaces of the EU04.
Table 8-18 Interfaces of the EU04
Issue 02 (2009-07-30)
Interface
Type of Interface
Usage
IN1IN4
SMB
OUT1OUT4
SMB
8-27
Slot 3
Slot 21
Slot 4
Slot 23
Slot 5
Slot 25
Slot 6
Slot 27
Slot 7
Slot 29
Slot 12
Slot 31
Slot 13
Slot 33
Slot 14
Slot 35
Slot 15
Slot 37
Slot 16
Slot 39
Value
155520 kbit/s
CMI
8-28
Issue 02 (2009-07-30)
Mechanical Specifications
The mechanical specifications of the EU04 are as follows:
l
Power Consumption
The maximum power consumption of the EU04 at room temperature (25C) is 6 W.
8.7 EU08
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the EU08 (8xSTM-1 electrical interface board).
8.7.1 Version Description
The EU08 is available in one functional version, namely, N1.
8.7.2 Functions and Features
The EU08 receives and transmits 8xSTM-1 electrical signals. The EU08 must work with the
SLH1B or SEP1.
8.7.3 Working Principle and Signal Flow
The EU08 consists of the interface module, switch matrix module, and power module.
8.7.4 Front Panel
The front panel of the EU08 has interfaces and a bar code.
8.7.5 Valid Slots
The EU08 can be installed in slots 2140 in the subrack and works as the interface board of the
SLH1B or SEP1.
8.7.6 Technical Specifications
The technical specifications of the EU08 include the parameters specified for electrical
interfaces, mechanical specifications, and power consumption.
Issue 02 (2009-07-30)
8-29
Interface
module
Switch
matrix
module
STM-1 electrical
signal
+3.3 V
Power
module
Fuse
SEP/SLH1
TSB8
TSB8
SEP/SLH1
+3.3 V power
Interface Module
The interface module receives and transmits the STM-1 electrical signals.
Power Module
The power module provides all the modules of the EU08 with the required DC voltages.
8-30
Issue 02 (2009-07-30)
EUO8
OUT1
IN1
OUT2
IN2
OUT3
IN3
OUT4
IN4
OUT5
IN5
OUT6
IN6
OUT7
IN7
OUT8
IN8
EUO8
Interfaces
The front panel of the EU08 has eight pairs of electrical interfaces.
Table 8-21 describes the types and usage of the interfaces of the EU08.
Table 8-21 Interfaces of the EU08
Issue 02 (2009-07-30)
Interface
Type of
Interface
Usage
IN1IN8
SMB
OUT1OUT8
SMB
8-31
Slot 3
Slots 21 and 22
Slot 4
Slots 23 and 24
Slot 5
Slots 25 and 26
Slot 6
Slots 27 and 28
Slot 7
Slots 29 and 30
Slot 12
Slots 31 and 32
Slot 13
Slots 33 and 34
Slot 14
Slots 35 and 36
Slot 15
Slots 37 and 38
Slot 16
Slots 39 and 40
Table 8-23 lists the slots valid for the SEP and the corresponding slots for the EU08.
Table 8-23 Slots valid for the SEP and the corresponding slots for the EU08
8-32
Slot 3
Slot 21
Slot 4
Slot 23
Slot 5
Slot 25
Slot 6
Slot 27
Slot 7
Slot 29
Slot 12
Slot 31
Slot 13
Slot 33
Slot 14
Slot 35
Issue 02 (2009-07-30)
Slot 15
Slot 37
Slot 16
Slot 39
Value
155520 kbit/s
CMI
Allowed frequency
deviation at the input
interface
Allowed attenuation at
the input interface
Input jitter tolerance
Mechanical Specifications
The mechanical specifications of the EU08 are as follows:
l
Power Consumption
The maximum power consumption of the EU08 at room temperature (25C) is 11 W.
8.8 OU08
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the OU08 (8xSTM-1 optical interface board).
Issue 02 (2009-07-30)
8-33
Description
Functional
versions
Common points
Differences
Substitution
None.
8-34
Issue 02 (2009-07-30)
SEP/SLH1
Interface
module
STM-1 optical
signal
SEP/SLH1
+3.3 V
Power
module
Fuse
+3.3 V power
Interface Module
In the receive direction, the interface module performs O/E conversion for the STM-1 signals
and transmits the signals to the SLH1 or SLH1B or SEP1.
In the transmit direction, the interface module performs E/O conversion for the STM-1 signals
and transmits the signals to the optical interface.
Power Module
The power module provides all the modules of the OU08 with the required DC voltages.
Issue 02 (2009-07-30)
8-35
OU08
OUT1 IN1
OUT2 IN2
OUT3 IN3
OUT4 IN4
OUT5 IN5
OUT6 IN6
OUT7 IN7
OUT8 IN8
CLASS 1
LASER
PRODUCT
OU08
8-36
Issue 02 (2009-07-30)
OU08
OUT1
IN1
OUT2
IN2
OUT3
IN3
OUT4
IN4
OUT5
IN5
OUT6
IN6
OUT7
IN7
OUT8
IN8
OU08
Interfaces
The front panel of the N1OU08/N2OU08 has eight optical interfaces.
Table 8-26 describes the types and usage of the interfaces of the N1OU08. Table 8-27 describes
the types and usage of the interfaces of the N2OU08.
Table 8-26 Interfaces of the N1OU08
Issue 02 (2009-07-30)
Interface
Type of
Interface
Usage
IN1IN8
LC
8-37
Interface
Type of
Interface
Usage
OUT1OUT8
LC
Type of
Interface
Usage
IN1IN8
SC
OUT1OUT8
SC
8-38
Slot 3
Slots 21 and 22
Slot 4
Slots 23 and 24
Slot 5
Slots 25 and 26
Slot 6
Slots 27 and 28
Slot 7
Slots 29 and 30
Slot 12
Slots 31 and 32
Slot 13
Slots 33 and 34
Slot 14
Slots 35 and 36
Slot 15
Slots 37 and 38
Slot 16
Slots 39 and 40
Issue 02 (2009-07-30)
Table 8-29 lists the slots valid for the SEP1 and the corresponding slots for the OU08.
Table 8-29 Slots valid for the SEP1 and the corresponding slots for the OU08
Slot Valid for the SEP1
Slot 3
Slot 21
Slot 4
Slot 23
Slot 5
Slot 25
Slot 6
Slot 27
Slot 7
Slot 29
Slot 12
Slot 31
Slot 13
Slot 33
Slot 14
Slot 35
Slot 15
Slot 37
Slot 16
Slot 39
Issue 02 (2009-07-30)
Parameter
Value
155520 kbit/s
NRZ
Application code
S-1.1
Operating wavelength
range (nm)
N1OU08: 1260-1360
Type of fiber
Single-mode LC
-15 to -8
Receiver sensitivity
(dBm)
-28
N2OU08: 1261-1360
8-39
Mechanical Specifications
The mechanical specifications of the OU08 are as follows:
l
Power Consumption
The maximum power consumption of the OU08 at room temperature (25C) is 6 W.
8.9 MU04
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the MU04 (4xE4/STM-1 electrical interface board).
8.9.1 Version Description
The MU04 is available in one functional version, namely, N1.
8.9.2 Functions and Features
The MU04 receives and transmits 4xE4/STM-1 electrical signals. The MU04 must work with
the SPQ4.
8.9.3 Working Principle and Signal Flow
The MU04 consists of the interface module, switch matrix module, and power module.
8.9.4 Front Panel
The front panel of the MU04 has interfaces and a bar code.
8.9.5 Valid Slots
The MU04 can be installed in slots 21, 23, 25, 27, 29, 31, 33, 35, 37, and 39 in the subrack and
works as the interface board of the SPQ4.
8.9.6 Technical Specifications
The technical specifications of the MU04 include the parameters specified for electrical
interfaces, mechanical specifications, and power consumption.
Issue 02 (2009-07-30)
Figure 8-18 shows the functional block diagram of the MU04 by describing how to process
1xE4/STM-1 signals.
Figure 8-18 Functional block diagram of the MU04
Backplane
Cross-connect board
E4/STM-1 electrical
signal
Interface
module
E4/STM-1 electrical
signal
+3.3 V
Switch
matrix
module
Power
module
Fuse
SPQ4
TSB4/TSB8
TSB4/TSB8
SPQ4
+3.3 V power
Interface Module
The interface module receives and transmits the E4/STM-1 electrical signals.
Power Module
The power module provides all the modules of the MU04 with the required DC voltages.
Issue 02 (2009-07-30)
8-41
MUO4
OUT1
IN1
OUT2
IN2
OUT3
IN3
OUT4
IN4
MUO4
Interfaces
The front panel of the MU04 has four pairs of electrical interfaces.
Table 8-31 describes the types and usage of the interfaces of the MU04.
Table 8-31 Interfaces of the MU04
8-42
Interface
Type of
Interface
Usage
IN1IN4
SMB
OUT1OUT4
SMB
Issue 02 (2009-07-30)
Slot 3
Slot 21
Slot 4
Slot 23
Slot 5
Slot 25
Slot 6
Slot 27
Slot 7
Slot 29
Slot 12
Slot 31
Slot 13
Slot 33
Slot 14
Slot 35
Slot 15
Slot 37
Slot 16
Slot 39
Value
CMI
Allowed frequency
deviation at the input
interface
Issue 02 (2009-07-30)
8-43
Parameter
Value
Mechanical Specifications
The mechanical specifications of the MU04 are as follows:
l
Power Consumption
The maximum power consumption of the MU04 at room temperature (25C) is 2 W.
8.10 TSB4
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the TSB4 (4-channel electrical interface protection switching board).
8.10.1 Version Description
The TSB4 is available in one functional version, namely, N1.
8.10.2 Functions and Features
The TSB4 is used to provide the TPS protection.
8.10.3 Working Principle and Signal Flow
The TSB4 consists of the switch matrix module and power module.
8.10.4 Front Panel
The front panel of the TSB4 has a bar code.
8.10.5 Valid Slots
When the TSB4 works with different processing boards and interface boards to realize the TPS
protection, the TSB4 can be installed in different slots.
8.10.6 Technical Specifications
The technical specifications of the TSB4 include the mechanical specifications and power
consumption.
Issue 02 (2009-07-30)
The TSB4 can work with the MU04 to realize the TPS protection on the SPQ4.
The TSB4 can work with the C34S to realize the TPS protection on the PL3.
The TSB4 can work with the EU04 to realize the TPS protection on the SEP.
Backplane
Cross-connect board
Interface board 1
Interface board 2
Interface board 3
Switch matrix
module
+3.3 V
Power
module
Fuse
Power Module
The power module provides all the modules of the TSB4 with the required DC voltages.
Issue 02 (2009-07-30)
8-45
TSB4
TSB4
8-46
Slot 21
Slot 4
Slot 23
Slot 5
Slot 25
Slot 6
Slot 27
Issue 02 (2009-07-30)
Slot 39
Slot 13
Slot 33
Slot 14
Slot 35
Slot 15
Slot 37
Table 8-35 lists the slots valid for the TSB4 and the corresponding slots for the SEP1 and EU04.
Table 8-35 Slots valid for the TSB4 and the corresponding slots for the SEP1 and EU04
Slot Valid for the TSB4
Slot 21
Slot 4
Slot 23
Slot 5
Slot 25
Slot 6
Slot 27
Slot 13
Slot 33
Slot 14
Slot 35
Slot 15
Slot 37
Slot 39
Table 8-36 lists the slots valid for the TSB4 and the corresponding slots for the PL3 and C34S.
Table 8-36 Slots valid for the TSB4 and the corresponding slots for the PL3 and C34S
Slot Valid for the TSB4
Slot 21
Slot 4
Slot 23
Slot 5
Slot 25
Slot 6
Slot 27
Slot 13
Slot 33
Slot 14
Slot 35
Slot 15
Slot 37
Slot 39
8-47
Mechanical Specifications
The mechanical specifications of the TSB4 are as follows:
l
Power Consumption
The maximum power consumption of the TSB4 at room temperature (25C) is 3 W.
8.11 TSB8
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the TSB8 (8-channel electrical interface protection switching board).
8.11.1 Version Description
The TSB8 is available in one functional version, namely, N1.
8.11.2 Functions and Features
The TSB8 is used to provide the TPS protection.
8.11.3 Working Principle and Signal Flow
The TSB8 consists of the switch matrix module and power module.
8.11.4 Front Panel
The front panel of the TSB8 has a bar code.
8.11.5 Valid Slots
The TSB8 can be installed in slots 21, 22, 39, and 40 in the subrack
8.11.6 Technical Specifications
The technical specifications of the TSB8 include the mechanical specifications and power
consumption.
8-48
The TSB8 can work with the MU04 to realize the TPS protection on the SPQ4.
The TSB8 can work with the C34S to realize the TPS protection on the PL3.
The TSB8 can work with the D34S to realize the TPS protection on the PD3.
The TSB8 can work with the D34S to realize the TPS protection on the PQ3.
The TSB8 can work with the EU04 to realize the TPS protection on the SEP1.
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
Issue 02 (2009-07-30)
The TSB8 can work with the EU08 to realize the TPS protection on the SLH1B/SEP1.
The TSB8 can work with the ETS8 to realize the TPS protection on the EFS0.
Backplane
Cross-connect board
Interface board 1
Interface board 2
Interface board 3
Switch matrix
module
+3.3 V
Power
module
Fuse
Power Module
The power module provides all the modules of the TSB8 with the required DC voltages.
Issue 02 (2009-07-30)
8-49
TSB8
TSB8
8-50
Slots 21
Slot 4
Slot 23
Slot 5
Slot 25
Slot 6
Slot 27
Issue 02 (2009-07-30)
Slots 39
Slot 13
Slot 33
Slot 14
Slot 35
Slot 15
Slot 37
Table 8-38 lists the slots valid for the TSB8 and the corresponding slots for the PL3 and C34S.
Table 8-38 Slots valid for the TSB8 and the corresponding slots for the PL3 and C34S
Slot Valid for the TSB8
Slots 21
Slot 4
Slot 23
Slot 5
Slot 25
Slot 6
Slot 27
Slot 13
Slot 33
Slot 14
Slot 35
Slot 15
Slot 37
Slots 39
Table 8-39 lists the slots valid for the TSB8 and the corresponding slots for the PD3 and D34S.
Table 8-39 Slots valid for the TSB8 and the corresponding slots for the PD3 and D34S
Slot Valid for the TSB8
Slots 21
Slot 4
Slot 23
Slot 5
Slot 25
Slot 6
Slot 27
Slot 13
Slot 33
Slot 14
Slot 35
Slot 15
Slot 37
Slots 39
Table 8-40 lists the slots valid for the TSB8 and the corresponding slots for the PQ3 and D34S.
Issue 02 (2009-07-30)
8-51
Table 8-40 Slots valid for the TSB8 and the corresponding slots for the PQ3 and D34S
Slot Valid for the TSB8
Slots 21 and 22
Slots 46
Slots 2328
Slots 39 and 40
Slots 1315
Slots 3338
Table 8-41 lists the slots valid for the TSB8 and the corresponding slots for the SEP1 and EU04.
Table 8-41 Slots valid for the TSB8 and the corresponding slots for the SEP1 and EU04
Slot Valid for the TSB8
Slots 21
Slot 4
Slot 23
Slot 5
Slot 25
Slot 6
Slot 27
Slot 13
Slot 33
Slot 14
Slot 35
Slot 15
Slot 37
Slots 39
Table 8-42 lists the slots valid for the TSB8 and the corresponding slots for the SEP1 and EU08.
Table 8-42 Slots valid for the TSB8 and the corresponding slots for the SEP1 and EU08
Slot Valid for the TSB8
Slots 21
Slot 4
Slot 23
Slot 5
Slot 25
Slot 6
Slot 27
Slot 13
Slot 33
Slot 14
Slot 35
Slot 15
Slot 37
Slots 39
Table 8-43 lists the slots valid for the TSB8 and the corresponding slots for the SLH1B and
EU08.
8-52
Issue 02 (2009-07-30)
Table 8-43 Slots valid for the TSB8 and the corresponding slots for the SLH1B and EU08
Slot Valid for the TSB8
Slots 21 and 22
Slot 4
Slot 23 and 24
Slot 5
Slot 25 and 26
Slot 6
Slot 27 and 28
Slot 13
Slot 33 and 34
Slot 14
Slot 35 and 36
Slot 15
Slot 37 and 38
Slots 39 and 40
NOTE
The SEP1 is displayed as SEP or SEP1 on the T2000. When the interfaces are available on the front panel
of the SEP1, the SEP1 is displayed as SEP1 on the T2000. When the SEP1 works with the interface board
to realize the TPS protection, the SEP1 is displayed as SEP on the T2000.
Table 8-44 lists the slots valid for the TSB8 and the corresponding slots for the EFS0 and ETS8.
Table 8-44 Slots valid for the TSB8 and the corresponding slots for the EFS0 and ETS8
Slot Valid for the TSB8
Slots 21
Slot 4
Slot 23
Slot 5
Slot 25
Slot 6
Slot 27
Slot 13
Slot 33
Slot 14
Slot 35
Slot 15
Slot 37
Slots 39
Mechanical Specifications
The mechanical specifications of the TSB8 are as follows:
l
Issue 02 (2009-07-30)
8-53
Power Consumption
At room temperature (25C), the maximum power consumption of the TSB8 is 0 W.
8.12 EFF8
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the EFF8 (8x100M Ethernet optical interface board).
8.12.1 Version Description
The EFF8 is available in one functional version, namely, N1.
8.12.2 Functions and Features
The EFF8 receives and transmits 8x100M Ethernet optical signals. The EFF8 must work with
the Ethernet processing board.
8.12.3 Working Principle and Signal Flow
The EFF8 consists of the interface module and power module.
8.12.4 Front Panel
The front panel of the EFF8 has indicators, interfaces, a bar code, and a laser safety class label.
8.12.5 Valid Slots
The EFF8 can be installed in slots 21, 23, 25, 27, 29, 31, 33, 35, 37 and 39 in the subrack and
works as the interface board of the EFT8, EFS0 or EMR0. The EFF8 can be installed in slots
2140 in the subrack and works as the interface board of the EMS4.
8.12.6 Technical Specifications
The technical specifications of the EFF8 include the parameters specified for optical interfaces,
laser safety class, mechanical specifications, and power consumption.
8-54
Issue 02 (2009-07-30)
100 Mbit/s
Ethernet signal
EFT8/EFS0/EMS4/EMR0
Interface
module
100 Mbit/s
Ethernet signal
+3.3 V
EFT8/EFS0/EMS4/EMR0
Power
module
Fuse
Interface Module
In the receive direction, the interface module performs O/E conversion for the Ethernet signals
and transmits the signals to the EFT8, EFS0, EMS4, or EMR0.
In the transmit direction, the interface module performs E/O conversion for the Ethernet signals
and transmits the signals to the optical interface.
Power Module
The power module provides all the modules of the EFF8 with the required DC voltages.
Issue 02 (2009-07-30)
8-55
EFF8
1
2
3
4
5
6
7
8
LINK ACT
OUT1 IN1
OUT2 IN2
OUT3 IN3
OUT4 IN4
OUT5 IN5
OUT6 IN6
OUT7 IN7
OUT8 IN8
CLASS 1
LASER
PRODUCT
EFF8
Indicators
The front panel of the board has the following indicators:
l
Eight data receiving and transmission indicators (ACT) one color (orange)
Interfaces
The front panel of the EFF8 has eight optical interfaces.
Table 8-45 describes the types and usage of the interfaces of the EFF8.
8-56
Issue 02 (2009-07-30)
Type of
Interface
Usage
IN1IN8
LC
OUT1OUT8
LC
Slot 3
Slots 21
Slot 4
Slots 23
Slot 5
Slots 25
Slot 6
Slots 27
Slot 7
Slots 29
Slot 12
Slots 31
Slot 13
Slots 33
Slot 14
Slots 35
Slot 15
Slots 37
Slot 16
Slots 39
Table 8-47 lists the slots valid for the EMS4 and the corresponding slots for the EFF8.
Table 8-47 Slots valid for the EMS4 and the corresponding slots for the EFF8
Issue 02 (2009-07-30)
Slot 3
Slots 21 and 22
Slot 4
Slots 23 and 24
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
8-57
Slot 5
Slots 25 and 26
Slot 6
Slots 27 and 28
Slot 7
Slots 29 and 30
Slot 12
Slots 31 and 32
Slot 13
Slots 33 and 34
Slot 14
Slots 35 and 36
Slot 15
Slots 37 and 38
Slot 16
Slots 39 and 40
8-58
Parameter
Value
Type of optical
interface
100BASE-FX
Operating
wavelength range
(nm)
Type of fiber
Single-mode LC
Mean launched
optical power (dBm)
Receiver sensitivity
(dBm)
Minimum overload
(dBm)
Issue 02 (2009-07-30)
Parameter
Value
Minimum extinction
ratio (dB)
10
Mechanical Specifications
The mechanical specifications of the EFF8 are as follows:
l
Power Consumption
The maximum power consumption of the EFF8 at room temperature (25C) is 6 W.
8.13 EFF8A
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the EFF8A (8x100M Ethernet optical interface board).
8.13.1 Version Description
The EFF8A is available in one functional version, namely, N1.
8.13.2 Functions and Features
The EFF8A receives and transmits 8x100M Ethernet optical signals. The EFF8A must work
with the N5EFS0.
8.13.3 Working Principle and Signal Flow
The EFF8A consists of the interface module and power module.
8.13.4 Front Panel
The front panel of the EFF8A has indicators, interfaces, a bar code, and a laser safety class label.
8.13.5 Valid Slots
The EFF8A can be installed in slots 2140 in the subrack and works as the interface board of
the N5EFS0.
8.13.6 Technical Specifications
The technical specifications of the EFF8A include the parameters specified for optical interfaces,
mechanical specifications, and power consumption.
8-59
100 Mbit/s
Ethernet signal
N5EFS0
Interface
module
100 Mbit/s
Ethernet signal
N5EFS0
+3.3 V
Power
module
Fuse
Interface Module
In the receive direction, the interface module performs O/E conversion for the Ethernet signals
and transmits the signals to the N5EFS0.
In the transmit direction, the interface module performs E/O conversion for the Ethernet signals
and transmits the signals to the optical interface.
Power Module
The power module provides all the modules of the EFF8A with the required DC voltages.
Issue 02 (2009-07-30)
EFF8
1
2
3
4
5
6
7
8
LINK ACT
OUT1 IN1
OUT2 IN2
OUT3 IN3
OUT4 IN4
OUT5 IN5
OUT6 IN6
OUT7 IN7
OUT8 IN8
CLASS 1
LASER
PRODUCT
EFF8
Indicators
The front panel of the board has the following indicators:
l
Eight data receiving and transmission indicators (ACT) one color (orange)
Interfaces
The front panel of the EFF8A has eight optical interfaces.
Table 8-49 describes the types and usage of the interfaces of the EFF8A.
Issue 02 (2009-07-30)
8-61
Type of
Interface
Usage
IN1IN8
LC
OUT1OUT8
LC
Slot 3
Slots 21 and 22
Slot 4
Slots 23 and 24
Slot 5
Slots 25 and 26
Slot 6
Slots 29 and 30
Slot 7
Slots 31 and 32
Slot 13
Slots 33 and 34
Slot 14
Slots 35 and 36
Slot 15
Slots 37 and 38
Slot 16
Slots 39 and 40
8-62
Issue 02 (2009-07-30)
Table 8-51 Parameters specified for the optical interfaces of the EFF8A
Parameter
Value
Type of optical
interface
100BASE-FX
Operating
wavelength range
(nm)
Type of fiber
Single-mode LC
Mean launched
optical power (dBm)
Receiver sensitivity
(dBm)
Minimum overload
(dBm)
Minimum extinction
ratio (dB)
10
Mechanical Specifications
The mechanical specifications of the EFF8A are as follows:
l
Power Consumption
The maximum power consumption of the EFF8A at room temperature (25C) is 15 W.
8.14 ETF8
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the ETF8 (8x100M Ethernet twisted pair interface board).
8.14.1 Version Description
The ETF8 is available in one functional version, namely, N1.
8.14.2 Functions and Features
The ETF8 receives and transmits 8x100M Ethernet electrical signals. The ETF8 must work with
the EFT8.
Issue 02 (2009-07-30)
8-63
100 Mbit/s
Ethernet signal
EFT8/EFS0/EMS4/EMR0
Interface
module
100 Mbit/s
Ethernet signal
+3.3 V
EFT8/EFS0/EMS4/EMR0
Power
module
Fuse
Interface Module
In the receive direction, the interface module performs O/E conversion for the Ethernet signals
and transmits the signals to the EFT8, EFS0, EMS4, or EMR0.
8-64
Issue 02 (2009-07-30)
In the transmit direction, the interface module performs E/O conversion for the Ethernet signals
and transmits the signals to the optical interface.
Power Module
The power module provides all the modules of the ETF8 with the required DC voltages.
ETF8
FE1
FE2
FE3
FE4
FE5
FE6
FE7
FE8
ETF8
Issue 02 (2009-07-30)
8-65
Interfaces
The front panel of the ETF8 has eight electrical interfaces.
Table 8-52 describes the types and usage of the interfaces of the ETF8.
Table 8-52 Interfaces of the ETF8
Interface
Type of
Interface
Usage
FE1FE8
RJ-45
Table 8-53 provides the pin assignments of the RJ-45 connector of the ETF8.
Table 8-53 Pin assignments of the RJ-45 connector of the ETF8
Front View
8 7
6 5
3 2
Pin
Description
Transmitting (+)
Transmitting ()
Receiving (+)
Grounding
Grounding
Receiving ()
Grounding
Grounding
8-66
Slot 3
Slots 21
Slot 4
Slots 23
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
Issue 02 (2009-07-30)
Slot 5
Slots 25
Slot 6
Slots 27
Slot 7
Slots 29
Slot 12
Slots 31
Slot 13
Slots 33
Slot 14
Slots 35
Slot 15
Slots 37
Slot 16
Slots 39
Table 8-55 lists the slots valid for the EMS4 and the corresponding slots for the ETF8.
Table 8-55 Slots valid for the EMS4 and the corresponding slots for the ETF8
Slot Valid for the EMS4
Slot 3
Slots 21 and 22
Slot 4
Slots 23 and 24
Slot 5
Slots 25 and 26
Slot 6
Slots 27 and 28
Slot 7
Slots 29 and 30
Slot 12
Slots 31 and 32
Slot 13
Slots 33 and 34
Slot 14
Slots 35 and 36
Slot 15
Slots 37 and 38
Slot 16
Slots 39 and 40
Issue 02 (2009-07-30)
8-67
Table 8-56 Parameters specified for the optical interfaces of the ETF8
Parameter
Value
Specifications of the
interface
Mechanical Specifications
The mechanical specifications of the ETF8 are as follows:
l
Power Consumption
The maximum power consumption of the ETF8 at room temperature (25C) is 2 W.
8.15 ETF8A
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the ETF8A (8x100M Ethernet twisted pair interface board).
8.15.1 Version Description
The ETF8A is available in one functional version, namely, N1.
8.15.2 Functions and Features
The ETF8A receives and transmits 8x100M Ethernet electrical signals. The ETF8A must work
with the N5EFS0.
8.15.3 Working Principle and Signal Flow
The ETF8A consists of the interface module and power module.
8.15.4 Front Panel
The front panel of the ETF8A has interfaces and a bar code.
8.15.5 Valid Slots
The ETF8A can be installed in slots 2140 in the subrack and works as the interface board of
the N5EFS0.
8.15.6 Technical Specifications
The technical specifications of the ETF8A include the parameters specified for electrical
interfaces, mechanical specifications, and power consumption.
Issue 02 (2009-07-30)
100 Mbit/s
Ethernet signal
N5EFS0
Interface
module
100 Mbit/s
Ethernet signal
+3.3 V
N5EFS0
Power
module
Fuse
Interface Module
In the receive direction, the interface module performs O/E conversion for the Ethernet signals
and transmits the signals to the N5EFS0.
In the transmit direction, the interface module performs E/O conversion for the Ethernet signals
and transmits the signals to the optical interface.
Power Module
The power module provides all the modules of the ETF8A with the required DC voltages.
8-69
ETF8A
FE1
FE2
FE3
FE4
FE5
FE6
FE7
FE8
ETF8A
Interfaces
The front panel of the ETF8A has eight electrical interfaces.
Table 8-57 describes the types and usage of the interfaces of the ETF8A.
Table 8-57 Interfaces of the ETF8A
Interface
Type of
Interface
Usage
FE1FE8
RJ-45
Table 8-58 provides the pin assignments of the RJ-45 connector of the ETF8A.
8-70
Issue 02 (2009-07-30)
8 7
6 5
3 2
Pin
Description
Transmitting (+)
Transmitting ()
Receiving (+)
Grounding
Grounding
Receiving ()
Grounding
Grounding
Slot 3
Slots 21 and 22
Slot 4
Slots 23 and 24
Slot 5
Slots 25 and 26
Slot 6
Slots 27 and 28
Slot 7
Slots 29 and 30
Slot 12
Slots 31 and 32
Slot 13
Slots 33 and 34
Slot 14
Slots 35 and 36
Slot 15
Slots 37 and 38
Slot 16
Slots 39 and 40
8-71
Value
Specifications of the
interface
Mechanical Specifications
The mechanical specifications of the ETF8A are as follows:
l
Power Consumption
The maximum power consumption of the ETF8A at room temperature (25C) is 11 W.
8.16 ETS8
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the ETS8 (8x10/100M Ethernet twisted pair interface switching
board).
8.16.1 Version Description
The ETS8 is available in one functional version, namely, N1.
8.16.2 Functions and Features
The ETS8 is used to provide the TPS protection for 8xFE signals at the electrical interface. The
ETS8 must work with the EFS0 or EFS0A.
8.16.3 Working Principle and Signal Flow
The ETS8 consists of the interface module, switch matrix module, and power module.
8.16.4 Front Panel
The front panel of the ETS8 has interfaces and a bar code.
8.16.5 Valid Slots
The ETS8 can be installed in slots 21, 23, 25, 27, 29, 31, 33, 35, 37, and 39 in the subrack and
works as the interface board of the EFS0. The ETS8 can be installed in slots 21, 23, 24, 25, 27,
29, 31, 33, 35, 37, 38, and 39 in the subrack and works as the interface board of the EFS0A.
8.16.6 Technical Specifications
8-72
Issue 02 (2009-07-30)
The technical specifications of the ETS8 include the parameters specified for electrical
interfaces, mechanical specifications, and power consumption.
Interface
module
100 Mbit/s
Ethernet signal
+3.3 V
Switch
matrix
module
Power
module
Fuse
EFS0
TSB8
TSB8
EFS0
Interface Module
The interface module receives and transmits the Ethernet optical signals.
Power Module
The power module provides all the modules of the ETS8 with the required DC voltages.
Issue 02 (2009-07-30)
8-73
ETS8
FE1
FE2
FE3
FE4
FE5
FE6
FE7
FE8
ETS8
Interfaces
The front panel of the ETS8 has eight electrical interfaces.
Table 8-61 describes the types and usage of the interfaces of the ETS8.
8-74
Issue 02 (2009-07-30)
Type of
Interface
Usage
FE1FE8
RJ-45
Table 8-62 provides the pin assignments of the RJ-45 connector of the ETS8.
Table 8-62 Pin assignments of the RJ-45 connector of the ETS8
Front View
8 7
6 5
3 2
Pin
Description
Transmitting (+)
Transmitting ()
Receiving (+)
Grounding
Grounding
Receiving ()
Grounding
Grounding
Issue 02 (2009-07-30)
Slot 3
Slot 21
Slot 4
Slot 23
Slot 5
Slot 25
Slot 6
Slot 27
Slot 7
Slot 29
Slot 12
Slot 31
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
8-75
Slot 13
Slot 33
Slot 14
Slot 35
Slot 15
Slot 37
Slot 16
Slot 39
Table 8-64 lists the slots valid for the EFS0A and the corresponding slots for the ETS8.
Table 8-64 Slots valid for the EFS0A and the corresponding slots for the ETS8
Slot Valid for the EFS0A
Slot 3
Slot 21
Slot 4
Slot 23 and 24
Slot 5
Slot 25
Slot 6
Slot 27
Slot 7
Slot 29
Slot 12
Slot 31
Slot 13
Slot 33
Slot 14
Slot 35
Slot 15
Slot 37 and 38
Slot 16
Slot 39
8-76
Parameter
Value
Issue 02 (2009-07-30)
Parameter
Value
Specifications of the
interface
Mechanical Specifications
The mechanical specifications of the ETS8 are as follows:
l
Power Consumption
At room temperature (25C), the maximum power consumption of the ETS8 is 0 W.
8.17 DM12
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the DM12 (DDN service interface board).
8.17.1 Version Description
The DM12 is available in one functional version, namely, N1.
8.17.2 Functions and Features
The DM12 receives and transmits four channels of Nx64 kbit/s signals and eight channels of
framed E1 electrical signals. The DM12 must work with the DX1.
8.17.3 Working Principle and Signal Flow
The DM12 consists of the interface module, switch matrix module, and power module.
8.17.4 Front Panel
The front panel of the DM12 has interfaces and a bar code.
8.17.5 Valid Slots
The DM12 can be installed in slots 2140 in the subrack and works as the interface board of the
DX1.
8.17.6 Technical Specifications
The technical specifications of the DM12 include the parameters specified for electrical
interfaces, mechanical specifications, and power consumption.
Issue 02 (2009-07-30)
8-77
Switch
matrix
module
Interface
module
Nx64 kbit/s/
Framed E1
electrical signal
+3.3 V
Power
module
Fuse
DX1
DX1
Interface Module
The interface module receives and transmits the Nx64 kbit/s or framed E1 electrical signals.
Power Module
The power module provides all the modules of the DM12 with the required DC voltages.
Issue 02 (2009-07-30)
DM12
E1(1-8)
DDN1
DDN2
DDN3
DDN4
DM12
Interfaces
The front panel of the DM12 has DB44 and DB28 interfaces. Table 8-66 describes the types
and usage of the interfaces of the DM12.
Table 8-66 Interfaces of the DM12
Issue 02 (2009-07-30)
Interface
Type of
Interface
Usage
E1 (18)
DB44
8-79
Interface
Type of
Interface
Usage
DDN1DDN4
DB28
15
Pin
Usage
Pin
Usage
30
Transmits the
1st channel of
signals (T1).
Transmits the
2nd channel of
signals (T2).
36
Transmits the
3rd channel of
signals (T3).
35
Transmits the
4th channel of
signals (T4).
34
Transmits the
5th channel of
signals (T5).
33
Transmits the
6th channel of
signals (T6).
32
Transmits the
7th channel of
signals (T7).
31
4439 and
61
15
44
29
14
28
13
27
31
16
12
26
11
25
10
24
9
38
23
37
22
21
20
19
18
17
16
Receives the
2nd channel of
signals (R2).
8-80
Issue 02 (2009-07-30)
Pin
Usage
Pin
Usage
Transmits data
signals.
19
Receives data
signals.
Transmits
clock signals.
21
Grounding
22
Receives the
loopback control
signal.
Detects the
carrier.
23
Permits the
transmission.
Requests for
transmission.
25
Receives the
clock to be
used in the
transmit
direction from
the external
equipment.
27
Receives clock
signals.
2
3
4
11
12
1
13
14
15
16
17
18
20
24
26
28
Issue 02 (2009-07-30)
Slot 3
Slots 21 and 22
Slot 4
Slots 23 and 24
Slot 5
Slots 25 and 26
Slot 6
Slots 27 and 28
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
8-81
Slot 7
Slots 29 and 30
Slot 12
Slots 31 and 32
Slot 13
Slots 33 and 34
Slot 14
Slots 35 and 36
Slot 15
Slots 37 and 38
Slot 16
Slots 39 and 40
Framed E1
interface (DB44)
Framed E1 signals
NX64 kbit/s
interface (DB28)
V.35 interface
V.24 interface
X.21 interface
RS-449 interface
RS-530 interface
RS-530A interface
Mechanical Specifications
The mechanical specifications of the DM12 are as follows:
8-82
Issue 02 (2009-07-30)
Power Consumption
At room temperature (25C), the maximum power consumption of the DM12 is 0 W.
Issue 02 (2009-07-30)
8-83
Issue 02 (2009-07-30)
9-1
9.1 CXLLN
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the CXLLN (1xSTM-16/STM-4/STM-1 SCC unit, cross-connect
unit, timing unit, and line unit integrated board).
9.1.1 Version Description
The CXLLN is available in two functional versions, namely, Q5 and Q6.
9.1.2 Functions and Features
The CXLLN processes SDH signals, controls communication, grooms services, and inputs/
outputs clock signals.
9.1.3 Working Principle and Signal Flow
The CXLLN consists of the synchronous timing module, O/E converting module, MUX/
DEMUX module, SDH overhead processing module, communication and control module, crossconnect module, and DC/DC converter.
9.1.4 Jumpers and DIP Switches
The CXLLN has jumpers, which are used to set the enable state of the battery, and a DIP switch,
which is used to set the running state of the equipment.
9.1.5 Front Panel
The front panel of the CXLLN board has indicators, an optical interface, a bar code, functional
button switches, a laser safety class label.
9.1.6 Valid Slots
The CXLLN can be installed in slot 9 or slot 10 in the subrack.
9.1.7 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the CXLLN indicates the type of optical interface. The CXLLN supports
optical modules of different configurations. Therefore, no specific feature code is provided.
9.1.8 Parameter Settings
The physical slot that houses the CXLLN is different from the logical slot displayed on the
T2000. You can set the parameters for the CXLLN by using the T2000.
9.1.9 Technical Specifications
The technical specifications of the CXLLN include the parameters specified for optical
interfaces, cross-connect capacity, clock access capability, laser safety class, mechanical
specifications, and power consumption.
9-2
Issue 02 (2009-07-30)
Description
Functional
versions
Differences
When the Q5CXLLN boards are used, the access capacity of slot 8
is 5 Gbit/s and the access capacity of the other service slots is 2.5
Gbit/s.
When the Q6CXLLN boards are used, the total access capacity of
slots 7, 8, 11, and 12 is 10 Gbit/s and the total access capacity of the
other service slots is 5 Gbit/s.
None
Substitution
Issue 02 (2009-07-30)
Function and
Feature
CXLLN
Basic functions
Specifications of the
optical interface
At the STM-1 level, the standard I-1, S-1.1, L-1.1, L-1.2, and
Ve-1.2 optical interfaces are supported. The optical interfaces of
I-1, S-1.1, L-1.1, and L-1.2 types comply with ITU-T G.957, and
the optical interface of the Ve-1.2 type complies with the standards
defined by Huawei.
At the STM-4 level, the standard I-4, S-4.1, L-4.1, L-4.2, and
Ve-4.2 optical interfaces are supported. The optical interfaces of
the I-4, S-4.1, L-4.1, and L-4.2 types comply with ITU-T G.957,
and the optical interface of the Ve-4.2 type complies with the
standards defined by Huawei.
At the STM-16 level, the standard I-16, S-16.1, L-16.1, and L-16.2
optical interfaces are supported. The optical interfaces of the I-16,
S-16.1, L-16.1, and L-16.2 types comply with ITU-T G.957.
9-3
Function and
Feature
CXLLN
Specifications of the
optical module
Supports the setting and query of the J0, J1, J2 and C2 bytes.
Service processing
Overhead processing
Alarm and
performance event
Protection scheme
Supports the two-fiber ring MSP, four-fiber ring MSP, linear MSP,
SNCP, SNCTP, and SNCMP.
Maintenance feature
Supports warm resets and cold resets. The warm reset does not
affect services.
SCC Unit
Table 9-3 provides the functions and features of the SCC unit of the CXLLN.
9-4
Issue 02 (2009-07-30)
Table 9-3 Functions and features of the SCC unit of the CXLLN
Function and
Feature
CXLLN
Basic functions
Specifications of the
optical interface
DCC processing
capability
Fan alarm
management
PIU management
Supports the in-service check function for the PIU board and supports
the failure check function for the lightning protection module of the
PIU.
Protection scheme
Cross-Connect Unit
Table 9-4 provides the functions and features of the cross-connect unit of the CXLLN.
Issue 02 (2009-07-30)
9-5
Table 9-4 Functions and features of the cross-connect unit of the CXLLN
Function and
Feature
CXLLN
Basic functions
Fast emergency
channel
Service processing
Protection scheme
Clock Unit
Table 9-5 provides the functions and features of the clock unit of the CXLLN.
Table 9-5 Functions and features of the clock unit of the CXLLN
Function and
Feature
CXLLN
Basic functions
Other functions
9-6
Issue 02 (2009-07-30)
Synchronous
timing module
(SETS)
SETG
T0
155 MHz
PLL
STM-1/
STM-4/
STM-16
STM-1/
STM-4/
STM-16
155 Mbit/s/
4x155 Mbit/s/
16x155 Mbit/s
DEMUX
data
O/E
E/O
O/E
converting
module
Laser
shutdown
MUX
Performance
report
155 Mbit/s/
4x155 Mbit/s/
16x155 Mbit/s
data
SDH overhead
processing module
MS
RS
HPT
MST
A
T
Cross-connect
unit
DCC
processing
RAM NVRAM
Service unit
Service unit
High-speed
bus
Another CXL
High-speed
bus
Cross-connect
unit B
High-speed bus
DCC
Line unit
Power monitor
Flash
Line unit
Tributary unit
AUX/SE1
AUX/SEI
Cross-connect module
Boot
ROM
High-speed bus
DCC
K1/K2 byte
processing
Laser
control
155 MHz
K1/K2
insertion/
extraction
K1/K2 byte
T1
T2
T3
T4
(clock external output)
Frame header
T0 (reference clock)
Other units
Another CXL
ETH port
OAM interface
F&f interface
Phone interface
S1-S4 interface
+3.3 V
Power Fuse
module
AUX
SEI
EOW
-48 V/-60 V
-48 V/-60 V
Power
module
Reference signal (T3) from the external synchronous clock source (2 MHz or 2 Mbit/s)
Issue 02 (2009-07-30)
9-7
Converts the received optical signals into electrical signals, in the receive direction.
Converts the electrical signals into SDH optical signals, and then sends the SDH optical
signals to fibers for transmission, in the transmit direction.
The SPI detects the R_LOS alarm and provides the laser shut down function.
MUX/DEMUX Module
l
In the receive direction, the DEMUX part demultiplexes the high rate electrical signals into
multiple parallel electrical signals, and recovers the clock signal at the same time.
In the transmit direction, the MUX part multiplexes the parallel electrical signals received
from the SDH overhead processing module into high rate electrical signals.
9-8
RST
Performs frame alignment detection (A1 and A2), regenerator section trace recovery
(J0), and mismatch detection, BIP-8 errored block count, in the receive direction.
Performs frame alignment insertion, regenerator section path tracer insertion, and BIP-8
calculation and insertion, in the transmit direction.
MST
Performs BIP-24 errored block count, MS_REI recovery, and MS_RDI and MS_AIS
detection, in the receive direction.
Performs BIP-24 calculation and insertion, and MS_REI, MS_RDI, and MS_AIS
insertion, in the transmit direction.
MSA
Performs AUG assembly, AU-4 pointer regeneration, and AU_AIS generation, in the
transmit direction.
HPT
Detects the HP_UNEQ and AIS, that is, monitors the signal label.
Issue 02 (2009-07-30)
Traces the clock signal from the active and standby cross-connect units.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
Provides the CPU control unit, which controls and monitors the other functional modules.
The unit also initializes the other functional modules after it is powered on.
Provides the ETH port, which functions as the 10M/100M Ethernet port for network
management.
Provides the OAM interface, which functions as the serial port for network management.
This port can be used as the MODEM port and thus can be configured as a serial port for
connecting to the MODEM port that is in the running state.
Provides the Ethernet port, namely, a 10 Mbit/s Ethernet port, for inter-board
communication between the active and standby CXL units.
Cross-Connect Module
The cross-connect module consists of two parts:
l
SNCP module, which tests relative alarms and reports the alarms to the software to trigger
the protection switching such as the SNCP switching and MSP switching.
Higher order and lower order cross-connect module, which performs the functions of higher
order and lower order cross-connect units.
Other Functions
l
Collects the performance data of the optical module and disables the output of the optical
module.
Inserts the DCC signal back into each line board after processing.
Mutes alarms.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
9-9
CAUTION
The jumpers and DIP switch are used for test and maintenance. Do not change the setting of the
jumper at random. Otherwise, the board may become faulty.
Figure 9-2 shows the jumpers and DIP switch of the Q5CXLLN.
Figure 9-2 Positions of the jumpers and DIP switch of the Q5CXLLN
Power
module
SW1
123 4
J24
3 21
CPU
CF
card
1
2
3
J10
Figure 9-3 shows the jumpers and DIP switch of the Q6CXLLN.
9-10
Issue 02 (2009-07-30)
Figure 9-3 Positions of the jumpers and DIP switch of the Q6CXLLN
Pow er
module
SW1
12 34
CPU
1
2
3
J10
Function
Description
J10
To enable the
battery
J24
To use the
maximum DCC
channels
Issue 02 (2009-07-30)
9-11
Function
Description
J10
To enable the
battery
Function
Description
SW1
Description
0b0000
Indicates the running state when the watchdog is started. It is the default
state.
0b0011
0b0100
0b1011
0b1100
0b1101
0b1110
0b1111
Erases the extended BIOS and system parameter area in the file system
and flash memory.
Issue 02 (2009-07-30)
CXLLN
STAT
ACTX
ACTC
PROG
SRVX
SRVL
SYNC
ALMC
CLASS 1
LASER
PRODUCT
OUT1
IN1
RESET
ALM CUT
CXLLN
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Active/Standby state indicator of the cross-connect unit (ACTX) one color (green)
Active/Standby state indicator of the SCC unit (ACTC) one color (green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator of the cross-connect unit (SRVX) three colors (red, green, and
yellow)
Issue 02 (2009-07-30)
9-13
Service alarm indicator of the line unit (SRVL) three colors (red, green, and yellow)
Synchronization clock status indicator (SYNC) two colors (red and green)
Interfaces
The front panel of the CXLLN has one optical interface and two switches. Table 9-10 describes
the types and usage of the interfaces and switches of the CXLLN.
Table 9-10 Optical interface and switches of the CXLLN
Interface/
Switch
Type of
Interface/
Switch
Usage
IN
LC
OUT
LC
RESET
Warm reset
switch
ALM CUT
Alarm cut
switch
Press the switch to mute the alarm. Press the switch for
five seconds to mute the alarm permanently. Press the
switch again for five seconds to resume the alarm sound.
Displayed Slots
The CXLLN occupies one slot in the subrack.
The logical boards for the Q5CXLLN are the Q2SLN, UXCL, and GSCC.
Table 9-11 lists the slots for the logical boards displayed on the T2000.
9-14
Issue 02 (2009-07-30)
Table 9-11 Logical slots displayed on the T2000 for the Q5CXLLN
Board
Logical
Board
Logical Slot
CXLLN
UCXL
Slot 9 or slot 10
GSCC
Slot 17 or slot 18
Q2SLN
Slot 19 or slot 20
The logical boards for the Q6CXLLN are the Q2SLN, SCXL, and GSCC.
Table 9-12 lists the slots for the logical boards displayed on the T2000.
Table 9-12 Logical slots displayed on the T2000 for the Q6CXLLN
Board
Logical
Board
Logical Slot
CXLLN
SCXL
Slot 9 or slot 10
GSCC
Slot 17 or slot 18
Q2SLN
Slot 19 or slot 20
Board Parameters
You can set the following parameters for the CXLLN by using the T2000:
l
J0 byte
J1 byte
J2 byte
C2 byte
Clock parameters
9-15
Table 9-13 Parameters specified for the optical interfaces of the CXLLN when the STM-1
optical module is used
Parameter
Value
155520 kbit/s
NRZ
Application code
I-1
S-1.1
L-1.1
L-1.2
Ve-1.2
Transmission
distance (km)
0 to 2
2 to 15
20 to 40
60 to 80
80 to 100
Operating
wavelength range
(nm)
1260 to
1360
1261 to
1360
1263 to
1360
1480 to
1580
1480 to
1580
Type of fiber
Singlemode LC
Singlemode LC
Singlemode LC
Singlemode LC
Singlemode LC
Mean launched
optical power
(dBm)
-15 to -8
-15 to -8
-5 to 0
-5 to 0
-3 to 0
Receiver
sensitivity (dBm)
-23
-28
-34
-34
-34
Minimum
overload (dBm)
-8
-8
-10
-10
-10
Minimum
extinction ratio
(dB)
8.2
8.2
10
10
10
Table 9-14 lists the parameters specified for the optical interfaces of the CXLLN when the
STM-1 optical module is used.
Table 9-14 Parameters specified for the optical interfaces of the CXLLN when the STM-4
optical module is used
9-16
Parameter
Value
622080 kbit/s
NRZ
Application code
I-4
S-4.1
L-4.1
L-4.2
Ve-4.2
Transmission
distance (km)
0 to 2
2 to 15
20 to 40
50 to 80
80 to 100
Operating
wavelength range
(nm)
1261 to
1360
1274 to
1356
1280 to
1335
1480 to
1580
1480 to
1580
Issue 02 (2009-07-30)
Parameter
Value
Type of fiber
Singlemode LC
Singlemode LC
Singlemode LC
Singlemode LC
Singlemode LC
Mean launched
optical power
(dBm)
-15 to -8
-15 to -8
-3 to -2
-3 to -2
-3 to -2
Receiver
sensitivity (dBm)
-23
-28
-28
-28
-34
Minimum
overload (dBm)
-8
-8
-8
-8
-13
Minimum
extinction ratio
(dB)
8.2
8.2
10
10
10.5
Table 9-15 lists the parameters specified for the optical interfaces of the CXLLN when the
STM-16 optical module is used.
Table 9-15 Parameters specified for the optical interfaces of the CXLLN when the STM-16
optical module is used
Issue 02 (2009-07-30)
Parameter
Value
2488320 kbit/s
NRZ
Application code
I-16
S-16.1
L-16.1
L-16.2
Transmission
distance (km)
0 to 2
2 to 15
25 to 40
50 to 80
Operating
wavelength range
(nm)
1266 to
1360
1260 to 1360
1280 to 1335
1500 to 1580
Type of fiber
Singlemode LC
Single-mode LC
Single-mode
LC
Single-mode LC
Mean launched
optical power
(dBm)
-10 to -3
-5 to 0
-2 to +3
-2 to +3
Receiver
sensitivity (dBm)
-18
-18
-27
-28
Minimum
overload (dBm)
-3
-9
-9
9-17
Parameter
Value
Minimum
extinction ratio
(dB)
8.2
8.2
8.2
8.2
Cross-Connect Capacity
The cross-connect capacity of the Q5CXLLN is as follows:
l
External input clock: two channels of 2048 kbit/s or 2048 kHz external clock signals
External output clock: two channels of 2048 kbit/s or 2048 kHz external clock signals
Mechanical Specifications
The mechanical specifications of the CXLLN are as follows:
l
Power Consumption
The maximum power consumption of the Q5CXLLN at room temperature (25C) is 32 W.
The maximum power consumption of the Q6CXLLN at room temperature (25C) is 48 W.
9-18
Issue 02 (2009-07-30)
9.2 CXLQ41
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the CXLQ41 (4xSTM-4/STM-1 SCC unit, cross-connect unit, timing
unit, and line unit integrated board).
9.2.1 Version Description
The CXLQ41 is available in two functional versions, namely, Q5 and Q6.
9.2.2 Functions and Features
The CXLQ41 processes SDH signals, controls communication, grooms services, and inputs/
outputs clock signals.
9.2.3 Working Principle and Signal Flow
The CXLQ41 consists of the synchronous timing module, O/E converting module, MUX/
DEMUX module, SDH overhead processing module, communication and control module, crossconnect module, and DC/DC converter.
9.2.4 Jumpers and DIP Switches
The CXLQ41 has jumpers, which are used to set the enable state of the battery, and a DIP switch,
which is used to set the running state of the equipment.
9.2.5 Front Panel
The front panel of the CXLQ41 has indicators, interfaces, a bar code, functional button switches,
and a laser safety class label.
9.2.6 Valid Slots
The CXLQ41 can be installed in slot 9 or slot 10 in the subrack.
9.2.7 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the CXLQ41 indicates the type of optical interface. The CXLQ41 supports
optical modules of different configurations. Therefore, no specific feature code is provided.
9.2.8 Parameter Settings
The physical slot that houses the CXLQ41 is different from the logical slot displayed on the
T2000. You can set the parameters for the CXLQ41 by using the T2000.
9.2.9 Technical Specifications
The technical specifications of the CXLQ41 include the parameters specified for optical
interfaces, cross-connect capacity, clock access capability, laser safety class, mechanical
specifications, and power consumption.
Issue 02 (2009-07-30)
9-19
Description
Functional
versions
Differences
When the Q5CXLQ41 boards are used, the access capacity of slot 8
is 5 Gbit/s and the access capacity of the other service slots is 2.5
Gbit/s.
When the Q6CXLQ41 boards are used, the total access capacity of
slots 7, 8, 11, and 12 is 10 Gbit/s and the total access capacity of the
other service slots is 5 Gbit/s.
None
Substitution
9-20
Function and
Feature
CXLQ41
Basic functions
Specifications of the
optical interface
At the STM-1 level, the standard I-1, S-1.1, L-1.1, L-1.2, and
Ve-1.2 optical interfaces are supported. The optical interfaces of
I-1, S-1.1, L-1.1, and L-1.2 types comply with ITU-T G.957, and
the optical interface of the Ve-1.2 type complies with the standards
defined by Huawei.
At the STM-4 level, the standard I-4, S-4.1, L-4.1, L-4.2, and
Ve-4.2 optical interfaces are supported. The optical interfaces of
the I-4, S-4.1, L-4.1, and L-4.2 types comply with ITU-T G.957,
and the optical interface of the Ve-4.2 type complies with the
standards defined by Huawei.
Issue 02 (2009-07-30)
Function and
Feature
CXLQ41
Specifications of the
optical module
Supports the setting and query of the J0, J1, J2, and C2 bytes.
Service processing
Overhead processing
Alarm and
performance event
Protection scheme
Supports the two-fiber ring MSP, four-fiber ring MSP, linear MSP,
SNCP, SNCTP, and SNCMP.
Maintenance feature
Supports warm resets and cold resets. The warm reset does not
affect services.
SCC Unit
Table 9-18 provides the functions and features of the SCC unit of the CXLQ41.
Issue 02 (2009-07-30)
9-21
Table 9-18 Functions and features of the SCC unit of the CXLQ41
Function and
Feature
CXLQ41
Basic functions
Specifications of the
optical interface
DCC processing
capability
Fan alarm
management
PIU management
Supports the in-service check function for the PIU board and supports
the failure check function for the lightning protection module of the
PIU.
Protection scheme
Cross-Connect Unit
Table 9-19 provides the functions and features of the cross-connect unit of the CXLQ41.
9-22
Issue 02 (2009-07-30)
Table 9-19 Functions and features of the cross-connect unit of the CXLQ41
Function and
Feature
CXLQ41
Basic functions
Fast emergency
channel
Service processing
Protection scheme
Clock Unit
Table 9-20 provides the functions and features of the clock unit of the CXLQ41.
Table 9-20 Functions and features of the clock unit of the CXLQ41
Function and
Feature
CXLQ41
Basic functions
Other functions
Issue 02 (2009-07-30)
9-23
38 MHz
OSC
SETG
T0
155 MHz
PLL
STM-1/
STM-4
O/E
STM-1/
STM-4
E/O
155 Mbit/s/
4x155 Mbit/s
data
DEMUX
O/E
converting
module
Laser
shutdown
MUX
Performance
report
155 Mbit/s/
4x155 Mbit/s
data
SDH overhead
processing module
MS
RS
HPT
MST
A
T
K1/K2 byte
processing
Laser
control
155 MHz
Cross-connect
unit
High-speed
bus
Another CXL
Another crossconnect unit
Cross-connect module
High-speed bus
DCC
DCC
processing
RAM NVRAM
Cross-connect
unit B
DCC
Line unit
Power monitor
Flash
High-speed
bus
Service unit
Service unit
Boot
ROM
Line unit
Tributary unit
AUX/SEI
AUX/SEI
High-speed bus
K1/K2
insertion/
extraction
K1/K2 byte
T1
T2
T3
T4
(clock external output)
Frame header
T0 (reference clock)
ETH port
OAM interface
F&f interface
Phone interface
S1-S4 interface
+3.3 V
Power Fuse
module
Other units
Another CXL
AUX
SEI
EOW
-48 V/-60 V
-48 V/-60 V
Power
module
9-24
Issue 02 (2009-07-30)
Reference signal (T3) from the external synchronous clock source (2 MHz or 2 Mbit/s)
Converts the received optical signals into electrical signals, in the receive direction.
Converts the electrical signals into SDH optical signals, and then sends the SDH optical
signals to fibers for transmission, in the transmit direction.
The SPI detects the R_LOS alarm and provides the laser shut down function.
MUX/DEMUX Module
l
In the receive direction, the DEMUX part demultiplexes the high rate electrical signals into
multiple parallel electrical signals, and recovers the clock signal at the same time.
In the transmit direction, the MUX part multiplexes the parallel electrical signals received
from the SDH overhead processing module into high rate electrical signals.
Issue 02 (2009-07-30)
RST
Performs frame alignment detection (A1 and A2), regenerator section trace recovery
(J0), and mismatch detection, BIP-8 errored block count, in the receive direction.
Performs frame alignment insertion, regenerator section path tracer insertion, and BIP-8
calculation and insertion, in the transmit direction.
MST
Performs BIP-24 errored block count, MS_REI recovery, and MS_RDI and MS_AIS
detection, in the receive direction.
Performs BIP-24 calculation and insertion, and MS_REI, MS_RDI, and MS_AIS
insertion, in the transmit direction.
MSA
Performs AUG assembly, AU-4 pointer regeneration, and AU_AIS generation, in the
transmit direction.
HPT
Detects the HP_UNEQ and AIS, that is, monitors the signal label.
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
9-25
Traces the clock signal from the active and standby cross-connect units.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
Provides the CPU control unit, which controls and monitors the other functional modules.
The unit also initializes the other functional modules after it is powered on.
Provides the ETH port, which functions as the 10M/100M Ethernet port for network
management.
Provides the OAM interface, which functions as the serial port for network management.
This port can be used as the MODEM port and thus can be configured as a serial port for
connecting to the MODEM port that is in the running state.
Provides the Ethernet port, namely, a 10 Mbit/s Ethernet port, for inter-board
communication between the active and standby CXL units.
Cross-Connect Module
The cross-connect module consists of two parts:
l
SNCP module, which tests relative alarms and reports the alarms to the software to trigger
the protection switching such as the SNCP switching and MSP switching.
Higher order and lower order cross-connect module, which performs the functions of higher
order and lower order cross-connect units.
Other Functions
l
Collects the performance data of the optical module and disables the output of the optical
module.
Inserts the DCC signal back into each line board after processing.
Mutes alarms.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
Issue 02 (2009-07-30)
CAUTION
The jumpers and DIP switch are used for test and maintenance. Do not change the setting of the
jumper at random. Otherwise, the board may become faulty.
Figure 9-6 shows the jumpers and DIP switch of the Q5CXLQ41.
Figure 9-6 Positions of the jumpers and DIP switch of the Q5CXLQ41
Power
module
SW1
123 4
J24
3 21
CPU
CF
card
1
2
3
J10
Figure 9-7 shows the jumper and DIP switch of the Q6CXLQ41.
Issue 02 (2009-07-30)
9-27
Figure 9-7 Positions of the jumper and DIP switch of the Q6CXLQ41
Pow er
module
SW1
12 34
CPU
1
2
3
J10
Function
Description
J10
To enable the
battery
J24
To use the
maximum DCC
channels
9-28
Issue 02 (2009-07-30)
Function
Description
J10
To enable the
battery
Function
Description
SW1
Description
0b0000
Indicates the running state when the watchdog is started. It is the default
state.
0b0011
0b0100
0b1011
0b1100
0b1101
0b1110
0b1111
Erases the extended BIOS and system parameter area in the file system
and flash memory.
9-29
CXLQ41
STAT
ACTX
ACTC
PROG
SRVX
SRVL
SYNC
ALMC
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
OUT3
IN3
OUT4
IN4
RESET
ALM CUT
CXLQ41
Indicators
The front panel of the board has the following indicators:
9-30
Board hardware status indicator (STAT) two colors (red and green)
Active/Standby state indicator of the cross-connect unit (ACTX) one color (green)
Active/Standby state indicator of the SCC unit (ACTC) one color (green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator of the cross-connect unit (SRVX) three colors (red, green, and
yellow)
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
Issue 02 (2009-07-30)
Service alarm indicator of the line unit (SRVL) three colors (red, green, and yellow)
Synchronization clock status indicator (SYNC) two colors (red and green)
Interfaces
The front panel of the CXLQ41 has four optical interfaces and two switches. Table 9-25
describes the types and usage of the interfaces and switches of the CXLQ41.
Table 9-25 Optical interfaces and switches of the CXLQ41
Interface/
Switch
Type of
Interface/
Switch
Usage
IN1/OUT1
LC
IN2/OUT2
LC
IN3/OUT3
LC
IN4/OUT4
LC
RESET
Warm reset
switch
ALM CUT
Alarm cut
switch
Press the switch to mute the alarm. Press the switch for
five seconds to mute the alarm permanently. Press the
switch again for five seconds to resume the alarm sound.
9-31
Displayed Slots
The CXLQ41 occupies one slot in the subrack.
Table 9-26 lists the slots for the logical boards displayed on the T2000.
Table 9-26 Logical slots displayed on the T2000 for the Q5CXLQ41
Board
Logical
Board
Logical Slot
CXLQ41
UCXL
Slot 9 or slot 10
GSCC
Slot 17 or slot 18
Q2SLQ41
Slot 19 or slot 20
The logical boards for the Q6CXLQ41 are the Q2SLQ41, SCXL, and GSCC.
Table 9-27 lists the slots for the logical boards displayed on the T2000.
Table 9-27 Logical slots displayed on the T2000 for the Q6CXLQ41
Board
Logical
Board
Logical Slot
CXLQ41
SCXL
Slot 9 or slot 10
GSCC
Slot 17 or slot 18
Q2SLQ41
Slot 19 or slot 20
Board Parameters
You can set the following parameters for the CXLQ41 by using the T2000:
l
J0 byte
J1 byte
J2 byte
C2 byte
Clock parameters
Issue 02 (2009-07-30)
Value
155520 kbit/s
NRZ
Application code
I-1
S-1.1
L-1.1
L-1.2
Ve-1.2
Transmission
distance (km)
0 to 2
2 to 15
20 to 40
60 to 80
80 to 100
Operating
wavelength range
(nm)
1260 to
1360
1261 to
1360
1263 to
1360
1480 to
1580
1480 to
1580
Type of fiber
Singlemode LC
Singlemode LC
Singlemode LC
Singlemode LC
Singlemode LC
Mean launched
optical power
(dBm)
-15 to -8
-15 to -8
-5 to 0
-5 to 0
-3 to 0
Receiver
sensitivity (dBm)
-23
-28
-34
-34
-34
Minimum
overload (dBm)
-8
-8
-10
-10
-10
Minimum
extinction ratio
(dB)
8.2
8.2
10
10
10
Table 9-29 lists the parameters specified for the optical interfaces of the CXLQ41 when the
STM-4 optical module is used.
Table 9-29 Parameters specified for the optical interfaces of the CXLQ41 when the STM-4
optical module is used
Issue 02 (2009-07-30)
Parameter
Value
622080 kbit/s
NRZ
Application code
I-4
S-4.1
L-4.1
L-4.2
Ve-4.2
9-33
Parameter
Value
Transmission
distance (km)
0 to 2
2 to 15
20 to 40
50 to 80
80 to 100
Operating
wavelength range
(nm)
1261 to
1360
1274 to
1356
1280 to
1335
1480 to
1580
1480 to
1580
Type of fiber
Singlemode LC
Singlemode LC
Singlemode LC
Singlemode LC
Singlemode LC
Mean launched
optical power
(dBm)
-15 to -8
-15 to -8
-3 to -2
-3 to -2
-3 to -2
Receiver
sensitivity (dBm)
-23
-28
-28
-28
-34
Minimum
overload (dBm)
-8
-8
-8
-8
-13
Minimum
extinction ratio
(dB)
8.2
8.2
10
10
10.5
Cross-Connect Capacity
The cross-connect capacity of the Q5CXLQ41 is as follows:
l
External input clock: two channels of 2048 kbit/s or 2048 kHz external clock signals
External output clock: two channels of 2048 kbit/s or 2048 kHz external clock signals
Issue 02 (2009-07-30)
Mechanical Specifications
The mechanical specifications of the CXLQ41 are as follows:
l
Power Consumption
The maximum power consumption of the Q5CXLQ41 at room temperature (25C) is 32 W.
The maximum power consumption of the Q6CXLQ41 at room temperature (25C) is 48 W.
9.3 CXS
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the CXS (SCC unit, cross-connect unit, and timing unit integrated
board).
9.3.1 Version Description
The CXS is available in one functional versions, namely, Q5.
9.3.2 Functions and Features
The CXS controls communication, grooms services, and inputs/outputs clock signals.
9.3.3 Working Principle and Signal Flow
The CXS consists of the synchronous timing module, communication and control module, crossconnect module, DC/DC converter.
9.3.4 Jumpers and DIP Switches
The CXS has jumpers, which are used to set the enable state of the battery and the number of
ECCs, and a DIP switch, which is used to set the running state of the equipment.
9.3.5 Front Panel
The front panel of the CXS has indicators, interfaces, a bar code, functional button switches,
and a laser safety class label.
9.3.6 Valid Slots
The CXS can be installed in slot 9 or slot 10 in the subrack.
9.3.7 Parameter Settings
The physical slot that houses the CXS is different from the logical slot displayed on the T2000.
You can set the parameters for the CXS by using the T2000.
9.3.8 Technical Specifications
The technical specifications of the CXS include cross-connect capacity, clock access capability,
laser safety class, mechanical specifications, and power consumption.
Issue 02 (2009-07-30)
9-35
SCC Unit
Table 9-30 provides the functions and features of the SCC unit of the CXS.
Table 9-30 Functions and features of the SCC unit of the CXS
Function and
Feature
CXS
Basic functions
Specifications of the
optical interface
DCC processing
capability
Fan alarm
management
PIU management
Supports the in-service check function for the PIU board and supports
the failure check function for the lightning protection module of the
PIU.
Protection scheme
Cross-Connect Unit
Table 9-31 provides the functions and features of the cross-connect unit of the CXS.
9-36
Issue 02 (2009-07-30)
Table 9-31 Functions and features of the cross-connect unit of the CXS
Function and
Feature
CXS
Basic functions
Fast emergency
channel
Service processing
Protection scheme
Clock Unit
Table 9-32 provides the functions and features of the clock unit of the CXS.
Table 9-32 Functions and features of the clock unit of the CXS
Function and
Feature
CXS
Basic functions
Other functions
9-37
Figure 9-9 shows the functional block diagram of the CXS by describing how to process
1xSTM-1/STM-4 signals.
Figure 9-9 Functional block diagram of the CXS
Time &
synchronization
(SETS)
38MHz
OSC
T1
T2
SETG
T3
T4 (clock external output)
T0
Frame header
T0 (reference clock)
155MHz PLL
High-speed
bus
Line units
Tributary units
PIU
AUX
Service units
Service units
Another
CXS
XC
Cross-connection
(HPC)
High-speed
bus
SCC unit
XC
Cross-connection
(LPC)
ETH channel communication
Master and slaver board
communication
Communication and
control module
ETH interface
OAM interface
Boot
ROM
FLASH
RAM
NVRAM
Power monitor
F&f interface
Phone interface
S1-S4 interface
+3.3 V
DC/DC
converter
Fuse
Other units
Another CXS
AUX
AUX
EOW
-48 V/-60V
-48 V/-60V
DC/DC
converter
9-38
Issue 02 (2009-07-30)
Reference signal (T3) from the external synchronous clock source (2 MHz or 2 Mbit/s)
Traces the clock signal from the active and standby cross-connect units.
Selects the clock signal and frame header signal from the active and standby cross-connect
units.
Provides the CPU control unit, which controls and monitors the other functional modules.
The unit also initializes the other functional modules after it is powered on.
Provides the ETH port, which functions as the 10M/100M Ethernet port for network
management.
Provides the OAM interface, which functions as the serial port for network management.
This port can be used as the MODEM port and thus can be configured as a serial port for
connecting to the MODEM port that is in the running state.
Provides the Ethernet port, namely, a 10 Mbit/s Ethernet port, for inter-board
communication between the active and standby CXL units.
Cross-Connect Module
The cross-connect module consists of two parts:
l
SNCP module, which tests relative alarms and reports the alarms to the software, to trigger
the SNCP switching.
Higher order and lower order cross-connect module, which performs the functions of higher
order and lower order cross-connect units.
Other Functions
l
Mutes alarms.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
9-39
CAUTION
The jumpers and DIP switch are used for test and maintenance. Do not change the setting of the
jumper at random. Otherwise, the board may become faulty.
Figure 9-10 shows the jumpers and DIP switch of the CXS.
Figure 9-10 Positions of the jumpers and DIP switch of the CXS
Power
module
SW1
123 4
J24
3 21
CPU
CF
card
1
2
3
J10
Function
Description
J10
To enable the
battery
J24
To use the
maximum ECC
channels
Issue 02 (2009-07-30)
Function
Description
SW1
Description
0b0000
Indicates the running state when the watchdog is started. It is the default
state.
0b0011
0b0100
0b1011
0b1100
0b1101
0b1110
0b1111
Erases the extended BIOS and system parameter area in the file system
and flash memory.
Issue 02 (2009-07-30)
9-41
CXS
STAT
ACTX
ACTC
PROG
SRVX
SYNC
ALMC
CF R/W
RESET
ALM CUT
CXS
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Active/Standby state indicator of the cross-connect unit (ACTX) one color (green)
Active/Standby state indicator of the SCC unit (ACTC) one color (green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator of the cross-connect unit (SRVX) three colors (red, green, and
yellow)
Synchronization clock status indicator (SYNC) two colors (red and green)
Issue 02 (2009-07-30)
Interfaces
The front panel of the CXS has two switches. Table 9-36 describes the types and usage of the
switches of the CXS.
Table 9-36 Switches of the CXS
Switch
Type of
Switch
Usage
RESET
Warm reset
switch
Press the switch to perform a warm reset for the SCC unit.
ALM CUT
Alarm cut
switch
Press the switch to mute the alarm. Press the switch for five
seconds to mute the alarm permanently. Press the switch
again for five seconds to resume the alarm sound.
Displayed Slots
The CXS occupies one slot in the subrack.
The logical boards for the CXS are the UCXL and GSCC.
Table 9-37 lists the slots for the logical boards displayed on the T2000.
Table 9-37 Logical slots displayed on the T2000 for the CXS
Board
Logical Board
Logical Slot
CXS
UCXL
Slot 9 or slot 10
GSCC
Slot 17 or slot 18
Board Parameters
You can set the following parameters for the CXS by using the T2000:
l
C2 byte
Clock parameters
9-43
Cross-Connect Capacity
The cross-connect capacity of the CXS is as follows:
l
External input clock: two channels of 2048 kbit/s or 2048 kHz external clock signals
External output clock: two channels of 2048 kbit/s or 2048 kHz external clock signals
Mechanical Specifications
The mechanical specifications of the CXS are as follows:
l
Power Consumption
The maximum power consumption of the CXS at room temperature (25C) is 28 W.
9-44
Issue 02 (2009-07-30)
10
10 Auxiliary Boards
Auxiliary Boards
Issue 02 (2009-07-30)
10-1
10 Auxiliary Boards
10.1 EOW
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the EOW (orderwire processing board).
10.1.1 Version Description
The EOW is available in one functional versions, namely, R1.
10.1.2 Functions and Features
The EOW extracts, inserts, and processes the overhead bytes E1 and E2, and other data bytes.
10.1.3 Working Principle and Signal Flow
The EOW consists of the clock module, overhead processing module, and power module.
10.1.4 Front Panel
The front panel of the EOW has indicators and interfaces.
10.1.5 Valid Slots
The EOW can be installed in slot 43 in the subrack.
10.1.6 Technical Specifications
The technical specifications of the EOW include the mechanical specifications and power
consumption.
10-2
Function and
Feature
EOW
Auxiliary interface
The time interface supports the RS-422 level only. The broadcast
data interface supports the RS-422 level and RS-232 level.
Orderwire interface
Overhead
processing
Issue 02 (2009-07-30)
10 Auxiliary Boards
Function and
Feature
EOW
Power supply
checking
Monitors all the power supplies of the board (except the 48 V power),
supports the power supply switching when the primary power supply
enters the undervoltage state, and supports the power overvoltage
alarm and power undervoltage alarm. The undervoltage threshold is
3.45 V and the overvoltage threshold is 3.82 V.
High-precision
time
Supports the time synchronization feature, and complies with the IEEE
1588 V2 protocol.
Clock
module
Serial 1Serial4
E1/E2
Overhead
processing
module
CXL unit
CXL unit
Power
module
-48 V
Clock Module
The clock module extracts and processes the reference clock signal from the CXL.
Issue 02 (2009-07-30)
10-3
10 Auxiliary Boards
A1
A1
A2
A2
A2
J0
B1
E1
F1
D1
D2
D3
Serial 1 Serial2
AU_PTR
B2
B2
D4
Serial 4
B2
K1
K2
D5
D6
D7
D8
D9
D10
D11
D12
S1
M1
Serial3
E2
Power Module
The power module provides the working power supply for the EOW, combines two channels of
48 V power supplies, converts the 48 V power supply into the +3.6 V power supply, switches
the active and standby +3.3 V power supplies, and generates the +1.8 V power supply.
NOTE
The EOW supports the power input in both DC-C mode and DC-I mode. The 48 V ground (BGND) cannot
be connected to the +3.3 V ground (GND) in DC-I mode.
10-4
Issue 02 (2009-07-30)
10 Auxiliary Boards
EOW
STAT
PROG
PHONE
S1
S2
S3
S4
EOW
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Interfaces
The front panel of the EOW has five indicators. Table 10-2 describes the types and usage of the
interfaces of the EOW.
Table 10-2 Interfaces of the EOW
Interface
Type of
Interface
Usage
PHONE
RJ-45
S1
RJ-45
S2
RJ-45
S3
RJ-45
S4
RJ-45
Note: S1/S3 and S2/S4 form a pair of time input and output interfaces.
10-5
10 Auxiliary Boards
Pin
Usage
Transmits signal 1.
Transmits signal 2.
1, 2, 3, 6, 7, 8
Unspecified
Table 10-4 describes the pins of the S1, S2, S3, and S4 interfaces.
Table 10-4 Pins of the S1, S2, S3, and S4 interfaces
Front View
Pin
Usage
Grounding
Unspecified
Mechanical Specifications
The mechanical specifications of the EOW are as follows:
l
10-6
Issue 02 (2009-07-30)
10 Auxiliary Boards
Weight: 0.4 kg
Power Consumption
At room temperature (25C), the maximum power consumption of the EOW is 10 W.
10.2 AUX
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the AUX (system auxiliary interface board).
10.2.1 Version Description
The AUX is available in one functional version, namely, Q1.
10.2.2 Functions and Features
The AUX provides various management and auxiliary interfaces for the system, and provides
the centralized backup for the +3.3 V power supply of the boards in the subrack.
10.2.3 Working Principle and Signal Flow
The AUX consists of the communication module, interface module, and power module.
10.2.4 Jumpers
The AUX has jumpers J1 and J6 that are used to set the input voltage as 48 V or 60 V.
10.2.5 Front Panel
The front panel of the AUX has interfaces of various types.The front panel of the AUX has
indicators and interfaces of various types.
10.2.6 Valid Slots
The AUX can be installed in slot 42 in the subrack.
10.2.7 Technical Specifications
The technical specifications of the AUX include the mechanical specifications and power
consumption.
Issue 02 (2009-07-30)
10-7
10 Auxiliary Boards
AUX
Management
interface
Auxiliary interface
Provides two BITS clock input interfaces and two BITS clock
output interfaces (impedance: 120 ohms).
Provides two BITS clock input interfaces and two BITS clock
output interfaces (impedance: 75 ohms).
Cabinet alarm
indicator
Commissioning
interface
Internal
communication
Alarm interface
10-8
Audible alarm
Supports the audible alarm and the clearing of the audible alarm.
Ethernet port
connection status
checking
Issue 02 (2009-07-30)
Item
10 Auxiliary Boards
AUX
Note: The COM interface is used for internal commissioning only. That is, the COM interface
cannot be used for equipment monitoring. Otherwise, the Ethernet communication between
boards may become abnormal.
SCC A
2-input and 2-output clock
interface
Cabinet alarm indicator interface
Interface
module
SCC B
Crossconnect
unit
16x100/10 Mbit/s
Ethernet bus
Communication module
100/10 Mbit/s
100/10 Mbit/s
Power
module
Other
units
(VLAN B)
SCC A (VLAN A)
SCC B (VLAN A)
-48V
Le ve l
conve rting
+5 V
SEI
Communication Module
This module provides the network management interface for the active and standby GSCC
boards, OAM interface for remote maintenance, and interface for communication between
boards.
Issue 02 (2009-07-30)
10-9
10 Auxiliary Boards
Interface Module
Provides various auxiliary interfaces, including the ETH, OAM, cabinet alarm indicator
interface, and clock input/output interface.
Power Module
This module provides the working power supply for the board and centralized +3.3 V backup
power supply for the other boards.
10.2.4 Jumpers
The AUX has jumpers J1 and J6 that are used to set the input voltage as 48 V or 60 V.
Figure 10-5 shows the positions of the jumpers J1 and J6 on the AUX.
J1
Module
Power
J6
Function
Indication
J1, J6
To select the 48 V or
60 V input voltage
10-10
Issue 02 (2009-07-30)
10 Auxiliary Boards
AUX
ETH
COM
CLK
LAMP1
LAMP2
AUX
Interfaces
The front panel of the AUX has five interfaces. Table 10-7 describes the types and usage of the
interfaces of the AUX.
Table 10-7 Interfaces of the AUX
Interface
Type of
Interface
Usage
ETH
RJ-45
NM interface
COM
RJ-45
Commissioning interface
CLK
RJ-45
LAMP1
RJ-45
LAMP2
RJ-45
10-11
10 Auxiliary Boards
Pin
Usage
Table 10-9 describes the pins of the ETH and COM interfaces.
Table 10-9 Pins of the ETH and COM interfaces
Front View
Pin
Usage
Transmitting (+)
Transmitting ()
Receiving (+)
Unspecified
Unspecified
Receiving ()
7, 8
Unspecified
Table 10-10 describes the pins of the LAMP1 and LAMP2 interfaces.
Table 10-10 Pins of the LAMP1 and LAMP2 interfaces
Front View
10-12
Pin
Usage
Issue 02 (2009-07-30)
Front View
10 Auxiliary Boards
Pin
Usage
Figure 10-7 shows the connections when one or multiple cabinets input or output alarm signals.
Connect the alarm output interface to the alarm cascading interface of a lower level. Make the
connections one by one until the alarm output is connected to the centralized alarm system.
Figure 10-7 Connections for alarm input, alarm cascading, and alarm output
Cabinet1
Cabinet2
Subrack1
Centralized
alarm system
Subrack3
ALMO1
ALMO1
ALMO2
ALMO2
ALMI1
ALMI1
Subrack2
Subrack4
ALMO1
ALMO1
ALMO2
ALMO2
ALMI1
ALMI1
Figure 10-8 shows the connections of the 4-channel cabinet alarm indicators. Connect LAMP1
of subrack 2 to LAMP2 of subrack 1. Finally, connect LAMP1 of subrack 1 to the indicator
interface at the top of the cabinet.
Issue 02 (2009-07-30)
10-13
10 Auxiliary Boards
Cabinet indicator
subrack 1
LAMP1
LAMP2
subrack 2
LAMP1
LAMP2
Mechanical Specifications
The mechanical specifications of the AUX are as follows:
l
Weight: 0.5 kg
Weight: 1.0 kg
Power Consumption
At room temperature (25C), the maximum power consumption of the AUX is 12 W.
10.3 SEI
This topic describes the version, functions, working principle, front panel, valid slots and
technical specifications of the SEI (signal extended interface board).
10.3.1 Version Description
The SEI is available in one functional version, namely, N1.
10.3.2 Functions and Features
The SEI provides various auxiliary and management interfaces for the equipment.
10.3.3 Working Principle and Signal Flow
10-14
Issue 02 (2009-07-30)
10 Auxiliary Boards
The SEI consists of the cabinet alarm indicator and alarm cascading circuit, and the interface
protection and filter circuit.
10.3.4 Front Panel
The front panel of the SEI has interfaces of various types.
10.3.5 Valid Slots
The SEI can be installed in slot 32 in the subrack. This slot can also house the interface board.
10.3.6 Technical Specifications
The technical specifications of the SEI include the mechanical specifications and power
consumption.
SEI
Management
interface
Auxiliary interface
Clock interface
Alarm interface
Issue 02 (2009-07-30)
10-15
10 Auxiliary Boards
Cabinet alarm
indicator and
alarm cascading
circuit
Cabinet indicator
output
Alarm cascading
protection and
filter Interface
circuit
OAM interface
F&f
Phone
NNI phone
S1-S4
F1
Alarm input/output
OAM
SAP
CXL unit
F&f interface
This module also provides physical interfaces for all the previously listed interfaces.
10-16
Issue 02 (2009-07-30)
10 Auxiliary Boards
SEI
CLKO2
CLKI2
CLKO1
CLKI1
F1
OAM
F&f
ALMO1
ALMO2
ALMI1
ALMI2
ALMI3
ALMI4
SEI
Interfaces
The front panel of the SEI has five interfaces. Table 10-12 describes the types and usage of the
interfaces of the SEI.
Table 10-12 Interfaces of the SEI
Issue 02 (2009-07-30)
Interfac
e
Type of
Interface
Usage
Interfa
ce
Type of
Interfa
ce
Usage
ALMO1
RJ-45
F1
RJ-45
F1 interface
10-17
10 Auxiliary Boards
Interfac
e
Type of
Interface
Usage
Interfa
ce
Type of
Interfa
ce
Usage
ALMO2
RJ-45
Cascading interface
for 4-channel alarm
inputs
F&f
RJ-45
F&f interface
ALMI1
RJ-45
CLKO1
SMB
75-ohm clock
output 1
ALMI2
RJ-45
CLKI1
SMB
ALMI3
RJ-45
CLKO2
SMB
75-ohm clock
output 2
ALMI4
RJ-45
CLKI2
SMB
OAM
RJ-45
OAM interface
Pin
Usage
Receiving ()
Receiving (+)
Grounding
Transmitting ()
Transmitting (+)
Grounding
7, 8
Unspecified
10-18
Issue 02 (2009-07-30)
10 Auxiliary Boards
Pin
Usage
Transmitting (+)
Transmitting ()
Receiving (+)
Unspecified
Unspecified
Receiving ()
7, 8
Unspecified
Pin
Usage
Grounding
1, 2, 3, 6, 7
Unspecified
Table 10-16 describes the pins of the PHONE, V1, and V2 interfaces.
Table 10-16 Pins of the PHONE, V1, and V2 interfaces
Front View
Pin
Usage
Signal 1
Signal 2
1, 2, 3, 6, 7, 8
Unspecified
Table 10-17 describes the pins of the LAMP1 and LAMP2 interfaces.
Issue 02 (2009-07-30)
10-19
10 Auxiliary Boards
Pin
Usage
Table 10-18 describes the pins of the ALM01 and ALM02 interfaces.
Table 10-18 Pins of the ALM01 and ALM02 interfaces
Front View
Pin
Usage
10-20
Issue 02 (2009-07-30)
10 Auxiliary Boards
Pin
Usage
Transmits data.
Grounding
Grounding
Receives data.
Table 10-20 describes the pins of the S1, S2, S3, and S4 interfaces.
Table 10-20 Pins of the S1, S2, S3, and S4 interfaces
Front View
Pin
Usage
Grounding
Unspecified
Issue 02 (2009-07-30)
10-21
10 Auxiliary Boards
Pin
Usage
Alarm input 1
Alarm input 2
Alarm input 3
Alarm input 4
Pin
Usage
Alarm input 5
Alarm input 6
Alarm input 7
Alarm input 8
10-22
Issue 02 (2009-07-30)
10 Auxiliary Boards
Figure 10-11 Connections for alarm input, alarm cascading, and alarm output
To the
centralized
alarm system
ALMO1 ALMO2
ALMO1 ALMO2
Subrack 1
Subrack 3
ALMO1 ALMO2
ALMO1 ALMO2
Subrack 2
Subrack 4
Cabinet 1
Cabinet 2
Mechanical Specifications
The mechanical specifications of the SEI are as follows:
l
Weight: 0.9 kg
Power Consumption
At room temperature (25C), the maximum power consumption of the SEI is 1 W.
10.4 FAN/FANB
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the FAN/FANB (fan board).
10.4.1 Version Description
The FAN/FANB is available in one functional version, namely, N1.
10.4.2 Functions and Features
The FAN/FANBadjusts the fan speed, checks the fan status, reports the fault of the fan control
board, and reports the off-position alarm of the fan.
10.4.3 Working Principle and Signal Flow
Issue 02 (2009-07-30)
10-23
10 Auxiliary Boards
The FAN consists of the fan control unit and fan power supply unit.
10.4.4 Front Panel
The front panel of the FAN has indicators.
10.4.5 Valid Slots
The FAN/FANB can be installed in slots 4446 in the subrack.
10.4.6 Technical Specifications
The technical specifications of the FAN include the mechanical specifications, power
consumption, and working voltages.
FAN
Function of
intelligent speed
adjustment
Hot swapping
function
Provides the hot swapping function for the fan tray assembly.
Backup function
Provides the mutual backup function for the power supplies of the
fans in the fan tray assemblies.
Status checking
Alarm function
NOTE
When one fan tray assembly of the three fan three assemblies fails, the system can work normally for
96 hours at the ambient temperature ranging from 0C to 45C.
The fan tray assembly must be replaced when one or more fans in each fan tray assembly of the three
fan tray assemblies are faulty.
10-24
Issue 02 (2009-07-30)
10 Auxiliary Boards
Fan control
unit
Fan
Alarm signal
Power
Fan power
supply
unit
Fan control
unit
Alarm signal
Fan
Power
Fan power
supply
unit
XE1FAN
The fan control unit controls the operation speed of the fan through the speed adjusting signal.
The fan control unit also detects its faults, faults in the fans, and faults in the fan power supply
Issue 02 (2009-07-30)
10-25
10 Auxiliary Boards
unit. When detecting any fault, the fan control unit reports alarm information and the SCC then
issues commands to enable other fans to operate at full speed. The fan control unit also receives
commands from the SCC when the temperature is very low, and stops the fans. The fan control
unit detects the fault in the fan power supply unit, speed adjusting signal, fan state, and in-position
state of the FAN.
l
XE3FAN
The fan control unit controls the operation speed of the fan through the speed adjusting signal.
The fan control unit also detects faults in the fans and itself. When detecting any fault, the fan
control unit reports alarm information and the SCC then issues commands to enable other fans
to operate at full speed. The fan control unit also receives commands from the SCC when the
temperature is very low, and stops the fans. The fan control unit detects the fault in the speed
adjusting signal, fan state, and in-position state of the FAN.
Issue 02 (2009-07-30)
10 Auxiliary Boards
Mechanical Specifications
The mechanical specifications of the FAN are as follows:
l
Power Consumption
At room temperature (25C), the maximum power consumption of each fan assembly of the
XE1FAN is 16 W when the input voltage is -48 V.
At room temperature (25C), the maximum power consumption of each fan assembly of the
XE3FAN is 16 W when the input voltage is -48 V.
Working Voltages
The working voltages of the FAN can be -48 V20% DC or -60 V20% DC.
10.5 FANA
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the FANA (fan board).
10.5.1 Version Description
The FANA is available in one functional version, namely, N1.
10.5.2 Function and Feature
The FANA adjusts the fan speed, checks the fan status, reports the fault of the fan control board,
and reports the off-service alarm of the fan.
10.5.3 Working Principle and Signal Flow
The fan unit of the TE2FANA consists of the fan control unit and fans.
10.5.4 Front Panel
The front panel of the FANA has indicators.
10.5.5 Valid Slots
The FANA can be installed in slots 4446 in the subrack.
10.5.6 Technical Specifications
The technical specifications of the FANA include the mechanical specifications, power
consumption, and working voltages.
10-27
10 Auxiliary Boards
FANA
Function of
intelligent speed
adjustment
Hot swapping
function
Provides the hot swapping function for the fan tray assembly.
Backup function
The TE2FANA does not support the mutual backup function for the
power supplies of the fans in the fan tray assemblies. The power
modules inside the fan tray assemblies function as a backup for each
other.
Status checking
Alarm function
Ensures that the fan operates at full speed, when the speed
adjustment signal is abnormal.
NOTE
When one fan tray assembly of the three fan three assemblies fails, the system can work normally for
96 hours at the ambient temperature ranging from 0C to 45C.
The fan tray assembly must be replaced when one or more fans in each fan tray assembly of the three
fan tray assemblies are faulty.
10-28
Issue 02 (2009-07-30)
10 Auxiliary Boards
Fan control
unit
Fan
Alarm signal
External power
supply 2
External power
supply 1
Issue 02 (2009-07-30)
10-29
10 Auxiliary Boards
Indicators
The indicator (STATE) on the front panel of the board indicates the running state of the hardware.
This indicator is red, green, or yellow when it is on.
For the meanings of the status of the indicator, see A Indicators.
Mechanical Specifications
The mechanical specifications of the FANA are as follows:
l
Power Consumption
The maximum power consumption of the FANA at room temperature (25C) is 19 W when the
input voltage is -48 V.
Working Voltages
The working voltages of the FANA can be -48 V/-60 V20% DC.
10-30
Issue 02 (2009-07-30)
11 WDM Boards
11
WDM Boards
Issue 02 (2009-07-30)
11-1
11 WDM Boards
11.1 CMR2
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the TN11CMR2 (2-channel optical add/drop multiplexing board).
11.1.1 Version Description
The CMR2 is available in one functional version, namely, TN11.
11.1.2 Functions and Features
The CMR2 is applied to the coarse wavelength division multiplexing (CWDM) system. The
channel spacing is 20 nm. The CMR2 supports the add/drop multiplexing function and channel
expansion function.
11.1.3 Working Principle and Signal Flow
The CMR2 consists of the OADM module, communication and control module, and power
module.
11.1.4 Front Panel
The front panel of the CMR2 has indicators, interfaces, and a laser safety class label.
11.1.5 Valid Slots
The CMR2 can be installed in slots 28 and 1116 in the subrack.
11.1.6 Feature Code
The feature code of the CMR2 contains eight characters, which indicate the wavelengths of the
two channels of optical signals processed by the CMR2.
11.1.7 Technical Specifications
The technical specifications of the CMR2 include the parameters specified for optical interfaces,
laser safety class, mechanical specifications, and power consumption.
11-2
Function and
Feature
CMR2
Basic functions
Channel expansion
Issue 02 (2009-07-30)
11 WDM Boards
IN
D2
MO
MI
Drop optical
module
A1
A2
Add optical
module
OUT
OADM optical
module
Control
Memory
CPU
Communication
Required
voltage
DC power supply
from a backplane
Backplane
(controlled by SCC)
SCC
The CMR2 contains the OADM module that adds, drops, and multiplexes two channels of
signals. In addition, the CMR2 provides the interface to cascade another optical add/drop
multiplexing board to increase the add/drop capability. The CMR2 is a passive board and does
not have an interface with the backplane.
OADM Module
The board receives one multiplexed optical signal that is sent by the upstream station on the IN
interface. Then, the drop optical module drops two wavelengths from the signal through optical
interfaces D01 and D02. The two dropped wavelengths are transmitted through the MO optical
interface.
The board receives one multiplexed signal that travels over the main optical path on the MI
optical interface. Then, the add optical module adds two wavelengths through optical interfaces
A01 and A02 and multiplexes them with the signal on the main optical path into one signal. This
multiplexed signal is transmitted through the OUT interface.
Issue 02 (2009-07-30)
11-3
11 WDM Boards
Collects the following information of each functional module of the board: alarms,
performance events, working status, and voltage detection.
DC/DC Converter
It converts 48 V DC or 60 V DC into a voltage required by each module of the board.
CMR2
STAT
LASER
RADIATION
DO NOT VIEW DIRECTLY
WITH OPTICAL
INSTRUMENTS
CLASS 1M LASER
PRODUCT
OUT
IN
MO
MI
D1
A1
D2
A2
CMR2
11-4
Issue 02 (2009-07-30)
11 WDM Boards
Indicator
The front panel of the CMR2 has one indicator as follows: board hardware status indicator
(STAT) two colors (red and green)
For the meanings of the status of the indicator, see A Indicators.
Interfaces
The front panel of the CMR2 has eight optical interfaces. Table 11-2 describes the types and
usage of the optical interfaces of the CMR2.
Table 11-2 Optical interfaces of the CMR2
Interface
Type of
Interface
Usage
A1A2
LC
D1D2
LC
IN
LC
OUT
LC
MO
LC
MI
LC
Issue 02 (2009-07-30)
11-5
11 WDM Boards
Indication
Description
Wavelength of optical
signals
Wavelength of optical
signals
Consider the TN11CMR2 whose feature code is "14711571" as an example. The meaning of
the feature code of the TN11CMR2 is as follows:
l
"1471" indicates that the wavelength of the first channel of optical signals is 1471 nm.
"1571" indicates that the wavelength of the second channel of optical signals is 1571 nm.
Parameter
Value
1271 to 1611
20
IN-D1
IN-D2
6.5
1.5
> 25
Non-adjacent channel
isolation (dB)
> 35
6.5
A1-OUT
A2-OUT
11-6
Issue 02 (2009-07-30)
Optical
Interface
11 WDM Boards
Parameter
Value
1.5
IN-MO
MI-OUT
1.0
Isolation (dB)
> 13
> 40
Mechanical Specifications
The mechanical specifications of the CMR2 are as follows:
l
Power Consumption
The power consumption of the CMR2 at room temperature (25C) is 0 W.
11.2 CMR4
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the TN11CMR4 (4-channel optical add/drop multiplexing board).
11.2.1 Version Description
The CMR4 is available in one functional version, namely, TN11.
11.2.2 Functions and Features
The CMR4 is applied to the CWDM system. The channel spacing is 20 nm. The CMR4 supports
the add/drop multiplexing function and channel expansion function.
11.2.3 Working Principle and Signal Flow
The CMR4 consists of the OADM module, communication and control module, and power
module.
11.2.4 Front Panel
The front panel of the CMR4 has indicators, interfaces, and a laser safety class label.
11.2.5 Valid Slots
The CMR4 can be installed in slots 28 and 1116 in the subrack.
11.2.6 Feature Code
The feature code of the CMR4 contains eight characters, which indicate the wavelengths of the
four channels of optical signals processed by the CMR4.
Issue 02 (2009-07-30)
11-7
11 WDM Boards
CMR4
Basic functions
Channel expansion
11-8
Issue 02 (2009-07-30)
11 WDM Boards
MO
MI
Drop
IN
Add
OUT
OADM module
Pow er module
DC/DC
converter
Delayed
startup
Fuse
SCC
Backplane
-48 V/-60 V
-48 V/-60 V
SCC
OADM Module
The board receives one multiplexed optical signal that is sent by the upstream station on the IN
interface. Then, the drop optical module drops four wavelengths from the signal through optical
interfaces D01D04. The four dropped wavelengths are transmitted through the MO optical
interface.
The board receives one multiplexed signal that travels over the main optical path on the MI
optical interface. Then, the add optical module adds four wavelengths through optical interfaces
A01A04 and multiplexes them with the signal on the main optical path into one signal. This
multiplexed signal is transmitted through the OUT interface.
Collects the following information of each functional module of the board: alarms,
performance events, working status, and voltage detection.
DC/DC Converter
It converts 48 V DC or 60 V DC into a voltage required by each module of the board.
Issue 02 (2009-07-30)
11-9
11 WDM Boards
CMR4
STAT
LASER
RADIATION
DO NOT VIEW DIRECTLY
WITH OPTICAL
INSTRUMENTS
CLASS 1M LASER
PRODUCT
OUT
IN
MO
MI
D1
A1
D2
A2
D3
A3
D4
A4
CMR4
Indicators
The front panel of the CMR4 has one indicator as follows: board hardware status indicator
(STAT) two colors (red and green)
For the meanings of the status of the indicator, see A Indicators.
11-10
Issue 02 (2009-07-30)
11 WDM Boards
Interfaces
The front panel of the CMR4 has 12 optical interfaces. Table 11-6 describes the types and usage
of the optical interfaces of the CMR4.
Table 11-6 Optical interfaces of the CMR4
Interface
Type of
Interface
Usage
A1A4
LC
D1D4
LC
IN
LC
OUT
LC
MO
LC
MI
LC
Issue 02 (2009-07-30)
Feature Code
Indication
Description
Wavelength of optical
signals
11-11
11 WDM Boards
Feature Code
Indication
Description
Wavelength of optical
signals
Wavelength of optical
signals
Wavelength of optical
signals
Consider the TN11CMR4 whose feature code is "47495961" as an example. The meaning of
the feature code of the TN11CMR4 is as follows:
l
"47" indicates that the wavelength of the first channel of optical signals is 1471 nm.
"49" indicates that the wavelength of the second channel of optical signals is 1491 nm.
"59" indicates that the wavelength of the third channel of optical signals is 1591 nm.
"61" indicates that the wavelength of the fourth channel of optical signals is 1611 nm.
11-12
Optical
Interface
Parameter
Value
20
Issue 02 (2009-07-30)
11 WDM Boards
Optical
Interface
Parameter
Value
IN-D1
IN-D2
IN-D3
IN-D4
6.5
> 25
Non-adjacent channel
isolation (dB)
> 35
A1-OUT
A2-OUT
A3-OUT
A4-OUT
6.5
IN-MO
MI-OUT
1.5
Isolation (dB)
> 13
> 40
Mechanical Specifications
The mechanical specifications of the CMR4 are as follows:
l
Power Consumption
The power consumption of the CMR4 at room temperature (25C) is 0 W.
11.3 MR2
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the TN11MR2 (2-channel optical add/drop multiplexing board).
11.3.1 Version Description
The MR2 is available in one functional version, namely, TN11.
11.3.2 Functions and Features
Issue 02 (2009-07-30)
11-13
11 WDM Boards
The MR2 is applied to the dense wavelength division multiplexing (DWDM) system. The
channel spacing is 0.8 nm. The MR2 supports the add/drop multiplexing function and channel
expansion function.
11.3.3 Working Principle and Signal Flow
The MR2 consists of the OADM module, communication and control module, and power
module.
11.3.4 Front Panel
The front panel of the MR2 has indicators, interfaces, and a laser safety class label.
11.3.5 Valid Slots
The MR2 can be installed in slots 28 and 1116 in the subrack.
11.3.6 Feature Code
The feature code of the MR2 contains eight characters, which indicate the frequencies of the
two channels of optical signals processed by the MR2.
11.3.7 Technical Specifications
The technical specifications of the MR2 include the parameters specified for optical interfaces,
laser safety class, mechanical specifications, and power consumption.
MR2
Basic functions
Channel expansion
11-14
Issue 02 (2009-07-30)
11 WDM Boards
IN
D2
MO
MI
Drop optical
module
A1
A2
Add optical
module
OUT
OADM optical
module
Control
Memory
CPU
Communication
Required
voltage
DC power supply
from a backplane
Backplane
(controlled by SCC)
SCC
OADM Module
The board receives one multiplexed optical signal that is sent by the upstream station on the IN
interface. Then, the drop optical module drops two wavelengths from the signal through optical
interfaces D01 and D02. The two dropped wavelengths are transmitted through the MO optical
interface.
The board receives one multiplexed signal that travels over the main optical path on the MI
optical interface. Then, the add optical module adds two wavelengths through optical interfaces
A01 and A02 and multiplexes them with the signal on the main optical path into one signal. This
multiplexed signal is transmitted through the OUT interface.
Collects the following information of each functional module of the board: alarms,
performance events, working status, and voltage detection.
DC/DC Converter
It converts 48 V DC or 60 V DC into a voltage required by each module of the board.
Issue 02 (2009-07-30)
11-15
11 WDM Boards
MR2
STAT
LASER
RADIATION
DO NOT VIEW DIRECTLY
WITH OPTICAL
INSTRUMENTS
CLASS 1M LASER
PRODUCT
OUT
IN
MO
MI
D1
A1
D2
A2
MR2
Indicators
The front panel of the MR2 has one indicator as follows: board hardware status indicator (STAT)
two colors (red and green)
For the meanings of the status of the indicator, see A Indicators.
11-16
Issue 02 (2009-07-30)
11 WDM Boards
Interfaces
The front panel of the MR2 has eight optical interfaces. Table 11-10 describes the types and
usage of the optical interfaces of the MR2.
Table 11-10 Optical interfaces of the MR2
Interface
Type of
Interface
Usage
A1A2
LC
D1D2
LC
IN
LC
OUT
LC
MO
LC
MI
LC
Issue 02 (2009-07-30)
Feature Code
Indication
Description
11-17
11 WDM Boards
Feature Code
Indication
Description
Consider the TN11MR2 whose feature code is "93609370" as an example. The meaning of the
feature code of the TN11MR2 is as follows:
l
"9360" indicates that the frequency of the first channel of optical signals is 193.60 THz.
"9370" indicates that the frequency of the second channel of optical signals is 193.70 THz.
Parameter
Value
1529 to 1561
100
IN-D1
IN-D2
0.11
1.5
> 25
Non-adjacent channel
isolation (dB)
> 35
0.11
1.5
1.0
A1-OUT
A2-OUT
IN-MO
11-18
Issue 02 (2009-07-30)
11 WDM Boards
Optical
Interface
Parameter
Value
MI-OUT
Isolation (dB)
> 13
> 40
Mechanical Specifications
The mechanical specifications of the MR2 are as follows:
l
Power Consumption
The power consumption of the MR2 at room temperature (25C) is 0 W.
11.4 MR2A
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the MR2A (2-channel optical add/drop multiplexing board).
11.4.1 Version Description
The MR2A is available in one functional version, namely, N1.
11.4.2 Functions and Features
The MR2A is applied to the DWDM system. The channel spacing is 0.8 nm. The MR2A supports
the add/drop multiplexing function between any two adjacent wavelengths.
11.4.3 Working Principle and Signal Flow
The MR2A consists of the OADM module.
11.4.4 Front Panel
The front panel of the MR2A has interfaces and a laser safety class label.
11.4.5 Valid Slots
The MR2A can be installed in slots 28 and 1116 in the subrack.
11.4.6 Technical Specifications
The technical specifications of the MR2A include the parameters specified for optical interfaces,
laser safety class, mechanical specifications, and power consumption.
11-19
11 WDM Boards
MR2A
Basic functions
Adds/Drops any two adjacent standard wavelengths defined in ITUT G.692 (DWDM). The signals are transparently transmitted and the
operating wavelength ranges from 1535.82 nm to 1560.61 nm.
OTM function
OADM function
Central wavelength
Figure 11-7 One MR2A board working as a two-channel add/drop OTM station
D2
D1
IN
MO
Drop
OUT
MI
Add
MR2A
A1
A2
Figure 11-8 Two MR2A boards being cascaded to work as a four-channel add/drop OTM station
D2
D1
IN
Drop
OUT
MO IN
MR2A
D2
Drop
MI OUT
Add
MO
MI
Add
MR2A
A1
11-20
D1
A2
A1
A2
Issue 02 (2009-07-30)
11 WDM Boards
Figure 11-9 MR2A and LWX working as a two-channel add/drop OADM station
LWX
A2
D2
MO
Out
MI
MR2A
In
D1
A1
LWX
IN
D02
MO
MI
Drop
A01
A02
Add
OUT
OADM
module
The MR2A contains the OADM module that adds, drops, and multiplexes two channels of
signals. In addition, the MR2A provides the interface to cascade another optical add/drop
multiplexing board to increase the add/drop capability. The MR2A is a passive board and does
not have an interface with the backplane.
OADM Module
The board receives one multiplexed optical signal that is sent by the upstream station on the IN
interface. Then, the drop optical module drops two wavelengths from the signal through optical
interfaces D01 and D02. The two dropped wavelengths are transmitted through the MO optical
interface.
Issue 02 (2009-07-30)
11-21
11 WDM Boards
The board receives one multiplexed signal that travels over the main optical path on the MI
optical interface. Then, the add optical module adds two wavelengths through optical interfaces
A01 and A02 and multiplexes them with the signal on the main optical path into one signal. This
multiplexed signal is transmitted through the OUT interface.
MR2A
CLASS 1
LASER
PRODUCT
OUT
IN
MO
MI
D1
A1
D2 A2
MR2A
11-22
Issue 02 (2009-07-30)
11 WDM Boards
Interfaces
The front panel of the MR2A has four LC optical interfaces. Table 11-14 describes the types
and usage of the optical interfaces of the MR2A.
Table 11-14 Optical interfaces of the MR2A
Interface
Type of
Interface
Usage
A01A02
LC
D01D02
LC
IN
LC
OUT
LC
MO/MI
LC
Issue 02 (2009-07-30)
Parameter
Value
Operating wavelength
range (nm)
NRZ
100
<2
> 25
11-23
11 WDM Boards
Parameter
Value
Non-adjacent channel
isolation (dB)
> 35
< 0.11
Mechanical Specifications
The mechanical specifications of the MR2A are as follows:
l
Power Consumption
The maximum power consumption of the MR2A at room temperature (25C) is 0 W.
11.5 MR2C
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the MR2C (2-channel optical add/drop multiplexing board).
11.5.1 Version Description
The MR2C is available in one functional version, namely, N1.
11.5.2 Functions and Features
The MR2C is applied to the DWDM system. The channel spacing is 0.8 nm. The MR2C supports
the add/drop multiplexing function between any two adjacent wavelengths.
11.5.3 Working Principle and Signal Flow
The MR2C consists of the OADM module.
11.5.4 Front Panel
The front panel of the MR2C has interfaces and a laser safety class label.
11.5.5 Valid Slots
The MR2C can be installed in slots 2140 in the subrack.
11.5.6 Technical Specifications
The technical specifications of the MR2C include the parameters specified for optical interfaces,
laser safety class, mechanical specifications, and power consumption.
Issue 02 (2009-07-30)
11 WDM Boards
MR2C
Basic functions
OTM function
OADM function
Central wavelength
Figure 11-12 One MR2C board working as a two-channel add/drop OTM station
D2
D1
IN
Drop
OUT
MO
MI
Add
MR2C
A1
Issue 02 (2009-07-30)
A2
11-25
11 WDM Boards
Figure 11-13 Two MR2C boards being cascaded to work as a four-channel add/drop OTM
station
D2
D1
IN
D1
MO IN
Drop
OUT
MR2C
MO
Drop
MI OUT
Add
D2
MI
Add
MR2C
A1
A2
A1
A2
Figure 11-14 MR2C and LWX working as a two-channel add/drop OADM station
LWX
A2
D2
MO
Out
MR2C
In
D1
MI
A1
LWX
IN
D02
MO
MI
Drop
A01
A02
Add
OUT
OADM
module
11-26
Issue 02 (2009-07-30)
11 WDM Boards
The MR2C contains the OADM module that adds, drops, and multiplexes two channels of
signals. In addition, the MR2C provides the interface to cascade another optical add/drop
multiplexing board to increase the add/drop capability. The MR2C is a passive board and does
not have an interface with the backplane.
OADM Module
The board receives one multiplexed optical signal that is sent by the upstream station on the IN
interface. Then, the drop optical module drops two wavelengths from the signal through optical
interfaces D01 and D02. The two dropped wavelengths are transmitted through the MO optical
interface.
The board receives one multiplexed signal that travels over the main optical path on the MI
optical interface. Then, the add optical module adds two wavelengths through optical interfaces
A01 and A02 and multiplexes them with the signal on the main optical path into one signal. This
multiplexed signal is transmitted through the OUT interface.
Issue 02 (2009-07-30)
11-27
11 WDM Boards
MR2C
OUT AO1
AO2
MI
MO
DO2
DO1
IN
CLASS 1
LASER
PRODUCT
MR2C
Interfaces
The front panel of the MR2C has four pairs of LC optical interfaces. Table 11-17 describes the
types and usage of the optical interfaces of the MR2C.
Table 11-17 Optical interfaces of the MR2C
11-28
Interface
Type of
Interface
Usage
A01A02
LC
D01D02
LC
IN
LC
OUT
LC
Issue 02 (2009-07-30)
11 WDM Boards
Interface
Type of
Interface
Usage
MO/MI
LC
Value
Operating wavelength
range (nm)
NRZ
100
<2
> 25
Non-adjacent channel
isolation (dB)
> 35
< 0.11
Issue 02 (2009-07-30)
11-29
11 WDM Boards
Mechanical Specifications
The mechanical specifications of the MR2C are as follows:
l
Power Consumption
The maximum power consumption of the MR2C at room temperature (25C) is 0 W.
11.6 MR4
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the TN11MR4 (4-channel optical add/drop multiplexing board).
11.6.1 Version Description
The MR4 is available in one functional version, namely, TN11.
11.6.2 Functions and Features
The MR4 is applied to the DWDM system. The channel spacing is 0.8 nm. The MR4 supports
the add/drop multiplexing function and channel expansion function.
11.6.3 Working Principle and Signal Flow
The MR4 consists of the OADM module, communication and control module, and power
module.
11.6.4 Front Panel
The front panel of the MR4 has indicators, interfaces, and a laser safety class label.
11.6.5 Valid Slots
The MR4 can be installed in slots 28 and 1116 in the subrack.
11.6.6 Feature Code
The feature code of the MR4 contains eight characters, which indicate the frequencies of the
first channel and fourth channel of optical signals processed by the MR4.
11.6.7 Technical Specifications
The technical specifications of the MR4 include the parameters specified for optical interfaces,
laser safety class, mechanical specifications, and power consumption.
11-30
Issue 02 (2009-07-30)
11 WDM Boards
MR4
Basic functions
Channel expansion
MO
MI
Drop
IN
Add
OUT
OADM module
Pow er module
DC/DC
converter
Delayed
startup
Fuse
SCC
Backplane
-48 V/-60 V
-48 V/-60 V
SCC
OADM Module
The board receives one multiplexed optical signal that is sent by the upstream station on the IN
interface. Then, the drop optical module drops four wavelengths from the signal through optical
Issue 02 (2009-07-30)
11-31
11 WDM Boards
interfaces D01D04. The four dropped wavelengths are transmitted through the MO optical
interface.
The board receives one multiplexed signal that travels over the main optical path on the MI
optical interface. Then, the add optical module adds four wavelengths through optical interfaces
A01A04 and multiplexes them with the signal on the main optical path into one signal. This
multiplexed signal is transmitted through the OUT interface.
Collects the following information of each functional module of the board: alarms,
performance events, working status, and voltage detection.
DC/DC Converter
It converts 48 V DC or 60 V DC into a voltage required by each module of the board.
11-32
Issue 02 (2009-07-30)
11 WDM Boards
MR4
STAT
OUT
IN
MO
IN
D1
A1
D2
A2
D3
A3
D4
A4
LASER
RADIATION
DO NOT VIEW DIRECTLY
WITH OPTICAL
INSTRUMENTS
CLASS 1M LASER
PRODUCT
MR4
Indicators
The front panel of the MR4 has one indicator as follows: board hardware status indicator (STAT)
two colors (red and green)
For the meanings of the status of the indicator, see A Indicators.
Interfaces
The front panel of the MR4 has 12 optical interfaces. Table 11-20 describes the types and usage
of the optical interfaces of the MR4.
Issue 02 (2009-07-30)
11-33
11 WDM Boards
Type of
Interface
Usage
A1A4
LC
D1D4
LC
IN
LC
OUT
LC
MO
LC
MI
LC
11-34
Feature Code
Indication
Description
Issue 02 (2009-07-30)
11 WDM Boards
Consider the TN11MR4 whose feature code is "92109240" as an example. The meaning of the
feature code of the TN11MR4 is as follows:
l
"9210" indicates that the frequency of the first channel of optical signals is 192.10 THz.
"9240" indicates that the frequency of the fourth channel of optical signals is 192.40 THz.
The four channels of optical signals processed by the MR4 are successive. Hence, we can infer
the following:
l
Parameter
Value
1529 to 1561
100
IN-D1
IN-D2
IN-D3
IN-D4
0.11
2.2
> 25
> 35
A1-OUT
A2-OUT
A3-OUT
A4-OUT
0.11
2.2
IN-MO
MI-OUT
1.5
Isolation (dB)
> 13
> 40
11-35
11 WDM Boards
Mechanical Specifications
The mechanical specifications of the MR4 are as follows:
l
Power Consumption
The power consumption of the MR4 at room temperature (25C) is 0 W.
11.7 LWX
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the LWX (arbitrary bit rate wavelength conversion board).
11.7.1 Version Description
The LWX is available in one functional version, namely, N1.
11.7.2 Functions and Features
The LWX converts a wavelength at an arbitrary rate (10 Mbit/s to 2.7 Gbit/s, NRZ code) on the
client side into a standard wavelength defined in ITU-T G.692, and performs the reverse process.
11.7.3 Working Principle and Signal Flow
The LWX consists of the O/E converting module, cross-connect module, CDR module, logic
and control module, DC/DC converter, and other modules.
11.7.4 Front Panel
The front panel of the LWX has indicators, interfaces, and a laser safety class label.
11.7.5 Valid Slots
The LWX can be installed in slots 28 and 1116 in the subrack.
11.7.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the LWX indicates the scheme that the optical interfaces use to receive and
transmit signals.
11.7.7 Parameter Settings
You can set the parameters for the LWX by using the T2000.
11.7.8 Technical Specifications
The technical specifications of the LWX include the parameters specified for optical interfaces,
the safety class of the laser, mechanical specifications and power consumption.
Issue 02 (2009-07-30)
11 WDM Boards
LWX
Basic
functions
3R function
Provides the 3R function for the signals at a rate ranging from 10 Mbit/s to
2.7 Gbit/s on the client side, restores the clock, and monitors the rate.
Protection
schemes
Supports the inter-board protection and 1+1 interboard hot standby protection. The protection
switching time is less than 50 ms.
ALS function
Supports the ALS function. When the LWX does not receive light, the LWX
automatically turns off the corresponding optical transmit module.
Loopback
function
Performance
and alarm
monitoring
Central
wavelength
Issue 02 (2009-07-30)
11-37
11 WDM Boards
Reference clock
10 Mbit/s to 2.7
Gbit/s
Optical module on
the client side
10 Mbit/s to 2.7
Gbit/s
O/E
E/O
2x2 crossconnection
WDM side
loopback
Data
LOS
Laser
Communication
shutdown
and control
module
LOS
10 Mbit/s to 2.7
Gbit/s
Optical module 2
on the WDM side
Multi-rate
CDR
Client side
loopback
O/E
2x2 crossconnection
Multi-rate
CDR
Loopback control
10 Mbit/s to 2.7
Gbit/s
Optical module 1
on the WDM side
O/E
Clock
10 Mbit/s to 2.7
Gbit/s
Optical
splitter
Reference
clock
E/O
Data
LOS
Communication
and control
module
Communication
Laser shutdown
+3.3
V
DC/DC
converter
DC/DC
converter
Fuse
SCC unit
-48 V/ -60 V
-48 V/ -60 V
Fuse
+3.3 V backup
power
11-38
The optical module on the client side applies SFP encapsulation and can be configured as
different types of optical modules. This module can access the optical signals at a rate
ranging from 10 Mbit/s to 2.7 Gbit/s.
The optical module on the WDM side can be configured as an optical transceiver module,
or both an optical transceiver module and an optical receiver module. When two modules
are configured on the WDM side, an optical splitter is used to perform dual feeding.
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
Issue 02 (2009-07-30)
11 WDM Boards
In the receive direction, the module converts the received optical signals into electrical
signals.
In the transmit direction, the module converts the electrical signals into SDH optical signals
and sends the SDH optical signals to fibers for transmission.
Detects the R_LOS alarm and provides the function of shutting down the laser.
Cross-Connect Module
l
Supports the data selection from the client side to the WDM side and the data selection
from the WDM side to the client side.
Restores the data and clock signals from the signals that are at a rate ranging from 10 Mbit/
s to 2.7 Gbit/s.
CDR Module
Selects the clock signal from the active and standby cross-connect boards.
DC/DC Converter
It converts the 48/60 V power supply into the DC voltages that the modules of the board
require.
Issue 02 (2009-07-30)
11-39
11 WDM Boards
LWX
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
TX
RX
OUT1 IN1
OUT2 IN2
LWX
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the LWX has six optical interfaces. Table 11-24 describes the types and usage
of the optical interfaces of the LWX.
11-40
Issue 02 (2009-07-30)
11 WDM Boards
Type of
Interface
Usage
IN1IN2
LC
OUT1OUT2
LC
TX
LC
RX
LC
Feature Code
SSN1LWX01
01
SSN1LWX02
02
Service type
Laser status
Issue 02 (2009-07-30)
11-41
11 WDM Boards
l
SD trigger condition
Value
NRZ
Type of fiber
Single-mode LC
Single-mode LC
Single-mode LC
Transmission
distance (km)
15
40
80
1260 to 1360
1260 to 1360
1500 to 1580
Maximum mean
launched power
(dBm)
+3
+3
Minimum mean
launched power
(dBm)
-5
-2
-2
Minimum extinction
ratio (dB)
+8.2
+8.2
+8.2
30
30
30
Issue 02 (2009-07-30)
11 WDM Boards
Parameter
Value
Receiver type
PIN
APD
APD
Receiver wavelength
range (nm)
1200 to 1600
1200 to 1600
1200 to 1600
Receiver sensitivity
(dBm)
-18
-27
-28
Minimum overload
(dBm)
-9
-9
Maximum
reflectance (dB)
-27
-27
-27
Table 11-27 Parameters specified for the WDM-side optical interfaces of the LWX
Parameter
Value
Channel
spacing (GHz)
100
Line code
pattern
NRZ
Issue 02 (2009-07-30)
Transmission
distance (km)
640
170 (2 mW)
360
Maximum mean
launched power
(dBm)
+3
+3
+7
+3
Minimum mean
launched power
(dBm)
-2
-2
+5
-2
Minimum
extinction ratio
(dB)
+10
+10
+10
+10
Nominal central
frequency
(THz)
192.10 to
196.00
192.10 to
196.00
192.10 to
196.00
192.10 to
196.00
Central
frequency
deviation (GHz)
12.5
12.5
12.5
12.5
Maximum -20
dB spectral
width (nm)
0.2
0.4
0.4
0.4
11-43
11 WDM Boards
Parameter
Value
Minimum side
mode
suppression
ratio (dB)
35
35
35
35
Dispersion
compensation
(ps/nm)
12800
3400
3400
7200
Eye pattern
mask
Complies with
the mask
defined in ITUT G.957.
Complies with
the mask
defined in ITUT G.957.
Complies with
the mask
defined in ITUT G.957.
Complies with
the mask
defined in ITUT G.957.
APD
PIN
Receiver
wavelength
range (nm)
1200 to 1600
1200 to 1600
Receiver
sensitivity
(dBm)
-28
-18
Minimum
overload (dBm)
-9
Maximum
reflectance (dB)
-27
-27
Mechanical Specifications
The mechanical specifications of the LWX are as follows:
l
Power Consumption
The maximum power consumption of the LWX at room temperature (25C) is 30 W.
11-44
Issue 02 (2009-07-30)
11 WDM Boards
11.8 FIB
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the FIB (filter isolating board).
11.8.1 Version Description
The FIB is available in one functional version, namely, N1.
11.8.2 Functions and Features
The FIB filters and isolates 1xSTM-16 optical signals.
11.8.3 Working Principle and Signal Flow
The FIB consists of an isolator and a filter.
11.8.4 Front Panel
The front panel of the FIB has one optical interface.
11.8.5 Valid Slots
The FIB can be installed in slots 28 and 1116 in the subrack.
11.8.6 Technical Specifications
The technical specifications of the FIB include the parameters specified for optical interfaces,
mechanical specifications, and power consumption.
BA17
G.652 fiber
FIB
b (18 dB)
Erbium
ROP
doped fiber G.652 fiber
->
ISO
Filter
1550.12
Optical
receiver
Issue 02 (2009-07-30)
11-45
11 WDM Boards
FIB
Optical isolator
Optical filter
The filter filters out the wavelengths other than the 1550.12 nm
wavelength.
Filter
Optical signals are heavily attenuated and degraded after they travel for a long distance in fibers.
The degraded signals cannot be normally received by an optical receiver. Hence, an ROP needs
to be used to amplify the gain of the optical signals. To prevent other factors from affecting the
ROP because the ROP has high optical power, the FIB needs to be used to filter wavelengths.
The isolator of the FIB allows the optical signals to pass in a single direction. The filter of the
FIB filters out the wavelengths other than the 1550.12 nm wavelength. As a result, the optical
receiver receives the optical signals normally.
11-46
Issue 02 (2009-07-30)
11 WDM Boards
FIB
CLASS 1
LASER
PRODUCT
OUT
IN
FIB
Interfaces
The front panel of the FIB has one optical interface. The optical interface is used to receive and
transmit one channel of 2.5 Gbit/s optical signals. Table 11-29 describes the types and usage of
the optical interfaces of the FIB.
Table 11-29 Optical interfaces of the FIB
Issue 02 (2009-07-30)
Interface
Type of
Interface
Usage
IN
LSH
OUT
LC
11-47
11 WDM Boards
Value
2488320 kbit/s
NRZ
Central wavelength
(nm)
1550.120.05
-0.5 dB bandwidth
(nm)
> 0.4
Mechanical Specifications
The mechanical specifications of the FIB are as follows:
l
Power Consumption
The maximum power consumption of the FIB at room temperature (25C) is 0 W.
11-48
Issue 02 (2009-07-30)
12
12 Microwave Boards
Microwave Boards
This topic describes only the microwave boards. For the description of the ODU, see the ODU Hardware
Description.
12.1 IFSD1
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the IFSD1 (dual-port IF board).
12.2 RPWR
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the RPWR (6-channel ODU power board).
Issue 02 (2009-07-30)
12-1
12 Microwave Boards
12.1 IFSD1
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the IFSD1 (dual-port IF board).
12.1.1 Version Description
The IFSD1 is available in one functional version, namely, N1.
12.1.2 Functions and Features
The IFSD1 transmits and receives two IF signals, provides the management channel to the ODU,
and supplies the 48 V power to the ODU.
12.1.3 Working Principle and Signal Flow
The IFSD1 consists of the combiner interface module, IF processing module, MODEM module,
FPGA module, rate converting module, and communication and control module.
12.1.4 Front Panel
The front panel of the IFSD1 has indicators, interfaces, power switches, and labels.
12.1.5 Valid Slots
The IFSD1 can be installed in slots 28 and 1116 in the subrack.
12.1.6 Parameter Settings
You can set the parameters for the IFSD1 by using the T2000 LCT and T2000.
12.1.7 Technical Specifications
The technical specifications of the IFSD1 include the IF performance, baseband signal
processing performance, board mechanical specifications, and power consumption.
12-2
Function and
Feature
IFSD1
Basic functions
Issue 02 (2009-07-30)
Function and
Feature
IFSD1
IF processing
Microwave features
Service processing
Overhead processing
Pointer processing
Alarms and
performance events
Protection schemes
Supports warm resets and cold resets. The warm reset does not
affect the services.
Maintenance
features
Issue 02 (2009-07-30)
12 Microwave Boards
12-3
12 Microwave Boards
ODU
IF Combiner
interface
module
IF
processing
module
MODEM
module
SMOD
EM
M
U
X/
D
E
M
U
X
Rate
converting
FPGA module
Overhead
processing
Overhead
s related
to HSM
Cross-connect
unit
-48 V
Clock
module
Power
module
Service bus
Overhead bus
Communication and
control module
IF signal
Control bus
SCC
SCC
12-4
Issue 02 (2009-07-30)
12 Microwave Boards
Auxiliary Modules
The auxiliary modules include the logic and control module, clock module, and power module.
The functions of these modules are as follows:
l
This module realizes the alarm display, performance monitoring, and communication with the
system control and communication board and the other boards through the Ethernet interface.
In addition, this module provides two pairs of RS485 data buses and can provide quick response
in real time. This module supports the in-service loading of programs.
l
Clock module
Extracts the clock from the received signal and sends the 8 KHz clock to the clock unit.
Power module
Provides two 48 V power input interfaces and supports the DC power supply whose
input voltage ranges from 38.4 V to 72 V.
Monitors all the power supplies for the IFSD1 and reports alarms in the case of a board
voltage abnormality.
Issue 02 (2009-07-30)
12-5
12 Microwave Boards
!
WARNING
-48V OUTPUT
TURNOFFPOWERBEFORE
DISCONNECTING IF CABLE
IF1
ODU-PWR1
I
O
PWR1
PWR2
ODU-PWR2
I
O
IF2
IFSD1
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
12-6
Issue 02 (2009-07-30)
12 Microwave Boards
Interfaces
Table 12-2 Interfaces of the IFSD1
Interface
Description
Usage
IF1
IF port 1
IF2
IF port 2
PWR1
Power interface 1
PWR2
Power interface 2
ODU-PWR1a
ODU-PWR2a
CAUTION
a: The ODU-PWR1 and ODU-PWR2 switches are equipped with lockup devices. To move the
switch, you need to pull the switch lever partially. When the switch is set to "O", it indicates that
the circuit is open. When the switch is set to "I", it indicates that the circuit is closed.
Issue 02 (2009-07-30)
12-7
12 Microwave Boards
Labels
The front label has a high temperature warning label and an operation warning label.
The high temperature warning label indicates that the board surface temperature may exceed
70C when the ambient temperature is higher than 55C. In this case, you need to wear protective
gloves before touching the board.
The operation warning label indicates that the ODU power switch must be turned off before the
IF cable is removed.
Radio link ID
ATPC attributes
J1 byte
The J1 byte apply to SDH microwave only. The other parameters apply to both PDH and SDH
microwaves.
12-8
Service Capacity
Modulation Scheme
4xE1
QPSK
4xE1
16QAM
3.5
8xE1
QPSK
14 (13.75)
8xE1
16QAM
16xE1
QPSK
28 (27.5)
16xE1
16QAM
14 (13.75)
22xE1
32QAM
14 (13.75)
26xE1
64QAM
14 (13.75)
35xE1
16QAM
28 (27.5)
44xE1
32QAM
28 (27.5)
53xE1
64QAM
28 (27.5)
Issue 02 (2009-07-30)
12 Microwave Boards
Service Capacity
Modulation Scheme
STM-1
128QAM
28 (27.5)
NOTE
The channel spacings 13.75 MHz and 27.5 MHz are applied to the 18 GHz frequency band.
The channel spacings provided in the table are the minimum channel spacings supported by the OptiX OSN
equipment series. The channel spacings equal to or larger than the values are also supported.
Radio Link ID
The radio link ID is an identification of the radio link. The transmit end sends the radio link ID
byte continuously so that the receive end can learn that the transmit end is in a constant
connection state. If the receive end detects a mismatch of the radio link ID, the MW_LIM alarm
is reported on the corresponding IF port.
ATPC Attributes
The ATPC is a technology that automatically adjusts the transmit power of the transmitter
according to the attenuation of the received signal level (RSL) at the receive end. The ATPC
attributes include the following parameters:
l
ATPC adjustment
This parameter specifies the decrement/increment of an ATPC adjustment.
NOTE
The ATPC adjustment cannot exceed the range of the ODU transmit power.
J1 Byte
The IFSD1 board supports four byte modes, which are as follows:
l
Single-byte mode
Issue 02 (2009-07-30)
12-9
12 Microwave Boards
l
64-byte mode
By default, the IFSD1 board does not monitor the received J1 byte. That is, the J1 byte to be
received is set to the disabled mode. The J1 byte to be sent is a 16-byte string with CRC. The
first byte is created automatically and the following 15 bytes are the ASCII codes "HuaWei SBS
". The last five characters of the string are blank spaces.
Microwave Capacity
One IFSD1 board can access microwave signals in two directions. The capacity of microwave
signals in each direction depends on the radio work mode of these microwave signals. For details
about the radio work modes, see 12.1.6 Parameter Settings.
IF Performance
Table 12-4 IF performance
Item
Performance
IF signal
Transmit frequency of the IF
board (MHz)
350
140
Impedance (ohm)
50
12-10
Modulation scheme
ASK
5.5
10
Issue 02 (2009-07-30)
12 Microwave Boards
Performance
Coding mode
Mechanical Specification
The mechanical specifications of the IFSD1 are as follows:
l
Power Consumption
The maximum power consumption of the IFSD1 at room temperature (25C) is 24 W.
12.2 RPWR
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the RPWR (6-channel ODU power board).
12.2.1 Version Description
The RPWR is available in one functional version, namely, N1.
12.2.2 Functions and Features
The RPWR accesses two 48 V/60 V DC power supplies and supplies the 48 V power to six
ODUs.
12.2.3 Working Principle and Signal Flow
The RPWR consists of the combiner module, protection module, filtering module, DC/DC power
module (that is, power module), and status detection module.
12.2.4 Front Panel
The front panel of the RPWR has indicators, power input interfaces, and power output interfaces.
12.2.5 Valid Slots
The RPWR can be installed in slots 28 and 1116.
12.2.6 Technical Specifications
The technical specifications of the RPWR include the mechanical specifications, power
consumption, input voltage, and specifications of the fuse.
Issue 02 (2009-07-30)
12-11
12 Microwave Boards
RPWR
Input power
Combiner function
Protection against
lightning surge,
and short-circuit
Protection
function
Filtering function
Provides the filtering for the power interface and has the structural
shielding that improves the electromagnetic compatibility.
Power output
Provides six 48 V power supplies for the ODU. The maximum power
consumption of each power supply is 60 W.
Alarm and
indication
Power supply
backup
When the indicator turns red, it indicates that one or more power
modules are faulty.
When the indicator is on and green, it indicates that the board works
normally and no alarms are reported.
The input of the power board supports the 1+1 hot backup. The output
of the power module has no backup.
Issue 02 (2009-07-30)
12 Microwave Boards
Fuse 1
Power
module 1
IF port 1
Fuse 2
Power
module 2
IF port 2
Fuse 3
Power
module 3
IF port 3
Fuse 4
Power
module 4
IF port 4
Fuse 5
Power
module 5
IF port 5
Fuse 6
Power
module 6
IF port 6
-48V_1
-48V_2
Combiner
module
Protection
module
Filtering
module
Soft start
module
Board operation
indicator
Status
detection
module
Optical
coupling
isolation
Six channels
Signal Flow
The two 48 V power supplies pass through the combiner, protection, filtering, soft start, and
power modules after they are accessed to the power board. The voltage converting operation is
performed on the two 48 V power supplies at the power module (using the DC_I and DC_C
grounding mode). Then, six isolated ODU power supplies are sent to the IF board for processing
and finally are used to supply power to ODUs.
Power Module
The two 48 V power supplies enter the DC/DC power converting module after they traverse
the protection, filtering, and soft start modules. The power supplies are isolated by the internal
transformer of the power module so that six independent stable power supplies can be sent to
the status detection module and finally to the IF board.
12-13
12 Microwave Boards
RPWR
STAT
NEG(-)
RTN(+)
NEG(-)
RTN(+)
POWER1
POWER2
POWER3
POWER4
POWER4
POWER4
RPWR
Indicators
The front panel of the board has one indicator as follows: board hardware status indicator (STAT)
two colors (red and green)
For the meanings of the status of the indicator, see A Indicators.
Interfaces
The front panel of the RPWR has two power input interfaces and six power output interfaces.
Table 12-7 describes the types and usage of the interfaces of the RPWR.
12-14
Issue 02 (2009-07-30)
12 Microwave Boards
Type of Interface
Usage
PWR1
48 V power input
interface
PWR2
48 V power input
interface
POWER1
POWER6
48 V power output
interface
Mechanical Specifications
The mechanical specifications of the RPWR are as follows:
l
Power Consumption
The maximum power consumption of the RPWR at room temperature (25C) is 60 W.
Input Voltage
The input voltage range of the RPWR is as follows:
l
If the standard voltage of the accessed power supply is -48 V, the voltage of the power
supply ranges from -38.4 V to -57.6 V.
If the standard voltage of the accessed power supply is -60 V, the voltage of the power
supply ranges from -48 V to -72 V.
Issue 02 (2009-07-30)
Specifications of the fuse for the main circuit are as follows: fast blow fuse, 250 V, 20 A,
UL certificated, 0.00355 ohms, 631 A x A x second, UL/CSA/METI
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
12-15
12 Microwave Boards
l
12-16
Specifications of the fuse for the power modules of the RPWR are as follows: slow blow
fuse, surface-mounted fuse, 125 V, 4 A, UL certificated, 0.023 ohms, 23 A x A x second,
UL.
Issue 02 (2009-07-30)
OptiX OSN 3500 II Intelligent Optical Transmission System 13 Optical Amplifier Boards and Dispersion Compensation
Hardware Description
Boards
13
Issue 02 (2009-07-30)
13-1
13 Optical Amplifier Boards and Dispersion Compensation OptiX OSN 3500 II Intelligent Optical Transmission System
Boards
Hardware Description
13.1 BA2
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the BA2 (optical booster amplifier board).
13.1.1 Version Description
The BA2 is available in one functional version, namely, N1.
13.1.2 Functions and Features
During the long-haul transmission of optical signals, the attenuation of the signals is high. Hence,
the BA is required to ensure that the optical receiver can receive normal optical signals.
13.1.3 Working Principle and Signal Flow
The BA2 consists of the EDFA module, control module, communication module, and DC/DC
converter module.
13.1.4 Front Panel
The front panel of the BA2 has indicators and interfaces.
13.1.5 Valid Slots
The BA2 can be installed in slots 28 and 1116 in the subrack.
13.1.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the BA2 indicates the output optical power of the optical interfaces.
13.1.7 Technical Specifications
The technical specifications of the BA2 include the parameters specified for optical interfaces,
mechanical specifications, and power consumption.
BA
Receive
The BA2 amplifies the power of two-channel optical signals. Table 13-1 provides the functions
and features of the BA2.
13-2
Issue 02 (2009-07-30)
OptiX OSN 3500 II Intelligent Optical Transmission System 13 Optical Amplifier Boards and Dispersion Compensation
Hardware Description
Boards
BA2
Basic functions
Supporting the
EDFA
Performance
events and alarms
monitoring
Software upgrade
CAUTION
The wavelength of the optical signal transmitted to the BA2 must be within the range from 1530
nm to 1560 nm. Otherwise, the input optical signal cannot be amplified correctly. Hence, make
sure that the output wavelength of the line board that is interconnected with the BA2 is within
the required range.
NOTE
The BA2 provides the intelligent power adjustment (IPA) function. When the IPA function is enabled and
no input signals are detected on the receive side of a line board, the pumping laser is turned off to prevent
high laser power from damaging the eyes.
Issue 02 (2009-07-30)
13-3
13 Optical Amplifier Boards and Dispersion Compensation OptiX OSN 3500 II Intelligent Optical Transmission System
Boards
Hardware Description
Fiber
distributor
EDFA module
Doped
erbium
fiber
WDM
Input
Output
isolate
isolate
coupler
Input
power
monitor
(Pin1)
Input
power
Optical
splitter
Filter
Optical
output
Output
power
monitor
(Pin2)
Laser pump
Output
power
Pump
temperature
control
Control&Generation alarms
Control module
Communication
module
+3.3 V
DC/DC
converter
module
DC/DC
converter
module
Communication
SCC unit
Fuse
-48 V/ -60 V
-48 V/ -60 V
Fuse
+3.3 V
backup
power
EDFA Module
The optical amplifier unit consists of two EDFA modules. One module is the BA and the other
module is the PA. When the board is used as a PA, an optical filter with 1550.12 nm as the
central wavelength is added to the optical output end of the module. A BA does not have the
filter. A semi-conductor laser bump with 980 nm as the central wavelength is in the erbium fiber
inside the EDFA module. Bump light and input signal light are coupled into the erbium fiber
through an optical coupler. The input and output optical signals of the module are led out by two
fiber splitters according to a specific coupling ratio. Then, the optical signals are converted into
optical current by two PIN photoelectrical diodes. The input and output power of the EDFA
module is determined according to the optical signals. The module also applies optical isolating
measures at the input and output ends to improve the performance of the module.
Control Module
The control module performs the following functions:
13-4
Issue 02 (2009-07-30)
OptiX OSN 3500 II Intelligent Optical Transmission System 13 Optical Amplifier Boards and Dispersion Compensation
Hardware Description
Boards
l
Reports alarms.
The control module consists of the A/D converting unit, D/A converting unit, and CPU. The A/
D converting unit converts the temperature value of the cooling electricity and the input/output
optical power from analog values into digital values. The converted values are sent to the CPU,
which generates performance reporting events or alarms. The A/D converting unit also converts
bump electricity from analog values into digital values. The converted values are also sent to
the CPU. After the CPU processes the converted values, the D/A converting unit precisely
controls the driving analog circuit of the bump laser of the EDFA optical module. The internal
temperature of the bump laser module remains at 25. The temperature sensor inside the bump
laser outputs temperature change to drive the cooler to keep the internal temperature of the bump
laser module at 25.
Communication Module
The communication module supports Ethernet communication.
Issue 02 (2009-07-30)
13-5
13 Optical Amplifier Boards and Dispersion Compensation OptiX OSN 3500 II Intelligent Optical Transmission System
Boards
Hardware Description
BA2
STAT
ACT
PROG
SRV
LASER
RADIATION
DO NOT VIEW DIRECTLY
WITH OPTICAL
INSTRUMENTS
CLASS 1M LASER
PRODUCT
OUT1
IN1
BA2
Figure 13-4 shows the appearance of the front panel of the two-interface BA2.
13-6
Issue 02 (2009-07-30)
OptiX OSN 3500 II Intelligent Optical Transmission System 13 Optical Amplifier Boards and Dispersion Compensation
Hardware Description
Boards
BA2
STAT
ACT
PROG
SRV
LASER
RADIATION
DO NOT VIEW DIRECTLY
WITH OPTICAL
INSTRUMENTS
CLASS 1M LASER
PRODUCT
OUT1
IN1
OUT2 IN2
BA2
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the one-interface BA2 has one optical interface. The optical interface transmits
and receives one channel of optical signals. The one-interface BA2 uses the swappable optical
module, which facilitates the maintenance and upgrading of the optical module.
Issue 02 (2009-07-30)
13-7
13 Optical Amplifier Boards and Dispersion Compensation OptiX OSN 3500 II Intelligent Optical Transmission System
Boards
Hardware Description
The front panel of the two-interface BA2 has two optical interfaces. The optical interfaces
transmit and receive two channels of optical signals. The two-interface BA2 uses the swappable
optical module, which facilitates the maintenance and upgrading of the optical module.
WARNING
If the front panel of the one-interface BA2 has two LC optical interfaces, only the upper optical
interface (IN1/OUT1) is valid. In the case of the BA2 whose front panel has two LC optical
interfaces, determine whether the BA2 is a one-interface BA2 or a two-interface BA2 according
to 13.1.6 Feature Code.
Table 13-2 describes the type and usage of the optical interface of the one-interface BA2.
Table 13-2 Optical interface of the one-interface BA2
Interface
Type of
Interface
Usage
IN
LC
OUT
LC
Table 13-3 describes the types and usage of the optical interfaces of the two-interface BA2.
Table 13-3 Optical interfaces of the two-interface BA2
Interface
Type of Interface
Usage
IN1
LC
OUT1
LC
IN2
LC
OUT2
LC
Issue 02 (2009-07-30)
OptiX OSN 3500 II Intelligent Optical Transmission System 13 Optical Amplifier Boards and Dispersion Compensation
Hardware Description
Boards
Table 13-4 Relationship between the feature code of the BA2 and the output optical power
Board
Feature Code
SSN1BA201
01
SSN1BA202
02
SSN1BA203
03
SSN1BA204
04
SSN1BA205
05
Value
Application code
NRZ
BA: -6 to +3
BA: 13 to 15 or 15 to 17
Mechanical Specifications
The mechanical specifications of the BA2 are as follows:
Issue 02 (2009-07-30)
13-9
13 Optical Amplifier Boards and Dispersion Compensation OptiX OSN 3500 II Intelligent Optical Transmission System
Boards
Hardware Description
l
Power Consumption
The maximum power consumption of the BA2 at room temperature (25C) is 20 W.
13.2 BPA
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the BPA (optical booster and pre-amplifier board).
13.2.1 Version Description
The BPA is available in two functional versions, namely, N1 and N2. The N1BPA is no longer
manufactured.
13.2.2 Functions and Features
During the long-haul transmission of optical signals, the attenuation of the signals is high. Hence,
the BA and PA are required to ensure that the optical receiver can receive normal optical signals.
13.2.3 Working Principle and Signal Flow
The BPA consists of the optical part, driving and detecting part, and data processing and
communication part.
13.2.4 Front Panel
The front panel of the BPA has indicators, interfaces, and a laser safety class label.
13.2.5 Valid Slots
The BPA can be installed in slots 28 and 1116 in the subrack.
13.2.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the BPA indicates the output optical power of the optical interfaces.
13.2.7 Technical Specifications
The technical specifications of the BPA include the parameters specified for optical interfaces,
mechanical specifications, and power consumption.
13-10
Item
Description
Functional Versions
Differences
Issue 02 (2009-07-30)
OptiX OSN 3500 II Intelligent Optical Transmission System 13 Optical Amplifier Boards and Dispersion Compensation
Hardware Description
Boards
Item
Description
Substitution
The two versions can substitute for each other when certain
conditions are met. If the ALS function is required and the
N2BPA is used to substitute for the N1BPA, enable the ALS
function on the N2BPA. If the ALS function is required and the
N1BPA is used to substitute for the N2BPA, enable the ALS
function on the line board. If the ALS function is not required,
this restriction is not applicable.
Receive
BA
PA
Transmit
Receive
Issue 02 (2009-07-30)
Function and
Feature
BPA
Basic functions
Pre-amplification
function
13-11
13 Optical Amplifier Boards and Dispersion Compensation OptiX OSN 3500 II Intelligent Optical Transmission System
Boards
Hardware Description
Function and
Feature
BPA
Performance events
and alarms
monitoring
Software upgrade
Optical output
Optical input
Drive
module
Module
temperature
control
Optical
part
Pump current
check
Optical output
Input/output
power
check
Pump
Drive
current
module
check
Module
temperature
control
Input
power
check
Output
power
check
Driving
and
detecting
Fixed filter
part
SCC
Communication
module
Control
module
13-12
Issue 02 (2009-07-30)
OptiX OSN 3500 II Intelligent Optical Transmission System 13 Optical Amplifier Boards and Dispersion Compensation
Hardware Description
Boards
Optical output
Optical input
Optical output
Optical
part
Pump current
check
Drive
module
Module
temperature
control
Input/output
power
check
Pump
Drive
current
module
check
Module
temperature
control
Input/output
power
check
Driving
and
detecting
part
SCC
Communication
module
Control
module
Optical Part
The N1BPA consists of two EDFA optical modules, whereas the N2BPA has only one EDFA
optical module. The EDFA optical module magnifies the optical power.
Issue 02 (2009-07-30)
13-13
13 Optical Amplifier Boards and Dispersion Compensation OptiX OSN 3500 II Intelligent Optical Transmission System
Boards
Hardware Description
BPA
STAT
ACT
PROG
SRV
LASER
RADIATION
DO NOT VIEW DIRECTLY
WITH OPTICAL
INSTRUMENTS
CLASS 1M LASER
PRODUCT
BOUT
BIN
POUT
PIN
BPA
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the BPA has two LC optical interfaces. Table 13-8 describes the types and
usage of the optical interfaces of the BPA.
13-14
Issue 02 (2009-07-30)
OptiX OSN 3500 II Intelligent Optical Transmission System 13 Optical Amplifier Boards and Dispersion Compensation
Hardware Description
Boards
Type of
Interface
Usage
BIN
LC
BOUT
LC
PIN
LC
POUT
LC
Feature Code
Description
SSN1BPA01 and
SSN2BPA01
01
SSN1BPA02
02
13-15
13 Optical Amplifier Boards and Dispersion Compensation OptiX OSN 3500 II Intelligent Optical Transmission System
Boards
Hardware Description
Table 13-10 Parameters specified for the optical interfaces of the BPA
Parameter
Value
Application code
NRZ
BA: -6 to +3
PA: -28 to -10 (when the BPA works with the line board at the rate
of 10 Gbit/s)
PA: -38 to -10 (when the BPA works with the line board at the rate
less than 10 Gbit/s)
N1BPA: 13 to 15 or 15 to 17 (BA)
Sensitivity (dBm)
PA: -37
N2BPA: 13 to 15 (BA)
PA: < 6
NOTE
When you perform a loopback on the PA module of the BPA, prevent the damage caused by high input
optical power to the optical module.
Mechanical Specifications
The mechanical specifications of the BPA are as follows:
l
Power Consumption
The maximum power consumption of the N1BPA at room temperature (25C) is 20 W.
The maximum power consumption of the N2BPA at room temperature (25C) is 11 W.
13.3 COA
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the COA (case-shaped optical amplifier).
13.3.1 Version Description
13-16
Issue 02 (2009-07-30)
OptiX OSN 3500 II Intelligent Optical Transmission System 13 Optical Amplifier Boards and Dispersion Compensation
Hardware Description
Boards
The COA is available in three functional versions, namely, 61, 62, and N1.
13.3.2 Functions and Features
The COA integrates the optical amplifier module, the driving circuit, and the communication
circuit in an aluminium case.
13.3.3 Working Principle and Signal Flow
The 61COA and N1COA consist of the EDFA module, control module, communication module,
and DC/DC converter module.
13.3.4 Front Panel
The front panel of the COA has indicators and interfaces.
13.3.5 Valid Slots
The COA adopts the case-shape design. Hence, the COA does not require a slot in the subrack.
13.3.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the 61COA indicates the output optical power of the optical interfaces.
13.3.7 Technical Specifications
The technical specifications of the COA include the parameters specified for optical interfaces,
mechanical specifications, and power consumption.
The COA that occurs in the following text includes the 61COA, N1COA, and 62COA. The characteristics
of the COA are the common characteristics of the three types of COAs.
Description
Functional versions
Differences
Substitution
Issue 02 (2009-07-30)
13-17
13 Optical Amplifier Boards and Dispersion Compensation OptiX OSN 3500 II Intelligent Optical Transmission System
Boards
Hardware Description
The application of the 61COA/N1COA in the optical transmission system is the same as the
application of the BA2 and BPA in the optical transmission system. Table 13-12 provides the
functions and features of the 61COA/N1COA.
Table 13-12 Functions and features of the 61COA/N1COA
13-18
Function and
Feature
61COA/N1COA
Power
amplification
function
Pre-amplification
function
ALS function
Issue 02 (2009-07-30)
OptiX OSN 3500 II Intelligent Optical Transmission System 13 Optical Amplifier Boards and Dispersion Compensation
Hardware Description
Boards
Function and
Feature
61COA/N1COA
Communication
through serial ports
62COA
The 62COA is a case-shaped Raman optical amplifier and is used at the receive end of the SDH
equipment.
The 62COA transmits counter-propagated pumping optical signals to fibers for distributed
Raman amplification. The gain medium of distributed Raman amplification is the line fiber that
can realize better noise performance. This is different from the 61COA. Hence, the 62COA can
extend the transmission distance, reduce the signal-to-noise ratio, and realize ultra long hop
transmission for a single span.
Figure 13-10 shows the appearance of the 62COA.
Figure 13-10 Appearance of the 62COA
4
2
3
1. Captive screw
4. ESD jack
2. Ejector lever
5. Power access board
3. COA board
The 62COA is a case-shaped Raman optical amplifier and is used at the receive end of the optical
transmission system. The optical signals are amplified during transmission based on the
stimulated Raman scattering effect of the fiber. The 62COA needs to work with the EDFA to
realize the transmission of optical signals for more than 170 km. For details, see Figure
13-11.
Issue 02 (2009-07-30)
13-19
13 Optical Amplifier Boards and Dispersion Compensation OptiX OSN 3500 II Intelligent Optical Transmission System
Boards
Hardware Description
Pump light
Fiber
Transmitting end
Pump light
EDFA
Laser
Coupler
Receiving end
The Raman amplifier amplifies optical signals during transmission by transmitting counterpropagated pumping optical signals to fibers for distributed Raman amplification. As a result,
the phase of optical signals is significantly different from the phase of pump signals. The power
fluctuation of the Raman pumping is offset in the counter-propagation. Hence, the noise caused
by the pump can be effectively suppressed.
Table 13-13 provides the functions and features of the 62COA.
Table 13-13 Functions and features of the 62COA
Function and
Feature
62COA
Basic functions
Pre-amplification
function
ALS function
Communication
through serial ports
13-20
Issue 02 (2009-07-30)
OptiX OSN 3500 II Intelligent Optical Transmission System 13 Optical Amplifier Boards and Dispersion Compensation
Hardware Description
Boards
For pre-amplification
EDFA optical
module
Pump
power check
Drive
module
Module
temperature
control
Optical part
Input/Output
Power check
Driving and
detecting part
SCC
Communication
module
Control
module
EDFA Module
The optical amplifier unit consists of two EDFA modules. One module is the BA and the other
module is the PA. When the board is used as a PA, an optical filter with 1550.12 nm as the
central wavelength is added to the optical output end of the module. A BA does not have the
filter. A semi-conductor laser bump with 980 nm as the central wavelength is in the erbium fiber
inside the EDFA module. Bump light and input signal light are coupled into the erbium fiber
through an optical coupler. The input and output optical signals of the module are led out by two
fiber splitters according to a specific coupling ratio. Then, the optical signals are converted into
optical current by two PIN photoelectrical diodes. The input and output power of the EDFA
module is determined according to the optical signals. The module also applies optical isolating
measures at the input and output ends to improve the performance of the module.
Control Module
The control module performs the following functions:
l
Reports alarms.
The control module consists of the A/D converting unit, D/A converting unit, and CPU. The A/
D converting unit converts the temperature value of the cooling electricity and the input/output
optical power from analog values into digital values. The converted values are sent to the CPU,
which generates performance reporting events or alarms. The A/D converting unit also converts
bump electricity from analog values into digital values. The converted values are also sent to
the CPU. After the CPU processes the converted values, the D/A converting unit precisely
Issue 02 (2009-07-30)
13-21
13 Optical Amplifier Boards and Dispersion Compensation OptiX OSN 3500 II Intelligent Optical Transmission System
Boards
Hardware Description
controls the driving analog circuit of the bump laser of the EDFA optical module. The internal
temperature of the bump laser module remains at 25. The temperature sensor inside the bump
laser outputs temperature change to drive the cooler to keep the internal temperature of the bump
laser module at 25.
Communication Module
The communication module supports Ethernet communication.
10
1. ID DIP switch
2. Running indicator
4. RS-232-1
7. MONITOR-2
5. RS-232-2
6. MONITOR-1
8. IN: input optical interface
11
3. Alarm indicator
Figure 13-14 shows the appearance of the front panel of the 62COA.
13-22
Issue 02 (2009-07-30)
OptiX OSN 3500 II Intelligent Optical Transmission System 13 Optical Amplifier Boards and Dispersion Compensation
Hardware Description
Boards
3. Air filter
4. Fan board
5. RJ-45 interface
6. RS-232-1
7. RS-232-2
Indicators
The front panel of the board has the following indicators:
l
Interfaces
The front panel of the 61COA/N1COA has one SC/PC optical interface. The optical interface
receives and transmits one channel of optical signals. The input optical interface of the 62COA
is connected to the LSH flange and the output optical interface is connected to the SC flange.
Figure 13-15 shows the SC/PC fiber connector that the SC/PC optical interfaces of the 61COA
and N1COA use.
Figure 13-15 SC/PC fiber connector
Issue 02 (2009-07-30)
13-23
13 Optical Amplifier Boards and Dispersion Compensation OptiX OSN 3500 II Intelligent Optical Transmission System
Boards
Hardware Description
Figure 13-16 shows the flange and fiber connector that the input optical interface of the 62COA
uses.
Figure 13-16 LSH flange and fiber connector
NOTE
The protective cap of the LSH fiber jumper is specially designed. When you connect the LSH fiber jumper
to an LSH flange, do not remove the protective cap but insert the LSH fiber jumper into the LSH flange
directly.
The COA has two RS-232 serial ports, which function as the control and communication ports.
The serial ports communicate with the SCC unit and report alarms and performance events.
Table 13-14 provides the pin assignments of the RS-232 serial port.
Table 13-14 Pin assignments of the RS-232 serial port
Front View
Pin of RS-232-2
Definition
Used to receive
data.
Used to transmit
data.
Used for
common
grounding.
Pin of RS-232-1
TIP
To realize the communication between the COA and the CXL, use a serial port control line to connect the
RS-232-1 serial port of the COA to the F&f port of the subrack.
The RS-232-2 serial port is used in the scenario where several COAs are used at a single station.
To enable each COA to communicate with the SCC unit, use a serial port line to connect the
RS-232-2 port of COA 1 to the RS-232-1 port of COA 2, and use another serial port line to
connect the RS-232-2 port of COA 2 to the RS-232-1 port of COA 3. Connect the other COAs
similarly. In this case, each COA communicates with the SCC unit through the RS-232-1 serial
port of COA 1.
13-24
Issue 02 (2009-07-30)
OptiX OSN 3500 II Intelligent Optical Transmission System 13 Optical Amplifier Boards and Dispersion Compensation
Hardware Description
Boards
The COA has two MONITOR interfaces. When the 61COA is used alone, the MONITOR-1
interface and MONITOR-2 interface are the alarm output interfaces. In this case, the two
MONITOR interfaces have the same functions. Table 13-15 provides the pin assignments of
the MONITOR interfaces.
Table 13-15 Pin assignments of the MONITOR interfaces
Front View
Pin of
MONITOR-2
Definition
1 and 6
1 and 6
2 and 7
2 and 7
3 and 8
3 and 8
4 and 9
4 and 9
Digital ground
Pin of
MONITOR1
The 62COA has one RJ-45 connector, through which the 62COA is connected to the computer
for software loading. Table 13-16 provides the pin assignments of the RJ-45 connector of the
62COA.
Table 13-16 Pin assignments of the RJ-45 connector of the 62COA
Front View
8 7 6 5 4 3 2 1
Pin
Description
Transmitting (+)
Transmitting ()
Receiving (+)
Not defined
Not defined
Receiving ()
78
Not defined
Issue 02 (2009-07-30)
13-25
13 Optical Amplifier Boards and Dispersion Compensation OptiX OSN 3500 II Intelligent Optical Transmission System
Boards
Hardware Description
l
The DIP switches of the 61COA/N1COA are in the lower left corner of the front panel.
The DIP switches are used to set the ID of the 61COA/N1COA. When a bit of the DIP
switch is set upwards, the bit is in the OFF position. When the bit is set downwards, the bit
is in the ON position. The SCC identifies a 61COA/N1COA through the ID of the 61COA/
N1COA. The SCC communicates with the 61COAs/N1COAs whose IDs are different in
the master-slave calling mode.
The DIP switch of the 62COA is used to set the ID of the 62COA and the type of fiber.
The DIP switch has eight bits. The bit on the leftmost side is numbered "8" and the bit on
the rightmost side is numbered "1". When a bit of the DIP switch is set upwards, the bit
indicates "0". When the bit is set downwards, the bit indicates "1". The first four bits (1
4) are used to set the board ID, which ranges from 20 to 35. In actual situations, the first
four bits indicate only the range from 20 to 27. The fifth bit is used to set the type of fiber.
When bit 5 indicates "0", the fiber is of the G.652 type. When bit 5 indicates "1", the fiber
is of the G.655 type.
Issue 02 (2009-07-30)
OptiX OSN 3500 II Intelligent Optical Transmission System 13 Optical Amplifier Boards and Dispersion Compensation
Hardware Description
Boards
applied, the 62COA is installed in any idle place of the 2.6 m high cabinet or in the cabinet that
is not fully configured.
Feature Code
SS61COA01
01
14 dBm
SS61COA02
02
17 dBm
Value
61COA
Issue 02 (2009-07-30)
N1COA
62COA
NRZ
Operating wavelength
range (nm)
1550
BA: -6 to +3
13 to 15
Pump wavelength
(nm)
NA
1451.2
NA
NA
< -1.5
1550.12
-10 to -37
15 to 17
NA
13-27
13 Optical Amplifier Boards and Dispersion Compensation OptiX OSN 3500 II Intelligent Optical Transmission System
Boards
Hardware Description
Mechanical Specifications
The mechanical specifications of the 61COA and N1COA are as follows:
l
Power Consumption
The maximum power consumption of the 61COA at room temperature (25C) is 10 W.
The maximum power consumption of the 62COA at room temperature (25C) is 75 W.
The maximum power consumption of the N1COA at room temperature (25C) is 10 W.
13.4 RPC01
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the RPC01 (forward Raman driving board).
13.4.1 Version Description
The RPC01 is available in one functional version, namely, N1.
13.4.2 Functions and Features
The RPC01 supports the online optical performance monitoring function and other functions.
13.4.3 Working Principle and Signal Flow
The RPC01 consists of the Raman pump optical module, driving and detecting module,
communication and control module, and power supply module.
13.4.4 Front Panel
The front panel of the RPC01 has indicators, interfaces, and a laser safety class label.
13.4.5 Valid Slots
The RPC01 is an external forward Raman driving board. Hence, the RPC01 is not installed in
the subrack. The RPC01 is connected to the COM interface of an NE directly or though a hub
to realize the communication with the SCC. The logical slot of the RPC01 on the NMS is slot
104.
13.4.6 Jumpers and DIP Switches
The RPC01 has two groups of jumpers, namely, group J3 and group J4.
13.4.7 Feature Code
The feature code of the RPC01 contains three characters, which indicate the gain of the optical
signal processed by the RPC01.
13-28
Issue 02 (2009-07-30)
OptiX OSN 3500 II Intelligent Optical Transmission System 13 Optical Amplifier Boards and Dispersion Compensation
Hardware Description
Boards
RPC01
Basic functions
Online optical
performance
monitoring function
Performance events
and alarms
monitoring
Issue 02 (2009-07-30)
13-29
13 Optical Amplifier Boards and Dispersion Compensation OptiX OSN 3500 II Intelligent Optical Transmission System
Boards
Hardware Description
Signal light
LINE
Pump light
Pump source
Control the
pumping current
and temperature.
SYS
MON
PIN
Detect the
temperature.
Control
Memory
CPU
Communication
Voltages required
by the board
DC power provided
by the backplane
SCC
Backplane
(controlled by
the SCC)
Signal Flow
The pump source of the RPC01 sends the pump light to the WDM side through the LINE optical
interface. On the line, the signals that are amplified through the distributed amplification are
received through the LINE interface. Then, the splitter splits the signals into two channels. The
service optical signals are transmitted through the SYS interface. A few supervisory signals are
transmitted to the test instrument through the MON interface for online optical performance
monitoring. The Ethernet interface of the RPC01 is connected to the COM interface of an NE
directly or through a hub to realize the communication with the SCC.
Functional Modules
l
The laser in the pump source module generates the pump light and sends the pump light
to the optical line for transmission. The Raman pump optical module utilizes the
stimulated Raman scattering effect of the fiber to amplify the optical signals during
transmission.
The splitter splits one channel of optical signals from the pump source module into two
channels of signals of different power. One channel of signals are transmitted through
the SYS interface to the main optical path. The other channel of signals are transmitted
to the MON interface for spectrum detection and supervising.
13-30
Issue 02 (2009-07-30)
OptiX OSN 3500 II Intelligent Optical Transmission System 13 Optical Amplifier Boards and Dispersion Compensation
Hardware Description
Boards
Detects the driving current, back facet current, cooling current, and operating
temperature of the pump inside the pump optical module in real time.
Reports alarms and performance events to the logic and control module.
Controls the operations on each module of the board according to the CPU instructions.
Collects the alarms, performance events, working status, and voltage detection
information of each functional module of the board.
03793010860000002 Y SSE1ROP01
Board manufacturing
information
MON
Board serial
number and name
SYS
LINE
LASER
RADIATION
AVOID EYE OR SKIN
EXPOSURE TO DIRECT OR
SCATTERED RADIATION
CRPC
CLASS 4 LASER
PRODUCT
ALM
RUN
RS232-1
RS232-2
LAN
Indicators
The front panel of the board has the following indicators:
l
13-31
13 Optical Amplifier Boards and Dispersion Compensation OptiX OSN 3500 II Intelligent Optical Transmission System
Boards
Hardware Description
Interfaces
The front panel of the RPC01 has six interfaces. Table 13-20 describes the types and usage of
the interfaces of the RPC01.
Table 13-20 Interfaces of the RPC01
Interface
Type of
Interface
Usage
LINE
LSH/APC
SYS
LC
MON
LC
LAN
RJ-45
RS232-1/
RS232-2
10
J3
J4
13-32
10
CPU
Issue 02 (2009-07-30)
OptiX OSN 3500 II Intelligent Optical Transmission System 13 Optical Amplifier Boards and Dispersion Compensation
Hardware Description
Boards
To ensure that the board can operate normally, set the jumpers as follows:
l
Indication
Description
Is always "G".
Gain
Consider the N1RPC01 whose feature code is "G10" as an example. "G10" indicates that the
gain of the optical signal is 10 dB.
Laser status
For the description of each parameter, see F.5 Optical Amplifier Boards.
Interface Display
Table 13-22 shows the serial numbers of the optical interfaces on the front panel of the RPC01
on the NMS.
Table 13-22 Serial numbers of the optical interfaces on the front panel of the RPC01 on the
NMS
Issue 02 (2009-07-30)
LINE
SYS
2
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
13-33
13 Optical Amplifier Boards and Dispersion Compensation OptiX OSN 3500 II Intelligent Optical Transmission System
Boards
Hardware Description
MON
Value
1400 to 1500
1529 to 1561
29
10
12
-1
0.5
LSH/APC or LC/PC
Mechanical Specifications
l
Power Consumption
The maximum power consumption of the RPC01 at room temperature (25C) is 70 W.
The maximum power consumption of the RPC01 at room temperature (55C) is 121 W.
13-34
Issue 02 (2009-07-30)
OptiX OSN 3500 II Intelligent Optical Transmission System 13 Optical Amplifier Boards and Dispersion Compensation
Hardware Description
Boards
13.5 RPC02
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the RPC02 (backward Raman driving board).
13.5.1 Version Description
The RPC02 is available in one functional version, namely, N1.
13.5.2 Functions and Features
The RPC02 supports the online optical performance monitoring function and other functions.
13.5.3 Working Principle and Signal Flow
The RPC02 consists of the Raman pump optical module, driving and detecting module,
communication and control module, and power supply module.
13.5.4 Front Panel
The front panel of the RPC02 has indicators, interfaces, and a laser safety class label.
13.5.5 Valid Slots
The RPC02 is an external backward Raman driving board. Hence, the RPC02 is not installed in
the subrack. The RPC02 is connected to the COM interface of an NE directly or though a hub
to realize the communication with the SCC. The logical slot of the RPC02 on the NMS is slot
105.
13.5.6 Jumpers and DIP Switches
The RPC02 has two groups of jumpers, namely, group J3 and group J4.
13.5.7 Feature Code
The feature code of the RPC02 contains three characters, which indicate the gain of the optical
signal processed by the RPC02.
13.5.8 Parameter Settings
You can set the parameters for the RPC02 by using the T2000.
13.5.9 Technical Specifications
The technical specifications of the RPC02 include the parameters specified for optical interfaces,
laser safety class, mechanical specifications, and power consumption.
Issue 02 (2009-07-30)
13-35
13 Optical Amplifier Boards and Dispersion Compensation OptiX OSN 3500 II Intelligent Optical Transmission System
Boards
Hardware Description
RPC02
Basic functions
Online optical
performance
monitoring function
Performance events
and alarms
monitoring
13-36
Issue 02 (2009-07-30)
OptiX OSN 3500 II Intelligent Optical Transmission System 13 Optical Amplifier Boards and Dispersion Compensation
Hardware Description
Boards
Signal light
LINE
Pump light
Pump source
Control the
pumping current
and temperature.
SYS
MON
PIN
Detect the
temperature.
Control
Memory
CPU
Communication
Voltages required
by the board
DC power provided
by the backplane
SCC
Backplane
(controlled by
the SCC)
Signal Flow
The signal light is received at the SYS interface and transmitted to the optical line through the
LINE interface. A few supervisory signals are transmitted to the test instrument through the
MON interface for online optical performance monitoring. The pump light that is generated by
the RPC02 is transmitted to the optical line through the LINE interface in the same direction of
the signal light, to realize the distributed amplification of the optical signal. The Ethernet
interface of the RPC02 is connected to the COM interface of an NE directly or through a hub to
realize the communication with the SCC.
Functional Modules
l
Issue 02 (2009-07-30)
The laser in the pump source module generates the pump light and sends the pump light
to the optical line for transmission. The Raman pump optical module utilizes the
stimulated Raman scattering effect of the fiber to amplify the optical signals during
transmission.
The splitter splits one channel of optical signals from the pump source module into two
channels of signals of different power. One channel of signals are transmitted through
the SYS interface to the main optical path. The other channel of signals are transmitted
to the MON interface for spectrum detection and supervising.
13-37
13 Optical Amplifier Boards and Dispersion Compensation OptiX OSN 3500 II Intelligent Optical Transmission System
Boards
Hardware Description
Detects the driving current, back facet current, cooling current, and operating
temperature of the pump inside the pump optical module in real time.
Reports alarms and performance events to the logic and control module.
Controls the operations on each module of the board according to the CPU instructions.
Collects the alarms, performance events, working status, and voltage detection
information of each functional module of the board.
03793010860000002 Y SSE1ROP01
Board manufacturing
information
MON
Board serial
number and name
SYS
LINE
LASER
RADIATION
AVOID EYE OR SKIN
EXPOSURE TO DIRECT OR
SCATTERED RADIATION
CRPC
CLASS 4 LASER
PRODUCT
ALM
RUN
RS232-1
RS232-2
LAN
Indicators
The front panel of the board has the following indicators:
l
Issue 02 (2009-07-30)
OptiX OSN 3500 II Intelligent Optical Transmission System 13 Optical Amplifier Boards and Dispersion Compensation
Hardware Description
Boards
Interfaces
The front panel of the RPC02 has six interfaces. Table 13-25 describes the types and usage of
the interfaces of the RPC02.
Table 13-25 Interfaces of the RPC02
Interface
Type of
Interface
Usage
LINE
LSH/APC
SYS
LC
MON
LC
LAN
RJ-45
RS232-1/
RS232-2
10
10
J3
J4
CPU
Issue 02 (2009-07-30)
13-39
13 Optical Amplifier Boards and Dispersion Compensation OptiX OSN 3500 II Intelligent Optical Transmission System
Boards
Hardware Description
To ensure that the board can operate normally, set the jumpers as follows:
l
Indication
Description
Is always "G".
Gain
Consider the N1RPC02 whose feature code is "G10" as an example. "G10" indicates that the
gain of the optical signal is 10 dB.
Laser status
For the description of each parameter, see F.5 Optical Amplifier Boards.
Interface Display
Table 13-27 shows the serial numbers of the optical interfaces on the front panel of the RPC02
on the NMS.
Table 13-27 Serial numbers of the optical interfaces on the front panel of the RPC02 on the
NMS
13-40
LINE
SYS
2
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
Issue 02 (2009-07-30)
OptiX OSN 3500 II Intelligent Optical Transmission System 13 Optical Amplifier Boards and Dispersion Compensation
Hardware Description
Boards
MON
Value
1400 to 1500
1529 to 1561
29.5
> 10
NA
NA
NA
0.5
LSH/APC or LC/PC
Mechanical Specifications
The mechanical specifications of the RPC02 are as follows:
l
Power Consumption
The maximum power consumption of the RPC02 at room temperature (25C) is 110 W.
Issue 02 (2009-07-30)
13-41
13 Optical Amplifier Boards and Dispersion Compensation OptiX OSN 3500 II Intelligent Optical Transmission System
Boards
Hardware Description
13.6 OBU1
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the TN11OBU1 (optical booster amplifier board).
13.6.1 Version Description
The OBU1 is available in one functional version, namely, TN11.
13.6.2 Functions and Features
The OBU1 supports the online optical performance monitoring function, gain lock, transient
control, and other functions.
13.6.3 Working Principle and Signal Flow
The OBU1 consists of the EDFA optical module, driving and detecting module, communication
and control module, and power supply module.
13.6.4 Front Panel
The front panel of the OBU1 has indicators, interfaces, and a laser safety class label.
13.6.5 Valid Slots
The OBU1 can be installed in slots 28 and 1116 in the subrack.
13.6.6 Feature Code
The feature code of the OBU1 contains six characters, which indicate the gain and maximum
nominal input optical power of the optical signals processed by the OBU1.
13.6.7 Parameter Settings
You can set the parameters for the OBU1 by using the T2000.
13.6.8 Technical Specifications
The technical specifications of the OBU1 include the parameters specified for optical interfaces,
laser safety class, mechanical specifications, and power consumption.
OBU1
Basic functions
13-42
Issue 02 (2009-07-30)
OptiX OSN 3500 II Intelligent Optical Transmission System 13 Optical Amplifier Boards and Dispersion Compensation
Hardware Description
Boards
Function and
Feature
OBU1
Typical gain
The typical gain of the OBU101 is 20 dB and the typical gain of the
OBU102 is 23 dB.
Online optical
performance
monitoring
function
The EDFA inside the board has the gain lock function. When one or
more channels are added or dropped, or optical signals of certain
channels fluctuate, the signal gain of other channels is not affected.
Transient control
function
The EDFA inside the board has the transient control function. When
channels are added or dropped, the board can suppress the fluctuation
of the optical power in the path to realize the smooth upgrading and
expansion.
Performance
events and alarms
monitoring
NOTE
The OBU1 is available in two types, namely, OBU101 and OBU102. The OBU101 is used at the receive
end and the OBU102 is used at the transmit end.
Issue 02 (2009-07-30)
13-43
13 Optical Amplifier Boards and Dispersion Compensation OptiX OSN 3500 II Intelligent Optical Transmission System
Boards
Hardware Description
Splitter
OUT
Driving
current
MON
PIN
Control
Memory
CPU
Communication
Fuse
DC power provided
by the backplane
Backplane
(controlled
by the
SCC
SCC)
Signal Flow
The OBU1 accesses the multiplexed optical signals, which are amplified by the EDFA optical
module. Then, the OBU1 sends the amplified optical signals to the splitter and transmits the
signals through the OUT interface. The OBU1 also sends a few supervisory signals to the test
instrument for online optical performance monitoring.
Splitter
The splitter splits one channel of optical signals from the EDFA optical module into two channels
of signals of different power. One channel of signals are transmitted through the OUT interface
to the main optical path. The other channel of signals are transmitted to the MON interface for
spectrum detection and supervising.
The power of the MON interface is 1/99 of the power of the OUT interface. That is, the power
of the MON interface is 20 dB less than the power of the OUT interface.
13-44
Issue 02 (2009-07-30)
OptiX OSN 3500 II Intelligent Optical Transmission System 13 Optical Amplifier Boards and Dispersion Compensation
Hardware Description
Boards
OBU1
STAT
ACT
PROG
SRV
LASER
RADIATION
DO NOT VIEW DIRECTLY
WITH OPTICAL
INSTRUMENTS
CLASS 1M LASER
PRODUCT
MON
OUT
IN
OBU1
Issue 02 (2009-07-30)
13-45
13 Optical Amplifier Boards and Dispersion Compensation OptiX OSN 3500 II Intelligent Optical Transmission System
Boards
Hardware Description
Indicators
The front panel of the board has the following indicators:
l
Board hardware status indicator (STAT) two colors (red and green)
Board software status indicator (PROG) two colors (red and green)
Service alarm indicator (SRV) three colors (red, green, and yellow)
Interfaces
The front panel of the OBU1 has three optical interfaces. Table 13-30 describes the types and
usage of the optical interfaces of the OBU1.
Table 13-30 Optical interfaces of the OBU1
Interface
Type of
Interface
Usage
IN
LC
OUT
LC
MON
LC
13-46
Feature Code
Indication
Description
Is always "G".
Gain
Is always "I".
Issue 02 (2009-07-30)
OptiX OSN 3500 II Intelligent Optical Transmission System 13 Optical Amplifier Boards and Dispersion Compensation
Hardware Description
Boards
Feature Code
Indication
Description
Consider the TN11OBU1 whose feature code is "G23I-3" as an example. "G23I-3" indicates
that the gain is 23 dB and the maximum nominal input optical power is 3 dBm.
Laser status
Gain
Configure band
Actual band
For the description of each parameter, see F.5 Optical Amplifier Boards.
Issue 02 (2009-07-30)
Value
OBU1C01
OBU1C02
1529 to 1561
1529 to 1561
-32 to -4
-32 to -3
-12 to +16
-9 to +20
13-47
13 Optical Amplifier Boards and Dispersion Compensation OptiX OSN 3500 II Intelligent Optical Transmission System
Boards
Hardware Description
Parameter
Value
OBU1C01
OBU1C02
-20
-19
201.5
231.5
5.5
6.0
2.0
2.0
00.2
1.00.2
Mechanical Specifications
The mechanical specifications of the OBU1 are as follows:
l
Power Consumption
The maximum power consumption of the OBU101 at room temperature (25C) is 16 W.
The maximum power consumption of the OBU101 at high temperature (55C) is 18 W.
The maximum power consumption of the OBU102 at room temperature (25C) is 18 W.
The maximum power consumption of the OBU102 at high temperature (55C) is 20 W.
13.7 DCU
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the DCU (dispersion compensation board).
13.7.1 Version Description
The DCU is available in two functional versions, namely, N1 and N2. The difference between
the two versions is with regard to the insertion attenuation and compensation.
13.7.2 Functions and Features
The DCU compensates for the dispersion that is accumulated in the fiber during the transmission
of the optical signals in the 10 Gbit/s system and compresses optical signal pulse. In this manner,
13-48
Issue 02 (2009-07-30)
OptiX OSN 3500 II Intelligent Optical Transmission System 13 Optical Amplifier Boards and Dispersion Compensation
Hardware Description
Boards
the optical signals that are transmitted can be restored. In addition, the DCU can realize long
haul optical transmission when it works with an optical amplifier board.
13.7.3 Working Principle and Signal Flow
The DCU consists of the dispersion compensation module.
13.7.4 Front Panel
The front panel of the DCU has interfaces, and a laser safety class label.
13.7.5 Valid Slots
The DCU can be installed in slots 28 and 1116 in the subrack.
13.7.6 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the DCU indicates the compensated dispersion for the optical signals.
13.7.7 Technical Specifications
The technical specifications of the DCU include the parameters specified for optical interfaces,
mechanical specifications, and power consumption.
Description
Functional versions
Commonness
Differences
Substitution
13-49
13 Optical Amplifier Boards and Dispersion Compensation OptiX OSN 3500 II Intelligent Optical Transmission System
Boards
Hardware Description
a result, the optical signals cannot be normally received by the optical receiver. Hence, the DCU
needs to be used to compensate for the dispersion. Figure 13-26 shows the position of the DCU
in the optical transmission system.
Figure 13-26 Position of the DCU in the optical transmission system.
Pulse broading
Optical
transmitter
BA
PA
Pulse compressing
DCU
Optical
receiver
1550.12nm
1550.12nm
NOTE
The operating wavelength of the chirp grating of the DCU is 1550.12 nm. Hence, the central wavelength
of the optical signals transmitted by the optical interface board on the opposite end must also be 1550.12
nm. Otherwise, the dispersion of the optical signals cannot be compensated for and the insertion loss is
high. As a result, no optical signals can be transmitted.
The DCU supports the dispersion compensation for a maximum of two channels of STM-64
optical signals. The DCU can be used with the BA and PA.
Table 13-34 provides the functions and features of the DCU.
Table 13-34 Functions and features of the DCU
13-50
Function
and Feature
N1DCU
N2DCU
Basic
functions
Dispersion
compensatio
n method
Long haul
transmission
with optical
regeneration
Realizes long haul transmission with optical regeneration when working with
the BA and PA.
Issue 02 (2009-07-30)
OptiX OSN 3500 II Intelligent Optical Transmission System 13 Optical Amplifier Boards and Dispersion Compensation
Hardware Description
Boards
Dispersion compensation
OUT
module
The dispersion compensation module is used behind the PA to provide optical signals of required
compensation and path penalty.
Issue 02 (2009-07-30)
13-51
13 Optical Amplifier Boards and Dispersion Compensation OptiX OSN 3500 II Intelligent Optical Transmission System
Boards
Hardware Description
DCU
CLASS 1
LASER
PRODUCT
OUT
IN
DCU
Figure 13-29 shows the appearance of the front panel of the two-interface DCU.
13-52
Issue 02 (2009-07-30)
OptiX OSN 3500 II Intelligent Optical Transmission System 13 Optical Amplifier Boards and Dispersion Compensation
Hardware Description
Boards
DCU
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2 IN2
DCU
Interfaces
The front panel of the one-interface DCU has one optical interface. The optical interface
transmits and receives one channel of 10 Gbit/s optical signals.
The front panel of the two-interface DCU has two optical interfaces. The optical interfaces
transmit and receive two channels of 10 Gbit/s optical signals.
WARNING
If the front panel of the one-interface DCU has two LC optical interfaces, only the upper optical
interface (IN1/OUT1) is valid. In the case of the DCU whose front panel has two LC optical
interfaces, determine whether the DCU is a one-interface DCU or a two-interface DCU according
to 13.7.6 Feature Code.
Issue 02 (2009-07-30)
13-53
13 Optical Amplifier Boards and Dispersion Compensation OptiX OSN 3500 II Intelligent Optical Transmission System
Boards
Hardware Description
Table 13-35 describes the type and usage of the optical interface of the one-interface DCU.
Table 13-35 Optical interface of the one-interface DCU
Interface
Type of
Interface
Usage
IN
LC
OUT
LC
Table 13-36 describes the types and usage of the optical interfaces of the two-interface DCU.
Table 13-36 Optical interfaces of the two-interface DCU
Interface
Type of
Interface
Usage
IN1
LC
OUT1
LC
IN2
LC
OUT2
LC
13-54
Board
Feature Code
Compensated Dispersion
SSN1DCU01
01
SSN1DCU02
02
SSN1DCU03
03
Issue 02 (2009-07-30)
OptiX OSN 3500 II Intelligent Optical Transmission System 13 Optical Amplifier Boards and Dispersion Compensation
Hardware Description
Boards
Board
Feature Code
Compensated Dispersion
SSN1DCU04
04
SSN1DCU05
05
SSN2DCU01
01
SSN2DCU02
02
SSN2DCU03
03
SSN2DCU04
04
SSN2DCU05
05
SSN2DCU06
06
SSN2DCU07
07
SSN2DCU08
08
SSN2DCU09
09
Issue 02 (2009-07-30)
Parameter
Value
9953280 kbit/s
NRZ
Central wavelength
(nm)
1550.120.05
13-55
13 Optical Amplifier Boards and Dispersion Compensation OptiX OSN 3500 II Intelligent Optical Transmission System
Boards
Hardware Description
Parameter
Value
-0.5 dB bandwidth
(nm)
> 0.4
Compensated
dispersion (ps/nm)
Less than 8.3 dB in the case of the N1DCU and less than 3 dB in
the case of the N2DCU
Mechanical Specifications
The mechanical specifications of the DCU are as follows:
l
Power Consumption
The maximum power consumption of the DCU at room temperature (25C) is 0 W.
13-56
Issue 02 (2009-07-30)
14 Power Boards
14
Power Boards
Issue 02 (2009-07-30)
14-1
14 Power Boards
14.1 UPM
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the UPM (uninterruptible power module).
14.1.1 Version Description
None.
14.1.2 Functions and Features
The UPM is a special power supply system and is numbered EPS75-4815AF. The UPM can
directly convert 110 V/220 V AC power into 48 V DC power that the transmission equipment
requires. The UPM is suitable for the telecom carriers who cannot provide 48 V DC power for
the equipment.
14.1.3 Working Principle and Signal Flow
The UPM is fed by one 220 V AC mains power supply. The rectifier module converts the input
power into 48 V DC voltage to provide four DC branches and one battery branch.
14.1.4 Front Panel
The front panel of the UPM has indicators and interfaces of many types.
14.1.5 Valid Slots
The UPM is case shaped. Hence, the UPM does not occupy a slot in the subrack.
14.1.6 Technical Specifications
The technical specifications of the UPM include the power parameters and mechanical
specifications.
14-2
Issue 02 (2009-07-30)
14 Power Boards
The storage batteries of the UPM work with one power box. When the external AC power system
supplies power normally, the batteries store power. When the 110 V/220 V AC power supply is
interrupted, the batteries can supply power for three hours (the battery capacity is 65 Ah). To
supply power to the OptiX OSN equipment, only one power box is required to be connected to
the batteries.
The standard maximum configuration of each power box includes five rectifier modules and one
monitoring module.
NOTE
The batteries do not belong to the UPM. Hence, the batteries need to be configured separately. If the batteries
are required, a battery cabinet is provided generally or a dedicated space in the equipment cabinet is reserved
for the batteries.
UPM
Hot-swappable
function
Storage battery
protection function
The UPM provides the storage battery protection function. When the
mains supply is interrupted, the power system of the equipment
automatically switches to the storage battery, which ensures that the
equipment operates normally. The battery module provides a
capacity of 40 to 500 Ah. The default capacity is 65 Ah.
Loading capacity
Lightning-proof
function
14-3
14 Power Boards
fails. When the batteries start to discharge due to a mains supply failure, the monitoring module
reports the no-mains-supply alarm. With the discharge of the batteries, the battery voltage starts
to drop. When the battery voltage is lower than 45 V, the monitoring module reports the DC
undervoltage alarm. When the battery voltage reaches 43 V, the battery group enables the poweroff protection function to interrupt the connection between the battery group and the equipment.
As a result, the batteries are automatically protected.
When the mains supply is restored, the UPM resumes normal operations.
10
11
14
12
13
15
16
Indicators
The front panel of each rectifier module has the following indicators:
14-4
Issue 02 (2009-07-30)
14 Power Boards
The front panel of the monitoring module has the following indicators:
l
Interfaces
The front panel of the UPM has seven interfaces. Table 14-2 describes the types and usage of
the interfaces of the UPM.
Table 14-2 Interfaces of the UPM
Issue 02 (2009-07-30)
Interface
Type of Interface
Usage
Power input
interface
Power interface
Power output
interface
Power interface
Connecting
terminal of the
protection
grounding cable
Power interface
DB44 signal
interface
DB44
Communication
interface (COM)
RJ-45
14-5
14 Power Boards
Interface
Type of Interface
Usage
Communication
test interface
(TEST)
RJ-45
Switch button
Button
Power Parameters
Table 14-3 lists the power parameters of the UPM.
Table 14-3 Power parameters of the UPM
Parameter
Value
Voltage range of
the AC input
90-290 V AC
AC input
28 A
Output nominal
voltage
53.50.5 V
Rated output
current
DC output branches
Load MCB 1: 10 A
Load MCB 2: 3 0A
Load MCB 3: 40 A
Load MCB 4: 40 A
Battery MCB: 80 A
37.53 A to 753 A
1%
Issue 02 (2009-07-30)
14 Power Boards
Parameter
Value
Non-balance of
load sharing
5% (50%-100% load)
Rated efficiency of
the integrated
equipment
89%
Power factor
Peak-to-peak noise
voltage
Electrical network
adjustment rate
0.1%
Lightning
protection
performance
When the UPM works alone, the input end can bear the simulated
lightning surge current whose waveform is 8/20s and amplitude is 5
kA for five times in both directions. The interval between two surges
must not be less than one minute. If the lightning surge current is higher
than the preceding indexes, the UPM may be damaged and cannot work
normally.
Cooling method
The fan that is embedded in the rectifier module cools the module.
Mechanical Specifications
The mechanical specifications of the UPM are as follows:
l
Dimensions of the UPM (mm): 436 (W) x 255 (D) x 133 (H)
Weight: 15 kg
14.2 PIU
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the PIU (power interface board).
14.2.1 Version Description
The PIU is available in one functional version, namely, Q2.
14.2.2 Functions and Features
The PIU is used to access the power supply and to provide the lightning protection function and
filtering function.
14.2.3 Working Principle and Signal Flow
The PIU consists of the protection unit, protection circuit failure detecting unit, filtering unit,
and power detecting unit.
14.2.4 Front Panel
The front panel of the PIU has indicators and power interfaces.
14.2.5 Valid Slots
Issue 02 (2009-07-30)
14-7
14 Power Boards
PIU
Lightning
protection function
Provides the lightning protection function and reports the alarm that
indicates the failure of the lightning protection function.
Filtering function
Power supply
interface
Alarm monitoring
Power supply
backup
Supports the 1+1 hot backup. Any one PIU can supply power to the
entire subrack.
NOTE
14-8
Issue 02 (2009-07-30)
14 Power Boards
NEG(-)
NEG(-)
Protection
unit
RTN(+)
Filtering
unit
RTN(+)
Protection circuit
failure detecting unit
AUX
Power
detecting
unit
LED
indication
Filtering Unit
This unit filters the electromagnetic interference signals to ensure that the equipment can operate
stably.
Protection Unit
This unit protects the equipment from overcurrent and lightning.
14-9
14 Power Boards
PIU
POWER
PWS
NEG()
RTN(+)
PIU
Interfaces
The front panel of the PIU has two power interfaces. Table 14-5 describes the types and usage
of the interfaces of the PIU.
Table 14-5 Interfaces of the PIU
Interface
Type of
Interface
Usage
PWR
PWS
Output interface
for the 50 W
power supply
Table 14-6 provides the pin assignments of the PWS interface of the PIU.
14-10
Issue 02 (2009-07-30)
14 Power Boards
Pin
Usage
48 V 1
48 V 2
BGND
BGND
Mechanical Specifications
The mechanical specifications of the PIU are as follows:
l
Weight: 0.3 kg
Power Consumption
At room temperature (25C), the maximum power consumption of the PIU is 2 W.
Input Voltage
The input voltage range of the PIU is as follows:
l
If the standard voltage of the input power is -48 V, the power voltage ranges from -38.4 V
to -57.6 V.
If the standard voltage of the input power is -60 V, the power voltage ranges from -48 V
to -72 V.
Issue 02 (2009-07-30)
14-11
15 Cables
15
Cables
Issue 02 (2009-07-30)
15-1
15 Cables
Connector
1
Connector
2
Fiber
Available Length
Used to connect
the OptiX OSN
equipment to the
ODF or to
connect an
interface board of
the OptiX OSN
equipment to
other equipment
LC/PC
FC/PC
2 mm singlemode fiber
6 m, 10 m, 20 m, 30 m,
and 50 m
2 mm multimode fiber
3 m, 5 m, 10 m, 20 m,
30 m, and 50 m
2 mm singlemode fiber
5 m, 10 m, 20 m, 30 m,
and 50 m
2 mm multimode fiber
10 m, 20 m, 30 m, and
50 m
Used to connect
the OptiX OSN
equipment
LC/PC
SC/PC
SC/PC
SC/PC
2 mm singlemode fiber
2 m, 5 m, 10 m, 20 m,
30 m, 50 m, and 80 m
LC/PC
LC/PC
2 mm singlemode fiber
1.5 m, 3 m, 5 m, 10 m,
20 m, and 30 m
2 mm multimode fiber
3 m, 5 m, 10 m, 20 m,
and 30 m
LC/PC
FC/PC
2 mm singlemode fiber
6 m, 10 m, 20 m, 30 m,
and 50 m
LC/PC
SC/PC
2 mm multimode fiber
5 m, 10 m, 20 m, 30 m,
and 50 m
Select the fiber connector and fiber length according to the on-site survey.
15.1.2 Connector
The OptiX OSN equipment uses various types of fiber connectors.
15-2
Issue 02 (2009-07-30)
15 Cables
Most of the optical interfaces on the front panels of the boards are the LC/PC optical
interfaces. See Figure 15-1.
The "IN" interface on the case-shaped 62COA that is externally installed uses the LSH/
APC connector. See Figure 15-4.
Generally, the ODF on the client side provides the FC/PC or SC/PC optical interface.
Figure 15-3 and Figure 15-2 show the corresponding FC/PC and SC/PC fiber connectors.
Description
LC/PC
LSH/APC
FC/PC
SC/PC
The axial operation instead of rotation is required to insert or remove an LC/PC fiber connector.
To insert a fiber jumper that uses an LC/PC connector, align the head of the fiber jumper with
the optical interface and apply proper force. To remove the fiber jumper, first, press the clip,
then, slightly push the fiber connector inward, and finally, pull out the connector.
Issue 02 (2009-07-30)
15-3
15 Cables
15-4
Issue 02 (2009-07-30)
15 Cables
Structure
Figure 15-5 shows the structure of the 48 V/BGND power cable of the cabinet. Figure 15-6
and Figure 15-7 show the structure of the PGND power cable of the cabinet.
Figure 15-5 Structure of the 48 V/BGND power cable of the cabinet
1
3
1. Cord end terminal
Issue 02 (2009-07-30)
3. Cable tie
15-5
15 Cables
Figure 15-6 Structure of the PGND power cable of the cabinet (JG2)
2. Cable tie
5. Main label
6. Wire
Figure 15-7 Structure of the PGND power cable of the cabinet (OT)
2. Cable tie
5. Main label
6. Wire
Pin Assignments
None.
Technical Specifications
Item
48 V power
cable of the
cabinet
15-6
Description
Terminal 2
Issue 02 (2009-07-30)
Item
15 Cables
Description
BGND power
cable of the
cabinet
PGND power
cable of the
cabinet
Terminal 1
Cable type
Terminal 2
Terminal 1
Cable type
Terminal 1
Terminal 3
Cable type
Fireproof class
CM
Length
10 m, 20 m, and 30 m
Structure
Figure 15-8 shows the structure of the grounding cable of the cabinet door.
Figure 15-8 Structure of the grounding cable of the cabinet door
Issue 02 (2009-07-30)
3. Main label
15-7
15 Cables
Pin Assignments
None.
Technical Specifications
Item
Description
Terminal X1/X2
Cable
Type
Fireproof
class
CM
Length
0.35 m
Structure
Figure 15-9 shows the structure of the subrack power cable.
Figure 15-9 Structure of the subrack power cable
1. Cable connector
2. Main label
3. Cable tie
4. Label
Pin Assignments
Table 15-3 provides the pin assignments of the subrack power cable.
15-8
Issue 02 (2009-07-30)
15 Cables
Bare
Crimping
Terminal
Connection
X1.A1
X2
A1 is connected to X2.
X1.A3
X3
A3 is connected to X3.
Technical Specifications
Item
Description
Cable connector X1
Cable
Type
Number of
cores
Fireproof
class
CM
Color
Length
Structure
Figure 15-10 shows the structure of the COA power cable.
Issue 02 (2009-07-30)
15-9
15 Cables
A-A
W1
3 1
4 2
X1
A 2
X3
W2
X2
W1.1
W1
W1.2
W2.1
X3
W2
W2.2
1. Common terminal female 2. Common connector 4-pin 3. Main label A-A. Sectional view in direction
A
Pin Assignments
Table 15-4 provides the pin assignments of the COA power cable.
Table 15-4 Pin assignments of the COA power cable
Connectors X1
and X2
Cables W1 and W2
Color
Connector X3
X1.1
W1.1
Brown
X3.1
X2.1
W2.1
X1.3
W1.2
Black
X3.3
X2.3
W2.2
Technical Specifications
15-10
Item
Description
Connector X3
Connector X1/X2
Number of cores
Fireproof class
CM
Color
Black
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
Issue 02 (2009-07-30)
Item
Description
Length
1.8 m
15 Cables
Structure
Figure 15-11 shows the structure of the cabinet indicator cable.
Issue 02 (2009-07-30)
15-11
15 Cables
X2
X3
X1
X4
X5
Pin Assignments
Table 15-5 provides the pin assignments of the cabinet indicator cable.
Table 15-5 Pin assignments of the cabinet indicator cable
Connector
X1
Connector X2/X3/X4/X5
Relation
Print on the
Label
X1.4
X2.2
Green
X1.5
X2.1
Twisted
pair
X1.1
X3.2
Red
X1.2
X3.1
Twisted
pair
X1.3
X4.2
Orange
X1.6
X4.1
Twisted
pair
X1.7
X5.2
Yellow
X1.8
X5.1
Twisted
pair
Technical Specifications
15-12
Item
Description
Connector X1
Connector X2/X3/X4/X5
Cable type
Number of cores
Issue 02 (2009-07-30)
15 Cables
Item
Description
Fireproof class
CM
0.5 mm
Length
Structure
Figure 15-12 shows the structure of the indicator cascading cable between subracks or the alarm
cascading cable between the OptiX OSN equipment.
Figure 15-12 Structure of the indicator cascading cable between subracks or the alarm cascading
cable between the OptiX OSN equipment
2. Label 1
Pin Assignments
Table 15-6 provides the pin assignments of the indicator cascading cable between subracks or
the alarm cascading cable between the OptiX OSN equipment.
Table 15-6 Pin assignments of the indicator cascading cable between subracks or the alarm
cascading cable between the OptiX OSN equipment
Issue 02 (2009-07-30)
Connect
or X1
Connect
or X2
Relation
Alarm Output
X1.1
X2.1
Twisted pair
15-13
15 Cables
Connect
or X1
Connect
or X2
X1.2
X2.2
X1.3
X2.3
X1.6
X2.6
X1.4
X2.4
X1.5
X2.5
X1.7
X2.7
X1.8
X2.8
Relation
Alarm Output
Critical alarm signal output and
major alarm signal output ()
Twisted pair
Twisted pair
Twisted pair
Technical Specifications
Item
Description
Connector X1/
X2
Cable type
Number of cores
Fireproof class
CM
Diameter of the
core
0.5 mm
Length
3 m, 5 m, 10 m, and 20 m
15-14
Issue 02 (2009-07-30)
15 Cables
Structure
Figure 15-13 shows the structure of the alarm cascading cable between the OptiX OSN
equipment and the other Huawei transmission equipment.
Figure 15-13 Structure of the alarm cascading cable between the OptiX OSN equipment and
the other Huawei transmission equipment
1. RJ-45 network interface connector 2. Main label 3. Label 1 4. Cable connector type D 9-pin female
L: 5 m, 10 m, and 20 m
Pin Assignments
Table 15-7 provides the pin assignments of the alarm cascading cable between the OptiX OSN
equipment and the other Huawei transmission equipment.
Table 15-7 Pin assignments of the alarm cascading cable between the OptiX OSN equipment
and the other Huawei transmission equipment
Connector X1
Connector X2
Relation
Description
X1.1
X2.7
Twisted pair
X1.2
X2.3
X1.3
X2.6
X1.6
X2.1
Technical Specifications
Issue 02 (2009-07-30)
Item
Description
Connector
X1
15-15
15 Cables
Item
Description
Connector
X2
Cable type
Number of
cores
Fireproof
class
CM
Diameter of
the core
0.5 mm
Length
5 m, 10 m, and 20 m
Structure
Figure 15-14 shows the structure of the alarm input/output cable.
Figure 15-14 Structure of the alarm input/output cable
15-16
2. Main label
Issue 02 (2009-07-30)
15 Cables
Pin Assignments
Table 15-8 provides the pin assignments of the alarm input/output cable.
Table 15-8 Pin assignments of the alarm input/output cable
Connector
X1
Color
Relation
Alarm Output
Alarm Input
X1.1
Blue
Twisted pair
SW_INPUT 1 +
X1.2
White
SW_INPUT 1
X1.3
Orange
SW_INPUT 2 +
X1.6
White
SW_INPUT 2
X1.4
Green
SW_INPUT 3 +
X1.5
White
SW_INPUT 3
X1.7
Brown
SW_INPUT 4 +
X1.8
White
SW_INPUT 4
Twisted pair
Twisted pair
Twisted pair
Technical Specifications
Item
Description
Connector X1
Cable type
Number of
cores
Fireproof class
CM
Core diameter
0.5 mm
15-17
15 Cables
The serial 14/F1/F&f serial port cable uses an RJ-45 connector at one end to connect to the
serial 14 interfaces, F1 serial port, or F&f serial port, and uses a DB9 connector at the other
end to connect to the external detecting equipment or external managed equipment.
15.4.3 RS-232/RS-422 Serial Port Cable
The RS-232/RS-422 serial port cable is used to transport the management signals between
subnets.
15.4.4 Ordinary Telephone Line
The ordinary telephone line is used to connect the orderwire phone. Both ends of the ordinary
telephone line use the RJ-45 connector. One end of the ordinary telephone line is connected to
the PHONE interface of the equipment, and the other end is connected to the interface of the
orderwire phone.
15.4.5 COA Cascading Cable
When multiple COAs are installed in a cabinet, use COA cascading cables to cascade the COAs.
15.4.6 Straight Through Cable
The straight through cable uses the RJ-45 connector to connect to the equipment at both ends.
The straight through cable is used to connect the OptiX OSN equipment, network management
computer, and Ethernet to realize communication.
15.4.7 Crossover Cable
The crossover cable is used to connect the OptiX OSN equipment to an NM computer.
Structure
Figure 15-15 shows the structure of the OAM serial port cable (using the DB25 connector).
Figure 15-15 Structure of the OAM serial port cable
1. RJ-45 network
interface connector
15-18
Issue 02 (2009-07-30)
15 Cables
Pin Assignments
Table 15-9 provides the pin assignments of the OAM serial port cable.
Table 15-9 Pin assignments of the OAM serial port cable
Connector
X1
Connector X2
Relation
Description
X1.2
X2.20
Single
X1.3
X2.2
Single
X1.6
X2.3
Single
X1.4
X2.7
Twisted pair
X1.5
Technical Specifications
Item
Description
Connector X1
Connector X2
Type
Number of
cores
Fireproof class
CM
Length
5000 mm
Issue 02 (2009-07-30)
15-19
15 Cables
Structure
Figure 15-16 shows the structure of the serial 14/F1/F&f serial port cable.
Figure 15-16 Structure of the serial 14/F1/F&f serial port cable
1. RJ-45 network
interface connector
Pin Assignments
Table 15-10 provides the pin assignments of the serial 14/F1/F&f serial port cable.
Table 15-10 Pin assignments of the serial 14/F1/F&f serial port cable
Connector X1
Connector X2
Relation
Description
X1.1
X2.8
Twisted pair
RS422RX+
X1.2
X2.9
X1.3
X2.6
X1.6
X2.7
X1.4
X2.3
X1.8
X2.2
X1.5
X2.5
RS422RX
Twisted pair
RS422TX+
RS422TX
Twisted pair
RS232RX
RS232TX
Single
SG
Technical Specifications
15-20
Item
Description
Connector X1
Connector X2
Issue 02 (2009-07-30)
15 Cables
Item
Description
Cable type
Number of
cores
Fireproof class
CM
Length
Structure
Figure 15-17 shows the structure of the RS-232/RS4-22 serial port cable.
Figure 15-17 Structure of the RS-232/RS-422 serial port cable
2. Main label
Pin Assignments
Table 15-11 provides the pin assignments of the RS-232/RS-422 serial port cable.
Issue 02 (2009-07-30)
15-21
15 Cables
Connector X2
Relation
Description
X1.3
X2.1
Twisted pair
RX+
X1.6
X2.2
X1.1
X2.3
X1.2
X2.6
X1.5
X2.5
X1.4
X2.8
X1.8
X2.4
RX
Twisted pair
TX+
TX
Twisted pair
SG
232RX
Single
232TX
Technical Specifications
Item
Description
Connector X1/X2
Cable type
Number of cores
Fireproof class
CM
Length
15 m
Structure
Figure 15-18 shows the structure of the ordinary telephone line.
15-22
Issue 02 (2009-07-30)
15 Cables
1. RJ-45 connector
2. Main label
Pin Assignments
Table 15-12 provides the pin assignments of the ordinary telephone line.
Table 15-12 Pin assignments of the ordinary telephone line
Connector X1
Connector X2
Description
X1.1
X2.1
Not connected
X1.2
X2.2
Not connected
X1.3
X2.3
TIP
X1.4
X2.4
RING
X1.5
X2.5
Not connected
X1.6
X2.6
Not connected
Technical Specifications
Item
Description
Connector X1/X2
Cable type
Number of cores
Fireproof class
CM
Length
15 m
15-23
15 Cables
Both ends of the COA cascading cable use the DB9 connector. One end of the COA cascading
cable is connected to the RS232-1 serial port of one COA, and the other end is connected to the
RS232-2 serial port of another COA.
Structure
Figure 15-19 shows the structure of the COA cascading cable.
Figure 15-19 Structure of the COA cascading cable
2. Label
Pin Assignments
Table 15-13 provides the pin assignments of the COA cascading cable.
Table 15-13 Pin assignments of the COA cascading cable
Connector X1
Connector X2
Remarks
One pair
Grounding
Technical Specifications
15-24
Item
Description
Connector X1/X2
Cable type
Number of cores
Two pairs
Fireproof class
CM
Length
Issue 02 (2009-07-30)
15 Cables
Structure
Figure 15-20 shows the structure of the straight through cable.
Figure 15-20 Structure of the straight through cable
2. Label 1
3. Main label
4. Label 2
Pin Assignments
Table 15-14 provides the pin assignments of the straight through cable.
Table 15-14 Pin assignments of the straight through cable
Issue 02 (2009-07-30)
Connector X1
Connector X2
Color
Relation
X1.1
X2.1
White/Orange
Twisted pair
X1.2
X2.2
Orange
X1.3
X2.3
White/Green
X1.6
X2.6
Green
X1.4
X2.4
Blue
X1.5
X2.5
White/Blue
X1.7
X2.7
White/Brown
X1.8
X2.8
Brown
Twisted pair
Twisted pair
Twisted pair
15-25
15 Cables
Technical Specifications
Item
Description
Connector X1/X2
Cable type
Communication cable 10015 ohms CAT5E SFTP 24 AWG 8core PANTONE 445U
Number of cores
Fireproof class
CM
Length
5 m, 10 m, 20 m, and 30 m
Structure
Figure 15-21 shows the structure of the crossover cable.
Figure 15-21 Structure of the crossover cable
2. Label 1
3. Main label
4. Network cable
5. Label 2
Pin Assignments
Table 15-15 provides the pin assignments of the crossover cable.
Table 15-15 Pin assignments of the crossover cable
15-26
Connector X1
Connector X2
Color
Relation
X1.6
X2.2
Orange
Twisted pair
Issue 02 (2009-07-30)
15 Cables
Connector X1
Connector X2
Color
X1.3
X2.1
White/Orange
X1.1
X2.3
White/Green
X1.2
X2.6
Green
X1.4
X2.4
Blue
X1.5
X2.5
White/Blue
X1.7
X2.7
White/Brown
X1.8
X2.8
Brown
Relation
Twisted pair
Twisted pair
Twisted pair
Technical Specifications
Item
Description
Connector X1/X2
Cable type
Communication cable 1005 ohms CAT5E SFTP 24 AWG 8core PANTONE 646U
Number of cores
Fireproof class
CM
Length
5 m and 30 m
15-27
15 Cables
The framed E1 cable is connected to the DB44 connector of the DM12 to access eight channels
of framed E1 signals.
15.5.6 Nx64 kbit/s Cable
The Nx64 kbit/s cable is connected to the DB28 connector of the DM12 to access one channel
of Nx64 kbit/s signals.
Structure
Figure 15-22 shows the structure of the 75-ohm 8xE1 cable.
Figure 15-22 Structure of the 75-ohm 8xE1 cable
View A
Pos.1
Pos.44
MO55
Main label
W
2. Main label
Pin Assignments
Table 15-16 provides the pin assignments of the 75-ohm 8xE1 cable.
Table 15-16 Pin assignments of the 75-ohm 8xE1 cable
Connector
Cable W
Remarks
Core
No.
38
Ring
23
Tip
15-28
R1
Connector
Cable W
Remarks
Core
No.
34
Ring
19
Tip
R5
Issue 02 (2009-07-30)
Connector
Cable W
Remarks
15 Cables
Connector
Core
No.
37
Ring
22
Tip
36
Ring
21
Tip
35
Ring
20
Tip
15
Ring
30
Tip
14
Ring
29
Tip
13
Ring
28
Tip
12
Ring
27
Tip
Shell
R2
R3
R4
T1
T2
T3
T4
Cable W
Remarks
Core
No.
33
Ring
11
R6
18
Tip
32
Ring
13
R7
17
Tip
31
Ring
15
R8
16
Tip
11
Ring
10
T5
26
Tip
10
Ring
12
T6
25
Tip
Ring
14
T7
24
Tip
Ring
16
T8
Tip
External braid shield layer/
Without the external braid shield
layer
Technical Specifications
The external layer of the 75-ohm E1 cable may be of the shielded type or unshielded type. The
specifications of the 75-ohm E1 cable with the shielded layer are different from the specifications
of the 75-ohm E1 cable with the unshielded layer. Table 15-17 lists the specifications of the 75ohm E1 cable with the external braid shield layer. Table 15-18 lists the specifications of the 75ohm E1 cable without the external braid shield layer.
Table 15-17 Specifications of the 75-ohm E1 cable with the external braid shield layer
Issue 02 (2009-07-30)
Item
Description
Connector X
Cable type
Fireproof class
15-29
15 Cables
Item
Description
Number of cores
16 cores, 8xE1
Diameter of the
13.10 mm 1.2 mm 0.254 mm
shielding layer
diameter of the
internal insulation
layer diameter of the
internal conductor
Length
3 m, 10 m, 15 m, 20 m, 25 m, 30 m, 35 m, 40 m, 45 m, and 50 m
Table 15-18 Specifications of the 75-ohm E1 cable without the external braid shield layer
Item
Description
Connector X
Cable type
Fireproof class
Number of cores
16 cores, 8xE1
Diameter of the
12.40 mm 1.2 mm 0.254 mm
shielding layer
diameter of the
internal insulation
layer diameter of the
internal conductor
Length
5 m, 10 m, 15 m, 20 m, 25 m, 30 m, 35 m, 40 m, 45 m, and 50 m
CAUTION
The pin assignment table is delivered with the 75-ohm 8xE1 cable in a packing bag. You must
keep the table carefully.
Issue 02 (2009-07-30)
15 Cables
Structure
Figure 15-23 shows the structure of the 120-ohm 8xE1 cable.
Figure 15-23 Structure of the 120-ohm 8xE1 cable
4. Main label
Pin Assignments
Table 15-19 provides the pin assignments of the 120-ohm 8xE1 cable.
Table 15-19 Pin assignments of the 120-ohm 8xE1 cable
Connecto
r
Issue 02 (2009-07-30)
Cable W1
Remar
ks
Connecto
r
Cable W2
Core
No.
38
Blue
RX1
23
White
Twisted
pair
37
Orang
e
Twisted
pair
RX2
22
White
36
Green
RX3
21
White
Twisted
pair
35
Brown
Twisted
pair
RX4
20
White
34
Grey
RX5
19
White
Twisted
pair
Core
No.
15
Blue
TX1
30
White
Twisted
pair
14
Orang
e
Twisted
pair
TX2
29
White
13
Green
28
White
12
Brow
n
27
White
11
Grey
26
White
Twisted
pair
TX3
Twisted
pair
TX4
Twisted
pair
TX5
Remar
ks
15-31
15 Cables
Connecto
r
Cable W1
Remar
ks
Connecto
r
Cable W2
Core
No.
33
Blue
RX6
18
Red
Twisted
pair
32
Orang
e
Twisted
pair
RX7
17
Red
31
Green
RX8
16
Red
Twisted
pair
Shell
Core
No.
10
Blue
TX6
25
Red
Twisted
pair
Orang
e
Twisted
pair
TX7
24
Red
Green
Red
Shell
Twisted
pair
TX8
Remar
ks
Technical Specifications
Item
Description
Connector X
Cable type
Number of cores
16
Diameter of the
internal conductor
0.5 mm
Fireproof class
CM
Length
10 m, 15 m, 20 m, 30 m, and 40 m
Structure
Figure 15-24 shows the structure of the 120-ohm 21xE1 cable.
15-32
Issue 02 (2009-07-30)
15 Cables
1
A
Pos.73
View A
Pos.96
Pos.4
Pos.72
Pos.25
Pos.48
Pos.1
Pos.24
1. Cable connector
2. Terminal
3. Main label
Pin Assignments
Table 15-20 provides the pin assignments of the 120-ohm 21xE1 cable.
Table 15-20 Pin assignments of the 120-ohm 21xE1 cable
Pin Assignment (1)
ST
A
RT
PT
Col
or
of
the
Cor
e
Relati
on
Re
ma
rk
s
X1
.1
Wh
ite
Twiste
d pair
R0
X1
.2
Blu
e
X1
.25
Wh
ite
X1
.26
Ora
nge
X1
.3
Wh
ite
X1
.4
Gre
en
Twiste
d pair
Twiste
d pair
Issue 02 (2009-07-30)
Colo
r of
the
Tape
T0
Blue
R1
ST
AR
TP
T
Col
or
of
the
Cor
e
Relati
on
R
e
m
ar
ks
X1.
15
Wh
ite
Twiste
d pair
R
7
X1.
16
Blu
e
X1.
39
Wh
ite
X1.
40
Ora
nge
X1.
17
Wh
ite
X1.
18
Gre
en
Twiste
d pair
Twiste
d pair
Color
of the
Tape
T7
Orang
e
R
8
ST
A
RT
PT
Col
or
of
the
Cor
e
Relati
on
Re
m
ar
ks
X1
.53
Wh
ite
Twiste
d pair
R1
4
X1
.54
Blu
e
X1
.77
Wh
ite
Twiste
d pair
T1
4
X1
.78
Ora
nge
X1
.55
Wh
ite
Twiste
d pair
R1
5
X1
.56
Gre
en
Color
of the
Tape
Green
15-33
15 Cables
ST
A
RT
PT
Col
or
of
the
Cor
e
Relati
on
Re
ma
rk
s
X1
.27
Wh
ite
Twiste
d pair
T1
X1
.28
Bro
wn
X1
.5
Wh
ite
X1
.6
Gra
y
X1
.29
Red
X1
.30
Blu
e
X1
.7
Red
X1
.8
Ora
nge
X1
.31
Red
X1
.32
Gre
en
X1
.9
Red
X1
.10
Bro
wn
X1
.33
Red
X1
.34
Gra
y
X1
.11
Bla
ck
X1
.12
Blu
e
15-34
Twiste
d pair
Twiste
d pair
Twiste
d pair
Twiste
d pair
Twiste
d pair
Twiste
d pair
Twiste
d pair
R2
T2
R3
T3
R4
T4
R5
Colo
r of
the
Tape
ST
AR
TP
T
Col
or
of
the
Cor
e
Relati
on
R
e
m
ar
ks
X1.
41
Wh
ite
Twiste
d pair
T8
X1.
42
Bro
wn
X1.
19
Wh
ite
X1.
20
Gra
y
X1.
43
Red
X1.
44
Blu
e
X1.
21
Red
X1.
22
Ora
nge
X1.
45
Red
X1.
46
Gre
en
X1.
23
Red
X1.
24
Bro
wn
X1.
47
Red
X1.
48
Gra
y
X1.
49
Bla
ck
X1.
50
Blu
e
Twiste
d pair
Twiste
d pair
Twiste
d pair
Twiste
d pair
Twiste
d pair
Twiste
d pair
Twiste
d pair
R
9
T9
R
10
T1
0
R
11
T1
1
R
12
Color
of the
Tape
ST
A
RT
PT
Col
or
of
the
Cor
e
Relati
on
Re
m
ar
ks
X1
.79
Wh
ite
Twiste
d pair
T1
5
X1
.80
Bro
wn
X1
.57
Wh
ite
Twiste
d pair
R1
6
X1
.58
Gra
y
X1
.81
Red
Twiste
d pair
T1
6
X1
.82
Blu
e
X1
.59
Red
Twiste
d pair
R1
7
X1
.60
Ora
nge
X1
.83
Red
Twiste
d pair
T1
7
X1
.84
Gre
en
X1
.61
Red
Twiste
d pair
R1
8
X1
.62
Bro
wn
X1
.85
Red
Twiste
d pair
T1
8
X1
.86
Gra
y
X1
.63
Bla
ck
Twiste
d pair
R1
9
X1
.64
Blu
e
Color
of the
Tape
Issue 02 (2009-07-30)
ST
A
RT
PT
Col
or
of
the
Cor
e
Relati
on
Re
ma
rk
s
X1
.35
Bla
ck
Twiste
d pair
T5
X1
.36
Ora
nge
X1
.13
Bla
ck
X1
.14
Gre
en
X1
.37
Bla
ck
X1
.38
Bro
wn
Twiste
d pair
Twiste
d pair
15 Cables
Colo
r of
the
Tape
R6
T6
ST
AR
TP
T
Col
or
of
the
Cor
e
Relati
on
R
e
m
ar
ks
X1.
73
Bla
ck
Twiste
d pair
T1
2
X1.
74
Ora
nge
X1.
51
Bla
ck
X1.
52
Gre
en
X1.
75
Bla
ck
X1.
76
Bro
wn
Twiste
d pair
Twiste
d pair
R
13
T1
3
Color
of the
Tape
ST
A
RT
PT
Col
or
of
the
Cor
e
Relati
on
Re
m
ar
ks
X1
.87
Bla
ck
Twiste
d pair
T1
9
X1
.88
Ora
nge
X1
.65
Bla
ck
Twiste
d pair
R2
0
X1
.66
Gre
en
X1
.89
Bla
ck
Twiste
d pair
T2
0
X1
.90
Bro
wn
Color
of the
Tape
Technical Specifications
Item
Description
Connector X
Cable type W
Number of
cores
84
Diameter of
the internal
conductor
0.4 mm
Fireproof class
CM
Length
5 m, 10 m, 15 m, 20 m, 25 m, 30 m, 35 m, 40 m, 45 m, and 50 m
15-35
15 Cables
access board. The other end of the E3/T3/STM-1 cable is connected to the DDF. The connector
needs to be prepared on site as required.
Structure
Figure 15-25 shows the structure of the E3/T3/STM-1 cable.
Figure 15-25 Structure of the E3/T3/STM-1 cable
2. Main label
3. Coaxial cable
Pin Assignments
None.
Technical Specifications
Item
Description
Connector
Cable I
Cable II
Cable III
Cable IV
15-36
Issue 02 (2009-07-30)
Item
15 Cables
Description
Length: 30 cm
Fireproof class
CM
For the structure, pin assignments, and technical specifications of the 75-ohm framed E1
cable, see the topic that describes the 75-ohm 8xE1 cable.
For the structure, pin assignments, and technical specifications of the 120-ohm framed E1
cable, see the topic that describes the 120-ohm 8xE1 cable.
Issue 02 (2009-07-30)
Pin
Signal
Direction
Description
TXD+
--->
Transmits data.
TXD
--->
Transmits data.
TXC+
<-->
TXC
<-->
NC
GND
-----
Circuit_GND
MODE0
<---
MODE1
<---
MODE2
<---
15-37
15 Cables
Pin
Signal
Direction
Description
10
MODE_DC
E
<---
11
DCD+
<-->
12
DCD
<-->
13
RTS+
--->
14
RTS
--->
15
TXCE+
--->
16
TXCE
--->
17
RXC+
<---
18
RXC
<---
19
RXD+
<---
Receives data.
20
RXD
<---
Receives data.
21
GND
-----
Shield_GND
22
LL
<-->
23
CTS+
<---
24
CTS
<---
25
DSR+
<---
26
DSR
<---
27
DTR+
--->
28
DTR
--->
The Nx64 kbit/s cables are classified into the following categories according to the protocol,
which the Nx64 kbit/s signals comply with:
15-38
Issue 02 (2009-07-30)
15 Cables
B-B
Pos.28
W
Pos.1
A
X1
X2
M
S
W
AA
EE
KK
K
P
U
Y
CC
HH
MM
D
J
N
T
X
BB
FF
LL
B
F
L
R
V
Z
DD
JJ
NN
2. Main label
Table 15-22 provides the pin assignments of the V.35 DCE cable.
Table 15-22 Pin assignments of the V.35 DCE cable
Issue 02 (2009-07-30)
Connector X1
Connector X2
Relation
19
Twisted pair
20
15
16
AA
17
18
W
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
Twisted pair
Twisted pair
Twisted pair
Twisted pair
15-39
15 Cables
Connector X1
Connector X2
Relation
11
22
23
13
25
27
21
6+7+8
Description
Connector X1
Connector X2
Cable type
Number of cores
Diameter of the
core
0.32 mm
Length
3m
15-40
Issue 02 (2009-07-30)
15 Cables
B-B
Pos.28
Pos.1
X1
X2
A
B
C
D
E
F
H
J
L N K M
R T P S
V X U W
Z BB Y AA
DD FF CC EE
JJ LL HH KK
NN MM
Table 15-23 provides the pin assignments of the V.35 DTE cable.
Table 15-23 Pin assignments of the V.35 DTE cable
Issue 02 (2009-07-30)
Connector X1
Connector X2
Relation
Twisted pair
19
20
17
18
AA
15
16
11
22
13
23
27
25
21
Twisted pair
Twisted pair
Twisted pair
Twisted pair
15-41
15 Cables
Connector X1
Connector X2
Relation
6 + 10 + 7 + 8
Description
Connector X1
Connector X2
Cable connector V35 plug 34-pin molding shell kit, exclusively used
by the OEM
Cable connector V35 DTE plug 34-pin female cable crimping type
housing core, exclusively used by the OEM
Cable type
Number of
cores
Diameter of
the core
0.32 mm
Length
3m
B-B
Pos.25
Pos.1
Pos.28
Pos.1
X1
X2
2. Main label
Table 15-24 provides the pin assignments of the V.24 DCE cable.
15-42
Issue 02 (2009-07-30)
15 Cables
Connector X2
Relation
19
Twisted pair
23
13
25
20
27
11
22
18
15
17
24
15
17
21
Single
6+7
Twisted pair
Twisted pair
Twisted pair
Twisted pair
Issue 02 (2009-07-30)
Item
Description
Connector X1
Connector X2
Cable type
Number of
cores
Diameter of the
core
0.32 mm
Length
3m
15-43
15 Cables
B-B
1
Pos.1
Pos.1
Pos.28
Pos.25
X1
X2
2. Main label
Table 15-26 provides the pin assignments of the V.24 DTE cable.
Table 15-26 Pin assignments of the V.24 DTE cable
Connector X1
Connector X2
Relation
Twisted pair
19
13
23
27
20
25
11
22
18
15
15
24
17
17
21
Single
6 + 10 + 7
Twisted pair
Twisted pair
Twisted pair
Twisted pair
Issue 02 (2009-07-30)
15 Cables
Description
Connector X1
Connector X2
Cable type
Number of
cores
Diameter of the
core
0.32 mm
Length
3m
B-B
2
Pos.15
Pos.1
Pos.28
Pos.1
X1
X2
2. Main label
Table 15-28 provides the pin assignments of the X.21 DCE cable.
Table 15-28 Pin assignments of the X.21 DCE cable
Issue 02 (2009-07-30)
Connector X1
Connector X2
Relation
13
Twisted pair
14
12
23
24
10
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
Twisted pair
15-45
15 Cables
Connector X1
Connector X2
Relation
19
Twisted pair
20
11
15
16
13
21
6+9
Twisted pair
Twisted pair
Description
Connector X1
Connector X2
Cable type
Number of
cores
Diameter of
the core
0.32 mm
Length
3m
15-46
Issue 02 (2009-07-30)
15 Cables
B-B
2
Pos.1
Pos.1
Pos.28
Pos.15
X2
X1
2. Main label
Table 15-30 provides the pin assignments of the X.21 DTE cable.
Table 15-30 Pin assignments of the X.21 DTE cable
Connector X1
Connector X2
Relation
13
Twisted pair
14
10
23
24
12
19
20
11
15
16
13
17
18
13
21
6 + 10 + 9
Twisted pair
Twisted pair
Twisted pair
Twisted pair
Twisted pair
Issue 02 (2009-07-30)
15-47
15 Cables
Description
Connector X1
Connector X2
Cable type
Number of
cores
Diameter of the
core
0.32 mm
Length
3m
B-B
2
Pos.1
Pos.1
Pos.28
Pos.15
X2
X1
2. Main label
Table 15-32 provides the pin assignments of the RS-449 DCE cable.
Table 15-32 Pin assignments of the RS-449 DCE cable
15-48
Connector X1
Connector X2
Relation
27
11
Twisted pair
28
29
25
12
26
30
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
Twisted pair
Issue 02 (2009-07-30)
15 Cables
Connector X1
Connector X2
Relation
13
Twisted pair
14
27
23
24
25
11
13
12
31
19
20
22
24
15
16
26
17
17
18
35
23
22
10
21
6+8
19
Twisted pair
Twisted pair
Twisted pair
Twisted pair
Twisted pair
Twisted pair
Twisted pair
Issue 02 (2009-07-30)
Item
Description
Connector X1
Connector X2
Cable type
15-49
15 Cables
Item
Description
Number of cores
26
Diameter of the
core
0.32 mm
Length
3m
B-B
1
3
Pos.37
Pos.28
Pos.1
X1
X2
2. Main label
Pos.1
Table 15-34 provides the pin assignments of the RS-449 DTE cable.
Table 15-34 Pin assignments of the RS-449 DTE cable
15-50
Connector X1
Connector X2
Relation
27
12
Twisted pair
28
30
25
11
26
29
13
14
25
23
24
27
11
13
12
31
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
Twisted pair
Twisted pair
Twisted pair
Twisted pair
Issue 02 (2009-07-30)
15 Cables
Connector X1
Connector X2
Relation
19
Twisted pair
20
24
22
15
17
16
35
17
18
26
23
22
10
21
6 + 8 + 10
19
Twisted pair
Twisted pair
Twisted pair
Twisted pair
Issue 02 (2009-07-30)
Item
Description
Connector X1
Connector X2
Cable type
Number of
cores
26
Diameter of
the core
0.32 mm
15-51
15 Cables
B-B
3
Pos.1
X1
Pos.1
Pos.28
X2
2. Main label
Table 15-36 provides the pin assignments of the RS-530 DCE cable.
Table 15-36 Pin assignments of the RS-530 DCE cable
15-52
Connector X1
Connector X2
Relation
28
22
Twisted pair
27
26
23
25
20
24
19
23
22
18
Single
21
Single
20
14
Twisted pair
19
18
11
17
24
16
15
17
14
13
13
5
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
Twisted pair
Twisted pair
Twisted pair
Twisted pair
Twisted pair
Issue 02 (2009-07-30)
15 Cables
Connector X1
Connector X2
Relation
12
10
Twisted pair
11
12
15
16
6+7+9
Twisted pair
Twisted pair
Description
Connector X1
Connector X2
Cable type
Number of
cores
26
Diameter of the
core
0.32 mm
Length
3m
Issue 02 (2009-07-30)
15-53
15 Cables
A-A
1
Pos.1
Pos.1
X1
Pos.28
X2
Pos.25
2. Main label
Table 15-38 provides the pin assignments of the RS-530 DTE cable.
Table 15-38 Pin assignments of the RS-530 DTE cable
15-54
Connector X1
Connector X2
Relation
27
20
Twisted pair
28
23
25
26
22
13
14
19
23
24
13
11
12
10
19
20
16
14
15
24
16
11
17
17
18
15
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
Twisted pair
Twisted pair
Twisted pair
Twisted pair
Twisted pair
Twisted pair
Twisted pair
Twisted pair
Twisted pair
Issue 02 (2009-07-30)
15 Cables
Connector X1
Connector X2
Relation
12
22
18
21
6 + 7 + 9 + 10
Description
Connector X1
Connector X2
Cable type
Number of
cores
26
Diameter of the
core
0.32 mm
Length
3m
15-55
15 Cables
Structure
Figure 15-36 shows the structure of the 75-ohm clock cable. Figure 15-37 shows the structure
of the 120-ohm clock cable.
Figure 15-36 Structure of the 75-ohm clock cable
2. Label
X1
2. Main label
3. Communication cable
Pin Assignments
Table 15-40 provides the pin assignments of the 120-ohm clock cable.
15-56
Issue 02 (2009-07-30)
15 Cables
Remarks
X1.1
Blue
R1
X1.2
White
X1.3
Orange
X1.6
White
X1.4
Green
X1.5
White
X1.7
Brown
X1.8
White
R2
T1
T2
Technical Specifications
Item
75-ohm
clock
cable
120ohm
clock
cable
Description
Connector
Cable
Diameter
Length
10 m, 15 m, 20 m, and 30 m
Connector X1
Cable
Diameter of the
internal
conductor
Length
10 m, 20 m, and 30 m
15-57
15 Cables
Structure
Figure 15-38 shows the structure of the one-channel 75-ohm-to-120-ohm clock transit
cable.Figure 15-39 shows the structure of the two-channel 75-ohm-to-120-ohm clock transit
cable.
Figure 15-38 Structure of the one-channel 75-ohm-to-120-ohm clock transit cable
1. Coaxial connector SMB 75 ohms straight/plug female 2. Label 1: "1#" 3. Label 2: "2#" 4. Main label
5. 75-ohm-to-120-ohm transit PCB
Pin Assignments
Table 15-41 provides the pin assignments of the two-channel 75-ohm-to-120-ohm clock transit
cable.
Table 15-41 Pin assignments of the two-channel 75-ohm-to-120-ohm clock transit cable
Connector
75-ohm Cable
Color
120-ohm Cable
X1
Core
Blue
W3
Shielding layer
White
Core
Blue
Shielding layer
White
X2
15-58
W4
Issue 02 (2009-07-30)
15 Cables
Technical Specifications
Item
Description
One
channel
Two
channels
Issue 02 (2009-07-30)
15-59
A Indicators
Indicators
This topic describes the indicators on the OptiX OSN equipment and the indicators on the boards
of the OptiX OSN equipment.
A.1 Indicators on the Cabinet
This topic describes the indicators on the cabinet of the OptiX OSN equipment.
A.2 Alarm Indicators on the Boards
This topic describes the alarm indicators on the boards.
Issue 02 (2009-07-30)
A-1
A Indicators
Description
Meaning
On (green)
On (red)
Off
Meaning
On (green)
Off
A-2
Issue 02 (2009-07-30)
A Indicators
Meaning
On (green)
No power is accessed.
On (red)
Off
Issue 02 (2009-07-30)
Type of Board
Status
Meaning
Service board
On (green)
On (red)
On (yellow)
Off
A-3
A Indicators
Meaning
On (green)
On (red)
Meaning
On (yellow)
Off
Status
Meaning
On (green)
On (red)
On (green)
On (red)
On (green)
On (red)
A-4
Issue 02 (2009-07-30)
A Indicators
Ethernet Indicators
Indicator
Status
Meaning
On
Off
Flashing
Off
Meaning
On (green)
Off
Meaning
On (green)
Off
Issue 02 (2009-07-30)
Status
Meaning
On (green)
On (red)
On (yellow)
Off
A-5
A Indicators
Meaning
On (green)
On (red)
On (yellow)
Status
Meaning
Running indicator
RUN (green)
On (red)
Alarm indicator
ALM
Indicator
Status
Meaning
Rectifier
module
RUN (green)
On
Off
Off
On
Flashing
ALM
(yellow)
A-6
Issue 02 (2009-07-30)
Module
Monitoring
module
A Indicators
Indicator
Status
Meaning
FAULT
(red)
On
RUN
Flashing
(green)
ALM
On (red)
Status
Meaning
On (green)
On (red)
On (green)
On (red)
Active/Standby state
indicator (ACT1) one color
(green)
On (green)
Off
On (green)
Active/Standby state
indicator (ACT2) one color
(green)
Issue 02 (2009-07-30)
A-7
A Indicators
Indicator
A-8
Status
Meaning
Off
On (green)
On (red)
ODU 1 is faulty.
On (green)
On (red)
ODU 2 is faulty.
Issue 02 (2009-07-30)
B Labels
Labels
This topic describes the safety labels, optical module labels, and engineering labels on the OptiX
OSN equipment.
B.1 Safety Labels
Various safety labels are affixed to the equipment. This topic provides the indications and
positions of the safety labels.
B.2 Optical Module Labels
The optical module labels are used to identify different types of optical modules. The optical
module label is affixed to the optical module.
B.3 Engineering Labels
The engineering labels should be prepared according to the local engineering specifications or
Huawei engineering specifications.
Issue 02 (2009-07-30)
B-1
B Labels
LASER
RADIATION
CLASS 1
LASER
PRODUCT
Label Name
Indication
Grounding label
CLASS 1M
LASER
PRODUCT
! ATTENTION
CLEAN PERIODICALLY
APD
Receiver
MAX:-9dBm
B-2
Issue 02 (2009-07-30)
Label
/QUALIFICATION CARD
B Labels
Label Name
Indication
RoHS label
Certificate of
qualification label
No activities to be undertaken
within this rack unless a valid
permit to work is in operation.
HUAWEI
MADE IN CHINA
Issue 02 (2009-07-30)
B-3
B Labels
Figure B-1 Positions of the labels affixed to the OptiX OSN 3500 II subrack
/QUALIFICATION CARD
HUAWEI
MADE IN CHINA
MADE IN CHINA
ATTENTION
CLEAN PERIODICALLY
B-4
Issue 02 (2009-07-30)
B Labels
CLASS 1
LASER
PRODUCT
APD
Receiver
MAX:-9dBm
BA2
LASER
RADIATION
DO NOT VIEW DIRECTLY
WITH OPTICAL
INSTRUMENTS
CLASS 1M LASER
PRODUCT
Different types of optical modules have different part numbers. Table B-2 provides the part
numbers and descriptions of the optical modules used on the OptiX OSN equipment.
Issue 02 (2009-07-30)
B-5
B Labels
Table B-2 Part numbers and descriptions of the optical modules used on the OptiX OSN
equipment
B-6
Part Number
Description
34060288
34060278
34060289
34060279
34060277
34060280
34060284
34060285
34060276
34060281
34060282
34060299
34060286
34060219
34060298
34060274
34060325
Issue 02 (2009-07-30)
B Labels
Part Number
Description
34060049
Optical transceiver, SFP, 850 nm, 1.25 Gbit/s, 0 dBm, 9.5 dBm, 17
dBm, LC, 0.55 km
34060050
34060207
34060051
34060287
34060053
34060209
Issue 02 (2009-07-30)
B-7
Power
Consumption
(W)
Weight
(kg)
Board
Power
Consumption
(W)
Weight
(kg)
SDH boards
Issue 02 (2009-07-30)
N1SL64
22
1.1
N1SF64
33
1.1
N1SF64A
33
1.1
N1SL16,
N2SL16
and
N2SL16A
20
1.1
N1SLQ16
20
0.9
N1SL16A
20
0.6
N2SLQ16
35
1.3
N3SL16A
22
0.6
N1SL4
17
0.6
N3SL16
22
1.1
N1SL4A
17
0.6
N1SLD16
23
0.9
N2SLD4
15
1.0
N2SL4
15
1.0
N1SLQ4
17
1.0
N1SLD4
17
0.6
N1SLQ4A
17
1.0
N1SLD4A
17
0.6
N1SL1
17
0.6
N2SLQ4
16
1.0
N1SL1A
17
0.6
N2SL1
14
1.0
N1SLQ1A
15
1.0
N1SLQ1
15
1.0
C-1
Board
Power
Consumption
(W)
Weight
(kg)
Board
Power
Consumption
(W)
Weight
(kg)
N2SLO1
26
1.1
N2SLQ1
15
1.0
N3SLO1
20
1.2
N1SEP1
17
1.0
N1SLT1
22
1.3
N3SLQ41
12
0.6
N4SL64
23
1.2
N4SF64
23
1.2
N4SLQ16
14
0.9
N3SLH41
47
1.5
N1SLH1B
21
1.1
PDH boards
N1PQM
22
1.0
N1PL3
15
1.0
N2PQ1
13
1.0
N1PL3A
15
1.0
N1PQ1
19
1.0
N2PL3
12
0.9
N1PD3
19
1.1
N2PL3A
12
0.9
N2PD3
12
0.9
N1SPQ4
24
0.9
N2PQ3
13
0.9
N2SPQ4
24
0.9
N2PO1
32
2.0
11
0.4
N1D75S
0.4
N1OU08
and
N2OU08
0.4
N1DM12
0.5
N1EU04
0.4
N1D12B
0.3
N1MU04
0.4
N1D12S
0.4
N1DXA
10
0.8
N1TSB8
0.3
N1DX1
15
1.0
N1TSB4
0.3
N1D34S
0.4
N1C34S
0.3
N1ETF8
0.4
N1ETS8
0.4
N1EFF8
0.4
N1EFF8A
15
0.4
N1ETF8A
11
0.4
Data boards
C-2
N1EFS0A
32
0.7
N1EFS0
35
1.0
N2EGS2
43
1.0
N2EFS0
35
1.0
Issue 02 (2009-07-30)
Board
Power
Consumption
(W)
Weight
(kg)
Board
Power
Consumption
(W)
Weight
(kg)
N3EGS2
25
0.6
N4EFS0
35
1.0
N1EGS4
70
1.1
N5EFS0
22
1.0
N4EGS4
34
0.7
N1EFS4
30
1.0
N1EGT2
29
0.9
N2EFS4
30
1.0
N2EGT2
15
0.9
N3EFS4
18
0.6
N2EMR0
50
1.2
N1EFT8A
26
1.0
N1EMS2
40
0.7
N1EFT8
26
1.0
N1EMS4
65
1.1
N1IDQ1
41
1.0
N2EGR2
40
1.1
N1IDL4
41
1.0
N1IDQ1A
46
1.5
N1IDL4A
60
1.5
N1ADL4
41
0.9
N1ADQ1
41
1.0
N1MST4
26
0.9
N1EGS2A
50
1.0
N1EFP0
25
1.0
32
1.0
Q6CXLLN
and
Q6CXLQ4
1
48
1.5
Q5CXS
28
0.8
Other boards
Issue 02 (2009-07-30)
TN11MR2
0.9
N1BA2
20
1.0
TN11CMR
2
0.8
N1BPA
20
1.0
TN11CMR
4
0.9
N2BPA
11
1.2
TN11MR4
0.9
Q1AUX
10
1.1
N1FIB
0.4
N1FAN
16 x 3
1.5 x 3
N1MR2A
1.0
TN11OBU
1
16
1.3
N1MR2C
1.0
R1EOW
10
0.4
N1LWX
30
1.1
N1SEI
0.9
C-3
C-4
Board
Power
Consumption
(W)
Weight
(kg)
Board
Power
Consumption
(W)
Weight
(kg)
Q2PIU
0.3
N1IFSD1
24
1.1
N1RPWR
60
1.4
N1RPC01
70
4.0
N1RPC02
110
4.2
Issue 02 (2009-07-30)
Issue 02 (2009-07-30)
Product
OptiX
OSN
7500
OptiX
OSN
3500
OptiX
OSN
3500 II
OptiX
OSN
2500
OptiX
OSN
2500
REG
OptiX
OSN
1500A
OptiX
OSN
1500B
N1SL64
N2SL64
T2SL64
T2SL64A
N1SF64
N1SF64A
N1SLD64
N1SL16
N2SL16
N3SL16
N1SL16A
N2SL16A
N3SL16A
D-1
D-2
Product
OptiX
OSN
7500
OptiX
OSN
3500
OptiX
OSN
3500 II
OptiX
OSN
2500
OptiX
OSN
2500
REG
OptiX
OSN
1500A
OptiX
OSN
1500B
N1SLD16
N1SLQ16
N2SLQ16
N1SLO16
N1SF16
N3SLQ41
N1SL4
N2SL4
N1SL4A
R1SL4
R3SL4
N1SLQ4
N2SLQ4
N1SLQ4A
N1SLD4
N2SLD4
N1SLD4A
R1SLD4
R3SLD4
N1SLT1
N1SLQ1
N2SLQ1
N1SLQ1A
R1SLQ1
R3SLQ1
N1SL1
N2SL1
N1SL1A
Issue 02 (2009-07-30)
Issue 02 (2009-07-30)
Product
OptiX
OSN
7500
OptiX
OSN
3500
OptiX
OSN
3500 II
OptiX
OSN
2500
OptiX
OSN
2500
REG
OptiX
OSN
1500A
OptiX
OSN
1500B
R1SL1
R3SL1
N1SLH1
N1SLH1B
N1SEP1
N2SLO1
N3SLO1
R1PL1
R1PD1
R2PD1
R3PD1
N1PQ1
N2PQ1
N2PO1
N1PQM
N1PL3
N2PL3
N1PL3A
N2PL3A
N1PD3
N2PD3
N2PQ3
N1DX1
N1DXA
N1SPQ4
N2SPQ4
R1EFT4
N1EFT8
D-3
D-4
Product
OptiX
OSN
7500
OptiX
OSN
3500
OptiX
OSN
3500 II
OptiX
OSN
2500
OptiX
OSN
2500
REG
OptiX
OSN
1500A
OptiX
OSN
1500B
N1EFT8A
N1EGT2
N1EFS0
N2EFS0
N4EFS0
N5EFS0
N1EFS0A
N1EFS4
N2EFS4
N3EFS4
N2EGS2
N3EGS2
N1EMS4
N1EMS2
N1EGS4
N3EGS4
N2EGR2
N2EMR0
N1EAS2
N1ADL4
N1ADQ1
N1IDL4
N1IDL4A
N1IDQ1
N1IDQ1A
N1MST4
N1EU08
N1OU08
Issue 02 (2009-07-30)
Issue 02 (2009-07-30)
Product
OptiX
OSN
7500
OptiX
OSN
3500
OptiX
OSN
3500 II
OptiX
OSN
2500
OptiX
OSN
2500
REG
OptiX
OSN
1500A
OptiX
OSN
1500B
N2OU08
N1D75S
N1MU04
N1D34S
N1C34S
N1EU04
N1D12S
N1D12B
R1L12S
R1L75S
N1EFF8
N1ETF8
N1ETS8
N1DM12
N1TSB4
N1TSB8
Q2CXL1
Q3CXL1
Q2CXL4
Q3CXL4
Q2CXL16
Q3CXL16
R1CXLLN
R2CXLLN
Q5CXLLN
Q6CXLLN
R1CXLD41
R1CXLQ41
D-5
D-6
Product
OptiX
OSN
7500
OptiX
OSN
3500
OptiX
OSN
3500 II
OptiX
OSN
2500
OptiX
OSN
2500
REG
OptiX
OSN
1500A
OptiX
OSN
1500B
R2CXLQ41
Q5CXLQ41
Q6CXLQ41
Q5CXS
T1GXCSA
N1GXCSA
T1EXCSA
N1EXCSA
T2UXCSA
N1UXCSA
N1UXCSB
T1SXCSA
T2SXCSA
N1SXCSA
N1SXCSB
T1IXCSA
N1IXCSA
N1IXCSB
N1XCE
N1GSCC
N2GSCC
N3GSCC
N4GSCC
CRG
T1EOW
R1EOW
T1AUX
N1AUX
Issue 02 (2009-07-30)
Issue 02 (2009-07-30)
Product
OptiX
OSN
7500
OptiX
OSN
3500
OptiX
OSN
3500 II
OptiX
OSN
2500
OptiX
OSN
2500
REG
OptiX
OSN
1500A
OptiX
OSN
1500B
R1AUX
R2AUX
Q1AUX
R1AMU
Q1SAP
Q2SAP
Q1SEI
N1SEI
N1FAN
R1FAN
N1FANA
N1FANB
TN11CMR2
TN11CMR4
TN11MR2
TN11MR4
N1MR2A
N1MR2B
N1MR2C
N1LWX
N1IFSD1
N1RPWR
TN11OBU1
N1FIB
N1BA2
N1BPA
N2BPA
61COA
D-7
Product
OptiX
OSN
7500
OptiX
OSN
3500
OptiX
OSN
3500 II
OptiX
OSN
2500
OptiX
OSN
2500
REG
OptiX
OSN
1500A
OptiX
OSN
1500B
62COA
N1COA
N1RPC01
N1RPC02
N1DCU
N2DCU
UPM
(GIE4805S)
UPM
(EPS75-4815A
F)
T1PIU
N1PIU
N1PIUA
Q1PIU
Q1PIUA
Q2PIU
R1PIU
R1PIUA
R1PIUB
R1PIUC
NOTE
"Y" indicates that the OptiX OSN equipment supports the board and "N" indicates that the OptiX OSN
equipment does not support the board.
This table provides information on whether a specific type of board is supported by a specific type of OptiX
OSN equipment. For example, the N3GSCC is supported by the OptiX OSN 7500 and OptiX OSN 3500
but not supported by the other equipment such as the OptiX OSN 3500 II.
D-8
Issue 02 (2009-07-30)
The SDH boards, PDH boards, and data boards of the OptiX OSN equipment support various
types of loopbacks.
Table E-1 provides the loopback capability of the SDH boards of the OptiX OSN equipment.
Table E-1 Loopback capability of the SDH boards
Issue 02 (2009-07-30)
Board
Inloop at an
Interface
Outloop at
an
Interface
Inloop on a
VC-4 Path
Outloop on
a VC-4 Path
Outloop on
a VC-3 or
VC-12 Path
Q2SL1
Supported
Supported
Supported
Not
supported
Not
supported
Q2SL4
Supported
Supported
Supported
Not
supported
Not
supported
Q2SL16
Supported
Supported
Supported
Not
supported
Not
supported
N1SL64
Supported
Supported
Supported
Supported
Not
supported
N2SL64
Supported
Supported
Not
supported
Not
supported
Not
supported
T2SL64
Supported
Supported
Not
supported
Not
supported
Not
supported
T2SL64A
Supported
Supported
Not
supported
Not
supported
Not
supported
N1SF64
Supported
Supported
Supported
Supported
Not
supported
N1SF64A
Supported
Supported
Supported
Supported
Not
supported
N1SLD64
Supported
Supported
Supported
Supported
Not
supported
E-1
E-2
Board
Inloop at an
Interface
Outloop at
an
Interface
Inloop on a
VC-4 Path
Outloop on
a VC-4 Path
Outloop on
a VC-3 or
VC-12 Path
N1SL16
Supported
Supported
Supported
Not
supported
Not
supported
N2SL16
Supported
Supported
Not
supported
Not
supported
Not
supported
N3SL16
Supported
Supported
Supported
Supported
Not
supported
N1SL16A
Supported
Supported
Supported
Not
supported
Not
supported
N2SL16A
Supported
Supported
Not
supported
Not
supported
Not
supported
N3SL16A
Supported
Supported
Supported
Supported
Not
supported
N1SLD16
Supported
Supported
Supported
Supported
Not
supported
N1SLQ16
Supported
Supported
Supported
Supported
Not
supported
N2SLQ16
Supported
Supported
Not
supported
Not
supported
Not
supported
N1SLO16
Supported
Supported
Supported
Supported
Not
supported
N1SF16
Supported
Supported
Supported
Not
supported
Not
supported
N3SLQ41
Supported
Supported
Supported
Supported
Not
supported
N1SL4
Supported
Supported
Supported
Not
supported
Not
supported
N1SL4A
Supported
Supported
Supported
Supported
Not
supported
N2SL4
Supported
Supported
Not
supported
Not
supported
Not
supported
R1SL4
Supported
Supported
Supported
Not
supported
Not
supported
R3SL4
Supported
Supported
Supported
Supported
Not
supported
N1SLQ4
Supported
Supported
Supported
Not
supported
Not
supported
Issue 02 (2009-07-30)
Issue 02 (2009-07-30)
Board
Inloop at an
Interface
Outloop at
an
Interface
Inloop on a
VC-4 Path
Outloop on
a VC-4 Path
Outloop on
a VC-3 or
VC-12 Path
N1SLQ4A
Supported
Supported
Supported
Supported
Not
supported
N2SLQ4
Supported
Supported
Not
supported
Not
supported
Not
supported
N1SLD4
Supported
Supported
Supported
Not
supported
Not
supported
N1SL4DA
Supported
Supported
Supported
Supported
Not
supported
N2SLD4
Supported
Supported
Not
supported
Not
supported
Not
supported
R1SLD4
Supported
Supported
Supported
Not
supported
Not
supported
R3SLD4
Supported
Supported
Supported
Supported
Not
supported
N1SLT1
Supported
Supported
Supported
Supported
Not
supported
N1SLQ1
Supported
Supported
Supported
Not
supported
Not
supported
N1SLQ1A
Supported
Supported
Supported
Supported
Not
supported
N2SLQ1
Supported
Supported
Not
supported
Not
supported
Not
supported
R1SLQ1
Supported
Supported
Supported
Not
supported
Not
supported
R3SLQ1
Supported
Supported
Supported
Supported
Not
supported
N1SL1
Supported
Supported
Supported
Not
supported
Not
supported
N1SL1A
Supported
Supported
Supported
Supported
Not
supported
N2SL1
Supported
Supported
Not
supported
Not
supported
Not
supported
R1SL1
Supported
Supported
Supported
Not
supported
Not
supported
R3SL1
Supported
Supported
Supported
Supported
Not
supported
E-3
Board
Inloop at an
Interface
Outloop at
an
Interface
Inloop on a
VC-4 Path
Outloop on
a VC-4 Path
Outloop on
a VC-3 or
VC-12 Path
N1SLH1
Supported
Supported
Supported
Supported
Not
supported
N1SLH1B
Supported
Supported
Supported
Supported
Not
supported
N1SEP1
Supported
Supported
Supported
Not
supported
Not
supported
N2SLO1
Supported
Supported
Not
supported
Not
supported
Not
supported
N3SLO1
Supported
Supported
Supported
Supported
Not
supported
Table E-2 provides information on whether each SDH board of the OptiX OSN equipment
supports the insertion of the AU_AIS when the board is looped back.
Table E-2 Information on whether each SDH board of the OptiX OSN equipment supports the
insertion of the AU_AIS when the board is looped back
E-4
Board
Insertion of
the AU_AIS
to the Port
Side (Inloop
at an
Interface)
Insertion of
the AU_AIS to
the CrossConnect Side
(Outloop at an
Interface)
Insertion of
the AU_AIS
to the CrossConnect Side
(Inloop on a
VC-4 Path)
Insertion of
the AU_AIS
to the Port
Side
(Outloop on
a VC-4 Path)
Q2SL1
Not supported
Supported
Not supported
Not supported
Q2SL4
Not supported
Supported
Not supported
Not supported
Q2SL16
Not supported
Supported
Not supported
Not supported
N1SL64
Supported
Supported
Supported
Supported
N2SL64
Not supported
Supported
Not supported
Not supported
T2SL64
Not supported
Supported
Not supported
Not supported
T2SL64A
Not supported
Supported
Not supported
Not supported
N1SF64
Supported
Supported
Supported
Supported
N1SF64A
Supported
Supported
Supported
Supported
N1SLD64
Supported
Supported
Supported
Supported
N1SL16
Not supported
Supported
Not supported
Not supported
N2SL16
Not supported
Supported
Not supported
Not supported
Issue 02 (2009-07-30)
Issue 02 (2009-07-30)
Board
Insertion of
the AU_AIS
to the Port
Side (Inloop
at an
Interface)
Insertion of
the AU_AIS to
the CrossConnect Side
(Outloop at an
Interface)
Insertion of
the AU_AIS
to the CrossConnect Side
(Inloop on a
VC-4 Path)
Insertion of
the AU_AIS
to the Port
Side
(Outloop on
a VC-4 Path)
N3SL16
Supported
Supported
Supported
Supported
N1SL16A
Not supported
Supported
Not supported
Not supported
N2SL16A
Not supported
Supported
Not supported
Not supported
N3SL16A
Supported
Supported
Supported
Supported
N1SLD16
Supported
Supported
Supported
Supported
N1SLQ16
Supported
Supported
Supported
Supported
N2SLQ16
Not supported
Supported
Not supported
Not supported
N1SLO16
Supported
Supported
Supported
Supported
N1SF16
Not supported
Supported
Not supported
Not supported
N1SL4
Not supported
Supported
Not supported
Not supported
N1SL4A
Supported
Supported
Supported
Supported
N2SL4
Not supported
Supported
Not supported
Not supported
R1SL4
Not supported
Supported
Not supported
Not supported
R3SL4
Supported
Supported
Supported
Supported
N1SLQ4
Not supported
Supported
Not supported
Not supported
N1SLQ4A
Supported
Supported
Supported
Supported
N2SLQ4
Not supported
Supported
Not supported
Not supported
N1SLD4
Not supported
Supported
Not supported
Not supported
N1SLD4A
Supported
Supported
Supported
Supported
N2SLD4
Not supported
Supported
Not supported
Not supported
R3SLD4
Supported
Supported
Supported
Supported
R1SLD4
Not supported
Supported
Not supported
Not supported
N1SLT1
Supported
Supported
Supported
Supported
N1SLQ1
Not supported
Supported
Not supported
Not supported
N1SLQ1A
Supported
Supported
Supported
Supported
N2SLQ1
Not supported
Supported
Not supported
Not supported
R1SLQ1
Not supported
Supported
Not supported
Not supported
E-5
Board
Insertion of
the AU_AIS
to the Port
Side (Inloop
at an
Interface)
Insertion of
the AU_AIS to
the CrossConnect Side
(Outloop at an
Interface)
Insertion of
the AU_AIS
to the CrossConnect Side
(Inloop on a
VC-4 Path)
Insertion of
the AU_AIS
to the Port
Side
(Outloop on
a VC-4 Path)
R3SLQ1
Supported
Supported
Supported
Supported
N1SL1
Not supported
Supported
Not supported
Not supported
N1SL1A
Supported
Supported
Supported
Supported
N2SL1
Not supported
Supported
Not supported
Not supported
R1SL1
Not supported
Supported
Not supported
Not supported
R3SL1
Supported
Supported
Supported
Supported
N1SLH1
Supported
Supported
Supported
Supported
N1SLH1B
Supported
Supported
Supported
Supported
N1SEP1
Not supported
Supported
Not supported
Not supported
N2SLO1
Not supported
Supported
Not supported
Not supported
N3SLO1
Supported
Supported
Supported
Supported
Table E-3 provides the loopback capability of the PDH boards of the OptiX OSN equipment.
Table E-3 Loopback capability of the PDH boards
E-6
Board
Inloop at an
Interface
Outloop at an
Interface
R1PL1
Supported
Supported
R1PD1
Supported
Supported
R3PD1
Supported
Supported
N1PQ1
Supported
Supported
N2PO1
Supported
Supported
N1PQM
Supported
Supported
N1PD3
Supported
Supported
N1PL3
Supported
Supported
N2PQ3
Supported
Supported
N2SPQ4
Supported
Supported
Issue 02 (2009-07-30)
Table E-4 provides the loopback capability of the data boards of the OptiX OSN equipment.
Table E-4 Loopback capability of the data boards of the OptiX OSN equipment
Issue 02 (2009-07-30)
Board
Outloop
at the
MAC
Layer
Inloop at
the MAC
Layer
Outloop
at the
PHY
Layer
Inloop at
the PHY
Layer
Inloop
and
Outloop
on a
VC-4
Path
Inloop
and
Outloop
on a VC-3
Path
N1EFS4
Not
supported
Supported
Not
supported
Supported
Not
supported
Supported
N2EFS4
Not
supported
Supported
Not
supported
Supported
Not
supported
Supported
N3EFS4
Not
supported
Supported
Not
supported
Supported
Not
supported
Not
supported
N1EFS0
Not
supported
Supported
Not
supported
Supported
Not
supported
Supported
N2EFS0
Not
supported
Supported
Not
supported
Supported
Not
supported
Supported
N4EFS0
Not
supported
Supported
Not
supported
Supported
Not
supported
Supported
N5EFS0
Not
supported
Supported
Not
supported
Supported
Not
supported
Not
supported
N1EFS0A
Not
supported
Supported
Not
supported
Supported
Not
supported
Not
supported
N1EGT2
Not
supported
Supported
Not
supported
Supported
Not
supported
Not
supported
N2EGT2
Not
supported
Supported
Not
supported
Supported
Not
supported
Not
supported
N1EFT8
Not
supported
Supported
Not
supported
Supported
Not
supported
Supported
N1EFT8A
Not
supported
Supported
Not
supported
Supported
Not
supported
Supported
R1EFT4
Not
supported
Supported
Not
supported
Supported
Not
supported
Supported
N1EMS4
Not
supported
Not
supported
Not
supported
Supported
Not
supported
Not
supported
N1EMS2
Not
supported
Supported
Not
supported
Supported
Not
supported
Not
supported
E-7
Board
Outloop
at the
MAC
Layer
Inloop at
the MAC
Layer
Outloop
at the
PHY
Layer
Inloop at
the PHY
Layer
Inloop
and
Outloop
on a
VC-4
Path
Inloop
and
Outloop
on a VC-3
Path
N1EGS4
Not
supported
Not
supported
Not
supported
Supported
Not
supported
Not
supported
N3EGS4
Not
supported
Not
supported
Not
supported
Supported
Not
supported
Not
supported
N2EGS4
Not
supported
Not
supported
Not
supported
Supported
Not
supported
Not
supported
N2EGS2
Not
supported
Not
supported
Not
supported
Supported
Not
supported
Supported
N3EGS2
Not
supported
Supported
Not
supported
Supported
Not
supported
Not
supported
N2EGR2
Not
supported
Supported
Not
supported
Supported
Not
supported
Not
supported
N1EAS2
Not
supported
Supported
Not
supported
Supported
Not
supported
Not
supported
N2EMR0
Not
supported
Supported
Not
supported
Supported
Not
supported
Not
supported
N1EMS2
Not
supported
Not
supported
Not
supported
Supported
Not
supported
Not
supported
N1MST4
Not
supported
Not
supported
Not
supported
Supported
Not
supported
Not
supported
Table E-5 provides the loopback capability of the ATM/IMA boards of the OptiX OSN
equipment.
Table E-5 Loopback capability of the ATM/IMA boards of the OptiX OSN equipment
E-8
Board
Outloop at an
External
Interface
Inloop at an
External
Interface
Outloop at an
Internal
Interface
Inloop at an
Internal
Interface
N1ADL4
Not supported
Supported
Supported
Supported
N1ADQ1
Not supported
Supported
Supported
Supported
N1IDL4
Not supported
Supported
Supported
Supported
N1IDL4A
Not supported
Supported
Supported
Supported
N1IDQ1
Not supported
Supported
Supported
Supported
Issue 02 (2009-07-30)
Issue 02 (2009-07-30)
Board
Outloop at an
External
Interface
Inloop at an
External
Interface
Outloop at an
Internal
Interface
Inloop at an
Internal
Interface
N1IDQ1A
Not supported
Supported
Supported
Supported
E-9
F Parameter Settings
Parameter Settings
You can set the parameters for the SDH boards, PDH boards, data boards, WDM boards, optical
amplifier boards, and cross-connect and timing unit by using the T2000.
F.1 SDH Processing Boards
The parameters that need to be set for the SDH processing boards include the J0 byte, J1 byte,
J2 byte, and C2 byte.
F.2 PDH Boards
The parameters that need to be set for the PDH boards include the J1 byte, C2 byte, J2 byte, V5
byte, and tributary loopback.
F.3 Data Boards
The parameters that need to be set for the data boards include the SDH parameters, Ethernet
parameters, and ATM parameters.
F.4 WDM Boards
The parameters that need to be set for the WDM boards include the path use status, optical
interface loopback, service type, client service bearer rate (M), laser status, automatic laser
shutdown, current bearer rate (M), actual wavelength no./wavelength (nm)/frequency (THz),
actual band type, configure wavelength no./wavelength (nm)/frequency (THz), configure band
type, and SD trigger condition.
F.5 Optical Amplifier Boards
The parameters that need to be set for the optical amplifier boards include the laser status, board
work type, configure band, configure working band parity, actual band, actual working band
parity, threshold of input power loss, gain, rated optical power, nominal gain upper threshold,
and nominal gain lower threshold.
F.6 Cross-Connect and Timing Units
The parameters that need to be set for the cross-connect and timing units include the clock source
parameters and clock subnet parameters.
Issue 02 (2009-07-30)
F-1
F Parameter Settings
J0 Byte
The J0 byte is used to transmit repetitively a section access point identifier so that a section
receiver can verify its continued connection to the intended transmitter. It is recommended that
you set the J0 byte to the single-byte "".
J1 Byte
J1 is the higher order path trace byte. This byte is used to transmit repetitively a path access
point identifier so that a path receiving terminal can verify its continued connection to the
intended transmitter. When a J1 mismatch is detected at the receive end, the corresponding VC-4
path generates an HP_TIM alarm.
In the case of the SLO1, it is recommended that you set the J1 byte to " HuaWei SBS ". In
the case of the other boards, it is recommended that the J1 byte uses the default value, namely,
single-byte "".
NOTE
The J1 byte was set to " HuaWei SBS " by default. In the character string " HuaWei SBS
one blank space before "HuaWei" and five blank spaces after "SBS".
", there is
J2 Byte
J2 is the lower order path trace byte. This byte is used to transmit repetitively a low order path
access point identifier so that a path receiving terminal can verify its continued connection to
the intended transmitter.
To set and query the J2 byte to be received, enable the lower order monitoring function.
NOTE
In the case of the SDH processing boards, the J2 byte to be sent cannot be set.
C2 Byte
C2 is the signal label byte, which is used to indicate the multiplexing structure of the VC frames
and the payload property. The C2 byte to be sent must match the C2 byte to be received. When
a C2 mismatch is detected, the corresponding VC-4 path at the local end generates an HP_SLM
alarm.
Table F-1 shows the relation between the service type and the value of the C2 byte.
Table F-1 Relation between the service type and the value of the C2 byte
F-2
Service Type
TUG structure
02
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
Issue 02 (2009-07-30)
F Parameter Settings
Service Type
04
12
Unequipped
00
J1 Byte
J1 is the path trace byte. This byte is used to transmit repetitively a path access point identifier
so that a path receiving terminal can verify its continued connection to the intended transmitter.
When a J1 mismatch is detected at the receive end, the corresponding VC-4 path generates an
HP_TIM alarm.
The J1 byte is set to the single-byte "" by default.
NOTE
" by default.
C2 Byte
C2 is the signal label byte, which is used to indicate the multiplexing structure of the VC frames
and the payload property. The C2 byte to be sent must match the C2 byte to be received. When
a C2 mismatch is detected, the corresponding VC-4 path at the local end generates an HP_SLM
alarm.
Table F-2 shows the relation between the service type and the value of the C2 byte.
Table F-2 Relation between the service type and the value of the C2 byte
Service Type
TUG structure
02
04
12
Unequipped
00
J2 Byte
J2 is the VC-12 path trace byte. This byte is used to transmit repetitively a low order path access
point identifier so that a path receiving terminal can verify its continued connection to the
intended transmitter.
Issue 02 (2009-07-30)
F-3
F Parameter Settings
V5 Byte
V5 is the path status and signal label byte. This byte is used to detect bit errors and indicate
remote errors or remote failures on lower order paths. The LP_REI and LP_RFI alarms are
generated accordingly. Table F-3 shows the relation between the service type and the value of
the V5 byte.
Table F-3 Relation between the service type and the value of the V5 byte
Service Type
Asynchronous
02
Byte synchronization
04
HDLC/PPP mapping
0A
Unequipped or supervisoryunequipped
00
Equipping Indication
When a service channel only carries the service and does not process the service, select
Unequipped or Supervisory-Unequipped.
When a service channel carries the service and also processes the service, select EquippedUnspecific Payload.
Tributary Loopback
The tributary loopback function is used to locate faults in the service channels.
The tributary loopback is also a diagnosis function. When the tributary loopback is performed,
related services are interrupted.
Select E1 or T1 for E1/T1 processing boards according to the actual service type in the
channel.
Select E3 or T3 for E3/T3 processing boards according to the actual service type in the
channel.
Issue 02 (2009-07-30)
F Parameter Settings
Set the timing scheme of the DDN channels 1012 and 1416 to the DCE internal scheme,
DCE slave scheme or DTE external scheme.
Set the timing scheme of the DDN channels 9 and 13 to the DCE internal scheme, DCE
slave scheme, DTE external scheme, DTE internal scheme, DTE slave scheme or DCE
external scheme. By default, the timing scheme is the DCE internal scheme for channels 9
and 13 is the DCE internal scheme.
J1 Byte
J1 is the path trace byte. Successive transmission of the J1 byte at the transmit end helps the
receive end learn that its connection with the specified transmit end is in the continuous
connection state.
When a J1 mismatch is detected at the receive end, the VC-3 path generates an LP_TIM_VC3
alarm and the VC-4 path generates an HP_TIM alarm.
When the J1 byte is set to the single-byte "" by default, the alarms are not reported.
NOTE
In the case of the N1EFS4 and MST4, the J1 byte is set to " HuaWei SBS
of the other boards, the J1 byte is set to the single-byte "" by default.
In the case of the EMS4 and EGS4, it is recommended that you set the J1 byte to " HuaWei SBS
".
C2 Byte
C2 is the signal label byte, which is used to indicate the multiplexing structure of the VC frames
and the payload property. The C2 byte to be sent must match the C2 byte to be received.
When a C2 mismatch is detected, the VC-3 path generates an LP_SLM_VC3 alarm and the
VC-4 path generates an HP_SLM alarm.
Issue 02 (2009-07-30)
F-5
F Parameter Settings
J2 Byte
J2 is the VC-12 path trace byte. This byte is used to transmit repetitively a low order path access
point identifier so that a path receiving terminal can verify its continued connection to the
intended transmitter.
When a J2 mismatch is detected, the VC-12 path generates an LP_TIM_VC12 alarm.
When the J2 byte is set to the single-byte "" by default, the alarms are not reported.
V5 Byte
V5 is the path status and signal label byte. This byte is used to detect bit errors and indicate
remote errors or remote failures on lower order paths. The LP_REI and LP_RFI alarms are
generated accordingly.
When a V5 mismatch is detected at the receive end, the VC-12 path generates an LP_SLM_VC12
alarm.
Table F-4 shows the relation between the service type and the value of the V5 byte.
Table F-4 Relation between the service type and the value of the V5 byte
Service Type
Asynchronous
02
Byte synchronization
04
HDLC/PPP mapping
0A
Unequipped or supervisoryunequipped
00
Working Mode
Generally, the Ethernet interfaces of the interconnected equipment are required to work in the
same fixed working mode. If the working modes on two sides do not match, packets may be lost
or the bit rate may decrease. In the case of large volume of traffic, services may be completely
interrupted.
Currently, the Ethernet boards support the following working modes: auto-negotiation, 10M
half-duplex, 10M full-duplex, 100M half-duplex, 100M full-duplex, 10M/100M full-duplex,
1000M full-duplex, and 10G full-duplex
LCAS
This parameter specifies whether to enable the LCAS function.
F-6
Issue 02 (2009-07-30)
F Parameter Settings
Mapping Protocol
This parameter needs to be set to consistent values in the case of the interconnected equipment.
Currently, the Ethernet boards support the following mapping protocols:
l
HDLC, LAPS, or GFP. It is recommended that you adopt the default value "GFP".
GFP-F
LAPS or GFP. It is recommended that you adopt the default value "GFP".
GFP-T
TAG
This parameter is used to identify the type of packets. This parameter can be set to "tag aware",
"access", or "hybrid".
1.
When this parameter is set to "tag aware", the interface transparently transmits the packets
that contain a TAG and discards the packets that do not contain a TAG.
2.
When this parameter is set to "access", the interface adds a TAG to the packets that do not
contain a TAG according to the default VLAN ID of the interface, and discards the packets
that contain a TAG.
3.
When this parameter is set to "hybrid", the interface processes both the packets that contain
a TAG and the packets that do not contain a TAG. The interface adds a TAG to the packets
that do not contain a TAG according to the default VLAN ID of the interface.
VLAN ID
This parameter specifies the VLAN ID of the interface.
Port Type
In the case of the boards that support the MPLS function, the ports are available in two types,
namely, provider (P) and provider edge (PE). The port of type P indicates a core network port
of a service provider. The port of type PE indicates an edge port of a service provider. You need
to set this parameter when you configure EVPL services or EVPLAN services. In the case of an
external port, set this parameter to "PE". In the case of an internal port, set this parameter to "P".
Encapsulation Format
This parameter can be set to "MartinioE" or "stack VLAN". When the port type parameter is set
to "P", this parameter becomes valid. In the case of EVPL services, set this parameter to
"MartinioE". In the case of EVPLAN services, set this parameter to "stack VLAN".
Port Attributes
In the case of the board that supports the QinQ function, you can set this parameter. This
parameter can be set to "UNI", "NNI", "N-UNI", "S-aware", or "C-aware".
Issue 02 (2009-07-30)
F-7
F Parameter Settings
Port Type
The port types include NNI and UNI. The default port type is UNI.
Traffic Type
The traffic type must meet the requirements of the port.
Service Type
Five service types are available, namely, CBR, rt-VBR, nrt-VBR, UBR, and UBR+.
MBS
Set the MBS of the ATM services. In the case of the rt-VBR and nrt-VBR services, set this
parameter.
CDVT
Set the CDVT of the ATM services. In the case of the CBR, rt-VBR, and UBR services, set this
parameter.
F-8
Item
Description
Parameter description
Parameter values
Issue 02 (2009-07-30)
F Parameter Settings
Item
Description
Recommended value
Used
Application scenarios
Relevant boards
LWX
Configuration requirements
Description
Parameter description
Parameter values
Issue 02 (2009-07-30)
Recommended value
Non-Loopback
Application scenarios
F-9
F Parameter Settings
Item
Description
Relevant boards
Configuration requirements
None
Item
Description
Parameter description
Parameter values
Recommended value
None
Application scenarios
None
Relevant boards
LWX
Configuration requirements
Service Type
F-10
Item
Description
Parameter description
Parameter values(M)
16 to 2500
Parameter value
description
The bearer rate of client-side services can be set only when the
client-side services are of Any type. The set value should equal
to the maximum rate of actually accessed services.
Recommended value
None
Application scenarios
Issue 02 (2009-07-30)
F Parameter Settings
Item
Description
Relevant boards
LWX
Configuration
requirements (the set
value of bearer rate
should be the same as the
rate of actually accessed
services)
Actually
accessed
services
Set value
(M)
Actually
accessed
services
STM-1
155.5
GE
1250
STM-4
622
FE
125
STM-16
2488.3
FC100
1062
OC3
155.5
FC200
2124
OC12
622
FICON
1062
OC48
2488.3
FICON
Express
2124
HDTV
270
ESCON
200
DVB-SDI
270
FDDI
125
DVB-ASI
270
Laser Status
Issue 02 (2009-07-30)
Item
Description
Parameter description
Parameter values
Recommended value
Open
Application scenarios
Relevant boards
LWX
Configuration requirements
F-11
F Parameter Settings
Description
Parameter description
Parameter values
Recommended value
Application scenarios
None
Relevant boards
LWX
Configuration requirements
F-12
Item
Description
Parameter description
Parameter values
None
Recommended value
None
Application scenarios
None
Relevant boards
LWX
Configuration requirements
None
Issue 02 (2009-07-30)
F Parameter Settings
Description
Parameter description
Parameter values
None
Recommended value
None
Application scenarios
None
Relevant boards
LWX
Configuration requirements
None
Description
Parameter description
Parameter values
None
Recommended value
None
Application scenarios
None
Relevant boards
LWX
Configuration requirements
None
Issue 02 (2009-07-30)
Item
Description
Parameter description
Parameter values
F-13
F Parameter Settings
Item
Description
Recommended value
None
Application scenarios
In configuration stage
Relevant boards
LWX
Configuration requirements
F-14
Item
Description
Parameter description
Parameter values(dBm)
C and CWDM
None
Recommended value
None
Application scenarios
None
Relevant boards
LWX
Issue 02 (2009-07-30)
F Parameter Settings
Item
Description
Configuration requirements
SD Trigger Condition
Item
Description
Parameter description
Parameter values(dBm)
Recommended value
Application scenarios
Relevant boards
LWX
Configuration requirements
Issue 02 (2009-07-30)
F-15
F Parameter Settings
Laser Status
Item
Description
Parameter description
Parameter values
Recommended value
Close
Application scenarios
Relevant boards
Configuration requirements
Description
Parameter description
Parameter values
C, C+L, and L
None
Recommended value
Application scenarios
None
Relevant boards
Configuration requirements
None
Configure Band
F-16
Item
Description
Parameter description
Parameter values
Issue 02 (2009-07-30)
F Parameter Settings
Item
Description
Recommended value
None
Application scenarios
None
Relevant boards
Configuration requirements
None
Description
Parameter description
Parameter values
Issue 02 (2009-07-30)
Recommended value
Application scenarios
None
Relevant boards
Configuration requirements
F-17
F Parameter Settings
Actual Band
Item
Description
Parameter description
Parameter values
None
Recommended value
None
Application scenarios
None
Relevant boards
OBU1
Configuration requirements
None
Description
Parameter description
Parameter values
None
Recommended value
None
Application scenarios
None
Relevant boards
Configuration requirements
None
F-18
Item
Description
Parameter description
Parameter values
Issue 02 (2009-07-30)
F Parameter Settings
Item
Description
Recommended value
None
Application scenarios
None
Relevant boards
OBU1
Configuration requirements
None
Item
Description
Parameter description
Parameter values
None
Recommended value
None
Application scenarios
None
Relevant boards
OBU1
Configuration requirements
Gain (dB)
Issue 02 (2009-07-30)
Item
Description
Parameter description
Parameter values
None
Recommended value
None
Application scenarios
None
Relevant boards
OBU1
F-19
F Parameter Settings
Item
Description
Configuration requirements
None
Description
Parameter description
Parameter values
None
Recommended value
None
Application scenarios
None
Relevant boards
OBU1
Configuration requirements
None
Description
Parameter description
30.0 to 30.0
Recommended value
F-20
Application scenarios
None
Relevant boards
OBU1
Issue 02 (2009-07-30)
F Parameter Settings
Item
Description
Configuration requirements
Parameter
Value
Configuration
Clock
source
priority
Clock source
External clock
source mode
Synchronous
status byte
AlS alarm
generated
B1 BER
thresholdcrossing
generated
Selected
Clock
source
switching
condition
Issue 02 (2009-07-30)
F-21
F Parameter Settings
F-22
Domain
Parameter
Value
Configuration
Phaselocked
source
output by
external
clock
External clock
output mode
when 2M output
synchronous
source is invalid
Synchronization
quality
unavailable,
output AIS, and
shut off
Default value:
Shut off
Output mode of
external clock
source 1
2 Mbit/s and 2
MHz
Output mode of
external clock
source 2
2 Mbit/s and 2
MHz
Clock source
threshold
No threshold
value, G.813 SDH
equipment timing
source (SETS)
signal, G.812
local clock signal,
G.812 transit
clock signal, G.
811 clock signal,
and unknown
Clock
source
switching
Lock status
Lockout and
unlock
Switching
operation
Forced switching,
manual switching,
and clear
switching
Clock
source
reversion
parameter
Higher priority
clock source
reversion mode
Auto-revertive
and non-revertive
Issue 02 (2009-07-30)
Domain
Parameter
Value
Configuration
Clock source
WTR time
0 to 12 minutes
Affiliated subnet
Default value: 0
Protection status
Start extended
SSM protocol,
start standard
SSM protocol, and
stop SSM protocol
Clock source ID
1 to 15
SSM
output
control
Line port
Control status
Enabled and
disabled
Clock
quality
Configuration
quality
Unknown
synchronization
quality, G.811
clock signal, G.
812 transit clock
signal, G.812
local clock signal,
G.813 SDH
equipment timing
source (SETS)
signal, do not use
for
synchronization,
and automatic
extraction
Default value:
Automatic
extraction
Clock
subnet
Issue 02 (2009-07-30)
F Parameter Settings
F-23
F Parameter Settings
Domain
Clock ID
status
F-24
Parameter
Value
Configuration
Clock quality
Unknown
synchronization
quality, G.811
clock signal, G.
812 transit clock
signal, G.812
local clock signal,
G.813 SDH
equipment timing
source (SETS)
signal, do not use
for
synchronization,
and automatic
extraction
Line port
Enabled status
Enabled and
disabled
Default value:
Enabled
Issue 02 (2009-07-30)
G Glossary
Glossary
1+1 protection
100BASE-TX
10BASE-T
19-inch cabinet
Issue 02 (2009-07-30)
Add/Drop Multiplexer
ADM
Administrator
AIS
Alarm cable
G-1
G Glossary
Alarm
AMI
APD
Asynchronous
ATM
Attenuation
Attenuator
Attribute
Property of an object.
ATPC
AU
Auto-negotiation
The rate/work mode of the communication party set as selfnegotiation is specified through negotiation according to the
transmission rate of the opposite party.
G-2
Back up
Backplane
Bandwidth
Issue 02 (2009-07-30)
G Glossary
BITS
Board Version
Replacement Function
Bridge
Broadcast
Issue 02 (2009-07-30)
Cable tie
CBR
CDVT
Channel spacing
Channel
Circuit
Client
G-3
G Glossary
Configuration data
Configure
Connection
Convergence
Conversion
Cyclic Redundancy
Check
G-4
DDF
Dense Wavelength
Division Multiplexing
Drop
Dual-Fed
DWDM
Issue 02 (2009-07-30)
G Glossary
E
E13
ECC
EDFA
Ejector lever
Encapsulation
EPL
ESCON
ESD jack
ESD
Ethernet
ETSI
EVPL
Eye pattern
F
Fan tray assembly
Issue 02 (2009-07-30)
G-5
G Glossary
Fault
FC
FD
Fiber connector
Fiber jumper
The fiber which is used to connect the subrack with the ODF.
FICON
Flow
Frame
Free-run mode
Full duplex
Pertaining to both parties that can send and receive data at the
same time on the communication link.
G-6
Issue 02 (2009-07-30)
G Glossary
Gain
The ratio between the optical power from the input optical
interface of the optical amplifier and the optical power from the
output optical interface of the jumper fiber, which expressed in
dB.
Grooming
Guide rail
H
Half duplex
Pertaining to, both parties that only one party can send data,
while the other party can only receive data on the
communication link.
HSB
Hot Standby.
I
IMA frame
The IMA frame is used as the unit of control in the IMA protocol.
It is a logical frame defined as M consecutive cells, numbered
0 to M-l, transmitted on each of the N links in an IMA group.
IMA
Isolation
J
Jitter
Issue 02 (2009-07-30)
Label
Laser
G-7
G Glossary
Layer
LCAS
Link
Loopback
Lower subrack
G-8
M13
MAC
Mapping
Mounting ear
MPLS
MSP
Multicast
Issue 02 (2009-07-30)
G Glossary
Multiplex section
protection
Multiplex
Multiplexer
Multiplexing
N
NNI
Noise figure
Non-revertive
NRZ
Issue 02 (2009-07-30)
OADM
ODF
ODU
ONE
Optical add/drop
multiplexing
G-9
G Glossary
Optical Amplifier
Optical connector
Optical interface
OTM
OTU
Overhead
G-10
Packing case
Paired Slots
Pass-Through
Path protection
Issue 02 (2009-07-30)
G Glossary
Path
PCR
Peak Cell Rate. An upper limit on the rate at which cells can be
submitted on an ATM connection.
PDH
PIN
Plesiochronous
Pointer
Power unit
PRBS
Private line
Procedure
Process
Provisioning
Pseudo wire
Issue 02 (2009-07-30)
G-11
G Glossary
Receiver overload
Receiver sensitivity
Reference clock
REG
Regeneration
Revertive switching
RPR
RS232
G-12
S1 byte
SAN
SD
SDH
Section
Issue 02 (2009-07-30)
G Glossary
Settings
SF
SFP
The ratio of the largest peak of the total source spectrum to the
second largest peak.
Side panel
Signal cable
Signal fail
SNCP
SNCMP
SNCTP
Span
SSM
Synchronous
T
T2000
Issue 02 (2009-07-30)
G-13
G Glossary
TCM
TPS
Tray
Tributary loopback
TUG
U
Upload
Upper subrack
V
VC
Virtual concatenation
VLAN
VPN
G-14
Issue 02 (2009-07-30)
Wavelength Division
Multiplexing
Issue 02 (2009-07-30)
G Glossary
G-15
A
ADM
Add/Drop Multiplexer
AMI
APS
ATM
ATPC
B
BITS
C
CAR
CBR
CC
Continuity Check
CMI
COA
CPU
CRC
Issue 02 (2009-07-30)
DC
Direct Current
DCC
DCE
H-1
DCU
DDF
DTR
DVB-ASI
DWDM
E
ECC
EDFA
EMC
Electromagnetic Compatibility
EMI
Electromagnetic Interference
EPL
EPLAN
ESCON
ETS
ETSI
EVPL
EVPLAN
F
FC
Fiber Channel
FD
Frequency Diversity
FE
Fast Ethernet
FEC
FICON
Fiber Connection
FPGA
G
GE
Gigabit Ethernet
GFP
H-2
Issue 02 (2009-07-30)
HDB3
HDLC
HSB
Hot Standby
I
IEEE
IF
Intermediate Frequency
IS-IS
ITU-T
L
LAPS
LB
Loopback
LCAS
LCT
M
MPLS
MSP
MLM
Multi-Longitudinal Mode
N
NA
Not Applicable
NRZ
O
OAM
ODU
Outdoor Unit
OSPF
P
PA
Issue 02 (2009-07-30)
Power Amplifier
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
H-3
PDH
PRBS
PW
Pseudo Wire
R
RAM
Random-Access Memory
RD
Receive Data
RIP
RSTP
S
SD
Space Diversity
SDH
SG
Signaling Ground
SLM
Single-Longitudinal Mode
SNCP
SNCMP
SNCTP
SSM
T
TD
Transmit Data
TPS
U
UBR
UPM
H-4
VBR
VLAN
VPN
Issue 02 (2009-07-30)
W
WDM
Issue 02 (2009-07-30)
H-5