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Scheme Testing Tools

LogicPro v1.5
User Manual

OMICRON LogicPro

Manual Version: LogicPro.ENU.1 - Year 2001


OMICRON electronics. All rights reserved.
This manual is a publication of OMICRON electronics GmbH.
All rights including translation reserved. Reproduction of any kind, e.g., photocopying, microfilming, optical
character recognition and/or storage in electronic data processing systems, requires the explicit consent of
OMICRON electronics.
Reprinting, wholly or in part, is not permitted. The product information, specifications, and technical data
embodied in this manual represent the technical status at the time of writing and are subject to change without
prior notice.
We have done our best to ensure that the information given in this manual is useful, accurate, up-to-date and
reliable. However, OMICRON electronics does not assume responsibility for any inaccuracies which may be
present.
The user is responsible for every application that makes use of an OMICRON product.
OMICRON electronics translates this manual from the source language English into a number of other
languages. Any translation of this manual is done for local requirements, and in the event of a dispute between
the English and a non-English version, the English version of this manual shall govern.

Table of Contents

TABLE OF CONTENTS
About This Guide ......................................................................................................................... 1
Before you start............................................................................................................................ 2
Prerequisites ................................................................................................................................ 2

How To Install OMICRON LogicPro............................................................................................. 3


Software License Agreement....................................................................................................... 4
About Scheme Testing Tools Software........................................................................................ 5
Introduction .................................................................................................................................. 5
Overview...................................................................................................................................... 6

About OMICRON LogicPro .......................................................................................................... 9


Getting results............................................................................................................................ 13
Test task .................................................................................................................................... 13
Modes of operation .................................................................................................................... 13
Test schemes available ............................................................................................................. 14
What should be tested ............................................................................................................... 14
How should it be tested ............................................................................................................. 15
How the tests are performed ..................................................................................................... 16
Test results analysis .................................................................................................................. 17
Preparation for testing ............................................................................................................... 17
Logic scheme selected ............................................................................................................. : 22
Steps in testing .......................................................................................................................... 23

Getting Results in Animation Mode............................................................................................ 25


Getting Results in Multiple Test Mode ....................................................................................... 36
Getting Results in Scheme Test Mode ...................................................................................... 57
Switch-Onto-Fault ...................................................................................................................... 69
Objective....................................................................................................................................
SOTF logic description ..............................................................................................................
Fault locations............................................................................................................................
Test Cases.................................................................................................................................
Hardware requirements .............................................................................................................
Automatic test sequence ...........................................................................................................
Test object settings ....................................................................................................................

69
69
71
71
72
72
73

Remote-End-Opened................................................................................................................. 74
Objective....................................................................................................................................
REO logic description ................................................................................................................
Fault locations............................................................................................................................
Test Cases.................................................................................................................................
Hardware Requirements ............................................................................................................

74
74
76
76
76

OMICRON LogicPro

Automatic test sequence............................................................................................................ 77


Test object settings .................................................................................................................... 78

Zone 1 Extension ....................................................................................................................... 79


Objective ....................................................................................................................................
Zone1 Extension logic description .............................................................................................
Fault locations ............................................................................................................................
Test Cases .................................................................................................................................
Hardware Requirements ............................................................................................................
Automatic test sequence............................................................................................................
Test object settings ....................................................................................................................

79
79
80
81
81
82
82

Load Encroachment................................................................................................................... 84
Objective ....................................................................................................................................
LE logic description ....................................................................................................................
Fault locations ............................................................................................................................
Test Cases .................................................................................................................................
Hardware Requirements ............................................................................................................
Automatic test sequence............................................................................................................
Test object settings ....................................................................................................................

84
84
85
86
86
87
87

Breaker Failure Protection ......................................................................................................... 88


Objective ....................................................................................................................................
BFP logic description .................................................................................................................
Fault locations ............................................................................................................................
Test Cases .................................................................................................................................
Hardware Requirements ............................................................................................................
Automatic test sequence............................................................................................................
Test object settings ....................................................................................................................

88
88
89
90
90
91
91

Block Reclosing ......................................................................................................................... 93


Objective ....................................................................................................................................
BR logic description ...................................................................................................................
Fault locations ............................................................................................................................
Test Cases .................................................................................................................................
Hardware Requirements ............................................................................................................
Automatic test sequence............................................................................................................
Test object settings ....................................................................................................................

93
93
94
95
95
96
96

Power-Swing-Blocking ............................................................................................................... 98
Objective .................................................................................................................................... 98
PSB logic description ................................................................................................................. 98
Fault locations .......................................................................................................................... 100
Test Cases ............................................................................................................................... 100
Hardware Requirements .......................................................................................................... 101
Automatic test sequence.......................................................................................................... 102
Test object settings .................................................................................................................. 102

Table of Contents

Power-Swing-Tripping.............................................................................................................. 103
Objective..................................................................................................................................
PST logic description ...............................................................................................................
Fault locations..........................................................................................................................
Test Cases...............................................................................................................................
Hardware Requirements ..........................................................................................................
Automatic test sequence .........................................................................................................
Test object settings ..................................................................................................................

103
103
104
104
104
105
105

Loss-Of-Potential ..................................................................................................................... 106


Objective..................................................................................................................................
LOP logic description...............................................................................................................
Fault locations..........................................................................................................................
Test Cases...............................................................................................................................
Hardware Requirements ..........................................................................................................
Automatic test sequence .........................................................................................................
Test object settings ..................................................................................................................

106
106
107
108
108
109
109

Current Transformer Supervision............................................................................................. 111


Objective..................................................................................................................................
CTS logic description...............................................................................................................
Fault locations..........................................................................................................................
Test Cases...............................................................................................................................
Hardware Requirements ..........................................................................................................
Automatic test sequence .........................................................................................................
Test object settings ..................................................................................................................

111
111
112
113
113
114
115

Stub Bus Protection ................................................................................................................. 116


Objective..................................................................................................................................
STP logic description ...............................................................................................................
Fault locations..........................................................................................................................
Test Cases...............................................................................................................................
Hardware Requirements ..........................................................................................................
Automatic test sequence .........................................................................................................
Test object settings ..................................................................................................................

116
116
117
118
118
119
119

Single Pole Tripping................................................................................................................. 121


Objective..................................................................................................................................
SPT logic description ...............................................................................................................
Fault locations..........................................................................................................................
Test cases................................................................................................................................
Hardware requirements ...........................................................................................................
Automatic test sequence .........................................................................................................
Test object settings ..................................................................................................................

121
121
123
123
123
125
125

Evolving Fault Logic................................................................................................................. 126


Objective.................................................................................................................................. 126
Evolving Fault logic description ............................................................................................... 126

OMICRON LogicPro

Fault locations ..........................................................................................................................


Test cases ................................................................................................................................
Hardware requirements............................................................................................................
Automatic test sequence..........................................................................................................
Test object settings...................................................................................................................

127
128
128
129
129

Pole-Dead Logic ...................................................................................................................... 131


Objective ..................................................................................................................................
Pole-Dead logic description .....................................................................................................
Fault locations ..........................................................................................................................
Test Cases ...............................................................................................................................
Hardware Requirements ..........................................................................................................
Automatic test sequence..........................................................................................................
Test object settings ..................................................................................................................

131
131
132
133
133
134
134

About This Guide

ABOUT THIS GUIDE


This guide provides a general overview of the OMICRON LogicPro software.
You will have reference information in the pop-up help in the various windows.
The sections under the heading Before you Start, Prerequisites, How to install
the OMICRON LogicPro, and Software License Agreement deal with subjects
you need to know before installing the OMICRON Performance Testing Software.
The section About OMICRON Performance Testing Software gives conceptual
information about the tools for automatic testing of protection and control logic
schemes in multi-functional protective relays.
The section About OMICRON LogicPro gives an overview and background
information on different logic schemes and distance protection relays.
The section Getting Results describes in detail available modes of operation and
provides step-by-step instructions for their use.
The section Testing Relay Schemes gives the principles of operation of individual
schemes, test objectives, hardware requirements, test description and expected
performance.

OMICRON LogicPro

BEFORE YOU START


Prerequisites
Minimum:
Pentium 90MHz
32 MB RAM
Windows 95, Windows NT4.0
(32-bit Windows)

Recommended:
Pentium 166MHz
64 MB RAM
Windows 95, Windows NT4.0 or higher
(32-bit Windows)

How To Install OMICRON LogicPro

HOW TO INSTALL OMICRON


LOGICPRO
The OMICRON LogicPro software is delivered on a CD-ROM unless you have
requested diskette installation.
When you are ready to install the OMICRON LogicPro.
1.

Insert the CD in your CD-ROM drive to start the OMICRON LogicPro


CD-Browser.

2. Close all other open applications.


3. Open Control Panel in Windows.
4. Open Add/Remove Programs.
5. Click on Install and follow the instructions.
6. Select the directory where you want OMICRON LogicPro installed.
7. Reboot your computer, before starting the OMICRON LogicPro.

If you need to make an installation with diskettes


Insert Disk 1 in the floppy disk drive.
Follow the same procedure as for the CD-ROM installation...

OMICRON LogicPro

SOFTWARE LICENSE AGREEMENT


Scope
OMICRON LogicPro software as executable code in machine readable form on
data carrier.

Content and scope of license


OMICRON grants its customers the non-exclusive right (license) to use the
software to control the OMICRON Test System Hardware purchased by him, and
to use it in off-line mode. The right is not limited to a specific period of time.
Property and copyright of the software or any of its parts will not pass to the
customer.
The customer may not

make any modification to the software or have such modifications made by


third parties,

install and run the software on computers other than those controlling
OMICRON test equipment

give the product to third parties.


The software may be used only in conjunction with OMICRON Test System
Hardware.
By means of information and agreements with employees who have access to the
OMICRON software, as well as other suitable actions, the customer shall take care
that the agreements will be complied with.

Copyright
The software is property of OMICRON and is protected under copyright law.

Warranty
The manufacturer agrees to remove all defects occurring during the first 90 days
free of charge. A defect is defined as follows: The software does not have
significant function, properties or does not meet performance specified in the user
manual.
If any warranty claim is made, the original packing of the device must be used to
return it in order to prevent the warranty claim from becoming void.
The manufacturer is not liable for lost profit, damages to saved data or other
indirect or consequential damages.

10

About Scheme Testing Tools Software

ABOUT SCHEME TESTING TOOLS


SOFTWARE
Introduction

The electric power utility industry is going through significant changes due to
deregulation, downsizing and free wheeling, etc. Power System Protection and
Control departments face multiple challenges of their own:

reduced number of protection engineers


lack of experience
availability of very complicated, multifunctional microprocessor protective
relays

availability of new operating principles in modern protective relays


availability of sophisticated relay testing technology
continuously increasing number of relay vendors and products
All of the above makes it extremely difficult for each particular utility to test and
evaluate the new products. As a result not always the best technology for the
application is used.
With the advancements in digital technology, new schemes and algorithms have
been implemented in protection devices. It is becoming a challenge to utilities to
benchmark relays. At the same time the more sophisticated testing tools allow
digital software and hardware simulations and analog simulations for automatic
benchmarking or commissioning and maintenance of microprocessor protection
schemes and products. Microprocessor relays should be thoroughly tested to
assure proper operation under a variety of network conditions.

Utilities can best insure optimal selection of the protection by benchmarking using
appropriate tools. In addition, proper relay settings and operation for their particular complex
problem need to be guaranteed by use of comprehensive test procedures.

It is always desirable to test and benchmark numerical algorithms and devices


using worst case conditions.
This provides an added degree of confidence for the device to withstand the harsh
environment encountered in the field. Thus, a product should employ detailed
analysis and pass comprehensive testing prior to final approval.

Another improvement is to use data from the field to test protection systems. Modern
microprocessor relays allow the user to collect disturbance data from the field.

This data can be used for evaluation of the protection system performance and for
benchmark testing of new products, by directly comparing their performance under
identical power system and fault conditions.

11

OMICRON LogicPro

Overview

OMICRON Scheme Testing Tools Software is a family of test programs designed


to allow the user to evaluate in a quick and efficient way a multifunctional
protection relay.
The OMICRON Scheme Testing Tools Software is a result oriented modular
package of predefined standard procedures and software for performance relay
testing. The tests are applicable to a wide variety of relays. It is not intended to
replace the existing procedures and packages for automatic relay testing, but to
complement them. The Overcurrent, Differential and Distance Testing programs
are designed and implemented for the testing of different protection functions in
single or multifuntional protective relays.
The Scheme Testing Tools Software provides for the automatic testing of logic
schemes with different levels of complexity based on protection elements, that
have already been tested by other OMICRON software products.

The OMICRON Scheme Testing Tools Software consists of a set of testing


packages with different levels of complexity for the typical types of protective
relays in each of the basic classes of protection systems:

Transmission line protection


Bulk transmission line protection
Distribution feeder protection
Transformer protection
Generator protection
Other
Each of these packages is subdivided into subsets based on the application of
different protection principles and covers different cases, which correspond to a
wide range of applications.

For example a Transmission Line Protection test package is divided in


sub-packages that apply to the following types of transmission relays:

distance relays
current differential relays
directional comparison relays
phase comparison relays
The development of the different packages is prioritized based on the popularity of
a certain protection principle, i.e. the number of protective relays of specific type
manufactured and installed. In Transmission Line Protection without a doubt the
most popular relay is the Distance Relay. Because of that, the distance principle
Transmission Line Protection Testing Software is the first to be developed.

12

Considering the main goal of the Performance Testing to be the evaluation of applicability of
a specific distance type multifunctional protective relay to different transmission line
configurations and realistic power system conditions, the different groups of tests included in

About Scheme Testing Tools Software

the package are of the Dynamic State Test Type and Transient Simulation Test Type
(depending on the requirements of each particular test).

Distance Transmission Line Protection Testing includes several basic groups of


tests:

Tests of the basic analog input processing


Tests of the basic protection functions:
phase distance
ground distance
directional phase overcurrent
directional ground overcurrent
Tests of the additional protection functions
Tests of the basic communication based relay schemes
Tests of non-communication relay schemes
Tests of non-protection functions
Each group of tests listed above is divided in sub-groups, which are considered as
independent test cases.
LogicPro is designed for the testing of the non-communication logic schemes of
multifunctional distance relays.

13

OMICRON LogicPro

14

About OMICRON LogicPro

ABOUT OMICRON LOGICPRO


Since most of the protection functions of a transmission line protection relay are
based on both the current and voltage measurements, the operation of the
different protection elements is affected by many system conditions that may result
in a relay maloperation.or non-operation.
Changes in the currents and voltages seen by the relay may affect the operation of
the primary protection function of a transmission line protection relay - the distance
elements. They may operate due to problems of the analog circuits or abnormal
loading conditions. Switching from an open condition into a faulted line presents a
different type of problems.

Substation 1
Zone 1
Forward

Zone 2
Forward

Substation 2

Distance
Relay

Figure 0-1:

Forward looking distance protection zones with underreaching Zone 1

The transmission line distance protection relay with two forward looking zones, is
shown in ( Figure 0-1, page -9 )
Different fault conditions and the operations of the breakers after a fault occurs
have also to be considered in the design of the protective relays.
The requirements for improved stability of the power system during fault conditions
result in the use of single pole tripping and reclosing. The performance of different
relay protection elements related to this mode of operation are also covered by
special logic schemes.
There are several different types of conditions that have to be considered:
Abnormal power system conditions include power swings or overloading of the
transmission lines during a power system disturbance.
Failure of voltage or current transformers or the circuits connecting them to the
analog inputs of the relay leads to a difference between the primary currents and

15

OMICRON LogicPro

voltages in the power system and the currents and voltages measured by the
relay.
Breaker failure under fault conditions and non-fault conditions, for example
overvoltage during light loading of long transmission lines, presents a different kind
of problems to the distance relay.
To address all the requirements for speed and selectivity of operation during fault
conditions, as well as to avoid maloperation under abnormal, but non-fault
conditions, modern transmission line protection relays have multiple built-in logic
schemes.
The communications based schemes, such as Permissive Overreaching or
Blocking schemes are covered by the CommPro software.
LogicPro is designed for the testing of the more typical non-communications based
logic schemes that still play a very important part and define the overall
performance of distance transmission line protection relays.
Logic Pro test cases are divided in two groups as a function of the selected mode
of tripping - single pole or three pole.
In both cases the following modules are available for testing of
non-communications based logic schemes in modern distance relays:

Switch-Onto-Fault
Remote-End-Opened (Loss-of-Load)
Zone 1 Extension
Load Encroachment
Breaker Failure Protection
Block Reclosing
Power Swing Blocking
Power Swing Tripping
Loss-of-Potential (Voltage Transformer Supervision)
Current Transformer Supervision
Stub Bus Protection
The inputs and outputs of the CMC are programmed in such a way, that allows the
testing of all the above schemes without any rewiring between the CMC and the
test object.
If a Single Pole Tripping option is selected, three additional test modules become
available:

Single Pole Tripping


Evolving Fault
Pole Dead Logic

16

About OMICRON LogicPro

Before running these three tests, the test engineer or technician will have to
change the wiring according to the diagrams in the Hardware Requirements in
order to be able to monitor the trip outputs for each individual phase.

The main advantages of the non-communication based logic schemes in


transmission line protection relays are as follows:

They allow the relay to operate with high speed for conditions that challenge
the operating principle of the main protection element - the distance protection

They ensure the stability of relay operation during abnormal power system
conditions such as power swings or overloading of the transmission lines

They allow the relay to correctly detect the failure of a breaker to trip under
fault or non-fault conditions, as well as to detect the opening of a remote
breaker in order to accelerate the tripping of the local breaker

The relay can selectively trip one or all three phases for simple or evolving fault
conditions

17

OMICRON LogicPro

18

Getting results

GETTING RESULTS
Test task

OMICRON LogicPro Software is a family of test tools for automatic testing of


non-communication based logic schemes in transmission line protection relays.
They include the most typical schemes, such as Switch-Onto-Fault, Breaker
Failure protection and also cover some advanced features, like Current
Transformer Supervision, etc.
The objective of this group of tests is to perform a number of dynamic tests to
evaluate the most common non-communication based logic schemes used in
modern transmission line relays with distance elements. Effects of load flow, fault
resistance and remote end in-feed are not considered, because they don't affect
the performance of these schemes, but the performance of phase and ground
distance elements. These effects are subject to testing in other OMICRON test
software. The assumption is made, that Zone 1, Zone 2 and reverse looking phase
and ground distance elements have already been tested successfully.
The test object is a multi-functional distance relay with different logic schemes
available. The assumption is that the relay under test is located at one end of the
protected two ended transmission line. The power system environment, i.e.
breaker status, pre-fault, fault and post fault current and voltages, are simulated
by the CMC device.
During the testing of the different protection schemes in one of the modes of
operation, all phase and ground distance zone settings remain the same. The only
changes made are in the logic scheme selected for each individual subgroup of
tests and the relay settings specific to the scheme under test.

It is recommended that other protection elements such as overcurrent or


undervoltage should be disabled during these tests.

Modes of operation

The software can be used for different purposes and in different modes as described in detail
later in the document.

The first mode is for benchmarking or complete evaluation purposes. In this case
multiple logic schemes are selected in a point-and-click manner and the
software automatically executes a series of predefined tests, measures the relay
under test response, analyses the results and prepares the test report.
The second mode is for testing of a specific logic scheme, for example a
Loss-of-Potential (Voltage Transformer Supervision) Scheme. In this case the
software automatically executes a series of predefined tests required for the

19

OMICRON LogicPro

selected scheme, measures the relay under test response, analyses the results
and prepares the test report.
The third mode of operation of the software is for training purposes. It includes
multiple animated demonstrations of the sequence of events and the operation of
different relay elements at each step of a test sequence. This tool is designed to
help a protection or test engineer or technician with limited experience to
understand the dynamics of the logic schemes operation and the functioning of the
relay logic for different fault conditions and different substation or power system
equipment performance.

Test schemes available


The following most common logic Schemes are considered in LogicPro:

Switch-Onto-Fault scheme
Remote-End-Opened (Loss-of-Load) scheme
Zone 1 Extension scheme
Load Encroachment scheme
Breaker Failure Protection scheme
Block Reclosing scheme
Power Swing Blocking scheme
Power Swing Tripping scheme
Loss-of-Potential (Voltage Transformer Supervision) scheme
Current Transformer Supervision scheme
Stub Bus Protection scheme
Single Pole Tripping scheme
Evolving Fault scheme
Pole Dead Logic scheme

The logic for each of the above listed schemes is based on existing documents
and may be implemented with modifications in specific products.

What should be tested

The testing of logic schemes is intended to evaluate the performance of the Test Object
under different fault, system and substation conditions.

Different tests are designed to monitor the relay operation for the following fault
conditions:

Zone 1 fault
Zone 2 fault on the protected line
Zone 2 fault outside of the protected line

20

Getting results

Single- phase-to-ground faults, three phase faults or evolving faults are applied
depending on the requirements of the tested logic scheme.
Some of the logic schemes apply to the relay under test abnormal system
conditions such as:

power swing
overload
overvoltage

How should it be tested

TEST METHODS
The testing of distance relays with built-in logic schemes can be performed in
several different ways
USING FIXED INPUT STATUS
In this mode the testing of relays is performed with their inputs energized
constantly and not synchronized with the test equipment. This approach can be
used for testing of very simple relay functions. It does not adequately represent the
dynamics of real life events and has very limited application for testing of modern
microprocessor based transmission line protection relays.
Using this method the test engineer or technician can test just a simple scheme,
For example:
if a Switch-Onto-Fault scheme is tested,
the breaker status monitoring input of the test object will be continuously
de-energized and when the fault currents and voltages are applied by the test
device, this should result in switch-onto-fault.
It is obvious that this method can not be used for testing of more advanced logic
schemes, such as Evolving Fault or Current Transformer Supervision.

USING SYNCHRONIZED INPUT STATUS


In this mode the testing of relays is performed with their inputs energized as
required by the dynamics of the simulated power system conditions and substation
environment. It is considered as dynamic simulation, with multiple steps, each of
which represents a different state - pre-fault, multiple fault and post-fault
conditions.
This mode requires advanced test equipment that can be programmed to change
the status of its analog and binary outputs, thus simulating not only changes of
voltages and currents, but also breaker and other equipment status. The capability
to change states as a result of test object operation is also necessary for the
development and execution of test procedures for the testing of advanced logic
schemes.

21

OMICRON LogicPro

This approach can be used for testing of very complicated relay functions. It allows
for an adequate representation of the dynamics of real life events and can be used
for advanced testing of modern microprocessor based transmission line protection
relays.

For example:
using this method the test engineer or technician can test not only a simple
Switch-Onto-Fault scheme, but also more advanced logic schemes, such as Permissive
Overreaching Unblocking. In this case in the pre-fault condition a communication status
signal (guard frequency available) will be simulated, which under fault conditions will change
to a trip frequency Carrier Receive.

How the tests are performed

The fundamental requirement in the LogicPro software is ease of use. The goal is to achieve
maximum results with a minimum effort. That is why, the test configuration and execution
efforts in most cases are limited to a point-and-click action.

The testing of logic schemes should be performed in a way that as closely as


possible matches real life power system conditions. The sequence of steps in a
test is different as a function of the requirements for the specific scheme and
system condition.

For example, if the test is for a Switch-Onto-Fault scheme and the test conditions
are breaker opened with a closing onto a fault, the sequence will include only three
steps:

pre-fault with breaker in a opened position, nominal voltage and normal


load current conditions

breaker closing with faults currents and voltages


post-trip condition with breaker opened, nominal voltage (assuming that
bus voltage is applied to the relay) and no current

If a more complex scheme is tested, the number of steps will increase


accordingly. For example if an Evolving Fault scheme is tested, the test will
have to include the following steps:

pre-fault with breaker in a closed position, nominal voltage and normal load
current conditions

initial fault condition with a single-phase-to-ground fault in the forward


direction

evolving of the fault to a three-phase-to-ground fault


post-fault condition with breaker closed, nominal voltage and no load
current conditions
The CMC Test Device is used to simulate both the analog and the digital signals
received by the relay in the field.
The CMC inputs are used to monitor the operation of different relay elements as
required by the scheme under test.

22

Getting results

To simplify the testing, the current and voltage levels are limited within the output range of
the basic CMC module (no amplifiers are required). This way there is no need for the user to
define the requirements for the CMC.

Test results analysis


The results from each test performed are automatically analyzed by the LogicPro
software. The analysis is based on an expert system comparing the operating time
of a combination of monitored protection elements that have picked-up during the
test.
The operating time of the monitored protection elements is defined based on the
protective relay manufacturer's technical specifications.
The results are displayed in a graphical format in the user interface and in detail in
the automatically generated test report.

Preparation for testing

OVERVIEW
As mentioned earlier, the goal of the LogicPro software is to allow the testing of logic
schemes and comparing the performance of different relays under identical test conditions.

During the testing of the previously listed schemes all phase and ground distance
zone settings remain the same. The only changes made are in the logic scheme
selected for each individual subgroup of tests and the relay settings specific to the
scheme under test.
The fault currents and voltages are calculated based on a simple network model,
since it is assumed that the basic distance functions have already been tested
using more sophisticated test methods.
The following sections in this chapter describe the network model used for the
calculation of the fault currents and voltages and the settings of the test object
corresponding to this model.
Since the software has test and training modes of operation, the global test data is
entered by the user only if one of the two test mode options has been selected.
NETWORK MODEL
Because only a single end relay is tested, the network model used for calculation
of short circuit currents and voltages for a Zone 1 or Zone 2 fault is a steady state
single source fault analysis model.

23

OMICRON LogicPro

Substation A
50 miles
Type Delta
0.625 omhs/mile

120 kV

Figure 0-1:

Test System Model

A 120 kV, 50 miles long line with delta configuration is used in the default model.
The system is homogenous (i.e. source and line impedances have the same
angle) and the Source to Line Impedance Ratio is SIR = 1.
The line impedance is 0.625 primary ohms per mile. The default line impedance
angle is 75 deg.
The zero sequence impedance is 2.5 primary ohms per mile. The line zero
sequence impedance angle is 75 deg.
The zero sequence to positive sequence impedance ratio is 4 and the zero
sequence compensation factor KL

KL = (Z0 - Z1) / 3Z1 = (2.5 - 0.625) / 1.875 = 1.875 / 1.875 = 1.0

LINE AND SOURCE IMPEDANCES

ZL primary = ZLp = 0.625 x 50 = 31.25 ohm


Z0L primary = Z0Lp = 2.5 x 50 = 125.00 ohms

If the rated current of the distance relay under test is 5 amperes, it is assumed that
the CT ratio setting is

CT ratio = CTR = 2000/5 = 400


If the rated current of the distance relay under test is 1 ampere, it is assumed that
the CT ratio setting is

CT ratio = CTR = 400/1 = 400

24

Getting results

It is assumed that the rated voltage of the distance relay is 120 V phase-to-phase
and the VT ratio setting is

VT ratio = VTR = 1000/1 = 1000


Based on these CT and VT settings the secondary impedance is calculated using

CTR / VTR = 400/1000 = 0.4

ZL secondary = ZLs = 0.4 x 31.25 = 12.5 ohms


Z0L secondary = Z0Ls = 0.4 x 125.00 = 50.0 ohms
Because the source to line impedance ratio is 1, the source impedance in the
network model will have the same values, i.e.

ZS = 12.5 ohms

The source angle is 75 deg (default homogeneous system) and the K-factor

KS = 1.0

FAULT TYPE AND FAULT LOCATIONS


Three-phase-to-ground faults or single-phase-to-ground faults are simulated at
different locations along the model transmission line depending on the logic
scheme under test.
Faults behind the relay are simulated for testing of Breaker Failure schemes
initiated by another relay for an external fault.
TEST MODE
Constant Source Impedance test mode is selected for all tests.
The fault incidence angle is 75 deg.
HARDWARE REQUIREMETS
The hardware requirements are different for the different communication based
schemes. However, the system network model and fault locations selected result
in fault currents and voltages that are within the range of 12.5 A, i.e. there is no

25

OMICRON LogicPro

need for amplifiers. This simplifies the hardware configuration requirements for the
testing.

Three phase voltages and currents are required from the CMC to the relay under
test.
A different number of binary outputs of the CMC are programmed to simulate the
relay environment as a function of the scheme under testing.
A different number of binary inputs of the CMC are programmed to monitor the
relay operation as a function of the scheme under testing.
TEST OBJECT SETTINGS
The expected basic settings of the multifunctional relay under test associated with
the communication based schemes are given below.

26

Getting results

Zone 1:
An 80% reach setting for Zone 1 is expected

In polar coordinates

Z1 = 0.8 x 12.5 = 10 ohms LV (secondary ohms)


Z1 angle = 75 deg

In rectangular coordinates

R1 = Z1 x cos 75 = 10 x 0.259 = 2.59 ohms LV


X1 = Z1 x sin 75 = 10 x 0.966 = 9.66 ohms LV

The zero sequence compensation factor K0 = 1 at angle 0 deg

Zone 2:
A 120% reach setting for Zone 2 is expected

In polar coordinates

Z2 =1.2 x 12.5 = 15 ohms LV (secondary ohms)


Z2 angle = 75 de

In rectangular coordinates

R2 = Z2 x cos 75 = 15 x 0.259 = 3.88 ohms LV


X2 = Z2 x sin 75 = 15 x 0.966 =14.49 ohms LV

The zero sequence compensation factor K0 = 1 at angle 0 deg


The time delay for Zone 2 is 200 milliseconds.

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OMICRON LogicPro

If the distance relay settings are entered using the positive and zero
sequence impedance for the different zones, the zero sequence impedance,
resistance or reactance settings should be calculated based on the 50 ohm
zero sequence secondary line impedance.

Logic scheme selected:


This is the only setting/selection that changes between the different
non-communication based schemes available.
Depending on the technical specifications of the test object (a multifunctional
distance transmission line protection relay), this setting can be one of the following
typical non-communication based logic schemes:

Switch-Onto-Fault scheme
Remote-End-Opened (Loss-of-Load) scheme
Zone 1 Extension scheme
Load Encroachment scheme
Breaker Failure Protection scheme
Block Reclosing scheme
Power Swing Blocking scheme
Power Swing Tripping scheme
Loss-of-Potential (Voltage Transformer Supervision) scheme
Current Transformer Supervision scheme
Stub Bus Protection scheme
Single Pole Tripping scheme
Evolving Fault scheme
Pole Dead Logic scheme

Steps in testing
Multifunctional transmission line protection relays are very complex devices that
require during testing adequate simulation of their operating environment, to
ensure that they will perform correctly when installed in the field. There is a
sequence of steps related to the testing of electromechanical, solid state or
microprocessor based relays using different logic schemes for improved fault
clearing. They depend on the goals of the test and the level of knowledge of the
relay under test and it's operating principles

28

Getting results

Some of the steps are performed before the actual testing:

Learn About the Main Principles of the Test Object


The user has to become familiar with the principles of operation of the test object
(in this case a distance relay with preprogrammed logic schemes) and the
sequence of events that result in an operation or non-operation. This information is
usually available in the users manual of the tested relay. It will help to understand
the results from the tests and their variation (if any) from the typical schemes used.

Learn About the Principles in the Test Sequences


The LogicPro software is based on the common industry understanding of logic
schemes and some assumptions on the interface between the relay and the power
system environment. The user has to become familiar with the basic principles
implemented in the development of the test sequences.

This information is available in the LogicPro users manual and in an


animated form in the LogicPro software.

If the user is familiar with the principles of the distance relay under test and the
LogicPro software, he/she can proceed with the actual testing process.

For testing of multiple logic schemes in a new distance relay, the user should
follow the step-by-step procedure described in Multiple Scheme Test Mode.

To test a specific logic scheme, the steps required are described in Single
Logic Scheme Mode.

Determine the Correct Timer Settings


Logic schemes have different timer settings that significantly affect the test object
performance.

The user has to select the appropriate settings for each logic scheme.
Analyze the Test Results
If the automatic analyses of the Test results indicates that some tests have failed,
the user should check the required wiring, relay operating times, relay settings,
relay logic diagrams, etc., to determine the reasons for the specific test failure.

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OMICRON LogicPro

GETTING RESULTS IN ANIMATION MODE


When the test technician or engineer wants to become familiar with the principles
of logic schemes included in the LogicPro software, he can use the software in the
Animation Mode. The Loss-of-Potential (Voltage Transformer Supervision)
Scheme is of specific interest.
The Hardware Requirements for this test and the objectives of each test executed
by the software are also necessary to be checked.
To achieve this task, the following steps should be performed:

Start Animation Mode

1. Start the LogicPro software by double clicking on the icon.


2. The splash screen will appear while the software is loading ( Figure 1-1,
page -25 ).

30

Getting Results in Animation Mode

Figure 1-1:

LogicPro software splash screen

3. The Main Selection window ( Figure 1-2, page -26 ) opens.


The Main Selection window is the primary tool of the graphical user interface for
navigation through the software and for selection of the mode of operation.It
changes dynamically depending on the user's actions.
In this case it will be used to select the Loss-of-Potential (Voltage Transformer
Supervision) scheme and review the Principles of Operation, Hardware
Requirements and Test Objectives.

31

OMICRON LogicPro

Figure 1-2:

Main Selection window

At this stage it is not required to have a CMC test device connected to the
computer for the software to run.

II

Select Logic Scheme

1. Click on the label Loss-of-Potential- (Voltage Transformer Supervision).


2. This will automatically open the Loss-of-Potential (Voltage Transformer
Supervision) scheme control window. ( See Figure 2-1, page - 27 )

32

Getting Results in Animation Mode

Figure 2-1:

Loss-of-Potential (Voltage Transformer Supervision) scheme control


window.

The individual scheme control window has multiple control buttons that can be
enabled or disabled depending on the actions of the user. Some of the control
buttons used for the graphical user interface can also be visible or invisible at
different times. This reduces the chances for an inappropriate action by the
LogicPro software user.

To explore the principles of the LOP - Loss-of-Potential (Voltage


Transformer Supervision):
3. Click on the Loss-of-Potential (Voltage Transformer Supervision) Logic
Scheme control button to enable the Animation Mode of the scheme control
window.
This action dynamically changes the scheme control window: ( See Figure 2-2,
page - 28 )

33

OMICRON LogicPro

Figure 2-2:

Loss-of-Potential (Voltage Transformer Supervision) scheme simplified


logic diagram

4. The simplified logic diagram of a Loss-of-Potential (Voltage Transformer


Supervision) communication aided scheme is displayed.
5. Three new control buttons appear in the window:

1 Ph Failure
Single Ph Fault
1 Ph Failure with Fault
6. On the bottom of the window a LEGEND with the symbols used in the graphics
and animation is displayed ( See Figure 2-3, page - 29 ).

34

Getting Results in Animation Mode

Figure 2-3:

Animation control and legend

7. The abbreviations used in the simplified logic diagram are:

IOC

- Instantaneous Overcurrent

V0 or V2 - Zero Sequence or Negative Sequence voltage


I0 or I2

- Zero Sequence or Negatiive Sequence current

III Set Animation Speed

Note:
It is recommended
for users that do not have
experience in power system
or transmission line
protection, to start by
selecting the Slow speed
option.

The animation speed is controlled by an additional control object in the scheme


control window. The default setting is Medium, which will be reset every time the
form window has been unloaded. Once the Speed is changed it will remain the
same for the next animation presentation.

Figure 3-1:

Animation speed control frame

The frame with the animation speed options will be enabled and it's label will turn
red when the animation mode is selected.
It includes three option buttons. Select a slow, medium or fast speed depending
on your knowledge of the specific scheme displayed.

35

OMICRON LogicPro

IV Start Animation

1. Click on one of the available animation control buttons bellow the label saying
Click bellow to start Animations .
For example, to watch the test sequence and relay operation for a single phase
voltage circuit failure, click on the Single Ph. Failure.

During the animation each of the relay elements that are involved in the scheme
logic is displayed with a different color depending on it's status.
When an element picks-up, it's color will change from black to red, and when it
drops-out, the color will change back from red to black.
2. At the start of animation, a few additional changes occur:

A new Pause control button appears in the animation control frame (See
bottom of ( Figure 2-3, page -29 ). It allows the user at any moment to stop
the animation at the current state, so the current status of the simulation
and relay performance can be reviewed in detail. It changes to Continue
when clicked. If you want to proceed with the animation, click on Continue.

The status bar will display the name of the chosen fault scenario (See
bottom of ( Figure 4-1, page -30 ) and ( Figure 2-3, page -29 )

A progress bar ( Figure 2-3, page -29 ) will appear, showing the progress
of the animation

The Animated logic scheme Status Legend - 1.1 ( Figure 4-2, page -31 ),
will appear

The Animated logic scheme Status Legend - 1.2 ( Figure 4-3, page -31 ),
explains different stages of the process

Figure 4-1:

Animated logic scheme operation Legend - (detail)

The Animated logic scheme Status Legend ( See Figure 4-2, page - 31 ) and (
Figure 4-3, page -31 ), which changes in accordance with the animation, shows
the details at any moment of the process.
The Name of the state ( Figure 4-2, page -31 ) - the Pre-Fault condition is shown
in red, while the State number (State 1) and the State Time is displayed in white
when it is a non-fault state or in red, when it is a fault state ( Figure 4-3, page -31 )

36

Getting Results in Animation Mode

The Legend has three parts, each one showing:

The number of the State (sub processes) of the main process


A descriptive name of each State of the main process
Time of start of each State since the fault inception in ms. Pre-fault time in
this case is a negative number

Figure 4-2:

Animated logic scheme Status Legend - 1.1

Figure 4-3:

Animated Status Legend - 1.2 (in different moment of the process)

3. A second timer to the right of the progress bar displays the current simulation
time since the fault inception ( See Figure 4-4, page - 31 )

Figure 4-4:

Animated simulation timer

4. To stop the animation at any time, click on Clear.


5. To return to the Main Selection window, click on Main.

V View Test Objective

1. To view the objective of the test included in the LogicPro software, click on the
Test Objective command button.

2. The communication scheme control window will change as shown on ( Figure


5-1, page -32 ).

37

OMICRON LogicPro

Figure 5-1:

Test objectives for a Loss-of-Potential scheme

3. In this case, there are two definition blocks:

The first one displays the general objective of the tests


The second one displays what tests are performed and the expected relay
behavior

VI View Hardware Requirements

1. To view the Hardware Requirement click on the Hardware Requirements


command button.
2. The logic scheme control window will change as shown on ( Figure 6-1,
page -33 )

the required analog signals


the required binary signals
the wiring between the test device and the test object
the need for an external DC source

38

Getting Results in Animation Mode

Figure 6-1:

Hardware Requirements for Loss-of-Potential (Voltage Transformer


Supervision) scheme tests

VII Print Options

There are several options to print the information related to the communication
scheme under consideration.

To Print:
1. Click on the Print option in the Menu bar on top of the Scheme Control window
2. Select the information to be printed
3. The Print dialog box will appear, allowing the user to specify a printer, if
necessary.

The following options for printing ( See Figure 7-1, page - 34 ) are available:
1. the Scheme Logic as displayed during the animation
2. the Test Objective
3. the Hardware Requirements for the selected scheme
4. the complete Scheme Documentation (all options offered above) for the
selected scheme

39

OMICRON LogicPro

Figure 7-1:

Loss-of-Potential (Voltage Transformer Supervision) - Print Options menu

VIII Return to the Main Selection window

To return to the Main Selection window, click on the Main button.

40

Getting Results in Multiple Test Mode

GETTING RESULTS

IN

MULTIPLE TEST MODE

The goal of the test is usually a benchmark test of the logic schemes of a new to the utility
distance relay.

To perform such a test, the user should follow the step-by-step procedure
described below.

Set the Distance Relay

Enter the required settings described in section Preparing the Test.

Note: It is recommended to set all available setting groups with different logic schemes,
especially the mode of tripping-Single or Three Pole, and then during the test to switch
between the setting groups as required by the test selected.
Check the required time settings for each scheme in the protection users manual.

II Prepare the Hardware

1. Wire the Test Object (distance relay), DC power supply (if necessary) and the
Test Device (CMC x56) according to the diagrams shown in Hardware
Requirements for each of the individual schemes.

All logic schemes with Three Pole tripping mode can be tested without the
need for changes in the wiring between the Test Device and the Test
Object.

If Single Pole tripping is selected, a change in the wiring is required for the
last three tests.
2. Connect the parallel cable between the Test Device and the Test Computer
with LogicPro installed.

Note: Check if the relay uses 52a or 52b breaker status contacts. LogicPro simulates
52a breaker status.

If 52b is used it should be


wired only while executing
the Echo Logic tests.

41

OMICRON LogicPro

III Start Logic Pro

1. Start the LogicPro software by double clicking on the icon.


2. The splash screen will appear while the software is loading ( See Figure 1-1,
page - 25 )
3. The Main Selection window ( Figure 1-2, page -26 ) opens.
The Main Selection window is the primary tool of the graphical user interface for
navigation through the software and for selection of the mode of operation.It
changes dynamically depending on the user's actions.

IV Change Test Settings (optional)

The analysis of the distance relay performance during the test is based on the
expected operating times, of tested relay elements under different fault conditions.
The software is loaded using some default settings. However, if the user needs to
change them based on the technical specifications of the distance relay under test,
the default setting can be changed using the following steps:

To change the Default Time Settings:


1. Click on the Settings menu in the Menu bar on top of the Main Selection
window.
2. Click on Time Test Settings... ( See Figure 4-1, page - 37 )
3. Review and change if necessary the operating times in the Change Settings
window displayed in ( Figure 4-2, page -37 )
4. To apply the New Settings - press the Apply button.
5. To return the Default Settings - press the Default button.
6. To Cancel and Exit the window with the restored Default settings - Press the
Cancel button.
7. To Exit the window with the entered Settings - Press the OK button.

42

Note: The default times for Zone1 (50 ms) and Zone2 (250 ms) faults, include a margin of
50 ms, i.e. Zone1 is set as instantaneous, while Zone2 is set with time delay of 200 ms.

Getting Results in Multiple Test Mode

Figure 4-1:

Figure 4-2:

Settings - Menu options

Change Time Test Settings.... window

To change the Default Line Impedance Settings:


1. Click on the Settings menu in the Menu bar on top of the Main Selection
window.
2. Click on Line Impedance... ( See Figure 4-1, page - 37 )

43

OMICRON LogicPro

Figure 4-3:

Line Impedance Settings - SECONDARY

3. Review and change the settings in the Change Settings window accordingly.

to review or edit the Secondary Settings - Leave the SECONDARY


option checked ( See Figure 4-3, page - 38 )

to review or edit the Primary Settings - Select the PRIMARY option ( See
Figure 4-4, page - 39 )

to review CT Ratio and PT Ratio Settings - Select the PRIMARY option.


The window will display CT Ratio and PT Ratio options (grayed out). ( See
Figure 4-4, page - 39 )

to edit CT Ratio and PT Ratio Settings - Select Nominal Values and then
select the PRIMARY option. The window will display CT Ratio and PT Ratio
options. ( See Figure 4-6, page - 41 )

To change the Zone 1 fault location (should be less than 100%) - enter
the new number in the Fault Location field, as a percentage of the line
impedance. This option is available both in Secondary and Primary.
4. To apply the New Setting - press the Apply button.
5. To return the Default Setting - press the Default button.
6. To Cancel and Exit the window with restored Default Settings - Press the
Cancel button.
7. To Exit the window with the new entered Settings - Press the OK button.

44

Getting Results in Multiple Test Mode

The Line impedance Settings window ( Figure 4-3, page -38 ) displays the
Secondary settings as Default.

Figure 4-4:

Line Impedance Settings window - PRIMARY Settings

If PRIMARY Settings are displayed - the Secondary Settings will be disabled and
grayed out.
Changes in the Primary Impedance are automatically reflected in the Secondary
Impedance. When the Apply button is pressed - the program will apply the settings
and automatically will recalculate the SECONDARY Settings and display the
changes based on modification in the CT or PT ratio.

Note:
Based on Secondary Line Impedance, the software automatically calculates the
fault voltages and currents to be applied for Zone 1 and Zone 2 faults, when the user clicks
on Apply or OK buttons.

45

OMICRON LogicPro

To change the Default Nominal Values (Voltage or Frequency) Settings:


1. Click on the Settings menu in the Menu bar on top of the Main Selection
window.
2. Click on Nominal Values... ( See Figure 4-1, page - 37 )
3. Review and change if necessary the settings in the settings window
accordingly.

to change the frequency, click on one of the two option buttons.


to change the voltage, chose between Ph-N or Ph-Ph.
to review or edit the Secondary Settings - Leave the SECONDARY option
checked ( See Figure 4-5, page - 40 )

Figure 4-5:

Nominal Values (Voltage/Frequency) Secondary Settings window

to review or edit the Primary Settings - Select the PRIMARY option ( See
Figure 4-6, page - 41 )

to review or edit CT Ratio and PT Ratio Settings - Select the PRIMARY


option. The window will display CT Ratio and PT Ratio options. The
changes made here will be displayed grayed out in the Line Impedance
Primary Settings window. ( See Figure 4-4, page - 39 )

46

Getting Results in Multiple Test Mode

4. To apply the New Setting - press the Apply button.


5. To return the Default Setting - press the Default button.
6. To Cancel and Exit the window with restored Default Settings - Press the
Cancel button.
7. To Exit the window with the new entered Settings - Press the OK button.

Note: The user has an option to select to enter the voltage values as Phase-to-Neutral
(default) or Phase-to-Phase.
Note: The default frequency setting is 60 Hz. When the user decides to change it for the
first time, the software will ask, whether to leave it as a new default.

Figure 4-6:

Nominal Values (Voltage/Frequency) Primary Settings window

If PRIMARY Settings are displayed - the Secondary Settings will be disabled and
grayed out.
Changes in the Primary Currents and Voltages are automatically reflected in the
Secondary. When the Apply button is pressed - the program will apply the settings
and automatically will recalculate the SECONDARY Impedance Settings and
display the changes based on modification in the CT or PT ratio.

47

OMICRON LogicPro

The Nominal Values Settings window ( See Figure 4-5, page - 40 ) displays the
Secondary Settings for the currents and voltages as default.

To change the Default Breaker status Settings:


1. Click on the Settings menu in the Menu bar on top of the Main Selection
window.
2. Click on Breaker / VT... ( See Figure 4-1, page - 37 )
3. Review and change if necessary the settings in the settings window
accordingly. ( See Figure 4-7, page - 42 )

Figure 4-7:

Breaker/VT Settings

The 3 Pole Trip/Close option is a default, and causes the following modifications
in the Main selection window ( Figure 1-2, page -26 ):

To enable them: Select Single Pole Trip/Close option in the settings window (
Figure 4-7, page -42 ) instead of the default 3 Pole Trip/Close option.

the names of the last 3 logic schemes are displayed in red color
the Check Box controls in front of those schemes are disabled

48

Getting Results in Multiple Test Mode

To check the Faults Calculations:


1. Click on View in the menu in the Main Selection window.

Figure 4-8:

View Menu in Main Selection window

2. Then click on View Faults Calculations ( See Figure 4-8, page - 43 ).


The Faults Currents and Voltages window opens. The calculations are grayed out,
which shows that they can not be modified from here. The calculated Fault
Currents and Voltages for Zone 1 Fault (Single Phase Faults and 3 Phase Faults),
appears at the top of the window.( See Figure 4-9, page - 43 )

Figure 4-9:

Faults Currents and Voltages window - top

The calculated Fault Currents and Voltages for Zone 2 faults (Single Phase Faults
and 3 Phase Faults), appear at the bottom of the window ( See Figure 4-10,
page - 44 ). The Vnom, Line Impedance and Source Impedance used for the
calculations, are also displayed.

49

OMICRON LogicPro

The Settings are directly accessible from here, and when clicked, the Settings
options window will appear on the top of the current window.
The changes made in the settings will be automatically reflected in the calculations
of the Fault Currents and Voltages.

Figure 4-10: Faults Currents and Voltages window - bottom

V Scheme Selection

To select individual schemes to be automatically tested


1. in the Multiple Test Mode, in the Main Selection window ( Figure 5-1,
page -45 ) click on the Check Box controls next to the name of the available
schemes.
Before a selection is made, the Start Test command button is disabled

50

Getting Results in Multiple Test Mode

Figure 5-1:

Main Selection window

Note: The names of the last three schemes are in red color and the Check
Box controls in front of them are disabled when 3 Pole Trip is selected.

To enable them:

Click on Settings in the Menu.


Click on Breaker Settings ( See Figure 4-1, page - 37 )
Select Single Pole Trip/Close instead of 3 Pole Trip/Close option, in the
window displayed

Click OK.

51

OMICRON LogicPro

The color of the names of the last three schemes will change to normal and the
Check Box controls in front of them will be enabled.
As soon as the user clicks on any of the Check Boxes, the Main Selection window
changes as shown in ( Figure 5-2, page -46 ).

Figure 5-2:

Main selection window in Multiple Scheme Test Mode

Several changes occur as a result of the selection of at least one


logic scheme:

Based on the selected logic schemes the software displays Test Boxes with
the test cases associated with each selected scheme on the left side of the
schemess Check Boxes. Each individual test case can be un-selected by
its check box. ( See Figure 5-2, page - 46 ).

The Start Test command button is enabled


A Test Details window to display the status of the currently executed test
with a legend underneath, appears on the right side of the Test Selection
frame.

When all tests have been completed, the Test Details window will display
the test summary.

52

Getting Results in Multiple Test Mode

If a mistake is made in the selection process:


1.

Click again on the same Check Box to select or un-select it.

2. Another option is to click on the Clear control button at the bottom of the
window, that will result in displaying the default.

To exit the software at any time, just click on the Exit button.

VI Start Multiple Test

To start the test, click on the Start Test command button.

VII

Turn on the CMC

1. As soon as the Start Test button is clicked, a Message Box ( See Figure 7-1,
page - 47 ) will appear before the beginning of the test asking the test engineer
or technician to check if the CMC is on.

If the CMC is on, just click Yes. Otherwise turn on the CMC and then click
Yes, so that the tests may be performed.

The second option is to select No, which will disable the Start Test button
and reset the selected test cases.

Figure 7-1:

CMC On - Off

2. After the CMC is turned On, it is initialized and starts the preprogrammed and
selected tests execution.

53

OMICRON LogicPro

VIII Change Logic Scheme Setting

1. Before the execution of each group of tests associated with a specific logic
scheme, the user is reminded by the software ( Figure 8-1, page -48 ) to
enable the logic scheme setting of the distance transmission line protection
relay to match the expected by the test scheme.

Figure 8-1:

Change communication scheme settings

2. If the scheme has already been enabled or after the change, proceed by
clicking on the OK command button.

IX Tests Execution

1. The running test will display a flashing yellow background. At the same time to
the right of the selected test cases a small screen TEST Status will show a
brief description of each test.

Note: Before the execution of an individual test the background of the Test Box is
white.
2. Immediately after each individual test is completed, the result is analyzed and
the background of the Test Box changes color.

If the relay operated as expected, the test is OK and the background turns
green.

If there is any out of range operation the test fails and the Test Box
background turns red.

54

Getting Results in Multiple Test Mode

After the completion of all tests the results are visible as the background color of
the Test Boxes.
If the Multiple Schemes test is successful, the background of all Test Boxes should
be green.
The Test Details window at the same time displays a message All tests are OK.
If even one test has failed, the Test Details window displays a different message. It
advises the user to check the relay logic, settings, etc., and the test objectives, and
results in the Test report.
3. If necessary, the test engineer can preview the Test report, print it and save it
as a file.
4. After all tests have been executed, the Print Report button in the Main
Selection window is enabled so that the test report can be previewed and/or
printed.
5. When the Print Report button is checked the Data Entry form is displayed as
well.

X Enter General Test Data

1. Before the test results are previewed or printed, the user is asked to fill in the
generic data for the test report.

Some of the entries are required and are supposed to be entered in the
white fields.

The rest of the fields are optional and have gray background, as shown on
( Figure 10-2, page -50 ).

The software will keep the entered information for a specific field, if the
Check Box in front of the field is checked.

As a default all Check Boxes are checked.

Figure 10-1: Global Data Entry form - detail

55

OMICRON LogicPro

Figure 10-2: Global Data Entry form

The software allows the user to save as a file for further use, the most
frequently used information, (as shown in the detail ( Figure 10-1,
page -49 )
2. When the Close button is pushed a message will appear, warning that the
entered data related to the completed tests will be lost.

XI Review Detailed Test Results

The measured operating times, the monitored protection functions for each
individual test are stored in the memory of the computer and are available in the
test report.
1. To preview these detailed test results, click on the Preview Report command
button in the Data Entry form.
2. As a result, the Test Report window shown in ( Figure 11-1, page -51 ) and (
Figure 11-2, page -51 ) is displayed. You can scroll through the report as
necessary.

56

Getting Results in Multiple Test Mode

Figure 11-1:

Preview General Data in the Test Report window

Figure 11-2: Preview report results in the Test Report window

57

OMICRON LogicPro

XII Save Tests Results

1. Click on Save As File button in the Data Entry window ( See Figure 10-2,
page - 50 )
2. The Save As window will open allowing the user to choose directory and file
format.
3. Unless changed, the File will be saved as Rich Text Format.

XIII Print Test Results

To print the results from the Multiple Test, click the Print Report command button
in the Data Entry form ( Figure 10-2, page -50 ). The Print dialog box is displayed,
allowing the user to specify a printer, if necessary.

XIV End Test

To end the Multiple Test procedure:


1. Click on Close. This will take you back to the Main Selection window.
2. Click on Exit in the Main Selection window

XV Help

OMICRON Logic Pro software offers brief on-line explanations for the major tasks
to be performed. The Help Topics are accessible only through the Menu in the
Main Selection window. To see the different topics, click on Logic Pro Help
Topics... ( See Figure 15-1, page - 53 )

58

Getting Results in Multiple Test Mode

Figure 15-1:

Help Options under the Menu in the Main Selection window

The help window opens with brief overview of the software, displayed in the front
page. ( See Figure 15-2, page - 53 ).

Figure 15-2: LogicPro Help window displayed

59

OMICRON LogicPro

To view the available Help Topics, click on HelpTopics in the menu of the Help
window. ( See Figure 15-3, page - 54 )

Figure 15-3: LogicPro Help Topics

The full topic, or a selection of the content of the topic, can be printed from that
window as well. Some of the Settings provide additional topics with in detail
instructions as follows.
The Animation Mode offers:

Overview
Animation Scheme
Animation Controls
Animation Speed
The Test Mode offers:

Overview
Fault Currents/Voltages
Select Test Cases
Start Selected Tests
The Settings offer:

Breaker/VT
Time Test Settings
Line Impedance Settings
Nominal Values Settings

60

Getting Results in Multiple Test Mode

The Printing Options offer:

Overview
Data Entry
Print Preview
Print Test Results
When a specific topic is selected and displayed, its name is shown on the top of
the Help window and appears disabled in the HelpTopics menu. ( See Figure
15-4, page - 55 ).

Figure 15-4: Help Topics -detail

61

OMICRON LogicPro

GETTING RESULTS IN SCHEME TEST


MODE

The goal is to test a single communication aided scheme of a distance relay.

To perform such a test, the user should follow the step-by-step procedure
described below.
To achieve this task, the following steps should be performed:
.

Set the Distance Relay

Enter the required settings described in section Preparing the Test

II Prepare the Hardware

1. Wire the Test Object (distance relay), DC power supply (if necessary) and the
Test Device (CMC x56) according to the diagrams shown in Hardware
Requirements for the communication aided scheme to be tested.
2. Connect the parallel cable between the Test Device and the Test Computer
with LogicPro installed.

62

Note: Check if the relay uses 52a or 52b breaker status contacts. LogicPro simulates
52a breaker status only.

Since a single scheme is tested, use the Hardware Requirements for the selected
scheme.

Getting Results in Scheme Test Mode

III Start Logic Pro

1. Start the LogicPro software by double clicking on the icon.


2. The splash screen will appear while the software is loading ( See Figure 1-1,
page - 25 )
3. The Main Selection window ( Figure 5-1, page -45 ) opens.
The Main Selection window is the primary tool of the graphical user interface for
navigation through the software and for selection of the mode of operation.It
changes dynamically depending on the user's actions.

IV Change Test Settings (optional)

The analysis of the distance relay performance during the Single Scheme test is
based on the expected operating times under different fault conditions.
The software is loaded using some default settings. However, if the user needs to
change them based on the technical specifications of the distance relay under test,
the default setting can be changed using the steps described in the Multiple
schemes test chapter ( See Figure 4-2, page - 37 )
( See also Change Time Test Settings.... window , page -37 )
(See also Line Impedance Settings - SECONDARY, page -38.)
( See also Line Impedance Settings window - PRIMARY Settings , page -39 )
( See also Nominal Values (Voltage/Frequency) Secondary Settings window ,
page -40 )
( See also Nominal Values (Voltage/Frequency) Primary Settings window ,
page -41 )
( See also Breaker/VT Settings , page -42 )

63

OMICRON LogicPro

V Scheme Selection

1. To select individual schemes to be automatically tested in the Scheme Test


Mode, in the Main Selection window ( Figure 5-1, page -58 ) click on the
scheme name to select one of the available schemes.

Figure 5-1:

Main Selection window

2. Before a selection is made, the Start Test command button remains disabled.
3. As soon as you click on one of the Scheme Name Box, the Individual Scheme
Control Window will open as shown in ( Figure 5-2, page -59 ).

64

Getting Results in Scheme Test Mode

Figure 5-2:

Loss-of-Potential (Voltage Transformer Supervision) scheme individual


control window.

4. If you want to return to the Main Selection window at any time, just click on the
Main button.
.

VI Start Scheme Test

LogicPro allows the user to select from the available tests before starting the tests
execution.Click on Select Test Case in the Test Options frame to Start Test
Procedures.

65

OMICRON LogicPro

Several changes occur in the Scheme Control Window as a result


of the Select Test Case action:
1. Based on the selected communication scheme the software displays several
Test Boxes with the test cases associated with the selected scheme, on the
left side of the graphical display window in a Test Options frame. Each
individual test case can be unselected by its own check box. ( See Figure 6-2,
page - 60 ).
2. The hardware requirements are displayed in the graphical window
3. A Test Status window with a legend underneath, appears on the right side of
the graphical window.
4. The Select Test Case command button is disabled
5. A Start Test command button appears
6. The Fault Currents and Voltages for the first selected test case are displayed
on the top of the window ( See Figure 6-1, page - 60 )

66

Figure 6-1:

Faults Currents and Voltages for the first selected test case

Figure 6-2:

Scheme Mode Control Window before test execution

Getting Results in Scheme Test Mode

To continue with the tests execution, in the Test Options frame:

If necessary, unselect a test case to prevent its execution (all Test Cases are
selected as default).

Click on Start Test button to Start Selected Tests.

VII

Turn on the CMC

Click on Start Test button to Start Selected Tests.


1. As soon as the Start Test button is clicked, a Message Box ( See Figure 7-1,
page - 61 ) will appear before the beginning of the test asking the test engineer
or technician to turn the CMC On.

If the CMC is on, just click Yes. Otherwise turn on the CMC and then click
Yes, so that the tests may be performed.

The second option is to select No, which will disable the Start Test button
and reset the selected test cases.

Figure 7-1:

CMC On - Off

2. The CMC is initialized and starts the preprogrammed tests execution.

67

OMICRON LogicPro

VIII Change Communication Scheme Setting

1. Before the execution of the selected test cases associated with the selected
logic scheme, the user is reminded by the software ( Figure 8-1, page -62 ) to
enable the logic scheme, of the distance transmission line protection relay to
match the expected by the test scheme.

Figure 8-1:

Change communication scheme settings

2. After the change of the scheme setting, proceed by clicking on the OK


command button.

IX Tests Execution

1. The running test will display a flashing yellow background.

Note: Before the execution of an individual test the background of the Test
Box is white.

2. Immediately after each individual test is completed, the result is analyzed and
the background of the Test Box changes color.

If the relay operated as expected, the test is OK and the background turns
green.

If there is any out of range operation the test fails and the Test Box
background turns red.

68

Getting Results in Scheme Test Mode

After the completion of all tests the results are visible as the background color of
the Test Boxes. If the scheme test is successful, the background of all Test Boxes
should be green.
The Test Details window at the same time displays a message All test are OK.
If even one test has failed, the Test Details window displays a different message. It
advises the user to check the relay logic, settings, etc., and the test objectives, and
results in the Test report.
3. If necessary, the test engineer can preview the Test report, print it and save it
as a file.
4. After all tests have been executed, the Print Report button in the Main
Selection window is enabled so that the test report can be previewed and/or
printed,
5. When the Print Report button is pushed the General Data Entry form is
displayed as well.

X Enter General Test Data

1. Before the test results are previewed or printed, the user is asked to fill in the
generic data for the test report.

Some of the entries are required and are supposed to be entered in the
white fields.

The rest of the fields are optional and have gray background as shown on (
Figure 10-1, page -64 ).

The software will keep the entered information for a specific field, if the
Check Box in front of the field is checked.

As a default all Check Boxes are checked.

69

OMICRON LogicPro

Figure 10-1:

Global Data Entry form

2. If the Close button is pushed a message will appear, warning that the entered
data related to the completed tests will be lost.

The most frequently used data can be saved for future use, by clicking the Save
General Report Data in the Data Entry form.( See Figure 10-1, page - 49 )

XI Review Detailed Test Results

The measured operating times of each individual test are stored in the memory of
the computer and are available in the test report.
1. To preview these detailed test results, click on the Preview Report command
button in the Data Entry form.
2. As a result, the Data Entry window shown in ( Figure 11-1, page -65 ) and (
Figure 11-2, page -65 ) is displayed. You can scroll through the report as
necessary.

70

Getting Results in Scheme Test Mode

Figure 11-1:

Preview General Data in Test Report window

Figure 11-2:

Preview test results in the Test Report window

71

OMICRON LogicPro

XII Save Tests Results

1. Click on Save As File button in the Data Entry window ( See also Global Data
Entry form , page -64 )
2. The Save As window will open allowing the user to chose directory and file
format.
3. Unless changed the File will be saved as Rich Text Format.

XIII Print Test Results

To print the results from the test, click the Print Report command button in the
Data Entry form on ( Figure 10-1, page -64 ). The print dialog box is displayed,
allowing the user to specify a printer, if necessary.

XIV End Test

To end the Scheme Test procedure:


1. Click on Close. This will take you back to the Scheme Mode Control window
2. Click on the Main button in the Scheme Mode Control window. This will take
you back to the Main Selection window
3. Click on Exit in the Main Selection window

XV Help

OMICRON LogicPro software offers brief on-line explanations for the major tasks
to be performed. The Help Topics are accessible only through the Menu in the
Main Selection window.

72

Getting Results in Scheme Test Mode

Figure 15-1: Help Options under the Menu in the Main Selection window

To open the Help window with the available help topics, click on Logic Pro Help
Topics.... ( See Figure 15-1, page - 67 ).
To check the different Help Topics, click on HelpTopics in the menu of the help
window.( See Figure 15-2, page - 67 ).

Figure 15-2: LogicPro Help Topics

The full topic, or a selection of the content of the topic, can be printed from that
window as well.

73

OMICRON LogicPro

74

Switch-Onto-Fault

SWITCH-ONTO-FAULT
Objective

The objective is to perform dynamic test to evaluate the Switch-Onto-Fault


(SOTF) scheme of a distance relay, as a function of the fault location, type of fault,
and breaker status conditions.
The Test Object is a multifunctional distance relay with SOTF scheme at one end
of the line. The single phase or three phase breaker status signals are generated
by the CMC.

SOTF logic description


(SOTF - Switch-On-To-Fault Logic)
Switch-On-To-Fault Logic in distance relays is required under different fault
conditions while closing the breaker with a permanent fault on the protected line.
The fault can be a result of natural events or human errors (a very typical one is
when the grounding switches have been left closed after the line or breaker
maintenance has been completed.
The location of the voltage transformers is very important, since it will affect the
behavior of the distance relay. When a fault occurs during normal operation of the
line, the voltage drops as a function of the type of fault and the fault location.
For close in faults, the voltage in the faulted phase will be close to zero, that will
make more difficult the operation of the distance element. A cross-polarized
distance relay will use the voltages in the healthy phases for polarizing.
The worst case is a close-in three phase fault that will result in voltage levels close
to zero in all three phases. Cross polarizing does not help under these conditions.
Simple distance relays will have difficulty operating under these conditions. That is
why memory polarized relays were invented. In microprocessor relays they will
store several cycles of voltage samples that will be used for polarizing in the case
when the fault voltages are close to zero.
The situation is quite different when switching-on-to-a fault. This is when the
location of the voltage transformers becomes very important. On transmission
lines the voltage transformers are in many cases located on the line. When the line
is opened from both ends, there will be no voltage measured by the distance relay,
that means that if the breaker is closed with the grounding switches on, there are
no voltage samples stored in the relay memory, and the memory polarized
distance elements will not operate.
This problem is solved by the Switch-On-To-Fault Logic. It is provided in order to
ensure high speed fault clearing immediately following line energization. It is
enabled for a short period of time after the breaker closing. The breaker has to be
open for a relay specific or user defined time before the SOTF logic is turned on.
This is detected typically by monitoring of the breaker auxiliary contacts. If the

75

OMICRON LogicPro

voltage transformers are located on the line side of the breakers, the absence of
voltage in all three phases can be used to detect the line open condition. At the
same time all three phase currents shall be below the level defined by a low
undercurrent setting.
The Switch-On-To-Fault Logic enables the operation typically of non-directional
overcurrent elements. However, many modern microprocessor based relays allow
the user to define which protection functions will be operational during the time that
the Switch-On-To-Fault logic is enabled.
A similar logic is used during the reclosing cycle of a distance relay when the relay
is connected to line-side voltage transformers. This logic is called Trip-On-Reclose
and follows the same ideas as in the SOTF logic.
Since the SOTF logic always operates for a permanent fault condition, it will trip
three phase regardless of the type of fault.
A transmission line can be energized from each end. The grounding switches can
be closed at the remote end of the line when the breaker is closed at the local end.
In this case the line should be trip instantaneously, without any time delay, other
than the operating time of the protection elements enabled by the SOTF logic.
Simplified diagram of the Switch-On-To-Fault logic is shown in ( Figure 0-1,
page -70 ).

0
0
0

tpu

Trip

Manual Close
Breaker Open
Z
IOC
Fault Detect

Figure 0-1:

76

Simplified SOTF logic diagram

Switch-Onto-Fault

Fault locations
Faults are simulated at 2 locations along the model transmission line:

The fault locations are shown on ( Figure 0-2, page -71 )

VA VB VC
R

50%

IA

100%

VA VB VC
2

IB

IC

Relay

Substation 2

Substation 1
Figure 0-2:

Fault location for the testing of the SOTF logic

1. Zone 1 single-phase-to-ground fault and three-phase-to-ground fault at 50% of


the line length
2. Zone 2 three-phase-to-ground fault at 100% of the line length

Test Cases
The Switch-Onto-Fault (SOTF) scheme is tested for the following fault conditions:
1. For Zone 1 single-phase-to-ground fault: - the relay should trip three phase
without time delay. Switch-On-To-Fault alarm should be detected if available in
the relay under test.
2. For Zone1 three-phase fault: - the relay should trip three phase without time
delay. Switch-On-To-Fault alarm should be detected if available in the relay
under test.
3. For Zone2 three-phase fault: - the relay should trip three phase without time
delay. Switch-On-To-Fault alarm should be detected if available in the relay
under test.

77

OMICRON LogicPro

Hardware requirements
IA
CMC

Analog
Outputs

IA

IB

IB

IC

IC

IN

Digital
Outputs

Out 2
Out 3

Digital
Inputs

Figure 0-3:

Analog
Inputs

IN

VA
VB
VC
VN
Out 1

RELAY

VA
VB
VC
VN
+ DC

- DC

52aA

+ DC

- DC

52aB

+ DC

- DC

52aC

In 1

Trip A

In 2

Trip B

In 3

Trip C

In 4

3Ph Trip

Digital
Inputs

Relay
Outputs

Hardware wiring diagram for testing of the SOTF logic.

Note: If the relay uses a


52b breaker status contact,
it should not be wired.

The CMC test device is programmed to simulate the substation and power system
environment through the analog and binary outputs. At the same time the binary
inputs are used to monitor the operation of the test object.

A typical wiring diagram for the SOTF logic test is shown ( Figure 0-3, page -72 )

78

Automatic test sequence


The automatic test sequence will have several steps shown with animation in the
LogicPro software. Only the steps related to the relay at the local end are
executed.

Switch-Onto-Fault

Test object settings


The expected basic settings of the multifunctional relay under test associated with
the SOTF logic are given in the common section at the beginning of this document.

The only setting that has to be changed for this group of test cases is the enabling
of the SOTF logic.
Three relay inputs have to be programmed as single phase normally open (52a)
breaker status monitoring inputs.
Three relay outputs should be programmed to trip phase A, B and C accordingly.
Single Pole Tripping should be enabled. The Phase A Trip and SOTF or 3Phase
Trip signals are monitored by the CMC.

Since there are specific details in the implementation of SOTF logic in


different distance relays, they have to be considered during the preparation
for the testing based on the recommended settings in the users manual for
the test object

79

OMICRON LogicPro

REMOTE-END-OPENED
Objective
The objective is to perform dynamic test to evaluate the Remote End Opened
(REO) scheme of a distance relay, as a function of the fault location, type of fault,
and healthy phase current conditions.
The Test Object is a multifunctional distance relay with REO scheme at one end of
the line.

REO logic description


(REO - Remote-End-Opened)
High speed tripping of faults located anywhere on a transmission line is a
requirement that results in improved system stability and reduced effect of the fault
on different utility customers. However, the most widely used distance protection
relays use a step distance scheme that usually ensures high speed fault clearing
only for faults inside of Zone 1 of the protection, i.e. up to 85 - 90% of the line
length. Faults outside of Zone 1 are cleared from one end of the line with a time
delay.
Communication based permissive and blocking scheme are used in order to
overcome this deficiency of the distance type relays. Since they are based on the
exchange of signals between the relays at the ends of the line, they require the
installation and maintenance of communication channels. If the communication
channel fails or the signal transmission is affected by the fault, the accelerated
fault clearing will not be achieved.
A solution to this problem is the Remote-End-Opened logic in modern
microprocessor based distance relays. This logic is designed to detect the opening
of the remote end breaker after the relay there has detected a fault in Zone 1.
Since under normal system conditions there will be a three phase load current
flowing through the line, the trip of the remote end breaker will be detected by the
load current in the healthy phases going to zero.
The Remote-End-Opened accelerated trip logic is shown in ( Fig. 0-4, page - 75).
Since the logic is based on detection of no current in a healthy phase, this logic
provides fast fault clearance for all types of faults, except three phase faults (in this
case opening of the remote end will not result in current of any phase going to
zero).
The main advantage of this logic scheme is that it does not require a
communications channel. In some relays this logic can be continuously enabled or
enabled only when the communication channel has failed.
Any fault located within the reach of Zone 1 at the remote end will result in fast
tripping of that circuit breaker. For a Zone 2 fault with a source at the remote end,
the remote breaker will be tripped in Zone 1 time by the remote relay and the local

80

Remote-End-Opened

relay can recognize this by detecting the loss of load current in the healthy phases.
This, combined with operation of the Zone 2 element at the local end will result in
the tripping of the local circuit breaker.
In order for the logic to function in the case of single-phase-to-ground,
phase-to-phase or two-phase-to-ground faults, the logic must detect the
availability of three phase load current prior to the fault.
The loss of load current opens a window during which time a trip will occur if a
Zone 2 element operates.
The accelerated trip is delayed by a certain time (about one cycle) in order to
prevent initiation of a loss of load trip due to circuit breaker pole discrepancy
occurring for clearance of an external fault. The local fault clearance time is
determined by the maximum Zone 1 trip time, the breakers trip time and the load
current level detector reset time, as well as the Remote-End-Opened logic time
delay

Note that loss of load tripping is only available where 3 pole tripping is
used.

Simplified logic for the Remote-End-Opened scheme is shown in ( Figure 0-4,


page -75 ).

Substation A

Substation B

Ia
Ib
Ic
Trip
3 Ph Load
Current

tpu
tdo

Zone 2

Figure 0-4:

Trip

Zone 1

Simplified diagram for the Remote-End-Opened logic

81

OMICRON LogicPro

Fault locations
Faults are simulated at two location on the substation bus:
1. Internal single-phase-to-ground fault - at 50%
2. External Zone 2 single-phase-to-ground fault
3.

Internal Zone 2 single-phase-to-ground fault

VA VB VC
R

50%

IA

IB

IC

100%

VA VB VC
2

100%
Ext

Relay

Substation 2

Substation 1
Figure 0-5:

Fault locations for testing of the Remote-End-Opened logic

The three fault locations are shown on ( Figure 0-5, page -76 ).

Test Cases
The Remote-End-Opened (REO) scheme is tested for the following fault
conditions:
1. For Zone 1 single-phase-to-ground fault: - the relay should trip with Zone 1
2. For External single-phase-to-ground Zone 2 fault: - the relay should not trip
3. For Internal single-phase-to-ground Zone 2 fault: - the relay should trip with
REO time
4. For External single-phase-to-ground Zone 2 fault with zero current in a healthy
phase: - the relay should not trip

Hardware Requirements
The CMC test device is programmed to simulate the substation and power system
environment through the analog and binary outputs. At the same time the binary
inputs are used to monitor the operation of the test object.
A typical wiring diagram for the Remote-End-Opened logic test is shown in:
( Figure 0-6, page -77 ).

82

Remote-End-Opened

The CMC simulates the status of the normally open auxiliary contacts of the
breaker, and the currents and voltages during the pre-fault, fault and post-fault
stages of the simulation.
The potential free relay output of the CMC has one terminal connected to (+) DC
and the second terminal to the (+) DC terminal of the associated relay input. The
second terminal of the relay input is connected to (-) DC.
The Trip output of the relay is wired to the Trip sense input of the CMC and is used
to change from fault to post-fault state, as well as to measure the operating time
and together with the monitored Remote-End-Opened output evaluate the correct
phase selection and operation of the Remote-End-Opened logic during the
different fault tests.

IA
CMC

Analog
Outputs

IA

IB

IB

IC

IC

IN

Digital
Inputs

Figure 0-6:

Analog
Inputs

IN

VA
VB
VC
VN
Digital
Outputs

RELAY

VA
VB
VC
VN
52a

Digital
Inputs

In 1

Trip

Relay
Outputs

In 2

REO

Out 1

+ DC

- DC

Hardware wiring for testing of the Remote-End-Opened logic

Automatic test sequence


The automatic test sequence will have several steps shown with animation in the
LogicPro software. Only the steps related to the relay at the local end are
executed.

83

OMICRON LogicPro

Test object settings


The expected basic settings of the multifunctional relay under test associated with
the Remote-End-Opened logic are given in the common section at the beginning
of this document.
The only setting that has to be changed for this group of test cases is the enabling
of Remote-End-Opened logic and the associated with it manufacturer
recommended settings.
One relay input has to be programmed as a normally open (52a) breaker status
monitoring input.
One relay output is programmed as Trip, while a second one is set to indicate the
operation of the Remote-End-Opened logic
Since this logic operates only for 3 Phase Trip only, Single Pole Trip should be
disabled.

84

Zone 1 Extension

ZONE 1 EXTENSION
Objective
The objective is to perform dynamic test to evaluate the Zone 1 Extension scheme
of a distance relay, as a function of the fault location, type of fault, and healthy
phase current conditions.
The Test Object is a multifunctional distance relay with Zone 1 Extension scheme
at one end of the line.
Breaker Status and Reclosing Status signals are simulated by the CMC.

Zone1 Extension logic description


(Z1Ext - Zone 1 Extension)
One of the main goals in any transmission line protection system is to achieve as
short as possible fault clearing time regardless of the location of the fault. Since
there are multiple factors that affect the accuracy of the relay distance elements,
Zone 1 coverage is usually limited to about 85% of the line length, leaving the
protection of the remaining 15% to the Zone 2 elements.
Different communications based schemes are implemented in order to achieve
protection for any fault on the line without the Zone 2 time delay. However, they are
channel dependent, and in the case of communications failure will not provide the
desired instantaneous operation.
A solution to this problem is given by an extended Zone 1 distance protection
function. The idea is to extend the reach of Zone 1 to more than 100% of the line
length when a fault occurs initially on the protected transmission line. This way any
fault on the line will be cleared instantaneously at both ends without the need for a
communication channel between the two relays at both ends of the line. The only
problem with this logic is that the relay may also trip for some external faults. In
order to reduce the chances of tripping the unfaulted line for a long period of time,
the extended Zone 1 is disabled after the first reclosing shot, thus providing time
coordination with the Zone 1 distance elements protecting lines, or other power
system equipment at the remote substation.
The possibility for the extended Zone 1 operation for external faults is significantly
reduced by the infeed from other sources at the remote substation. The case when
overreaching for external faults is an issue are if there is a weak source or no
source at the remote end.
In order to further reduce the possibility for undesired relay operation, in some
modern microprocessor based relays the user has an option to enable the
extended Zone 1 scheme only when there is a communication channel failure.
On ( Figure 0-7, page -80 ) is shown a simplified diagram of the Zone 1 Extension
logic that should be enabled when testing the relay under different fault conditions.

85

OMICRON LogicPro

Substation A

Substation B
Zone 1 Ext

Zone 2

Ia
Ib
Ic

Zone 1

Figure 0-7:

Z2t

Z2

Z1 Ext

AR

Simplified Zone 1 Extension Tripping logic diagram

Fault locations
Faults are simulated at two location on the substation bus:
1. Internal single-phase-to-ground fault - at 50%
2. External Zone 2 single-phase-to-ground fault
Internal Zone 2 single-phase-to-ground fault
The three fault locations are shown on ( Figure 0-8, page -81 )

86

Zone 1 Extension

VA VB VC
R

50%

IA

100%

VA VB VC
2

100%
Ext

IB

IC

Relay

Substation 2

Substation 1
Figure 0-8:

Fault location for the testing of the Zone 1 Extension logic

Test Cases
The Zone 1 Extension scheme is tested for the following fault conditions:
1. For Zone1 single-phase-to-ground fault: - the relay should trip with Zone 1
time.
2. For External single-phase-to-ground Zone2 fault with unsuccessful reclosing: the relay should trip with no delay, reclose and does not trip after the second
fault.
3. For Internal single-phase-to-ground Zone2 fault with successful reclosing: - the
relay should trip with no delay and reclose

Hardware Requirements
The CMC test device is programmed to simulate the substation and power system
environment through the analog and binary outputs. At the same time the binary
inputs are used to monitor the operation of the test object.
A typical wiring diagram for the Zone 1 Extension logic test is shown on ( Figure
0-9, page -82 )
The CMC simulates the status of the normally open auxiliary contacts of the
breaker (52a) and the currents and voltages during the pre-fault, fault and
post-fault stages of the simulation. It also simulates the operation of an external
autoreclosing device (AR)
Both potential free relay outputs of the CMC have one terminal connected to (+)
DC and the second terminal to the (+) DC terminal of the associated relay input.
The second terminal of each relay input is connected to (-) DC.
The Trip output of the relay is wired to a Trip sense input of the CMC and is used to
change from fault to post-fault state, as well as to measure the operating time and

87

OMICRON LogicPro

evaluate the correct phase selection and operation of the Zone 1 Extension logic
during the test.
A second input of the CMC monitors the Zone 1 Extension operation indication
from the relay.

IA
CMC

IA

IB

IB

IC

Analog
Outputs

IC

IN

Out 1

Digital
Inputs

Figure 0-9:

Analog
Inputs

IN

VA
VB
VC
VN
Digital
Outputs

RELAY

VA
VB
VC
VN

+ DC

- DC

52a

In 1

Trip

In 3

Z1X

Digital
Inputs

Relay
Outputs

Hardware wiring diagram for testing of the Zone 1 Extension logic

Automatic test sequence


The automatic test sequence will have several steps shown with animation in the
LogicPro software. Only the steps related to the relay at the local end are
executed.

Test object settings


The expected basic settings of the multifunctional relay under test associated with
the Zone 1 Extension logic are given in the common section at the beginning of
this document.
The only setting that has to be changed for this group of test cases is the enabling
of Zone 1 Extension logic.

88

Zone 1 Extension

One relay input has to be programmed as a normally open (52a) breaker status
monitoring input. A second relay input should be programmed to monitor external
Auto Reclosing status.
One relay output should be programmed to Trip, while a second one should be
programmed to provide a Zone1 Extension operation.

89

OMICRON LogicPro

LOAD ENCROACHMENT
Objective
The objective is to perform dynamic tests to evaluate the performance of a
distance relay, as a function of the load condition, breaker status, fault location,
type of fault, and selected mode of operation for different system conditions.
The Test Object is a multifunctional distance relay. The performance of the relay at
one end of the line is tested.
Breaker status signals for each of the three phases of the breaker are simulated by
the CMC.

LE logic description
(LE - Load Encroachment)
Distance functions based transmission line protection is required to operate
correctly under very different power system conditions. A very important criteria is
the correct relay operation for very heavy load conditions, since this can result in
sequential tripping during a power system disturbance, leading to further
deterioration of the conditions and total system collapse.
The changes of the load impedance measured by the relay are very slow
compared to the changes during a short circuit or power swing in the system.
Another very important characteristic of this process is that there is no significant
change in voltage.
The characteristics of the distance elements are important from the perspective of
the load impedance entering into the backup protection zones - usually Zone 3.
Quadrilateral characteristics or combinations of mho characteristics with load
blinders are typically used to allow backup protection of long lines, while avoiding
the load impedance entering into the distance zone.
At the same time, the protective relay should be able to trip for fault conditions that
occur simultaneously with the maximum load conditions, or for high impedance
faults that may result in a fault current lower than the maximum load condition.
Coverage for such fault conditions is typically based on the quadrilateral
characteristic for ground distance elements or directional ground overcurrent
protection for very high impedance faults
( Figure 0-10, page -85 ) and ( Figure 0-11, page -85 ) show the apparent load
impedance seen by distance relays with a quadrilateral characteristic or mho
characteristic with a Load Blinder.

90

Load Encroachment

Z3
Z2
Z1

No Operation

Figure 0-10: Load Encroachment in case of Mho characteristic with blinders

Z3
Z2
Z1

Figure 0-11: Load Encroachment in case of Quadrilateral characteristic

Fault locations
Faults are simulated at one location along the model transmission line:
1. Zone 1 single-phase-to-ground fault at 50% of the line length with overload
2. High impedance single-phase-to-ground fault

91

OMICRON LogicPro

VA VB VC
R

IA

50%

VA VB VC
2

IB

IC

Relay

Substation 1

Substation 2

Figure 0-12: Fault locations for Load Encroachment logic

The fault locations are shown on ( Figure 0-12, page -86 )

Test Cases
The distance relay is tested for the following system and fault conditions:
1. For a maximum load condition (40% overload) the relay distance elements
should not trip
2. For a maximum load condition (40% overload) followed by Zone1
single-phase-to-ground fault: - the relay should trip single pole with Zone1 time
after the fault inception
3. For high impedance single-phase-to-ground fault: - the relay should trip with
ground overcurrent protection time delay

Hardware Requirements
The CMC test device is programmed to simulate the substation and power system
environment through the analog and binary outputs. At the same time the binary
inputs are used to monitor the operation of the test object.
A typical wiring diagram for the Load Encroachment test is shown in ( Figure 0-13,
page -87 ).
The CMC simulates the status of the normally open auxiliary contact for the
breaker (52a) and the currents and voltages during the pre-fault, fault and
post-fault stages of the simulation.
A potential free relay output of the CMC has one terminal connected to (+) DC and
the second terminal to the (+) DC terminal of the associated relay input. The
second terminal of the relay input is connected to (-) DC.
The Trip output of the relay is wired to a Trip sense input of the CMC and is used to
change from fault to post-fault state, as well as to measure the operating time and
evaluate the correct operation of the relay logic during the load encroachment test.

92

Load Encroachment

IA
CMC

Analog
Outputs

IA

IB

IB

IC

IC

IN

Digital
Inputs

Out 1

Analog
Inputs

IN

VA
VB
VC
VN
Digital
Outputs

RELAY

VA
VB
VC
VN

+ DC

- DC

In 1

52a

Digital
Inputs

Trip

Relay
Outputs

Figure 0-13: Hardware wiring for Load Encroachment testing

Automatic test sequence


The automatic test sequence will have several steps shown with animation in the
LogicPro software. Only the steps related to the relay at the local end are
executed.

Test object settings


The expected basic settings of the multifunctional relay under test associated with
the Load Encroachment function are given in the common section at the beginning
of this document.
One relay inputs have to be programmed as a normally open (52a) breaker status
monitoring input.
One relay output should be programmed to trip.

93

OMICRON LogicPro

BREAKER FAILURE PROTECTION


Objective
The objective is to perform dynamic test to evaluate the Breaker-Failure-Protection
(BFP) function of a distance relay, as a function of the type of fault and the
operation of the breaker.
The Test Object is a multifunctional distance relay with built-in
Breaker-Failure-Protection at one end of the line.

BFP logic description


(BFP - Breaker Failure Protection)
One of the most severe fault conditions in an electric power system is the failure of
the breaker to trip in case of a fault detected by the protective relays. This results
in prolonged exposure of the system to low voltages and of electrical equipment to
large short circuit currents and may lead to a total system collapse. This is the
reason that Breaker Failure Protection has gained popularity especially at the
transmission level of the system.
Modern microprocessor based transmission protection relays have built-in Breaker
Failure Protection functions that vary with the level of complexity between the
different relay manufacturers.
The most common Breaker Failure Protection is based on monitoring of the
current in the protected circuit. After a fault is detected and the relay issues a trip
signal, it will also initiate the timer of the Breaker Failure Protection function. If the
breaker trips as expected, the current in all three phases will go to zero, which will
reset the undercurrent element used to detect the correct breaker operation.
The above described breaker failure logic works for most cases, especially when
the fault condition is a short circuit. However, there are system conditions when the
current detector can not be used to detect the breaker trip.
If the transmission line protection is installed on a long line that becomes lightly
loaded, this may result in an overvoltage condition that might be dangerous to
system equipment. The overvoltage protection will issue a trip signal, but if the
breaker fails to trip, it is not going to be detected by the undercurrent element,
since the low current was the cause for the high voltage in the first place. A
different criteria is required to detect the breaker operation. An auxiliary contact
from the breaker can be used for this purpose.
The Breaker Failure Protection function is usually started by a built-in protection
function in the transmission line protection relay. However, it can also be used
when the decision to trip the same breaker has been made by another protective
relay. In this case an external signal will operate an input of the transmission line
protection that will initiate the Breaker Failure Protection.

94

Breaker Failure Protection

A simplified logic diagram of the (BFP) Breaker Failure Protection function is


shown on ( Figure 0-14, page -89 ).

Substation A

Substation B

Ia
Ib
Ic

Prot Trip

TBF

Ext BF Start

BF Trip
52

IUC

BF Trip

Figure 0-14: Simplified Breaker Failure Protection logic diagram

Fault locations
Faults are simulated at 3 locations along the model transmission line:
1. Zone 1 single-phase-to-ground fault at 50% of the line length
2. Zone 2 single-phase-to-ground fault at 100% of the line length
3.

Reverse fault

The three fault locations are shown on ( Figure 0-15, page -90 )

95

OMICRON LogicPro

VA VB VC
R

IA

50%
r

IB

IC

100%

VA VB VC
2

Relay

Substation 1

Substation 2

Figure 0-15: Fault location for the testing of the Breaker Failure Protection logic

Test Cases
The Breaker-Failure-Protection is tested for the following fault conditions:
1. For Zone 1 single-phase-to-ground fault: - the relay should trip with Zone 1
time and should initiate Breaker Failure Protection (but should not trip).
2. For Zone 2 single-phase-to-ground fault and Breaker Failure: - the relay should
trip with Zone 2 time and should also trip with Breaker Failure time.
3. For Reverse fault with External Breaker Failure Start: - the relay should trip
with Breaker Failure time.
4. For Over-voltage condition and Breaker Failure: - the relay should trip with
Over-voltage Protection time and should also trip with Breaker Failure time.

Hardware Requirements
The CMC test device is programmed to simulate the substation and power system
environment through the analog and binary outputs. At the same time the binary
inputs are used to monitor the operation of the test object.
A typical wiring diagram for the Breaker Failure Protection logic test is shown in (
Figure 0-16, page -91 ).
The two potential free relay outputs of the CMC have one terminal connected to
(+) DC and the second terminal to the (+) DC terminal of the associated relay
input. The second terminal of each relay input is connected to (-) DC.
The Trip output of the relay and the Breaker Failure Trip output are wired to two of
the sense inputs of the CMC and are used to change from fault to post-fault state,
as well as to measure the operating time and evaluate the correct operation of the
Breaker Failure Protection logic during the test.

96

Breaker Failure Protection

IA
CMC

Analog
Outputs

IA

IB

IB

IC

IC

IN

Out 1
Out 2

Digital
Inputs

Analog
Inputs

IN

VA
VB
VC
VN
Digital
Outputs

RELAY

VA
VB
VC
VN

+ DC

- DC

52a

+ DC

- DC

Start BF

In 1

Trip

In 5

BF Trip

Digital
Inputs

Relay
Outputs

Figure 0-16: Hardware wiring diagram for testing of the Breaker Failure Protection logic

Automatic test sequence


The automatic test sequence will have several steps shown with animation in the
LogicPro software. Only the steps related to the relay at the local end are
executed.

Test object settings


The expected basic settings of the multifunctional relay under test associated with
the Breaker Failure Protection logic are given in the common section at the
beginning of this document.
The only settings that have to be changed for this group of test cases is the
enabling of the Breaker Failure Protection logic and the associated with it relay
settings based on the recommendations in the relay service manual.
One relay input has to be programmed as normally open (52a) breaker status
monitoring input. A second relay input is designated for external Breaker failure
status.

97

OMICRON LogicPro

One relay output should be programmed to provide Trip, while a second output
should give the indication for detected Breaker Failure Protection trip.

98

Block Reclosing

BLOCK RECLOSING
Objective
The objective is to perform dynamic test to evaluate the Block Reclosing function
of a distance relay, as a function of the type of fault, and the breaker status.
The Test Object is a multifunctional distance relay with built-in Block Reclosing at
one end of the line.

BR logic description
(BR - Block Reclosing)
Most faults on overhead transmission lines are caused by lightning, clashing
conductors and other transient phenomena. Electric power stability and reduction
of outages can be achieved through automatic reclosing of faulted transmission
lines. The success rate of auto reclosing is in the range of 80-90%. After the initial
trip, the relay recloses the circuit breaker after a set time delay in order to allow the
de-ionization of the air in the fault location.
The remaining percentage of faults is permanent in nature and requires immediate
tripping of the line breakers and blocking of the reclosing function. There are
different criteria or events that can be used to determine the need to block
reclosing:
If the fault detected by the relay is multiphase with high currents, there is higher
probability that it is a permanent fault. At the same time exposing the electric
power system to such conditions repeatedly during the reclosing sequence can be
dangerous for the stability of the system.
If the relay clears a fault with one of it's backup zones - Zone 2 or Zone 3 - there is
a possibility that there is some problem with the protection or the breaker at the
remote substation that requires block of reclosing.
If the breaker controlled by the transmission line protection relay is not capable of
reclosing because of low pressure, or something else, obviously the reclosing
should be blocked. This condition is typically detected through a relay input
assigned to detect any external Block Reclosing command.
Usually a Switch-Onto-Fault condition is a result of ground-switches not being
opened before closing the line breaker after maintenance. This condition is
detected based on the monitored by the relay breaker status and with result in
reclosing block. A Block Reclose input is typically assigned and will block
autoreclose and cause a lockout if autoreclose is in progress. If a single pole cycle
is in progress a three pole trip and lockout will result.
It can be used when protection operation without autoreclose is required. A typical
example is on a transformer feeder, where autoreclosing may be initiated from the
feeder protection but blocked from the transformer protection. Similarly, where a

99

OMICRON LogicPro

circuit breaker low gas pressure or loss of vacuum alarm occurring anywhere
during the dead time must block autoreclosure, this input can be used.
Choice of Protection Elements to Initiate Autoreclosure
In most applications, there will be a requirement to reclose for certain types of
faults but not for others. The logic is partly fixed so that autoreclosure is always
blocked for any Switch on to Fault, Stub Bus Protection, Broken Conductor or
Zone 4 trip.
Simplified logic for the Block reclosing scheme is shown in ( Figure 0-17,
page -94 ).

Substation A

Substation B

Ia
Ib
Ic

Back Up Trip
(Zone 3)
Multi Phase Flt
(3 Phase)
Zone 1
SOTF

Block Reclosing

Figure 0-17: Simplified Block Reclosing logic diagram

Fault locations
Faults are simulated at two location on the substation bus:
1. Internal Zone 1 single-phase-to-ground fault
2. External Zone 2 single-phase-to-ground fault (on the outside of one of the
breakers)
3. Switch-Onto-Fault (three phase fault)

100

Block Reclosing

VA VB VC
R

IA

50%

100%

IB

IC

VA VB VC
2

100%
Ext

Relay

Substation 1

Substation 2

Figure 0-18: Fault locations for the testing of Block Reclosing logic

The three fault locations are shown on ( Figure 0-18, page -95 )

Test Cases
The Block Reclosing function is tested for the following fault conditions:
1. For Zone 1 single-phase-to-phase fault: - the relay should trip with Zone 1 time
and should Block Reclosing.
2. For External single-phase-to-ground Zone3 fault: - the relay should trip with
Zone 3 time and should Block Reclosing.
3. For Switch-Onto-Fault (3 Phase): - the relay should trip with Zone 1 time and
should Block Reclosing.

Hardware Requirements
The CMC test device is programmed to simulate the substation and power system
environment through the analog and binary outputs. At the same time the binary
inputs are used to monitor the operation of the test object.
A typical wiring diagram for the Block Reclosing logic test is shown in ( Figure
0-19, page -96 ).
The CMC simulates the status of the normally open auxiliary contacts of the
breaker, and the currents and voltages during the pre-fault, fault and post-fault
stages of the simulation.
The potential free relay output of the CMC has one terminal connected to (+) DC
and the second terminal to the (+) DC terminal of the associated relay input. The
second terminal of the relay input is connected to (-) DC.
The Trip output of the relay is wired to the Trip sense input of the CMC and is used
to change from fault to post-fault state, as well as to measure the operating time

101

OMICRON LogicPro

and together with the monitored Block Reclosing output evaluate the correct phase
selection and operation of the Block Reclosing logic during the different fault tests.

IA
CMC

Analog
Outputs

IA

IB

IB

IC

IC

IN

Out 1
Out 3

Digital
Inputs

Analog
Inputs

IN

VA
VB
VC
VN
Digital
Outputs

RELAY

VA
VB
VC
VN
Digital
Inputs

+ DC

- DC

52a

+ DC

- DC

Block Reclosing

Relay
Outputs

In 1

Trip

In 10

Reclose Blocked

Figure 0-19: Hardware wiring for testing of the Block Reclosing logic

Automatic test sequence


The automatic test sequence will have several steps shown with animation in the
LogicPro software. Only the steps related to the relay at the local end are
executed.

Test object settings


The expected basic settings of the multifunctional relay under test associated with
the Block Reclosing logic are given in the common section at the beginning of this
document.
The only settings that have to be changed for this group of test cases is the
enabling of the Reclosing logic, The Block Reclosing function and associated with
it settings. Zone2 should be set to Block Reclosing. Different relays may have
different protection functions used to make the decision to Block Reclosing. They
have to be checked in order to determine which test to run for the evaluation.

102

Block Reclosing

One relay input has to be programmed as a normally open (52a) breaker status
monitoring input.
One relay output is programmed as Trip, while a second one is set to indicate the
operation of the Block Reclosing logic

103

OMICRON LogicPro

POWER-SWING-BLOCKING
Objective
The objective is to perform dynamic test to evaluate the Power-Swing-Blocking
feature of a distance relay, as a function of the system conditions, presence of a
fault, and selected mode of operation.
The Test Object is a multifunctional distance relay with Power-Swing-Blocking
option available at one end of the line.
Breaker Status signals are simulated by the CMC.

PSB logic description


(PSB - Power-Swing-Blocking)
Distance relays are exposed not only to fault, but to other abnormal power system
conditions. Power swings are one of the most typical cases that affects distance
relays performance because of the specific operating principles. They are
oscillations in power flow which can follow a power system disturbance. They can
be caused by different fault conditions followed by switching of breakers,
sequential operation of protective relays or schemes, loss of synchronism across a
power system, or changes in direction of power flow as a result of switching. Such
disturbances can cause generators in different parts of the system to accelerate or
decelerate in order to adapt to new power flow conditions, which in turn leads to a
power swing.
The result of a power swing may cause the apparent impedance seen by the
distance relay to move away from the normal load area and into one or more of its
tripping characteristics. Since power swing is relatively slow compared to a short
circuit fault condition, the power swing impedance can stay in a tripping zone long
enough, that will result in a relay trip.
Considering that the power swing was triggered by abnormal system conditions in
the first place, any further unnecessary tripping of transmission lines will result in
further degradation of the power system conditions and may lead to a system
blackout.
Modern distance relays are equipped with functions that detect power swing
conditions and block a selected number of distance elements that may operate
during a power swing condition.
The most common principle for detection of a power swing condition is the time for
passing of the apparent impedance measured by the relay through a power swing
impedance band.
A very important characteristic of this process is the fact that power swing is a
balanced three phase condition. A power swing is detected when the

104

Power-Swing-Blocking

phase-to-phase measured impedance has remained within the band in excess of a


pre-defined time.
One of the most important criteria for the evaluation of the operation of power
swing blocking schemes is their performance when a fault occurs during a power
swing. In this case the relay logic should detect the fault condition and issue a
correct trip signal.
The power swing characteristic of typical distance relays are shown on ( Figure
0-20, page -99 ) and ( Figure 0-21, page -99 ).

PwrSwg X

PwrSwg R

Figure 0-20: Power Swing band for a distance relay with quadrilateral characteristic

PwrSwg

Rch

Figure 0-21: Power Swing band for a distance relay with mho characteristic

Unblocking of the relay for faults during power swings should allow the relay to
operate normally for any unbalanced fault occurring during a power swing, as
there are two conditions which can be used to unblock the relay:

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OMICRON LogicPro

A residual current threshold is exceeded - this allows tripping for ground faults
occurring during a power swing.
A negative sequence current threshold is exceeded - this allows tripping for
phase-to-phase faults occurring during a power swing.
Simplified logic diagram of the Power Swing Block is shown in ( Figure 0-22,
page -100 ).

Substation A

Substation B

Ia
Ib
Ic

Trip
Zpsb

Tpsb

Zs

Block

PS Block

Z2t

Block

Fault Detected
(enabled)

Figure 0-22: Power Swing Blocking simplified logic diagram

Fault locations
A Zone1 single-phase-to-ground fault is applied following the initial power swing
condition.

Test Cases
The Power Swing Blocking scheme is tested for the following system and fault
conditions:
1. For power swing inside and out of Zone 3: the relay should not trip and should
give Power Swing Alarm
2. For power swing inside of Zone 3 followed by a Zone 1 single-phase-to-ground
fault: the relay should trip and should give Power Swing Alarm

106

Power-Swing-Blocking

Hardware Requirements
The CMC test device is programmed to simulate the substation and power system
environment through the analog and binary outputs. At the same time the binary
inputs are used to monitor the operation of the test object.
A typical wiring diagram for the Power Swing Blocking logic test is shown in:
( Figure 0-23, page -101 ).
The CMC simulates the status of the normally open auxiliary contacts of the
breaker, and the currents and voltages during the pre-fault, power swing, fault and
post-fault stages of the simulation.
The potential free relay output of the CMC has one terminal connected to (+) DC
and the second terminal to the (+) DC terminal of the associated relay input. The
second terminal of the relay input is connected to (-) DC.
The Trip output of the relay is wired to the Trip sense input of the CMC and is used
to change from fault to post-fault state, as well as to measure the operating time
and together with the monitored Power Swing output evaluate the correct
operation of the Power Swing Blocking logic during the different tests.

IA
CMC

Analog
Outputs

IA

IB

IB

IC

IC

IN

RELAY

Analog
Inputs

IN

VA
VB
VC
VN

VA
VB
VC
VN
Digital
Inputs

Digital
Outputs

Out 1

Digital
Inputs

In 1

Trip

In 4

Power Swing

+ DC

- DC

52a

Relay
Outputs

Figure 0-23: Hardware wiring diagram for testing of the Power Swing Blocking logic

107

OMICRON LogicPro

Automatic test sequence


The automatic test sequence will have several steps shown with animation in the
LogicPro software. Only the steps related to the relay at the local end are
executed.

Test object settings


The expected basic settings of the multifunctional relay under test associated with
the Power Swing Blocking logic are given in the common section at the beginning
of this document.
The only setting that has to be changed for this group of test cases is the enabling
of Power Swing Blocking logic. Different relays may have different protection
functions used to make the decision to trip.
One relay input has to be programmed as a normally open (52a) breaker status
monitoring input.
One relay output is programmed as Trip, while a second one is set to indicate the
operation of the Power Swing Blocking logic
The Power Swing band setting expected by the software is 1 ohm.

108

Power-Swing-Tripping

POWER-SWING-TRIPPING
Objective
The objective is to perform dynamic test to evaluate the Power-Swing-Tripping
feature of a distance relay, as a function of the system conditions, presence of a
fault, and selected mode of operation.
The Test Object is a multifunctional distance relay with Power-Swing-Tripping
option available at one end of the line.
Breaker Status signals are simulated by the CMC.

PST logic description


(PST - Power-Swing-Trip)
The Power Swing Tripping logic is based on power swing detection identical to the
one used for power swing blocking. However, under certain conditions and
depending on the location of the relays in the power system, it might be necessary
to separate the two parts of the system when a power swing condition is detected.
This is the case of Power Swing Tripping.
Simplified logic for the Power Swing Tripping scheme is shown in ( Figure 0-24,
page -103 ).

Ia
Ib
Ic

Trip
Zps

Tps

Zs

(enabled)

PS Trip

Trip
Z3

Figure 0-24: Simplified logic diagram for Power Swing Trip scheme

109

OMICRON LogicPro

Fault locations
There are no faults applied in the tests for Power Swing Tripping.

Test Cases
The Power Swing Tripping scheme is tested for the following system and fault
conditions:
1. For power swing inside and out of Zone 3: the relay should not trip and should
give Power Swing Alarm
2. For power swing inside of Zone 3: the relay should trip and should give Power
Swing Alarm

Hardware Requirements
IA
CMC

Analog
Outputs

IA

IB

IB

IC

IC

IN

RELAY

Analog
Inputs

IN

VA
VB
VC
VN

VA
VB
VC
VN
Digital
Inputs

Digital
Outputs

Out 1

Digital
Inputs

In 1

Trip

In 4

Power Swing

Figure 0-25:

+ DC

- DC

52a

Relay
Outputs

Hardware wiring for testing of the Power Swing Tripping logic

The CMC test device is programmed to simulate the substation and power system
environment through the analog and binary inputs. At the same time the binary
inputs are used to monitor the operation of the test object.

110

Power-Swing-Tripping

A typical wiring diagram for the Power Swing tripping logic test is shown in ( Fig.
0-25, page - 104).
The CMC simulates the status of the normally open auxiliary contacts of the
breaker, and the currents and voltages during the pre-fault, power swing, fault and
post-fault stages of the simulation.
The potential free relay output of the CMC has one terminal connected to (+) DC
and the second terminal to the (+) DC terminal of the associated relay input. The
second terminal of the relay input is connected to (-) DC.
The Trip output of the relay is wired to the Trip sense input of the CMC and is used
to change from fault to post-fault state, as well as to measure the operating time
and together with the monitored Power Swing output evaluate the correct
operation of the Power Swing Tripping logic during the different tests.

Automatic test sequence


The automatic test sequence will have several steps shown with animation in the
LogicPro software. Only the steps related to the relay at the local end are
executed.

Test object settings


The expected basic settings of the multifunctional relay under test associated with
the Power Swing Tripping logic are given in the common section at the beginning
of this document.
The only setting that has to be changed for this group of test cases is the enabling
of Power Swing Tripping logic. Different relays may have different protection
functions used to make the decision to trip.
One relay input has to be programmed as a normally open (52a) breaker status
monitoring input.
One relay output is programmed as Trip, while a second one is set to indicate the
operation of the Power Swing Tripping logic
The Power Swing band setting expected by the software is 1 ohm.

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OMICRON LogicPro

LOSS-OF-POTENTIAL
Objective
The objective is to perform dynamic test to evaluate the Loss-of-Potential (LOP)
scheme of a distance relay, as a function of the voltage failure, fault condition or
combination of the two.
The Test Object is a multifunctional distance relay with LOP scheme at one end of
the line. The single phase or three phase micro-breaker status signals are
generated by the CMC.

LOP logic description


(LOP - Loss-Of-Potential)
The circuits between the voltage transformers in the field and the relays are
usually protected by fuses or miniature circuit breakers. In case of a fault on these
circuits the fault will be cleared by these protective devices, resulting in the loss of
voltage in the faulted phase of the voltage circuit.
Since the distance measured by the relay is a function of the voltage
measurement, a zero voltage will result in a distance element seeing a fault inside
of the distance characteristic and the relay will trip even with a small load current.
Such maloperation is undesirable and requires taking some measures in order to
avoid it. Any modern microprocessor based distance relay includes some form of
logic that will detect such condition and prevent the relay operation. These
schemes can have different names in different products, but the functionality is
very similar. In some relays this is the Fuse-Failure scheme, while in others it may
be a Loss-of-Potential scheme. Or it may be called a
Voltage-Transformer-Supervision scheme. However, in all cases the logic is based
on the detection of a change in voltage while there is no change in current.
Modern microprocessor based relays measure typically phase currents and
voltages and based on these measurements calculate the sequence components
used by different protection or non-protection functions. When a single or two
phase voltage failure occurs, this will result in voltage unbalance that can be
detected based on the calculated negative or zero sequence voltages.
The detection of unbalance voltage however should not affect the performance of
the relay under fault conditions. That is why the Loss-of-Potential logic includes
another element that monitors the availability of unbalanced current conditions.
Under normal load conditions, the current unbalance will be a function of the
loading of the line and the line transposition. For untransposed circuits the
difference between the currents in the individual phases can go up to 7-10%. The
setting of the element detecting unbalanced current conditions should be set
above this possible level in order to ensure the correct logic operation.

112

Loss-Of-Potential

Detection of Loss-of-Potential should immediately block all voltage dependent


elements, such as distance and directional functions. At the same time pure
overcurrent elements should be available to provide some form of backup
protection in the case that a fault occurs before the problem with the voltage
circuits or transformers is detected and fixed.
The above requirements are taken into consideration in the design of the module
for testing of the Loss-of-Potential logic in modern transmission line protection
relays.
A simplified diagram of the Loss-of-Potential logic is displayed on ( Figure 0-26,
page -107 )

Substation A

0
0
0

I0 or I2

V0 or V2
Distance

IOC

Direction

(disabled)

Figure 0-26: Simplified Loss-of-Potential logic diagram

Fault locations
Faults are simulated at one location along the model transmission line:
1. Zone 1 single-phase-to-ground fault at 50% of the line length
The fault location is shown on ( Figure 0-27, page -108 )

113

OMICRON LogicPro

VA VB VC
R

50%

IA

VA VB VC
2

IB

IC

Relay

Substation 1

Substation 2

Figure 0-27: Fault location for the testing of the Loss-of-Potential logic

Test Cases
The Loss-of-Potential (LOP) scheme is tested for the following fault conditions:
1. For Single-phase voltage failure: - the relay should not trip and should give a
LOP alarm.
2. For Single-phase-to-ground Zone 1 fault: - the relay should trip and should not
give a LOP alarm.
3. For Single-phase voltage failure followed by Single-phase-to-ground Zone 1
fault: - the relay should give a LOP alarm and then trip.

Hardware Requirements
The CMC test device is programmed to simulate the substation and power system
environment through the analog and binary outputs. At the same time the binary
inputs are used to monitor the operation of the test object.
A typical wiring diagram for the Loss-of-Potential logic test is shown on ( Figure
0-28, page -109 ).
The CMC simulates the status of the normally open auxiliary contact for the
breaker (52-A), the status of the micro-breaker in the voltage circuit (if required by
the relay logic) and the currents and voltages during the pre-fault, fault and
post-fault stages of the simulation.

114

Loss-Of-Potential

IA
CMC

Analog
Outputs

IA

IB

IB

IC

IC

IN

Digital
Inputs

Analog
Inputs

IN

VA
VB
VC
VN

Digital
Outputs

RELAY

VA
VB
VC
VN

Out 1

+ DC

- DC

52a

Out 2

+ DC

- DC

52bkr

In 1

Trip

In 6

LOP

Digital
Inputs

Relay
Outputs

Figure 0-28: Hardware wiring diagram for testing of the Loss-of Potential logic

The two potential free relay outputs of the CMC have one terminal connected to
(+) DC and the second terminal to the (+) DC terminal of the associated relay
input. The second terminal of each relay input is connected to (-) DC.
The Trip output of the relay is wired to a Trip sense input of the CMC and is used to
change from fault to post-fault state, as well as to measure the operating time and
evaluate the correct operation of the Loss-of-Potential logic during the test.

Automatic test sequence


The automatic test sequence will have several steps shown with animation in the
LogicPro software. Only the steps related to the relay at the local end are
executed.

Test object settings


The expected basic settings of the multifunctional relay under test associated with
the Loss-of-Potential logic are given in the common section at the beginning of this
document.

115

OMICRON LogicPro

The only setting that has to be changed for this group of test cases is the enabling
of the Loss-of-Potential logic and the associated with it relay settings based on the
recommendations in the relay service manual.
One relay input has to be programmed as normally open (52a) breaker status
monitoring input. A second input should be configured to monitor the status of a
Micro-breaker used to protect the voltage circuit.
One relay output should be programmed to provide Distance Trip while a second
output should give the indication for detected Loss-of-Potential.

116

Current Transformer Supervision

CURRENT TRANSFORMER SUPERVISION


Objective
The objective is to perform dynamic test to evaluate the Current-Transformer
Supervision scheme of a distance relay, as a function of the Current Transformer
or other CT failure or fault condition, or combination of the two.
The Test Object is a multifunctional distance relay with Current Transformer
Supervision scheme at one end of the line.

CTS logic description


(CT - Current-Transformer Supervision)
The current circuits of a transmission line protection relay may fail due to gradual
degradation of the current transformers themselves or damage of the wiring
between the current transformers in the field and the relays. In some cases this
may lead to incorrect measurement of the primary load or fault currents and
incorrect operation of the protective relay. A dangerous raise in voltage will result
from an interruption of the current circuit. All this requires detection and alarm from
the relay when such problems occur in the substation.
Some modern microprocessor based distance relays includes some form of logic
that will detect such CT circuit condition and prevent the affected relay functions
from incorrect operation. These schemes may be called a
Current-Transformer-Supervision scheme. The logic follows similar principles to
the Voltage-Transformer-Supervision logic, but with reversed signals, i.e. it is
based on the detection of a change in current while there is no change in voltage.
Modern microprocessor based relays measure typically phase currents and
voltages and based on these measurements calculate the sequence components
used by different protection or non-protection functions. When a single or two
phase current failure occurs, this will result in current unbalance that can be
detected based on the calculated negative or zero sequence currents.
The detection of unbalance currents however should not affect the performance of
the relay under fault conditions. That is why the Current-Transformer-Supervision
logic includes another element that monitors the availability of unbalanced voltage
conditions. Under normal load conditions, the current unbalance will be a function
of the loading of the line and the line transposition. For untransposed circuits the
difference between the currents in the individual phases can go up to 7-10%. The
setting of the element detecting unbalanced current conditions should be set
above this possible level in order to ensure the correct logic operation.
Detection of Current-Transformer-Supervision should block sequence current
dependent elements, such as sensitive negative or zero sequence overcurrent
functions. At the same time pure phase high set overcurrent elements should be

117

OMICRON LogicPro

available to provide some form of backup protection in the case that a fault occurs
before the problem with the current circuits or transformers is detected and fixed.
The above requirements are taken into consideration in the design of the module
for testing of the Current-Transformer-Supervision logic in modern transmission
line protection relays.
Simplified diagram of the Current-Transformer-Supervision logic is shown in:
( Figure 0-29, page -112 ).

Substation A

Ia
Ib
Ic

I0 or I2

V0 or V2
Distance

Ground OC
Negative Seq. OC

Figure 0-29: Simplified Current-Transformer Supervision logic diagram

Fault locations
Faults are simulated at one location along the model transmission line:
1. Zone 1 single-phase-to-ground fault at 50% of the line length
The fault location is shown on ( Figure 0-30, page -113 )

118

Current Transformer Supervision

VA VB VC
R

IA

50%
r

IB

IC

VA VB VC
2

Relay

Substation 1

Substation 2

Figure 0-30: Fault location for the testing of the Current-Transformer Supervision logic

Test Cases
The Current Transformer Supervision scheme is tested for the following fault
conditions:
1. For Single-phase CT circuit failure: - the relay should not trip and should give a
CT alarm.
2. For Single-phase-to-ground Zone1 fault: - the relay should trip and should not
give a CT alarm.
3. For Single-phase CT circuit failure followed by Single-phase-to-ground Zone1
fault: - the relay should give a CT failure alarm and then trip with distance
element.

Hardware Requirements
The CMC test device is programmed to simulate the substation and power system
environment through the analog and binary outputs. At the same time the binary
inputs are used to monitor the operation of the test object.
A typical wiring diagram for the Current-Transformer Supervision logic test is
shown in ( Figure 0-31, page -114 )
The CMC simulates the status of the normally open auxiliary contact for the
breaker (52-A), and the currents and voltages during the pre-fault, fault and
post-fault stages of the simulation.

119

OMICRON LogicPro

IA
CMC

Analog
Outputs

IA

IB

IB

IC

IC

IN

RELAY

Analog
Inputs

IN

VA
VB
VC
VN

VA
VB
VC
VN
52a

Digital
Inputs

In 1

Trip

Relay
Outputs

In 7

CT Fail

Digital
Outputs

Out 1

Digital
Inputs

+ DC

- DC

Figure 0-31: Hardware wiring diagram for testing of the Current-TransformerSupervision logic

The potential free relay output of the CMC has one terminal connected to (+) DC
and the second terminal to the (+) DC terminal of the associated relay input. The
second terminal of the relay input is connected to (-) DC.
The Trip output of the relay is wired to a Trip sense input of the CMC and is used to
change from fault to post-fault state, as well as to measure the operating time and
evaluate the correct operation of the Current-Transformer Supervision logic during
the test.
A second output from the relay is wired to input 2 in order to provide indication of
the detection of CT Failure.

Automatic test sequence


The automatic test sequence will have several steps shown with animation in the
LogicPro software. Only the steps related to the relay at the local end are
executed.

120

Current Transformer Supervision

Test object settings


The expected basic settings of the multifunctional relay under test associated with
the Current-Transformer Supervision logic are given in the common section at the
beginning of this document.
The only setting that has to be changed for this group of test cases is the enabling
of the Current-Transformer Supervision logic and the associated with it relay
settings based on the recommendations in the relay service manual.
One relay input has to be programmed as normally open (52a) breaker status
monitoring input.
One relay output should be programmed to provide Trip, while a second output
should give the indication for detected Current-Transformer Supervision.

121

OMICRON LogicPro

STUB BUS PROTECTION


Objective
The objective is to perform dynamic tests to evaluate the Stub-Bus-Protection
feature of a distance relay, as a function of the fault location, type of fault, and
selected mode of operation.
The Test Object is a multifunctional distance relay with a Stub-Bus-Protection
option available at one end of the line.
The breaker and line switch status signals are generated by the CMC.

STP logic description


(STP - Stub-Bus-Protection)
Where a transmission line is connected to a substation with a ring-bus or breaker
-and-a-half configuration, the relay is typically connected to two circuit breakers
and there is a line switch that allows taking the line out-of-service while the ring or
the breaker-and-a-half bay remains in service.
There are two typical arrangements, the more common being paralleling the two
sets of current transformers (one from each breaker). An alternative is two have
two sets of current inputs in the transmission line protection relay.
When the line is opened, in the case of any load or through fault condition, the
relay will see the difference between the currents flowing through the two
breakers. This should result in zero current being seen from the protective relay.
However, this is valid only when the two sets of line Acts should be well matched
and equally loaded, such that the relaying connection is at the equipotential point
of the secondary leads.
For any fault between the breakers and the line switch the relay will see the sum of
the fault currents through the breakers and will issue a trip signal to operate the
two breakers.
Many transmission line protection relays include a function that provides the so
called stub bus protection - i.e., protection of the part of the substation bus
between the two breakers and the line switch. The state of the line - in or out of
service - is determined based on monitoring the state of the line switch through
one of it's auxiliary contacts. When it is open, an auxiliary contact can be used to
energize an input on the relay to enable this protection function.
For an internal fault the relay will operate, tripping the two local circuit breakers.
The above requirements are taken into consideration in the design of the module
for testing of the Stub Bus Protection logic in modern transmission line protection
relays external and internal fault conditions.

122

Stub Bus Protection

Simplified diagram of the Stub Bus Protection logic, that should be enabled when
testing the relay under evolving fault conditions is shown in ( Figure 0-32,
page -117 ).

Substation A
CT
CT
CT

Line Switch (LS)

Trip
CT
LS Open

CT
CT

Instant OC

Figure 0-32: Simplified Stub-Bus-Protection logic diagram

Fault locations
Faults are simulated at two locations on the substation bus:
1. Internal single-phase-to-ground fault (between the breakers and the line
switch)
2. External single-phase-to-ground fault (on the outside of one of the breakers)

123

OMICRON LogicPro

Substation A
CT
CT
CT

Line Switch (LS)

CT
CT
CT

Relay

Figure 0-33: Fault locations for the testing of the Stub-Bus-Protection logic

The fault locations are shown on ( Figure 0-33, page -118 )

Test Cases
The Stub-Bus-Protection scheme is tested for the following fault conditions:
1. For Single-phase-to-ground fault inside the zone of protection: - the relay
should trip without time delay.
2. For Single-phase-to-ground fault outside the zone of protection: - the relay
should not trip.

Hardware Requirements
The CMC test device is programmed to simulate the substation and power system
environment through the analog and binary outputs. At the same time the binary
inputs are used to monitor the operation of the test object.
A typical wiring diagram for the Stub Bus Protection logic test is shown in ( Figure
0-34, page -119 )
The CMC simulates the status of the normally open auxiliary contacts of the
breakers, the state of the line switch and the currents and voltages during the
pre-fault, fault and post-fault stages of the simulation.

124

Stub Bus Protection

All three potential free relay outputs of the CMC have one terminal connected to
(+) DC and the second terminal to the (+) DC terminal of the associated relay
input. The second terminal of each relay input is connected to (-) DC.
The Trip output of the relay is wired to the Trip sense input of the CMC and is used
to change from fault to post-fault state, as well as to measure the operating time
and evaluate the correct operation of the Stub Bus Protection logic during the
different fault tests.
A Stub Bus Protection output from the relay is wired to output 2.

IA
CM C

A nalog
O utp uts

IA

IB

IB

IC

IC

IN

VA
VB
VC
VN
+ DC

Digital
O utp uts
O ut 4

Digital
Inp uts

Analog
Inputs

IN

VA
VB
VC
VN
O ut 1

RELA Y

+ DC

- DC

52a1

- DC

52a2

- DC

D igital
Inputs

Line Sw itch

In 1

Trip

In 8

Stub B us

R elay
O utputs

Figure 0-34: Hardware wiring diagram for testing of the Stub-Bus-Protection logic

Automatic test sequence


The automatic test sequence will have several steps shown with animation in the
LogicPro software. Only the steps related to the relay at the local end are
executed.

Test object settings


The expected basic settings of the multifunctional relay under test associated with
the Stub-Bus Protection logic are given in the common section at the beginning of
this document.

125

OMICRON LogicPro

The only setting that has to be changed for this group of test cases is the enabling
of Stub-Bus Protection logic. Different relays may have different protection
functions used to make the decision to trip.
One relay input has to be programmed as a normally open (52a) breaker status
monitoring input for Breaker 1.
A second relay input has to be programmed as a normally open (52a) breaker
status monitoring input for Breaker 2.
A third relay input should be programmed as a normally closed (52b) line switch
position monitoring input.
One relay output should be programmed to Trip phase and a second relay output
should provide indication of the operation of the Stub-Bus Protection logic.

126

Single Pole Tripping

SINGLE POLE TRIPPING


Objective
The objective is to perform dynamic tests to evaluate the performance of a
distance relay, as a function of the fault location, type of fault, and selected mode
of operation for different fault conditions.
The Test Object is a multifunctional distance relay with Single-Pole-Tripping option
available and enabled. The performance of the relay at one end of the line is
tested. Breaker status and 3 Pole Trip Only signals are simulated by the CMC.

SPT logic description


(SPT - Single-Pole-Tripping)
Transmission lines are very important to the overall stability of the power system
during different abnormal power system conditions. Any loss of lines can
significantly affect the system when a short circuit fault occurs and may lead to a
sequence of events that may result in a total system collapse.
Protection and system engineers have established different practices in order to
improve the system performance under such conditions. Since many faults are
temporary in nature, automatic reclosing is the preferred method for restoring the
system configuration to pre-fault conditions. However, during the reclosing cycle
the line will be out of service, which combined with the effect of the voltage drop
during the process of fault detection and clearing may result in system instability.
Considering the fact that most of the faults in the system, (especially at the high
and extremely high voltage levels are single-phase to ground faults), one solution
is to implement single-pole tripping and reclosing. This will allow continuous power
transfer through the healthy phases during the reclosing cycle and will significantly
improve the stability of the system.
The decision to implement single pole tripping should be made after consideration
of several different factors, such as the availability of secondary arc current due to
electromagnetic or electrostatic coupling between the healthy phases and the
tripped phase, as well as the expected de-ionization time.
Modern transmission line protection relays are designed to allow single pole
tripping as a function of the detected fault conditions and the type of reclosing
applied. They also implement logic that is trying to distinguish between temporary
and permanent faults in order to avoid reclosing into a fault. On the other hand, the
severity of the fault will affect the stability of the system, so it is taken under
consideration by the relay logic is well. The decision of what behavior the relay
should have is specified by the protection engineer during the setting of the relay.

127

OMICRON LogicPro

Substation A

Substation B

0
0
0

Trip A
Trip B
Trip 3 Ph

Trip C

Z1 A
Z1 B
Z1 C
3Ph Only
Z1 AB
Z1 BC
Z1 CA
Z1 ABC

Figure 0-35: Simplified Single Pole Tripping logic diagram

The most typical cases when single pole trip and reclosing is selected is to trip
single phase for single-phase to ground faults and trip three phase for any other
fault. Also to trip single-phase for faults in Zone 1 of the protected line and three
phase for any other Zone. The latter is due to the fact, that Zone 2 and Zone 3
provide backup protection, and in this case a three phase trip is required.
Under specific conditions the application may require the relay to convert a single
pole trip decision to a three phase trip. This is typically based on the status of an
opto input that if energized will force the relay to trip three phase even when it has
detected a single-phase to ground fault.
The above requirements are taken into consideration in the design of the module
for testing of the Single-Pole Trip and Reclosing logic in modern transmission line
protection relays.

128

Simplified diagram of the Single-Pole Tripping logic is shown in ( Figure 0-35,


page -122 ).

Single Pole Tripping

Fault locations
VA VB VC
R

50%

IA

VA VB VC
2

IB

IC

Relay

Substation 2

Substation 1
Figure 0-36:

Fault locations for the testing of the Single-Pole Tripping logic

Faults are simulated at 2 locations along the model transmission line:


1.

Zone 1 single-phase-to-ground fault at 50% of the line length

2.

Zone 1 three-phase-to-ground fault at 50% of the line length

The three fault locations are shown on ( Figure 0-36, page -123 ).

Test cases

The Single Pole Tripping scheme is tested for the following fault conditions:
1. For Zone1 single-phase-to-ground fault: - the relay should trip single pole with
Zone1 time.
2. For Zone1 phase-to-phase fault: - the relay should trip 3 pole with Zone1 time.
3.

For Zone1 single-phase-to-ground fault with 3 Pole Trip Only energized: - the
relay should trip 3 pole with Zone1 time.

Hardware requirements
The CMC test device is programmed to simulate the substation and power system
environment through the analog and binary inputs. At the same time the binary
inputs are used to monitor the operation of the test object.

A typical wiring diagram for the Single-Pole Tripping logic test is shown in ( Figure
0-37, page -124 )
The CMC simulates the status of the normally open auxiliary contacts for the three
phases of the breaker (52a-A, 52a-B and 52a-C) and the currents and voltages
during the pre-fault, fault and post-fault stages of the simulation

129

OMICRON LogicPro

Note: If the relay uses a


52b breaker status contact,
it should not be wired.

Another potential free relay output of the CMC is programmed to simulate the 3
Phase Trip Only signal sent from an external relay or another control signal and is
wired to the appropriate input of the relay under test.
All four potential free relay outputs of the CMC have one terminal connected to (+)
DC and the second terminal to the (+) DC terminal of the associated relay input.
The second terminal of each relay input is connected to (-) DC.

IA
CMC

Analog
Outputs

IA

IB

IB

IC

IC

IN

Digital
Outputs

Out 2
Out 3
Out 4

Digital
Inputs

Analog
Inputs

IN

VA
VB
VC
VN
Out 1

RELAY

VA
VB
VC
VN
+ DC

- DC

52aA

+ DC

- DC

52aB

+ DC

- DC

52aC

+ DC

- DC

3Ph Trip Only

In 1

Trip A

In 2

Trip B

In 3

Trip C

Digital
Inputs

Relay
Outputs

Figure 0-37: Hardware wiring diagram for testing of the Single-Pole Tripping logic

The three Trip outputs of the relay (one for each phase) are wired to three Trip
sense inputs of the CMC and are used to change from fault to post-fault state, as
well as to measure the operating time and evaluate the correct phase selection
and operation of the Single-Pole Trip logic.
A 3 Phase Trip output of the relay is wired to a fourth sense input of the CMC and
is used as an additional criteria from the relay under test.

130

Single Pole Tripping

Automatic test sequence


The automatic test sequence will have several steps shown with animation in the
LogicPro software. Only the steps related to the relay at the local end are
executed.

Test object settings


The expected basic settings of the multifunctional relay under test associated with
the Single-Pole Trip logic are given in the common section at the beginning of this
document.
The only setting that has to be changed for this group of test cases is the enabling
of Single Pole Trip.
Three relay inputs have to be programmed as single phase normally open (52a)
breaker status monitoring inputs. Another input should be configured to convert
any trip to three phase trip.
Three relay outputs should be programmed to trip phase A, B and C accordingly,
while at the same time a fourth output should indicate a relay three phase trip.

131

OMICRON LogicPro

EVOLVING FAULT LOGIC


Objective
The objective is to perform dynamic tests to evaluate the performance of a
distance relay, as a function of the fault location, type of fault, and selected mode
of operation for different fault conditions.
The Test Object is a multifunctional distance relay with Single-Pole-Tripping option
available and enabled. The performance of the relay at one end of the line is
tested.
Breaker status signals are simulated by the CMC.

Evolving Fault logic description


(EF - Evolving Fault)
The advantages and importance of single pole trip and reclosing were discussed in
the previous section discussing the testing of this feature in transmission line
protection relays. The fault conditions in the system can change dynamically
during the process of fault detection and fault clearance.
Distance relays typically include several different elements that operate in parallel
or in sequence depending on the design and/or algorithms implemented in the
relay under test. One of them is the faulted phase selection function that identifies
the type of fault and enables a phase-to-ground or a phase-to-phase distance
element to make a decision to trip. However, it is possible that after the relay has
made this decision to trip single pole for a single-phase-to-ground fault, the fault
may evolve to a phase-to-phase or three-phase fault before the breaker has
tripped.
A properly designed relay should be able to detect the changing fault conditions
and switch from a single pole trip to a three phase trip decision. Obviously, if three
phase trip mode is selected, even if the single-phase-to-ground fault evolves to a
multi-phase fault before the breaker trip, all three phases will be tripped, so the
fault will be cleared correctly. The only concern will be the fault record from the
relay, that may provide misleading information about the type of fault detected by
the relay.
The above requirements are taken into consideration in the design of the module
for testing of the Single-Pole Trip and Reclosing logic in modern transmission line
protection relays for normal and evolving fault conditions.
A simplified diagram of the Single-Pole Tripping logic that should be enabled
when testing the relay under evolving fault conditions is shown on ( Figure 0-38,
page -127 ).

132

Evolving Fault Logic

Substation A

Substation B

0
0
0

Trip A
Trip B
Trip 3 Ph

Trip C

Z1 A
Z1 B
Z1 C
3Ph Only
Z1 AB
Z1 BC
Z1 CA
Z1 ABC

Figure 0-38: Simplified diagram for testing of the Evolving Fault logic

Fault locations
Faults are simulated at one location along the model transmission line:
1. Zone 1 single-phase-to-ground fault at 50% of the line length
2. Zone 1 single-phase-to-ground fault evolving to three-phase-to-ground fault at
50% of the line length
The fault location is shown on ( Figure 0-39, page -127 ).

VA VB VC
R

IA

50%

VA VB VC
2

IB

IC

Relay

Substation 1

Substation 2

Figure 0-39: Fault location for the testing of the Evolving Fault function of Single-Pole
Tripping logic

133

OMICRON LogicPro

Test cases
The distance relay is tested for the following fault conditions:
1. For Zone1 single-phase-to-ground fault: - the relay should trip single pole with
Zone1 time.
2. For Zone1 single-phase-to-ground fault evolving to three-phase-to-ground
fault: - the relay should trip first single-pole with Zone1 time and then trip 3
pole.

Hardware requirements
The CMC test device is programmed to simulate the substation and power system
environment through the analog and binary outputs. At the same time the binary
inputs are used to monitor the operation of the test object.
A typical wiring diagram for the Single-Pole Tripping logic test is shown in ( Figure
0-40, page -129 )
The CMC simulates the status of the normally open auxiliary contacts for the three
phases of the breaker (52a-A, 52a-B and 52a-C) and the currents and voltages
during the pre-fault, fault and post-fault stages of the simulation.
All four potential free relay outputs of the CMC have one terminal connected to (+)
DC and the second terminal to the (+) DC terminal of the associated relay input.
The second terminal of each relay input is connected to (-) DC.
The three Trip outputs of the relay (one for each phase) are wired to three Trip
sense inputs of the CMC and are used to change from fault to post-fault state, as
well as to measure the operating time and evaluate the correct phase selection
and operation of the Single-Pole Trip logic during the evolving fault test.

134

Evolving Fault Logic

IA
CMC

Analog
Outputs

IA

IB

IB

IC

IC

IN

Digital
Outputs

Out 2
Out 3
Out 4

Digital
Inputs

Analog
Inputs

IN

VA
VB
VC
VN
Out 1

RELAY

VA
VB
VC
VN
+ DC

- DC

52aA

+ DC

- DC

52aB

+ DC

- DC

52aC

+ DC

- DC

3Ph Trip Only

In 1

Trip A

In 2

Trip B

In 3

Trip C

Digital
Inputs

Relay
Outputs

Figure 0-40: Hardware wiring diagram for testing of the Evolving Fault logic

Automatic test sequence


The automatic test sequence will have several steps shown with animation in the
LogicPro software. Only the steps related to the relay at the local end are
executed.

Test object settings


The expected basic settings of the multifunctional relay under test associated with
the Single-Pole Trip logic are given in the common section at the beginning of this
document. Trip logic are given in the common section at the beginning of this
document.
The only setting that has to be changed for third group of test cases is the enabling
of Single-Pole-Trip.
Three relay inputs have to be programmed as single phase normally open (52a)
breaker status monitoring inputs.

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OMICRON LogicPro

A fourth input of the relay is programmed for 3Phase Trip Only control.
Three relay outputs should be programmed to trip A,B and C accordingly. A fourth
output indicates that the relay issued a 3Phase Trip signal.

136

Pole-Dead Logic

POLE-DEAD LOGIC
Objective
The objective is to perform dynamic tests to evaluate the performance of a
distance relay, as a function of the breaker status, fault location, type of fault, and
selected mode of operation for different fault conditions.
The Test Object is a multifunctional distance relay with Single-Pole-Tripping option
available and enabled. The performance of the relay at one end of the line is
tested.
Breaker status signals for each of the three phases of the breaker are simulated by
the CMC.

Pole-Dead logic description


(PDL - Pole-Dead Logic)
Modern protective relays are designed to operate based on the changing system
conditions and status of substation equipment. One of the most important devices
related to protection operation is the breaker, or other switching devices.
Information on the status of the breaker is used by different logic schemes and is
determined by the Pole Dead logic of the protection device.
The Pole Dead detection logic provides individual indication of the status of the
circuit breaker poles and indication of any pole dead or all poles dead. The results
are later used by different protection and control functions of transmission line
protection relays. Pole Dead detection logic typically uses inputs from the circuit
breaker normally open (52a) or normally closed (52b) auxiliary contact(s). In some
cases for improved reliability of the breaker status detection, both normally open
and normally closed auxiliary contacts are monitored.
In case of three pole trip and reclosing a single input to the relay for breaker status
is used. When single-pole trip and reclosing is applied, breaker status indication
from each individual phase is required.
If breaker auxiliary contact status is not available, the breaker status can be
evaluated based on current and voltage measurements.
A pole is detected as dead if either the auxiliary switch input is active or neither the
current nor voltage level detector on that phase is operated.
The pole dead indications are typically used in Switch on to Fault and Trip on
Reclose logic. In some cases this information can be used also to detect breaker
opening for non-fault trip conditions such as overvoltage protection operation.
A simplified diagram of the Pole-Dead detection logic that should be enabled when
testing the relay under evolving fault conditions is shown in ( Figure 0-41,
page -132 ).

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OMICRON LogicPro

Substation A

Ia
Ib
Ic
CBa

Pole Dead A

CBb

Pole Dead B

CBc

Pole Dead C

Ia
Va
Ib
Vb
Ic
Any Pole Dead
Vc
All Pole Dead

Figure 0-41: Simplified Pole-Dead logic diagram

Fault locations
Faults are simulated at one location along the model transmission line:
1. Zone 1 single-phase-to-ground fault at 50% of the line length
2. Zone 1 three-phase fault at 50% of the line length

VA VB VC
R

IA

50%

VA VB VC
2

IB

IC

Relay

Substation 1
Figure 0-42: Fault locations for the testing of the Pole Dead logic

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Substation 2

Pole-Dead Logic

The fault locations are shown on ( Figure 0-42, page -132 )

Test Cases
The Pole-Dead-Logic scheme is tested for the following conditions:
1. Zone 1 single-phase-to-ground fault with Line side VT with single-pole trip: the relay should trip and detect single pole dead condition.
2. Zone 1 single-phase-to-ground fault with Bus side VT with single-pole trip: - the
relay should trip and detect single pole dead condition.
3. Zone 1 three-phase fault with Line side VT with single-pole trip: - the relay
should trip and detect three pole dead condition.
4. Zone 1 three-phase fault with Bus side VT with single-pole trip: - the relay
should trip and detect three pole dead condition.

Hardware Requirements
The CMC test device is programmed to simulate the substation and power system
environment through the analog and binary outputs. At the same time the binary
inputs are used to monitor the operation of the test object.
A typical wiring diagram for the Pole Dead logic test is shown in ( Figure 0-43,
page -134 ).
The CMC simulates the status of the normally open auxiliary contacts for the three
phases of the breaker (52a-A, 52a-B and 52a-C) and the currents and voltages
during the pre-fault, fault and post-fault stages of the simulation.
All three potential free relay outputs of the CMC have one terminal connected to
(+) DC and the second terminal to the (+) DC terminal of the associated relay
input. The second terminal of each relay input is connected to (-) DC.
One Trip output of the relay is wired to a Trip sense input of the CMC and are used
to change from fault to post-fault state, as well as to measure the operating time
and evaluate the operation of the relay. Two other outputs of the relay are
designated as Single-Pole-Dead and All Pole Dead indicators and are wired to two
other inputs of the CMC. They are used to monitor the correct Pole Dead logic
decision during each test.

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OMICRON LogicPro

IA
CMC

Analog
Outputs

IA

IB

IB

IC

IC

IN

Digital
Outputs

Out 2
Out 3

Digital
Inputs

Analog
Inputs

IN

VA
VB
VC
VN
Out 1

RELAY

VA
VB
VC
VN
+ DC

- DC

52aA

+ DC

- DC

52aB

+ DC

- DC

52aC

Digital
Inputs

Relay
Outputs

In 1

Trip

In 5

Pole-Dead

In 6

3 Pole-Dead

Figure 0-43: Hardware wiring diagram for testing of the Pole-Dead logic

Automatic test sequence


The automatic test sequence will have several steps shown with animation in the
LogicPro software. Only the steps related to the relay at the local end are
executed.

Test object settings


There are no specific settings associated with the Pole Dead logic. Since the more
complicated tests are in the case of single-pole trip and reclosing, the only setting
that has to be changed for this group of test cases is the enabling of Single Pole
Trip.

140

Pole-Dead Logic

Three relay inputs have to be programmed as single phase normally open (52a)
breaker status monitoring inputs.
Three relay outputs should be programmed to indicate Trip, Single Pole Dead or
All Poles Dead.

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OMICRON LogicPro

142

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Make use of our 24/7 international technical support hotline: +43 59495 4444.
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