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IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 51, NO. 2, MARCH/APRIL 2015

FPGA-Based Detailed Real-Time Simulation of


Power Converters and Electric Machines
for EV HIL Applications
Luis Herrera, Student Member, IEEE, Cong Li, Student Member, IEEE,
Xiu Yao, Student Member, IEEE, and Jin Wang, Member, IEEE

AbstractReal-time (RT) simulation plays a fundamental role


in the design and validation of hardware and software for power
electronic converters and electric drives. In this paper, a fieldprogrammable gate array (FPGA)-based RT platform for simulation of power converters and electric machines is presented.
Strategies for modeling power electronic devices are explained
and compared. In addition, a Thevenin-based equivalent model
of a switch is enhanced to model the ON characteristics of these
devices. This motivates the design of an electrothermal algorithm
for FPGA implementation. With respect to electric machines,
different methods for modeling of the saturation characteristics
are evaluated for their use in RT simulation. A procedure to efficiently compute the saturation characteristics is proposed. Finally,
a hardware-in-the-loop model of an electric vehicle drive is used to
illustrate the machine saturation.
Index TermsAC machines, acdc power converters, dcdc
power converters, electric machines, electrothermal effects,
vehicle dynamics.

I. I NTRODUCTION

HE advances in power devices, converters, and electric


machines impact different industries and applications. For
example, the introduction of silicon carbide (SiC) and gallium
nitride (GaN) devices has significantly altered the size of the
power converters components and topologies. In order to introduce these new devices to the current market, real time (RT)
simulation plays a fundamental role in the design and testing of
these converter/machine drives. A typical traction drive system
for an electric vehicle (EV) and/or hybrid EV is shown in Fig. 1.
Due to the increase in the switching frequency, the time step
of the RT model should be much smaller than the converters
switching time step, i.e., Ts  Tsw . Typical CPU-based RT
simulation can only achieve a minimum time step of Ts 10 s
caused by the large bus latencies in a CPU. In order to decrease
this time step as much as possible, graphical processing units
Manuscript received November 15, 2013; revised May 13, 2014; accepted
August 1, 2014. Date of publication August 20, 2014; date of current version
March 17, 2015. Paper 2013-IPCC-908.R1, presented at the 2013 IEEE Energy
Conversion Congress and Exposition, Denver, CO, USA, September 1620,
and approved for publication in the IEEE T RANSACTIONS ON I NDUSTRY
A PPLICATIONS by the Industrial Power Converter Committee of the IEEE
Industry Applications Society.
The authors are with the Department of Eletrical and Computer Engineering, The Ohio State University, Columbus, OH 43210 USA (e-mail:
herrera.46@buckeyemail.osu.edu; li.1012@buckeyemail.osu.edu; yao.110@
osu.edu; wang@ece.osu.edu).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TIA.2014.2350074

Fig. 1.

Traditional EVHEV drive system using an induction machine.

(GPUs) provide a viable alternative [1]. Although GPUs have


good parallel processing capabilities, they inherit the same
drawbacks as CPUs. Field-programmable gate arrays (FPGAs)
have excellent parallel processing capabilities and small bus
latencies that make them ideal for fast RT simulation. Its main
disadvantage is the low-level programming required.
In the literature, several papers have studied different methods and approaches for modeling power devices/power systems
in FPGA. Two well-known methods include state-space modeling and modified nodal approach (MNA) [2], [3]. Moreover,
a state machine to model the characteristics of insulated-gate
bipolar transistors (IGBTs) and metaloxidesemiconductor
field-effect transistors was discussed in [4]. In [5], Matar and
Iravani studied the modeling of power converters and ac machines in FPGA for RT simulation. However, the power converter models were developed using MNA, and the ac machines
were modeled without saturation. Furthermore, most literature
have implemented these models using fixed-point operations
[4][6], whereas only a few have presented models using single,
double, and/or custom floating-point formats [7], [8].
Another important factor in power converter modeling and
simulation is their thermal behavior. It is required to maintain these devices within allowable operating temperature. For
this reason, modeling of the thermal characteristics of power
converters are important during the design and troubleshooting
stages. Recent papers have discussed offline electrical and thermal modeling of power converters [9][13]. In [9], a thermal
model of an IGBT is used in order to compute the junction
temperature of the devices based on the calculated power losses.
In [10], an algorithm for offline simulations of the electrical
and thermal components of power converters is studied. Finally,

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HERRERA et al.: FPGA-BASED DETAILED RT SIMULATION OF POWER CONVERTERS AND ELECTRIC MACHINES

[13] presented an RT implementation of a thermal model incorporated to an actual controlled full bridge for temperature
monitoring.
In EV drives, typical machines for traction drive include
interior permanent-magnet synchronous machine (PMSM), induction machines, and reluctance drives [14], [15]. One of the
most important factors that influences the dynamic and steadystate response of a machine is saturation. Although this topic
has been extensively studied for offline simulations [16], [17],
it is considerably new in its implementation for RT simulation.
In this paper, a new method to model the ON characteristics
of power converters is presented. This method is efficient in
that it does not need to switch between different matrices
based on the switching status. The ON-resistance and forward
voltage (functions of temperature and current) are implemented
as inputs to the system, and thus, the matrix representation is
maintained constant. This motivates the implementation of an
algorithm to efficiently model electrical and thermal behavior
of power converters. This algorithm can be used with any other
method for solving power electronics and was validated with
a real power converter. Finally, an efficient way to analytically
model the saturation characteristics of common three-phase ac
machines is derived and presented in detail.
This paper will be divided as follows: Section II presents the
proposed method to model the ON characteristics of power converters. This is followed by the parallel modeling of electrical
and thermal behavior of power converters. In Section III, different machine models are reviewed, and algorithms for taking
into account their saturation characteristics are discussed. The
electrothermal algorithm is validated in Section IV. An example
of a hardware-in-the-loop (HIL) model of an EV drive is shown
in Section V, taking into account the saturation characteristics
of the machine. Finally, a conclusion and future work are
discussed.
II. E LECTROTHERMAL M ODELING OF
P OWER C ONVERTERS
This section presents a method to efficiently compute the
characteristics of the switching devices. Based on this
approach, an electrothermal algorithm for parallel modeling of
power converters is proposed.
ON

A. Electrical Model
The MNA represents a switch as a resistor and current source
in parallel as shown in Fig. 2(a). By letting the resistor be a
constant value, the current source is changed as follows:

ik ,
if sk+1 = 1
JN =
(1)
GN vk , if sk+1 = 0.
Studying the equivalent equations of the circuit in Fig. 2(a),
we can see that the switch is represented as a small inductor
when ON and a small capacitor when OFF. Deriving the nodal
equations for a complete converter, the system is of the form
Axk+1 = uk xk+1 = A1 uk

(2)

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Fig. 2. Equivalent methods for modeling power switches.

where A and A1 matrices are constant. The current sources for


each switch JN are a component of the input vector uk .
This method is equivalent to using a Thevenin representation shown in Fig. 2(b). In this case, the voltage source is
represented as

ETH k+1 =

RTH ik ,
vk ,

if sk+1 = 1
if sk+1 = 0.

(3)

Analyzing the ON behavior of the Thevenin representation, the


equivalent voltage is
Veq k+1 = ETH k+1 + RTH ik+1
= RTH ik + RTH ik+1 .

(4)

We can see that when ik = ik+1 (i.e., i is in steady state)


Veq = 0. The ON characteristics of a power device are governed
by its ON-resistance ron and forward voltage vf . In order to
include these characteristics into (4) as an input to the system,
we can let the new voltage source ETH be
ETH k+1 = RTH ik + ron ik + vf

(5)

where it is clear that the ON steady state is Veq = ron i + vf .


This proposed representation is particularly useful in the case
where ron and vf are a function of the current and device
junction temperature. Since they are input to the system, the
A1 matrix is still constant. The ON parameters, i.e., ron (i, Tj )
and vf (i, Tj ), are nonlinear terms and need to be recomputed
after every time step. Using conventional MNA, the matrix
A in (2) would have to be recomputed as well as its inverse
at each time step. Compared with a (hybrid) state-space approach, the nonlinear parameters ron and vf also imply the
need to recompute the system and input matrices in xk+1 =
Aj (x, u)xk + Bj (x, u)uk for j = 1, . . . , 2N and N switches
during each time step.
To validate the previous method, a circuit simulation using
MATLAB SimPower Systems was performed with the parameters shown in Table I. Using SimPower Systems, the
ON -resistance and forward voltage were incorporated into the
switch and diode, respectively. The results of this simulation
were then compared with the proposed method by using (26)
in Appendix A. Fig. 3 shows a comparison between these two
results where the green curve represents the results if ron and
vf were to be ignored.

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TABLE I
S IMULATION PARAMETERS FOR C IRCUIT AND P ROPOSED
M ODEL VALIDATION

Fig. 5.

Parallel modeling of electrical and thermal systems.

where matrices Ath , Bth , Cth , and Dth are given in



i
i
d
d
. . . TCN
TC1
. . . TCN
TCcf TCfa ] ,
Appendix A and x = [TC1
d
i 
i
d

u = [P P ] , v = Ta , and y = [Tj Tj TC Tf ] . The total
power losses for the IGBT and diode, i.e., P i and P d ,
respectively, are computed based on the conduction and
switching losses of each device. The conduction losses will be
taken into account using the approach discussed in the previous
section. Therefore, for an actual IGBT (superscript i) and diode
(superscript d)



(8)
= i vf i , Tj , where {i, d}.
Pcond
These conduction losses are included in the electrical model,
and the forward voltage will be modified depending on i and
Tj through each device. To take into account the switching
losses in the electrical model will require detailed knowledge of
the device. For example, the leakage inductances of the device
affect the transient response at different levels. Since a highly
elaborate model of the device increases complexity and overall
time step, the switching losses will be calculated using the
device datasheets [10]. The switching energy is usually given
for an IGBT as follows:

Fig. 3. Inductor and output current comparison.

i
i
i
= Eswon
+ Eswo
Esw

(9)

and the total switching losses can then be computed as


i
i
Psw
= Esw
Fsw .

(10)

C. Algorithm
Fig. 4. Thermal model for an IGBT and diode inside the same module.

B. Thermal Model
The thermal behavior of a switch from its junction temperature to the case is typically specified in the data sheet. Since the
junction temperature is given by
Tjc = Zth,jc Ploss

(6)

there exists an analogy between this equation and a regular


circuit representation where Ploss Iin and Tjc Vjc . For
this reason, the junction to case impedance Zth,jc , the case to
fin Zth,cf , and the fin to ambient Zth,fa are specified as RC
networks.
The complete thermal model for an IGBT and diode inside
the same module or case is presented in Fig. 4. Notice that this
system can be represented as
x(t)

= Ath x(t) + Bth u(t)


y(t) = Cth x(t) + Dth v(t)

(7)

Motivated by the results presented in the previous sections,


an electrothermal algorithm is shown in Figs. 5 and 6. Note that
in Fig. 5, an external pulsewidth modulation signal is fed to
the power loss block. This signal represents the total time for
which the power losses are averaged. Thus, if Tsepwm = Tsw ,
the program is averaging the power losses over one complete
switching cycle. However, if Tsepwm < Tsw , then the power
losses are updated more frequently, and the total losses will
have a ripple based on the ON current through the device.
The flowchart representing the power loss computation algorithm is composed of three main parts:

1) switching loss counter Cswon


, Cswo
;

2) ON current addition itot ;


3) forward voltage and power loss computation.
The superscript = 1, . . . , N implies that each parameter
needs to be computed N switches in a circuit. Although the
algorithm is averaging the power losses for a period of Tepwm ,
it runs at the same time step as the electrical circuit model Ts .
For the same boost converter previously shown, this algorithm is applied to compute the power losses and the thermal

HERRERA et al.: FPGA-BASED DETAILED RT SIMULATION OF POWER CONVERTERS AND ELECTRIC MACHINES

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and power balance (11) can be achieved. The RT implementation and validation of the results presented will be shown in
Section IV.

III. M ODELING OF E LECTRIC M ACHINES

Fig. 6.

The development of dynamic models for electric machines


has been studied for the past several decades. These models can
be categorized by the choice of coordinate systems upon which
is studied and the choice of state variables (e.g., flux linkage
or current). The phase-domain model uses three phase coordinates, i.e., abc, to represent the state variables. The second
uses a combination of phase and quadrature axis variables, for
example, stator quantities are modeled in the phase domain, and
rotor variables are modeled in the dq domain. This method is
known as voltage behind reactance. The last method uses dq
coordinates to represent all the variables [18].
For RT implementation, the dq model offers several advantages such as static inductance parameters and a lower order
system. For this reason, it is one of the most commonly used
machine models. For an induction motor, its dynamics in the
dq frame are given by

Flowchart of the algorithm to compute the power losses.

sr
sr
sr
= psr
vdq
dq + dq + Ridq

(13)

sr
sr
4
where p := d/dt, , R R44 , vdq
, sr
dq , idq R . The matrices , R are shown in Appendix B.
One of the most influential elements that affect the machine
dynamic response is core saturation. However, the model in
(13) does not consider saturation in the mutual inductance. Although several studies of modeling electric machines in FPGA
have been presented in the literature (e.g., see [4], [5], and [8]),
very few have modeled these with saturation characteristics. For
this reason, we briefly review what has been done to account to
model saturation in FPGA and present implementation of these
characteristics using a mathematical derivation.

Fig. 7. Simulation results showing output of the power loss computation


algorithm with Tsepwm = Tsw .

model. The simulation results are shown in Fig. 7. In this


example, Tepwm = Tsw , which can be inferred from the power
loss waveform.
Finally, since the conduction losses are taken into account by
updating the forward voltage and ON-resistance in the electrical
model, the switching losses should be taken into account as well
to achieve power balance.
The power is
Pin = Pout + Pcond + Psw .

(11)

Thus, [10] explains the addition of a current source in parallel


to the input voltage of the converter. This current will have a
value as
Isw =

Psw
Vin

(12)

A. Saturation Modeling
Saturation of an inductor occurs when its core can no longer
store magnetic energy. For example, a typical B-H curve gives a
good representation of saturation as the magnetic field strength
(H) increases and the flux density (B) remains constant. The
main effect of saturation in an ac machine occurs in its mutual
inductance Lm . The leakage inductances of the stator and rotor
remain in air for a significant part of their path, and thus,
saturation does not often occur.
1) FEA Methods: Recent studies have focused on using
finite-element analysis (FEA) to simulate saturation for a threephase machine, particularly PMSM [19], [20]. The machine is
designed using an FEA software such as JMAG [21], and the
saturation characteristics are stored in lookup tables. For FPGA
implementation, these tables are then a function of different
currents id , iq and rotor position r . These tables need to be
quite dense in order to avoid any large jump discontinuities.
This can then be major drawback causing incorrect transient
behavior.

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The matrices L(|m |, ) and Lr (|m |) vary based on the


saturation parameters and are defined as follows:

Ldq
Ldd
Ldq
Lls + Ldd
Lls + Lqq
Ldq
Lqq

Ldq
L =

Ldd
Ldq
Llr + Ldd
Ldq
Ldq
Lqq
Ldq
Llr + Lqq

0
0
0
0
0
0
0

0
Lr =
. (20)
0
(Llr + Lm )
0
Lm
0 (Llr + Lm )
0
Lm
Thus, (19) constitutes the new dq model of a three-phase
induction machine including saturation. The same idea is followed to derived saturated models for other types of machines.

Fig. 8. Typical saturation characteristics for an induction machine.

2) Mathematical Method: Typical saturation characteristics


for an induction machine is shown in Fig. 8. We assume that the
magnetizing flux and current are complex quantities described
in polar coordinates as follows [16]:
m (|m |, ) = |m |ej

(14)

im (|im |, ) = |im |ej .

(15)

Since there is a one-to-one relationship between |m |


and |im |
d|im |
d|m |
d|m | d|im |
=
= Ly
dt
d|im | dt
dt

(16)

where Ly := d|m |/d|im | is defined as the dynamic


inductance.
The following two equations are derived from the derivative
with respect to time of m (14), im (15), and separating it into
its real and imaginary parts (denoted by subscripts d and q,
respectively). Thus
dimd
dimq
dmd
= Ldd
+ Ldq
dt
dt
dt
dmq
dimd
dimq
= Lqd
+ Lqq
.
dt
dt
dt

(17)

The new inductance parameters are


Ldd := Ly cos2 () + Lm sin2 ()
Lqq := Lm cos2 () + Ly sin2 ()
Ly Lm
sin(2)
Ldq = Lqd :=
2

(18)

B. Computational Algorithm
The saturation model presented in the previous section only
requires knowledge of the saturation curve, such as that in
Fig. 8. Therefore, this curve can be represented as

|i |
L
for |im | < |imc |
|m | (|im |) = m m
(21)
f (|im |) |im | for |im | |imc |
m is the slope of the linear region, and f(|im |)|im |
where L
is a (interpolated) function describing the nonlinear saturated
region. In order to make sure there is a smooth transition
between the unsaturated to saturated region or vice versa, it
is required that the function |m |(|im |) C 1 , i.e., continuous
and with continuous first derivative. This will ensure that at the
point |imc |, Lm (|imc |) = Ly (|imc |).
For the FPGA implementation, (19) should be transformed
into state-space form as
disr
dq
1 sr
= L1 (R Lr )isr
dq + L vdq .
dt

(22)

This model is then discretized using typical methods such as


implicit backward Euler, trapezoidal, RungeKutta, etc. The
choice of method depends on the system to be studied. Since the
time step used in FPGA is in the ns range, the forward Eulers
method simplifies computation over other integration methods.
The percent difference compared with RungeKutta is <1% for
a wide range of machine parameters. Thus,
ik+1 = (I + Ts A)ik + Ts Bvk

(23)

where Lm = |m |/|im | (note that it is not constant), and


= tan1 (imq /imd ). The terms Ldd and Lqq correspond to
saturation in their own axis, whereas the terms Ldq = Lqd are
cross-saturation terms. It can be clearly seen that during the
linear region (unsaturated), Ly Lm , and these equations are
identical to the classical unsaturated model of a three-phase
induction machine.
By incorporating (17) into (13), we can redefine the equations for an induction machine in a stationary reference
frame as

for A = L1 (R Lr ) and B = L1 .
However, several challenges arise from (23): The matrices
are time varying and nonlinear, and L1 need to be computed
at every time step. A general procedure for the computation of
the induction machine system with saturation is shown in Fig. 9.
There are different options to compute L1 at every time step.
Since it is a symmetrical matrix, a Cholesky decomposition
could be used. However, we can see that although this matrix is
a function of and |Im |, it is found that det(L) is independent
of , i.e.,

sr
sr
sr
= Risr
vdq
dq + Lr idq + Lp idq .

det(L) = d1 (Lm + Ly ) + d2 Lm Ly + d3

(19)

(24)

HERRERA et al.: FPGA-BASED DETAILED RT SIMULATION OF POWER CONVERTERS AND ELECTRIC MACHINES

Fig. 9.

Procedure for computation of induction machine with saturation.

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Fig. 12. Experimental setup for electrothermal model verification.


TABLE II
P OWER C ONVERTER E LECTRICAL PARAMETERS

TABLE III
T HERMAL PARAMETERS

Fig. 10. Computation of L1 .

Fig. 11. Boost converter for RT electrothermal simulation. (a) Electrothermal


boost converter. (b) Equivalent circuit in MNA and Thevenin equivalent.

where d1 , d2 , d3 are constants defined in Appendix B. It can be


seen from (24) that det(L) = 0 t. Thus, matrix L is always
nonsingular. Taking advantage of (24), the matrix inverse is
then computed by calculating the determinant and the adjoint
matrix in parallel, i.e., L1 = L / det(L). The procedure is
outlined in Fig. 10.
IV. E LECTROTHERMAL A LGORITHM VALIDATION
In order to demonstrate the electrothermal algorithm discussed in Section II, a model of a boost converter is built in
an RT simulator as shown in Fig. 11.
A. Hardware Description
1) RT Platform: An Opal RT-based platform is used in order
to simulate the described electrothermal model in RT [22]. This

Fig. 13. Electrothermal RT power loss validation.

platform utlilizes a Xilinx Virtex 6 FPGA in order to model


the system. The analog-to-digital converter has a time rate of
2.5 s, the digital-to-analog converter has a time rate of 1 s,
and the digital input/output has a refresh rate of 0.2 s.
2) Power Electronics Platform: The boost converter is built
based on a Powerex PS22A78-E IPM [23]. To accurately measure the power losses, a Yokogawa WT3000 power meter was
used [24]. The dc power supply is a Magna Power TS150016.5. The controller is a TI TMS320F28335 and is used to send

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Fig. 14. Comparison of the experimental and RT results by a change in voltage input. (a) Experimental results. (b) RT results.

Fig. 15. Comparison of a change in power to validate the algorithm and the
thermal model.

Fig. 16.

RT results showing the junction temperature of the power devices.

Fig. 17.

EV traction drive RT HIL example.

the gating signals to the converter. The experimental setup is


shown in Fig. 12.
B. Model Description
The main difference between the boost converter in
Fig. 11(a) and that in Section II is the introduction of the current
source isw (discussed in Section II-B). The equations for this
circuit are similar to (26) in Appendix A.
The values of the inductor, capacitor, thermal model, etc. are
shown in Tables II and III. These values are based on the actual
power converter parameters. In order to compute the forward
voltages for the IGBT and diode, a surface fit was used based
on the device datasheet, i.e.,




vfi Tji , ioni = 0.8433 + iion 0.02905 + (5.818e5 )Tji





vfd Tjd , idon = 1.023 + idon 0.03469 5.896e5 Tjd .
(25)
The same procedure is applied to the switching energy of the
i
IGBT Esw
. Finally, the diode switching losses due to its reverse

d
recovery current are assumed to be constant at Psw
= 3 W. The
time steps of the boost converter, the power loss algorithm, and
the thermal model are Ts = 200 ns.

C. Experimental and RT Results


Fig. 13 presents a comparison of the RT calculated power
losses at different input current against the actual power

HERRERA et al.: FPGA-BASED DETAILED RT SIMULATION OF POWER CONVERTERS AND ELECTRIC MACHINES

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Fig. 18. HIL results of an EV drive system. (a) System response to step input. (b) HIL closed-loop speed control.
TABLE IV
RT EV D RIVE S IMULATION PARAMETERS

converter power losses. We can see that the algorithm closely


matches the experimental values.
To test the validity of the electrical circuit, we perform a
change in the input voltage from 300 to 325 V. A comparison
of the experimental and RT results is shown in Fig. 14. It can be
seen that the RT model follows well the experimental results.
The next step involves validation of the thermal model.
The input voltage is changed from Vin = 200 V (1.03 kW) to
Vin = 325 V (2.73 kW). In this case, the losses in the IGBT
and diode will contribute to rise in the heatsink temperature.
Validating this rise in temperature will also give an indication of
the calculation of the IGBT and diode power losses. The results
of the experimental and RT waveforms are shown in Fig. 15.
Finally, in Fig. 16, a duty cycle step change is introduced to
the system to show the estimated junction temperatures of the
IGBT and diode in RT.
V. RT S IMULATION OF AN EV D RIVE
An FPGA model of a three-phase induction machine
with saturation is modeled using the procedure outlined in
Section III. The complete setup is shown in Fig. 17. In order
to control the EV drive, an external Wanda 3U target machine
running a Linux operating system is used [22]. The results of
the simulation with and without control are shown in Fig. 18.
A. Model and Saturation Characteristics
The EV drive parameters are listed in Table IV, and the
saturation characteristics are shown in Fig. 19. Notice that in
Fig. 19(b), at the saturation point |imc | = 1.25 A, the inductances Lm (|imc |) = Ly (|imc |).

Fig. 19. Saturation characteristics of the machine in Table IV. (a) Mutual flux.
(b) Dynamic and static inductance.

B. RT Results
The achieved time step of the EV drive without saturation
is Tsunsat = 200 ns and with saturation is Tssat = 650 ns. One
of the advantages of a fast simulation time step is the possibility of running the model at higher switching frequencies.
In Fig. 18(a), the inverter is switching at Fsw = 24 kHz. In
here, rated voltage is applied to the machine without closedloop control.
In Fig. 18(b), vector control is used to regulate the machine
speed and flux. The details of the control can be found in [25].
The impact of the saturation in the magnetizing flux to the
controller is part of future study.
The saturation of the motor is illustrated in Fig. 20. It is
possible to see that the starting electromechanical torque for
the saturated condition has lower magnitude than that for the
unsaturated one. Furthermore, the torque frequency and phase
are not affected by the saturation, validating previous results in
saturation modeling [16], [17], [26], [27].
VI. C ONCLUSION AND F UTURE W ORK
In this paper, a platform for modeling detailed power converters and electric machines geared toward EV applications
has been developed. A switch representation including the
ON parameters was proposed in Section II. Using this switch
representation, an algorithm for electrothermal modeling of
power converters was presented. In addition, this model was
validated using a Powerex PS22A78-E IPM.

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Fig. 20. Results for the machine with input voltage fundamental frequency of
f = 30 Hz.

Furthermore, a mathematical derivation was presented to


model the saturation and cross-saturation effects in an induction
machine. A method to compute L1 was presented to decrease
the simulation time step. Finally, an example was presented
to show a comparison of saturated and unsaturated machine
conditions. Using the previously discussed methods, a case
study of an EV drive using an induction machine was modeled
in FPGA at Tssat = 650 ns and Tsunsat = 200 ns. A comparison
of the saturated and unsaturated models was presented showing
the importance of modeling saturation.
Future work includes developing and validating an electrothermal model for a three-phase inverter. In addition, temperature effects on the machine model will be studied in the future
to further complete a detailed model of an EV drive system. The
proposed modeling approach will also be useful in validating
control strategies. For example, we will study model predictive
control to regulate an EV drive and study its effects on the
power losses and junction temperature of the power devices.
A PPENDIX A
E LECTRICAL T HERMAL M ATRICES
The boost circuit described in Section II-A is shown in
Fig. 21. This system is described as follows:

R + r

0
1
0
L
l
iL
i
i
RTH 1
0
id
RTH

1
1
0
RTH

vsw

1
vout
0
1
0 Gc + rload

Vin EthL
i
ETH

d
ETH
Jcap

(26)

n
, and EthL =
where RL = L/Ts , Gc = C/Ts , Jcap = Gc Vout
RL iL k . Finally, the voltage input for the IGBT is given by

i
RTH
(iL k id k ) + Vce k , if sik+1 = 1
i
ETH k+1 =
if sik+1 = 0
vsw k ,
(27)

Fig. 21. Boost converter to illustrate proposed modeling of ON characteristics.


(a) Boost converter described in Section II. (b) Equivalent circuit in MNA and
Thevenin form.

and for the diode



d
(id k ) + Vf k ,
RTH
d
ETH k+1 =
vsw k vout k ,

if sdk+1 = 1
if sdk+1 = 0.

(28)

The diodes ON-state is decided by


sdk+1 = sdk (id k 0) + sdk ((vsw k vout k ) > Vf k ).

(29)

The thermal model matrices in (7) are defined as


Ath = Diag


1
1 1
1
1
1
,
i ,. . . , i , d ,. . . , d ,
1
N 1
N Rcf Ccf Rfa Cfa

1
0
C1i
.
..

.
.
.

1
0
Ci

N
1
0

C1d
Bth =

..
..
.
.

1
0
d
CN

1
1

Ccf Ccf

Cth

1
Cfa

1
0
=
0
0

1
Cfa

1
0
0
0

0
1
0
0

0
1
0
0

1
1
1
0


1
1
1
1
, Dth =
1
1
1
1
(30)

HERRERA et al.: FPGA-BASED DETAILED RT SIMULATION OF POWER CONVERTERS AND ELECTRIC MACHINES

where q = Rq Cq for q {1, . . . , N } and {i, d}.


A PPENDIX B
E LECTRIC M ACHINE M ATRICES
The matrices in (13) are

0
0
0
0

=
0
0
0
0
0 ( r )

0
0

( r )
0

R = Diag (rs , rs , rr , rr )

(31)

where is the angular speed of the reference frame ( = 0 for


stationary frame), and r is the rotor angular speed. In addition,
sr
sr
these matrices assume the vectors sr
dq , idq , and vdq are of the
s
s
form xsr
rd , x
rq ) , where x = , i, or v.
dq = (xd , xq , x
Finally, the constants in (24) are
d1 := L2ls Llr + Lls L2lr
d2 := L2ls + L2lr + Lls Llr
d3 :=L2ls L2lr

(32)

used to compute det(L).


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1711

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Luis Herrera (S10) received the B.S. degree in


electrical engineering (with a minor in physics)
from the University of Tennessee at Martin, Martin,
TN, USA, in 2010. He is currently working toward the Ph.D. degree at The Ohio State University,
Columbus, OH, USA.
His current research interests include modeling
and control of dc microgrids, field-programmable
gate array modeling of fast-switching power converters, hardware-in-the-loop simulations, and active
power filtering.

Cong Li (S09) was born in Hubei, China, in 1987.


He received the B.S. and M.S. degrees in electrical
engineering from Wuhan University, Wuhan, China,
in 2007 and 2009, respectively. He is currently working toward the Ph.D. degree in electrical engineering
at The Ohio State University, Columbus, OH, USA.
His current research interests include power electronic circuits and their applications in the renewable
energy area, modeling and application of thermoelectric cooling technology in power electronic circuits, and wideband-gap device applications.

1712

IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 51, NO. 2, MARCH/APRIL 2015

Xiu Yao (S10) received the B.S. and M.S. degrees


from Xian Jiaotong University, Xian, China, in
2007 and 2010, respectively. She is currently working toward the Ph.D. degree at The Ohio State University, Columbus, OH, USA.
Her current research interests include dc arc fault
detection in high-voltage and high-power electronic
systems, harmonic elimination of multilevel inverters, and the utilization of modular multilevel converters in high-power systems.

Jin Wang (S02M05) received the B.S. degree


from Xian Jiaotong University, Xian, China, in
1998, the M.S. degree from Wuhan University,
Wuhan, China, in 2001, and the Ph.D. degree from
Michigan State University, East Lansing, MI, USA,
in 2005, all in electrical engineering.
From September 2005 to August 2007, he was a
Core Power Electronics Engineer with Ford Motor
Company, where he contributed to the traction drive
design of the Ford Fusion Hybrid. In September
2007, he became an Assistant Professor with the Department of Electrical and Computer Engineering, The Ohio State University,
Columbus, OH, USA. He was promoted to Associate Professor with tenure in
2013. He has over 60 peer-reviewed journal and conference publications and
two patents.
Dr. Wang received the IEEE Power Electronics Society Richard M. Bass
Young Engineer Award and the National Science Foundations CAREER
Award in 2011, the Ralph L. Boyer Award for Excellence in Undergraduate
Teaching Innovation in 2012, and the Lumley Research Award of the College
of Engineering at The Ohio State University in 2013. He has been an Associate Editor of the IEEE T RANSACTIONS ON I NDUSTRY A PPLICATION since
March 2008.

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