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Takshshila Institute of Engineering & Technology

Department of Electronics and Communication

2012

EDC
(CS-304)- NON- GRADING

QUIZ - I
Multiple Choice Questions
1. The PIN diode is used as
(a) rectifier

(b) voltage controlled attenuator

(c) amplifier

2. The diode used for a power limitter is
(a) signal diode

(b) Zener diode

(c) PIN diode

(d) power diode

3. Most suitable diode for a phase shifter is
(a) power diode (b) avalanche diode (c) PIN diode
4. The PIN diode is used as
(a) square wave modulator

(b) triangular wave modulator (c) sine wave modulator

5. No moving part is associated with the change in capacitance of
(a) gang capacitor (b) trimmer

(c) varicap

6. The diode which permits remote tuning, is
(a) power diode (b) Varactor

(c) Zener diode

7. The Zener effect is valid
(a) below 5 V (b) above 5 V

(c) equal to 5 V

(d) none of the above

8. The avalanche effect is valid
(a) below 5 V

(b) above 5 V

(c) equal to 5 V

(d) none of these

9. The electron-hole pairs are generated in
(a) Zener mechanism (b) avalanche mechanism

(c) none of the two

10. The diode which is preferred for dc coupling is
(a) signal diode

(b) power diode

(c) LED

(d) Zener diode

11. Power diodes are used in

Page 1 of 25
Prof.D.K.singh

Takshshila Institute of Engineering & Technology
Department of Electronics and Communication

2012

EDC
(CS-304)- NON- GRADING
(a) rectifier

(b) amplifier

(c) mixer

12. The power diodes are made of
(a) silicon (b) germanium (c) aluminium
13. Signal diodes are called
(a) general-purpose diodes (b) special purpose diodes

(c) high power diodes

14. The PIN diode works as rectifier at
(a) low frequency (b) high frequency (c) all frequencies
15. The PIN diode has
(a) an intrinsic layer between heavily doped p and n-layers
(b) an n-layer between heavily doped p and n-layers
(c) and an p-layer between heavily doped p and n-layers
16. The Schottky diode turns OFF
(a) faster w.r.t p-n junction

(b) slower w.r.t. p-n junction

(c) at the same speed as p-n junction
17. The minority carrier storage time in the Schottky diode is
(a) infinite (b) zero

(c) 0.15 ms

18. Very close to the ideal diode is
(a) Zener diode (b) signal diode (c) Schottky diode

Page 2 of 25
Prof.D.K.singh

Why is the base width very thin? 3.D. Draw block diagrams of n-p-n and P-N-P transistors with batteries 5.NON. Discuss the role of emitter.Takshshila Institute of Engineering & Technology Department of Electronics and Communication 2012 EDC (CS-304). What is the meaning of symbols ICEO and ICBO? 13. How transistor α and β are related? 8. What is thermal runaway? 19. What carrier makes up the largest component of current inside p-n-p and n-p-n transistors? 11. What is 'fixed' in the fixed biased circuit? 17.singh . What is the relation between ICO and ICEO? 14.K.GRADING Questions for Practice 1. What is the typical value of α? 7. What are the three possible configurations of BJT? 12. How does self bias circuit achieve thermal stability? Page 3 of 25 Prof. What is collector reverse saturation current? What is the cause of it? 10. How can you justify neglecting VBE in fixed bias circuit but not in self-bias circuit? 16. For normal operation how the base emitter and base collector junctions are biased? 4. What is the typical value of β? 9. What is α? How it is related with transistor currents? 6. Where do you bias transistor? Why do you bias it? 15. base and collector regions in the operation of BJT 2. How does the fixed bias circuit biases the base emitter junction and collector base junction? 18.

25. Find the expression for the collector current IC in terms of the base current IB the reverse saturation current ICO and β. Discuss briefly the charge transport mechanism in a BJT. Derive an expression for the terminal currents in a p-n-p transistor 24. Obtain IC when the transistor is used in CE configuration with IB = 0. A Ge transistor with α = 0.singh .GRADING 20.2 mA 26.98 gives ICO = 12 μA when used in the CB configuration. 23.K. How is a DC load line plotted on the output characteristic of BJT? 21. Why transistor action cannot be achieved by connecting two diodes back to back? Page 4 of 25 Prof. cut-off. Define α and β of a transistor and deduce the relationship between them. Draw the output characteristics of an n-p-n transistor in CE configuration and indicate the active. 22.D. and saturation regions.Takshshila Institute of Engineering & Technology Department of Electronics and Communication 2012 EDC (CS-304).NON.

K.singh . Current amplification factor in CB configuration is (a) α (b) 1 + β (c) 1/(1 + β) (d) β 2. Leakage current in CE configuration is (a) IC (b) ICBO (c) ICEO (d) ICB 6. Which one is correct (a) IE = IB + IC (b) IC = IB + IE (c) IE < (IB + IC) 10.NON. ICEO and ICO are related as (a) ICEO = (β + 1)ICO (b) ICEO = αICBO (c) ICEO < ICBO 7.GRADING QUIZ . 8.Takshshila Institute of Engineering & Technology Department of Electronics and Communication 2012 EDC (CS-304). Collector current and reverse saturation collector current are related as Page 5 of 25 Prof. α is related to β as (a) α = β/(1 + β) (b) α = β/(1 − β) (c) α = 1/(1 + β) (b) β is related to α as (a) β = α/(1 + a) (b) β = α/(1 − α) (c) β = (1 − α)/α 9. The value of α is (a) unity(b) very near to unity(c) greater than unity(d) very much less than unity. Current amplification factor in CE configuration is (a) α (b) 1 + β (c) 1/β (d) β 3. Leakage current in CB configuration is (a) ICBO (b) IBCO (c) ICEO (d) IECO 5. Current amplification factor in CC configuration is (a) α (b) 1 + β (c) 1/β (d) β 4.II Multiple Choice Questions 1.D.

The doping level of emitter region is (a) greater than collector and base region (b) less than collector and base regions (c) less than base but greater than collector region 15. The arrow in a transistor terminal represents (a) emitter (b) collector (c) base 13.GRADING (a) IC > ICEO (b) IC < ICEO (c) ICO = ICEO 11.Takshshila Institute of Engineering & Technology Department of Electronics and Communication 2012 EDC (CS-304). Which is correct (a) IB < IC < IE (b) IE < IB < IE (c) IB = IC = IE 12.t the other two (b) smallest w.t the other two (c) equal to the rest of the two (d) smaller than emitter but bigger than base 16.r.D. The physical dimension of collector region is (a) largest w.singh .r.K. For normal amplifier operation (a) EB junction is forward and CB junction is reverse biased (b) EB junction is reverse biased and CB junction forward biased (c) both are forward biased Page 6 of 25 Prof. The arrow in a transistor represents (a) the direction of conventional current (b) the opposite direction of conventional current (c) the direction of flow of electrons 14.NON.

The phase difference between the input and output currents in CB configuration are (a) 180° (b) 0° (c) 90° (d) 45° 21. ICBO is (a) collector to base current when emitter is open (b) collector to base current when base is grounded (c) collector to base current when base is connected to a resistance 23.K. CB transistor has (a) lower input and higher output resistances (b) higher input and lower output resistances (c) low input and output resistances 18. The phase difference between the input and output current in CC configuration are (a) 180° (b) 0° (c) 90° (d) 30° 22. CE transistor has (a) lower input and higher output resistances (b) higher input and lower output resistances (c) medium input and output resistances 19.NON.D.Takshshila Institute of Engineering & Technology Department of Electronics and Communication 2012 EDC (CS-304). ICEO flows in (a) collector and emitter leads (b) collector and base leads (c) emitter and base leads Page 7 of 25 Prof.singh . CC transistor has (a) lower input and higher output resistances (b) higher input and lower output resistances (c) low input and output resistances 20.GRADING 17.

Takshshila Institute of Engineering & Technology Department of Electronics and Communication 2012 EDC (CS-304).GRADING 24. In p-n-p transistor the emitter current flows (a) out of emitter lead (b) into emitter lead (c) neither out nor in the emitter lead 25. In a BJT the (a) base region is sandwiched between emitter and collector (b) emitter region is sandwiched between base and collector (c) collector is sandwiched between base and emitter 26. The quiescent state of transistor is when (a) biased but no signal is applied (b) it is unbiased (c) no current flows 27. Maximum swing of signals occurs when Q-point along load line is selected at (a) middle of the output characteristic (b) the saturation point (c) the cutoff point 28. The emitter efficiency of a junction transistor decreases with (a) decrease of emitter doping (b) increase of emitter doping (c) decrease of base width (d) decrease of base doping Page 8 of 25 Prof.K.D.singh .NON.

singh . Draw the h. Page 9 of 25 Prof. 3. equivalent circuit of a MOSFET and explain the significance of the different elements of the circuit.K. distinguish between conditions of accumulation. Explain operation of a MOSFET and its use as an amplifier.NON. 2.f. What is the condition of strong inversion? 4. depletion and inversion in relation to a MOS structure.GRADING Questions for Practice 1. With the help of suitable band diagrams.D.Takshshila Institute of Engineering & Technology Department of Electronics and Communication 2012 EDC (CS-304). What is meant by static and dynamic RAM? Sketch the circuits of (a) a MOS inverter and (b) a 1-bit memory cell using MOSFETs and explain how they operate.

the source or drain 5.r. The polarity of the gate w. BJT (c) medium w.K. the source or drain (b) low w.Takshshila Institute of Engineering & Technology Department of Electronics and Communication 2012 EDC (CS-304). The field effect transistor is an (a) unipolar device (b) bipolar device (c) none of the above 4.t.r.D.r. the source or drain (c) moderate w.t. The drain current of the n-channel JFET increases with (a) increasing positive voltage at the gate (b) decreasing positive voltage at the gate (c) constant voltage at the gate Page 10 of 25 Prof.III Multiple Choice Questions 1.t. The doping of substrate is (a) high w.t. The charge carriers in an n-channel JFET are (a) electrons (b) holes (c) protons (d) neutrons 8. BJT 3.t.r.GRADING QUIZ .singh . The input impedance of the field effect transistor is (a) very low w. The main types of field effect transistors are (a) UJT and FET (b) BJT and FET (c) JFET and MOSFET 2.r. The n-channel field effect transistor has (a) p-type substrate (b) n-type substrate (c) no substrate 6. the source in n-channel JFET is (a) positive (b) negative (c) neutral 7.t.t.r.NON. BJT (b) very high w.r.

the drain current becomes (a) zero (b) infinite (c) constant Page 11 of 25 Prof. The parameters of JFET are related as (a) gm = rd/μ (b) gm = μ/rd (c) gm = μrd 11.K. The field effect transistor offer (a) low degree of isolation between input and output (b) high degree of isolation between input and output (c) complete short circuit between input and output 14.t. The field effect transistor is (a) less noisy w.D.Takshshila Institute of Engineering & Technology Department of Electronics and Communication 2012 EDC (CS-304). At pinch-off.NON. BJT (b) low w. For quiet reception the front end of FM tuner contains (a) BJT (b) FET (c) UJT (d) SCR 16.t.singh .t. The gain-bandwidth of the field effect transistor is (a) high w. BJT (b) more noisy w. BJT 15. The field effect transistors are (a) voltage controlled device(b) current controlled device (c) neither current nor voltage controlled device 13. The JFET are normally used in (a) Ohmic region(b) saturation region(c) cut-off region 10. BJT (c) equal to the BJT 17.t. The IDSS of the FET is (a) independent of pinch off voltage (b) dependent on pinch off voltage 18.r.GRADING 9.r. The input resistance of MOSFET is of the order of (a) 100 MΩ (b) 10 Ω (c) 1 KΩ 12.r.r.

4 V (c) 5 V (d) 0 26.0961 K Page 12 of 25 Prof. εr = 16. IDSS = 8 mA. the pinch-off voltage will become (a) more (b) less (c) remains unaffected 22. If the reverse bias in a FET is increased. The high frequency gain of the FET is mainly limited by (a) Cgs (b) Cds (c) Cgd 20.D.5 V (b) 1.931 K (d) 0.NON.Takshshila Institute of Engineering & Technology Department of Electronics and Communication 2012 EDC (CS-304).854 × 10−14 F/cm.singh . The minimum value of VDS to operate in the pinch-off region with Vpo = − 4 V. μn = 0.GRADING 19. 29 alongwith L = 20 μm. and VGS = −3 V is (a) 4 V (b) 1 V (c) −4 V (d) −7 V (Hint: VDS = VGS − VPO = −3 V − (−4 V) =1 V) 25.13 m2/Vs is (a) 1 K (b) 961 K (c) 0. The Vpo of an n-channel JFET with ND = 1016/cm3.K. εo = 8. In an FET (a) both junctions are forward biased (b) both junctions are reverse biased (c) one junction forward biased and the other reverse biased 21. the FET is operated in (a) VVR region (b) pinch-off region (c) avalanche breakdown region 23. its gm will (a) increase (b) decrease (c) not be affected (d) suddenly falls to zero 24.5 μm is (a) 1. The rd(ON) of an n-channel JFET with parameters in prob. a = 0. For an amplifier. When the reverse bias between the gate and the source increases. Z = 10−3 m.

For values of drain voltage smaller than gate voltage. Discuss the operation of each circuit and hence. L = 20 μm.NON.D. 29. JFETs are normally used in (a) Ohmic region (b) saturation region (c) cut-off region (d) breakdown region. Why is the bias stabilization required in transistor amplifiers? What are the various bias stabilization methods? Draw the circuits and discuss their relative advantages and disadvantages.04 mA(d) 0. Draw fixed bias and a self-bias circuit for CE configuration. The IDSS of an n-channel JFET with ND = 1022/m. 31. Page 13 of 25 Prof. In a MOSFET. In a MOSFET the threshold voltage can be lowered by (a) increasing the gateoxide thickness (b) reducing the substrate concentration (c) increasing the substrate concentration (d) using the dielectric of lower constant.Takshshila Institute of Engineering & Technology Department of Electronics and Communication 2012 EDC (CS-304). a = 0.13 m2/Vs. z = 10−3m.K.4 mA (b) 100. a MOSFET acts as a voltage controlled (a) current source (b) resistor (c) voltage source (d) capacitor. μn = 0. is (a) 10. Questions for Practice 1. 30.5 μm.4 mA (c) 1. explain which circuit gives better stability.104 mA 28.singh .GRADING 27. a low threshold voltage can be achieved by (a) using the gate dielectric of lower dielectric constant (b) increasing the substrate concentration (c) decreasing the substrate concentration (d) using a thick gate oxide. Vpo = 5 V. 2.

The maximum output swing can be obtained when the Q-point is (a) near saturation point (b) near cut-off point (c) in the middle of the load line 2.D.singh .K. What value of stability factor should be selected? (a) infinity (b) zero (c) finite 3. For good stability the Q-point should (a) vary (b) fixed (c) none of these 4. The stability factor lies in between (a) zero and unity (b) unity and (1 + β) Page 14 of 25 Prof.Takshshila Institute of Engineering & Technology Department of Electronics and Communication 2012 EDC (CS-304). Most popular bias arrangement is (a) fixed base bias (b) collector to base bias (c) voltage divider bias 7. The voltage divider bias is used to make the Q-point (a) independent of β (b) independent of VBE (c) dependent of β 6.NON. Improper biasing leads to (a) distortion in output (b) distortion in input (c) heavy loading 8.GRADING QUIZ IV Multiple Choice Questions 1. For an amplifier junctions of BJT should be biased as (a) base-emitter and base-collector both reverse biased (b) base-emitter forward and base-collector reverse biased (c) base-emitter and base-collector both forward biased 9. The positive peak of the signal will be clipped off if the Q-point shifts towards (a) cut-off (b) saturation (c) active regions 5.

GRADING (c) (1 + β) and infinity 10.NON. With increasing value of the stability factor.Takshshila Institute of Engineering & Technology Department of Electronics and Communication 2012 EDC (CS-304). the Q-point (a) becomes poor (b) becomes better (c) is not affected 12.singh . The bypass capacitor across the emitter resistance (a) increases the emitter current (b) increases the output signal (c) improves the stability factor 15.K.D. The best Q-point in an amplifier for faithful reproduction of the signal is selected (a) near cut-off (b) near saturation (c) in the middle of the active region 11. In the saturation region of the BJT (a) VCE = VCC (b) VCE ≅ 0 (c) VCE = 5V 14. The thermal stability of fixed base bias circuit is (a) poor (b) good (c) best 13. The stability factor S = β + 1 is in the case of (a) fixed base bias (b) (b) collector to base bias Page 15 of 25 Prof.

singh .r. 4. Show that the voltage gain of the bootstrapped amplifier is essentially unity.K.Takshshila Institute of Engineering & Technology Department of Electronics and Communication 2012 EDC (CS-304). Using this configuration.NON. 3. derive expression for the voltage gain of an emitter follower amplifier. Why the value of R3 in bootstrapped amplifier cannot be more than few hundred ohm? Justify it.GRADING (c) fixed base bias with emitter resistance 16. Draw the small signal low frequency model of a BJT in CE configuration.t. The stability factor of collector to base bias is better (a) w. Inclusion of an emitter resistance in any type of biasing circuit (a) improves stability factor (b) (b) worsens stability factor (c) does not change stability factor Questions for Practice 1.D. Page 16 of 25 Prof. 2. the fixed base bias (b) (b) collector to base bias with emitter resistance (c) self bias 17. Derive an expression for the voltage gain in the CE transistor amplifier in terms of hparameters.

K.NON.Takshshila Institute of Engineering & Technology Department of Electronics and Communication 2012 EDC (CS-304).singh .D. In Class-AB amplifier the output current flows for (a) full cycle (b) more than half cycle Page 17 of 25 Prof. The voltage gain of a common collector amplifier is (a) always equal (b) always positive (c) always negative 3.GRADING QUIZ V Multiple Choice Questions 1. The output current in a Class-C amplifier flows for (a) full cycle (b) more than half cycle (c) less than half cycle (d) half cycle 5. The voltage gain of a common base amplifier is (a) less than unity (b) always positive (c) always negative 4. The relationship between input and output voltage of a common emitter amplifier is (a) always unity (b) always positive (c) always negative (d) less than unity 2.

The dimension of all the four h-parameters of a BJT are (a) the same (b) different (c) none of these 10.GRADING (c) less than half cycle (d) half cycle 6.D. hfe = 100. hre = 10 × 10−4. hoe = 10 × 10−6S Page 18 of 25 Prof. hre = 10 × 10−4. hoe = 10 × 10−6S (b) hie = 10 KΩ. Voltage gain of CB amplifier configuration has phase shift of (a) 180° (b) 90° (c) 360° (d) 45° 8. The h-parameters of a BJT are (a) dependent on RL (b) dependent on ICQ (c) independent of ICQ (d) constant 9. hfe = 100. In Class-A amplifier the output current flows for (a) full cycle (b) more than half cycle (c) less than half cycle (d) half cycle 7.K. The typical value of h-parameters of a BJT are (a) hie = 1 KΩ.singh .Takshshila Institute of Engineering & Technology Department of Electronics and Communication 2012 EDC (CS-304).NON.

The amplifier that offers highest input resistance and the lowest output resistance (a) CE (b) CB (c) CC Page 19 of 25 Prof.D. The h-parameters of a BJT at high frequency (a) remains constant (b) varies with frequency (c) none of these 14. The configuration that offers highest input resistance is (a) CE (b) CB (c) CC 15.K. In an amplifier the output varies (a) linearly for any amount of input amplitude (b) linearly for restricted range of input amplitude (c) nonlinearly for any amount of input amplitude 12. hfe = 100.singh . hre = 10 × 104. hfe = 100. hre = 10 × 10−4.Takshshila Institute of Engineering & Technology Department of Electronics and Communication 2012 EDC (CS-304).GRADING (c) hie = 1 KΩ. hoe = 10×10−6S (d) hie = 100 KΩ.NON. hoe = 10 × 10−6S 11. The h-parameters of a BJT are called (a) small signal parameters (b) large signal parameters (c) T-parameters (d) Z-parameter 13.

singh . The configuration that offers highest power gain is (a) CE (b) CB (c) CC 18. and power gains (b) medium current gain.NON. voltage. The CE amplifier configuration is preferred over others because it offers (a) highest current gain.D.GRADING 16. voltage. and power gains (c) lowest current gain. The configuration that offers highest current amplification ratio but lowest voltage amplification is (a) CE (b) CB (c) CC 17. the hfe of the BJT is approximately (a) 500 Page 20 of 25 Prof.K. voltage.Takshshila Institute of Engineering & Technology Department of Electronics and Communication 2012 EDC (CS-304). The input resistance of a CC configuration is 100 KΩ with its load of 1 KΩ. and power gains 21. The most popular general purpose amplifier configuration is (a) CC (b) CE (c) CC 20. The important considerations in cascading of different configurations of BJT amplifier is (a) matching of impedances (b) matching of current gain (c) matching of loads 19.

D. The input voltage connected across the input of a CC stage is 5∠0°.NON. What is the other name? (a) CB (b) CE Page 21 of 25 Prof.Takshshila Institute of Engineering & Technology Department of Electronics and Communication 2012 EDC (CS-304).singh . The two stage CC amplifier configuration provides approximately (a) unity voltage gain (b) 50 voltage gain (c) none of these 24. The buffer stage can employ the configuration (a) CB (b) CE (c) CC 26. The stage which avoids loading the previous stage is called buffer amplifier.GRADING (b) 100 (c) 50 22. Its output voltage would be (a) 5∠360° (b) 5∠180° (c) 5∠0° (d) none of these 25. The configuration that behaves as a constant current source is (a) CB (b) CE (c) CC 23.K.

(d) The upper 3dB frequency of a single stage amplifier is 1 MHZ. (a) 2 (b) 33 (c) 4 Page 22 of 25 Prof.singh .GRADING (c) CC 27. the bandwidth (a) remains constant (b) increased by the same factor (c) decreased by the same factor (d) none of the above 30.K.NON.Takshshila Institute of Engineering & Technology Department of Electronics and Communication 2012 EDC (CS-304).D. The gain-bandwidth of an amplifier is (a) always constant (b) always variable (c) none of these 29. Which configuration is preferred for such case (a) CB (b) CB (c) CC 28. The upper 3dB frequency of n-identical cascaded stages is (a) (b) (c) nf2 31. The prime importance in designing a circuit is voltage amplification. The gain of an amplifier reduces by a factor of 10. how many identical stages will result in approximately 510 kHz upper 3 dB frequency.

The bootstrap amplifier is associated with (a) high input impedance (b) low input impedance Page 23 of 25 Prof.90/f2 (c) (d) 36. The bandwidth of an amplifier is approximately (a) proportional to its upper 3 dB frequency (b) inversely proportional to its upper 3 dB frequency (c) product of its 3 dB frequencies 35.singh .NON. what will be the 3 dB frequency of ten identical cascaded stages (a) 0. The upper 3 dB frequency of a single stage amplifier is 1MHz.Takshshila Institute of Engineering & Technology Department of Electronics and Communication 2012 EDC (CS-304).D.35/f2 (b) tr = 0. The rise time tr for a square wave input of an amplifier is related to its 3 dB frequency in case of square wave input as (a) tr = 0.K.1 MHz (b) 100 kHz (c) 268 kHz (d) 168 kHz 33.GRADING (d) 10 32. The effective bandwidth of indentically cascaded stages (a) decreases (b) very low (c) none of the above 34.

NON.D. At half power frequencies. The current gain of a Darlington pair is approximately (a) β / (1 + β) (b) β (c) β2 40. the CE amplifier has (a) lower input resistance (b) lower current amplification (c) higher output resistance (d) higher current amplification 42.singh .5 dB 41.K. The Darlington pair is characterized with (a) very large output impedance (b) very large input impedance (c) very low input resistance 38. Compared to a CB amplifier. One of the effects of negative feedback in amplifier is to Page 24 of 25 Prof.GRADING (c) none of these 37.Takshshila Institute of Engineering & Technology Department of Electronics and Communication 2012 EDC (CS-304). an amplifier voltage gain is lowered by (a) 6 dB (b) 3 dB (c) 2 dB (d) 0. The output impedance of the Darlington pair amplifier is (a) very large (b) very low (c) none of the above 39.

GRADING (a) increase the noise (b) decrease the bandwidth (c) increase the harmonic distortion (d) decrease the harmonic distortion http://my.safaribooksonline.com/book/electrical-engineering/semiconductortechnology/9788177589788/feedback-in-amplifiers/solved_problems011#X2ludGVybmFsX0ZsYXNoUmVhZGVyP3htbGlkPTk3ODgxNzc1ODk3ODglMkZleGVyY2lzZXMtMDA3 Page 25 of 25 Prof.singh .K.Takshshila Institute of Engineering & Technology Department of Electronics and Communication 2012 EDC (CS-304).NON.D.