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Control Unit Function
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Microoperations
Each step of the instruction cycle can be Control unit design is then the collection
decomposed into microoperation and the implementation of all of the
primitives that are performed in a precise needed control signals
time sequence
– Instruction fetch:
t1: MAR <-- (PC)
t2: MBR <-- memory
PC <-- PC+1
t3: IR <-- (MBR)
– Add R1, X
t1: MAR <-- (IR(address))
t2: MBR <-- memory
t3: R1 <-- (R1) + (MBR)
Each microoperation is initiated and
controlled based on the use of control
signals / lines coming from the control unit
– Cause data to move from one register to another
– Activate specific ALU functions
Figure 14.5 Data paths and control signals
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Two approaches
– Hardwired logic
» Control unit is viewed as a sequential logic
circuit
» Used to generate fixed sequences of control
signals
» Implemented using any of a variety of
“standard” digital logic techniques
» Principle advantages
High(er) speed operation
Smaller implementations (component
counts)
» Modifications to the design can be hard to
do
» Favored approach in RISC style designs
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Hardwired approach
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Microprogramming
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Figure 15.7 Simple microprogrammed control unit Figure 15.6 More complex unit
EE 4504 Section 10 13 EE 4504 Section 10 14
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For the typically large microprocessor Most modifications to the basic design of a
systems today, there are microprogrammed control unit have been
– Many instructions and and associated register- concerned with the word length
level hardware Length is based on 3 factors
– Many control point to be manipulated
– Maximum number of simultaneous
This can result in a control memory that microoperations that must be supported
– Contains a large number of words -- – The was the control information is represented
cooresponding to the number of instructions to or encoded
be executed – The way in which the next microinstruction
– Has a wide word width -- due to the large address is specified
number of control points to be manipulated Designer must choose the parallel “power”
of each instruction
– Each microinstruction specifies a single (or
few) microoperations to be performed (vertical
microprogramming)
– Each microinstruction specifies many different
microoperations to be performed in parallel
(horizontal microprogramming)
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Vertical microprogramming
– Width is narrow: n control signals can be
encoded into log2n control bits
– Limited ability to express parallelism
– Considerable encoding of control information
requires external memory word decoder to
identify the exact control line being
manipulated
Horizontal microprogramming
– Wide memory word
– High degree of parallel operations are possible
– Little to no encoding of control information
Compromise
– Divide control signals into disjoint groups
– Implement each group as a separate field in the
memory word
– Supports reasonable levels of parallelism
without too much complexity
Control field formats [Hay88]
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Second compromise: nanoprogramming
– Use a 2-level control storage organization
– Top level is a vertical format memory
» Output of the top level memory drives the
address register of the bottom (nano-level)
memory
– Nanomemory uses the horizontal format
» Produces the actual control signal outputs
– The advantage to this approach is significant
saving in control memory size (bits)
– Disadvantage is more complexity and slower
operation (doing 2 memory accesses fro each
microinstruction)
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– Example: Supppose that a system is being Microprogramming application: emulation
designed with 200 control points and 2048 – The use of a microprogram on one machine to
microinstructions execute programs originally written to run on
– Assume that only 256 different combinations of another (different!) machine
control points are ever used – By changing the microcode of a machine, you
– A single-level control memory would require can make it execute software from another
2048x200=409,600 storage bits machine
– A nanoprogrammed system would use – Commonly used in the past to permit new
» Microstore of size 2048x8=16k machines to continue to run old software
» Nanostore of size 256x200=51200 » VAX11-780 had 2 “modes”
» Total size = 67,584 storage bits Normal 11-780 mode
Emulation mode for a PDP-11
– The Nanodata QM-1 machine was marketed
Nanoprogramming has been used in many with no native instruction set!
CISC microprocessors » Universal emulation engine
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Summary
EE 4504 Section 10 23
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