Beruflich Dokumente
Kultur Dokumente
1. Acknowledgement
2. Objective Of The Project
3. Introduction On Microcontroller
4. Microcontroller 8051 Overview
5. Features Of 89c51 With Internal Architecture
6. Instruction Set
7. Pin Diagram Of 8051
8. Block Diagram Of The Project
9. Circuit Diagram Of The Project
10. List Of The Components And Accessories
11. List Of The Equipments Used In The Project
12. Software Used In The Project
13. Flow Chart
14. Program
15. Conclusion
16. Bibliography
Acknowledgement:
I take this opportunity to extend my sincerest thanks and deepest gratitude to my Project
Mentor,
Mr. K Dey, for giving valuable suggestions, helpful guidance and constant encouragement in
the execution of this Project work.
I would also like to mention an easy camaraderie among my colleagues.
Give the flexibility to the user to change or reset the password in case the user forgets
that combination
Lock the door by using password (preferable the same password used for unlocking)
To give user more secure yet cost-efficient way of door locking-unlocking system
Introduction of Microcontroller
Definition: A single chip that contains the processor (the CPU), non-volatile memory for the
program (ROM or flash), volatile memory for input and output (RAM), a clock and an I/O
control unit.
Invention: In 1971, Gary Boone of Texas Instruments designed a single integrated circuit
chip that could hold nearly all the essential circuits to form a calculator(TMS1802NC); only
the display and the keypad were not incorporated.
Microcontroller Overview
The 8051 is designed as a strict Harvard architecture. The 8051 can only execute code
fetched from program memory. The 8051 does not have any instruction to write to program
memory. Most 8051 systems respect this distinction, and so are unable to download and
directly execute new programs. The strict Harvard architecture has the advantage of making
such systems immune to most forms of malware.
Features of 89c51
Pin 18: Port 1- Each of these pins can be used as either input or output according to your
needs. Also, pins 1 and 2 (P1.0 and P1.1) have special functions associated with timer 2. 9:
Reset Signal; high logical state on this input halts the MCU and clears all the registers.
Bringing this pin back to logical state zero starts the program anew as if the power had just
been turned on.
Pin 10-17: Port 3 - As with Port 1, each of these pins can be used as universal input or
output. However, each pin of Port 3 has an alternative function.
Pin 10: RXD - serial input for asynchronous communication or serial output for synchronous
communication.
Pin 11: TXD - serial output for asynchronous communication or clock output for
synchronous communication.
Pin 31: EA - Bringing this pin to the logical state zero (mass) designates the ports P2 and P3 for
transferring addresses regardless of the presence of the internal memory. This means that even if there
is a program loaded in the MCU it will not be executed, but the one from the external ROM will be
used instead. Conversely, bringing the pin to the high logical state causes the controller to use both
memories, first the internal, and then the external (if present).
Pin 32-39: Port 0 - Similar to Port 2, pins of Port 0 can be used as universal input/output, if external
memory is not used. If external memory is used, P0 behaves as address output (A0 A7) when ALE
pin is at high logical level, or as data output (Data Bus) when ALE pin is at low logical level.
Pin 40: VCC - Power +5V.
MCS-51
The MCS-51 (commonly referred to as 8051) is a Harvard architecture, CISC instruction set,
single chip microcontroller (C) series which was developed by Intel in 1980 for use
in embedded systems.[1] Intel's original versions were popular in the 1980s and early 1990s
and enhanced binary compatible derivatives remain popular today.
Intel's original MCS-51 family was developed using NMOS technology, but later versions,
identified by a letter C in their name (e.g., 80C51) used CMOS technology and consume less
power than their NMOS predecessors. This made them more suitable for battery-powered
devices.
The family was continued in 1996 with the enhanced 8-bit MCS-151 and the 8/16/32bit MCS-251 family of binary compatible microcontrollers.
The MCS-51 has four distinct types of memory internal RAM, special function registers,
program memory, and external data memory.
Internal RAM (IRAM) is located from address 0 to address 0xFF. IRAM from 0x00 to 0x7F
can be accessed directly. IRAM from 0x80 to 0xFF must be accessed indirectly, using the
@R0 or @R1 syntax, with the address to access loaded in R0 or R1. The 128 bits at IRAM
locations 0x200x2F are bit-addressable.
Special function registers (SFR) are located in the same address space as IRAM, at
addresses 0x80 to 0xFF, and are accessed directly using the same instructions as for the lower
half of IRAM. They cannot be accessed indirectly via @R0 or @R1. 16 of the SFRs are also
bit-addressable.
Program memory (PMEM, though less common in usage than IRAM and XRAM) is up to
64 KiB of read-only memory, starting at address 0 in a separate address space. It may be onor off-chip, depending on the particular model of chip being used. Program memory is readonly, though some variants of the 8051 use on-chip flash memory and provide a method of
re-programming the memory in-system or in-application.
ROM
Read-only memory (ROM) is a class of storage medium used in computers and other
electronic devices. Data stored in ROM can only be modified slowly, with difficulty, or not at
all, so it is mainly used to distribute firmware (software that is very closely tied to
specific hardware, and unlikely to need frequent updates).
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Interrupt
TF0
TF1
RI/TI
Out of these,
and
are external interrupts whereas Timer and Serial port interrupts
are generated internally. The external interrupts could be negative edge triggered or low level
triggered. All these interrupt, when activated, set the corresponding interrupt flags. Except for
serial interrupt, the interrupt flags are cleared when the processor branches to the Interrupt
Service Routine (ISR). The external interrupt flags are cleared on branching to Interrupt
Service Routine (ISR), provided the interrupt is negative edge triggered. For low level
triggered external interrupt as well as for serial interrupt, the corresponding flags have to be
cleared by software by the programmer.
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Program Counter
The program counter points to the address of the next instruction to be executed. As the CPU
fetches the op-code from the program ROM, the program counter is incremented to point to
the next instruction. The program counter in the 8051 is 16 bits wide. This means that the
8051 can access program addresses 0000 to FFFFH, a total of 64K bytes of code.
when the 8051 is powered up the PC (program counter) has the value of 0000 in it. This
means that it expects the first op-code to be stored at ROM address OOOOH. For this reason
in the 8051 system, the first op-code must be burned into memory location OOOOH of
program ROM since this is where it looks for the first instruction when it is booted.
Stack Memory
Stack in the 8051: The stack is a section of RAM used by the CPU to store information
temporarily. This information could be data or an address. The CPU needs this storage area
since there are only a limited number of registers.
Pushing onto the stack: In the 8051 the stack pointer (SP) points to the last used location of
the stack. As we push data onto the stack, the stack pointer (SP) is incremented by one.
Popping from the stack: Popping the contents of the stack back into a given register is the
opposite process of pushing. With every pop, the top byte of the stack is copied to the register
specified by the instruction and the stack pointer is decremented once.
The upper limit of the stack: As mentioned earlier, locations 08 to IF in the 8051 RAM can
be used for the stack. This is because locations 20 2FH of RAM are reserved for bitaddressable memory and must not be used by the stack.
CALL instruction and the stack: In addition to using the stack to save registers, the CPU
also uses the stack to save the address of the instruction just below the CALL instruction.
This is how the CPU knows where to resume when it returns from the called subroutine.
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Register
A register is a small place in a CPU that can store small amounts of the data used for
performing various operations such as addition and multiplication and loads the resulting data
on main memory. Registers contain the address of the memory location where the data is to
be stored. The size of the register is very important for modern controllers. For instance, for a
64-bit register, a CPU tries to add two 32-bit numbers and gives a 64-bit result.
Types of Registers: The 8051 microcontroller contains mainly two types of registers
General Purpose Registers: The general purpose memory is called as the RAM memory of
the 8051 microcontroller, which is divided into 3 areas such as banks, bit-addressable area,
and scratch-pad area.
The banks contain different general purpose registers such as R0-R7, and all such registers
are byte-addressable registers that store or remove only 1-byte of data.
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Banks and Registers: The B0, B1, B2, and B3 stand for banks and each bank contains eight
general purpose registers ranging from R0 to R7. All these registers are byte-addressable
registers. Data transfer between general purpose registers to general purpose registers is not
possible. These banks are selected by the Program Status Word (PSW) register.
Special Function Registers (SFR): Special function registers are upper RAM memory in the
8051 microcontroller. These registers contain all peripheral related registers like P0, P1, P2,
P3, timers or counters, serial port and interrupts-related registers. The SFR memory address
starts from 80h to FFh. The SFR register is implemented by bit-address registers and byteaddress registers.
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P0 (Port 0, Address 80h, Bit-Addressable): This is input/output port 0. Each bit of this SFR
corresponds to one of the pins on the microcontroller. For example, bit 0 of port 0 is pin P0.0,
bit 7 is pin P0.7. Writing a value of 1 to a bit of this SFR will send a high level on the
corresponding I/O pin whereas a value of 0 will bring it to a low level.
SP (Stack Pointer, Address 81h): This is the stack pointer of the microcontroller. This SFR
indicates where the next value to be taken from the stack will be read from in Internal RAM.
If you push a value onto the stack, the value will be written to the address of SP + 1. That is
to say, if SP holds the value 07h, a PUSH instruction will push the value onto the stack at
address 08h. This SFR is modified by all instructions which modify the stack, such as PUSH,
POP, LCALL, RET, RETI, and whenever interrupts are provoked by the microcontroller.
DPL/DPH (Data Pointer Low/High, Addresses 82h/83h): The SFRs DPL and DPH work
together to represent a 16-bit value called the Data Pointer. The data pointer is used in
operations regarding external RAM and some instructions involving code memory. Since it is
an unsigned two-byte integer value, it can represent values from 0000h to FFFFh (0 through
65,535 decimal).
PCON (Power Control, Addresses 87h): The Power Control SFR is used to control the
8051's power control modes. Certain operation modes of the 8051 allow the 8051 to go into a
type of "sleep" mode which requires much less power. These modes of operation are
controlled through PCON. Additionally, one of the bits in PCON is used to double the
effective baud rate of the 8051's serial port.
TCON (Timer Control, Addresses 88h, Bit-Addressable): The Timer Control SFR is used
to configure and modify the way in which the 8051's two timers operate. This SFR controls
whether each of the two timers is running or stopped and contains a flag to indicate that each
timer has overflowed. Additionally, some non-timer related bits are located in the TCON
SFR. These bits are used to configure the way in which the external interrupts are activated
and also contain the external interrupt flags which are set when an external interrupt has
occurred.
TMOD (Timer Mode, Addresses 89h): The Timer Mode SFR is used to configure the mode
of operation of each of the two timers. Using this SFR your program may configure each
timer to be a 16-bit timer, an 8-bit auto reload timer, a 13-bit timer, or two separate timers.
Additionally, you may configure the timers to only count when an external pin is activated or
to count "events" that are indicated on an external pin.
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TL0/TH0 (Timer 0 Low/High, Addresses 8Ah/8Ch): These two SFRs, taken together,
represent timer 0. Their exact behaviour depends on how the timer is configured in the
TMOD SFR; however, these timers always count up. What is configurable is how and when
they increment in value.
TL1/TH1 (Timer 1 Low/High, Addresses 8Bh/8Dh): These two SFRs, taken together,
represent timer 1. Their exact behaviour depends on how the timer is configured in the
TMOD SFR; however, these timers always count up. What is configurable is how and when
they increment in value.
P1 (Port 1, Address 90h, Bit-Addressable): This is input/output port 1. Each bit of this SFR
corresponds to one of the pins on the microcontroller. For example, bit 0 of port 1 is pin P1.0,
bit 7 is pin P1.7. Writing a value of 1 to a bit of this SFR will send a high level on the
corresponding I/O pin whereas a value of 0 will bring it to a low level.
SCON (Serial Control, Addresses 98h, Bit-Addressable): The Serial Control SFR is used
to configure the behaviour of the 8051's on-board serial port. This SFR controls the baud rate
of the serial port, whether the serial port is activated to receive data, and also contains flags
that are set when a byte is successfully sent or received.
SBUF (Serial Control, Addresses 99h): The Serial Buffer SFR is used to send and receive
data via the on-board serial port. Any value written to SBUF will be sent out the serial port's
TXD pin. Likewise, any value which the 8051 receives via the serial port's RXD pin will be
delivered to the user program via SBUF. In other words, SBUF serves as the output port
when written to and as an input port when read from.
P2 (Port 2, Address A0h, Bit-Addressable): This is input/output port 2. Each bit of this
SFR corresponds to one of the pins on the microcontroller. For example, bit 0 of port 2 is pin
P2.0, bit 7 is pin P2.7. Writing a value of 1 to a bit of this SFR will send a high level on the
corresponding I/O pin whereas a value of 0 will bring it to a low level.
IE (Interrupt Enable, Addresses A8h): The Interrupt Enable SFR is used to enable and
disable specific interrupts. The low 7 bits of the SFR are used to enable/disable the specific
interrupts, whereas the highest bit is used to enable or disable ALL interrupts. Thus, if the
high bit of IE is 0 all interrupts are disabled regardless of whether an individual interrupt is
enabled by setting a lower bit.
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P3 (Port 3, Address B0h, Bit-Addressable): This is input/output port 3. Each bit of this
SFR corresponds to one of the pins on the microcontroller. For example, bit 0 of port 3 is pin
P3.0, bit 7 is pin P3.7. Writing a value of 1 to a bit of this SFR will send a high level on the
corresponding I/O pin whereas a value of 0 will bring it to a low level.
PSW (Program Status Word, Addresses D0h, Bit-Addressable): The Program Status
Word is used to store a number of important bits that are set and cleared by 8051 instructions.
The PSW SFR contains the carry flag, the auxiliary carry flag, the overflow flag, and the
parity flag. Additionally, the PSW register contains the register bank select flags which are
used to select which of the "R" register banks are currently selected.
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Oscillator
The 8051 uses the crystal for precisely that to synchronize its operation. Effectively, the
8051 operates using what are called "machine cycles."
A single machine cycle is the minimum amount of time in which a single 8051 instruction
can be executed. Although many instructions take multiple cycles.
8051 has an on-chip oscillator. It needs an external crystal that decides the operating
frequency of the 8051.
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TMOD is not bit addressable: The counters are divided into two 8-bit registers called the
timer low (TLO. TL I) and high (THO. TH I) bytes. All counter action is controlled by bit
states in the timer mode control register (TMOD). the timer/counter control register (TCON).
and certain program instructions.
TMOD is dedicated solely to the two timers and can be considered to be two duplicate 4-bit
registers. each of which controls the action of one of the timers. TCON has control bits and
Hags for the timers in the upper nibble. and control bits and Hags for the external interrupts
in the lower nibble. Figure 10 shows the bit assignments for TMOD and TCON.
Timer Counter Interrupts: The counters have been included on the chip to relieve the
processor of timing and counting chores. When the program wishes to count a certain number
of internal pulses or external events, a number is placed in one of the counters. The number
represents the maximum the desired count, plus one. The counter increments from the initial
number to the maximum and then rolls over to zero on the final pulse and also sets a timer
Hag. The Hag condition may be tested by an instruction to tell the program that the count has
been accomplished, or the Hag may be used to interrupt the program.
Timing
If a counter is programmed to be a timer, it will count the internal clock frequency of the
R051 oscillator divided by 12d. As an example, if the crystal frequency is 6.0 megahertz,
then the timer clock will have a frequency of 500 kilohertz.
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The resultant timer clock is gated to the timer by means of the circuit shown in Figure 11. In
order for oscillator clock pulses to reach the timer, the CIT bit in the TMOD register must be
set to 0 (timer operation). Bit TRX in the TCON register must be set to 1 (timer run), and the
gate bit in the TMOD register must be 0, or external pin (INTX)' must he a 1 . In other words,
the counter is configured as a timer, then the timer pulses are gated to the counter by the run
bit and the gate bit or the external input bits (INTX).
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Timer 1 may still be used in modes 0, 1, and 2, while timer 0 is in mode 3 with one important
exception: No interrupts will be generated by timer I while timer 0 is using the TF1 overflow
flag. Switching timer I to mode 3 will stop it (and hold whatever count is in timer 1). Timer 1
can be used for baud rate generation for the serial port, or any other mode 0, 1, or 2 function
that does not depend upon an interrupt (or any other use of the TF1 flag) for proper operation.
Counting
The only difference between counting and timing is the source of the clock pulses to the
counters. When used as a timer, the clock pulses are sourced from the oscillator through the
divide-by-12d circuit. When used as a counter, pin T0 (P3.4) supplies pulses to counter 0. and
pin T1 (P3.5) to counter 1 . The C/(T)' bit in TMOD must be set to 1 to enable pulses from
the TX pin to reach the control circuit shown in Figure 11.
The input pulse on TX is sampled during P2 of state 5 every machine cycle. A change on the
input from high to low between samples will increment the counter. Each high and low state
of the input pulse must thus be held constant for at least one machine cycle to ensure reliable
counting. Since this takes 24 pulses, the maximum input frequency that can be accurately
counted is the oscillator frequency divided by 24, for our 6 megahertz crystal. The calculation
yields a maximum external frequency of 250 kilohertz.
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22
Addressing Modes
Addressing mode is a way to address an operand. Operand means the data we are operating
upon (in most cases source data). It can be a direct address of memory, it can be register
names, it can be any numerical data etc.
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24
Instruction Set
25
26
27
28
29
Block Diagram
Reset
Control
Input
Password
Microcontroller
Enter
Switch
Buzzer
XTAL
Red LED
Green LED
+5 Volt
Power
Supply
230V AC Supply,
50Hz
30
Circuit Diagram:
31
32
02
03
04
05
06
Crystal
Transformer
Regulator IC
Diode
Resistors
07
Capacitors
08
LEDs
Specifications
AT89S52
40 pin DIP
11.0592 Mhz
12-0-12v/500mA
7805
1n4007
8.2 k
330
i)1000 mF/63v
ii)10 mF/25v
iii)33 pF/50v
Green (high intensity)
Yellow (high intensity)
Red (high intensity)
Software Used:
1. ASM Notepad
2. Simulator
3. Superpro Program Burner
33
Quantity
1
1
1
1
2
1
10
1
2
2
2
1
4
Flow Chart
User Input
Time Limit
Administrator Reset
Enter Key
Administrator
Input
Compare
Correct
Password
Door
Unlocked
Incorrect
Count
limit < 3
Attempt Limit
Reached
34
Attempts Left
Program
.org 0000h
ini:
beg:
jb P1.0, beg1
clr P1.0
beg1:
jb P1.1, beg2
clr P1.1
beg2:
jb P1.2, beg3
clr P1.2
beg3:
jb P1.3, beg4
clr P1.3
beg4:
jb P1.4, beg5
clr P1.4
beg5:
jb P1.5, beg6
clr P1.5
beg6:
jb P1.6, beg7
clr P1.6
beg7:
jb P1.7, check
clr P1.7
jb P3.0, beg
mov R4, #20
mov A,p1
mov P1, #0ffh
cjne A, #0ach, wrong
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clr P2.0
green: lcall delay
djnz R2, green
flash: setb P2.0
lcall delay
clr P2.0
lcall delay
djnz R3, flash
setb P2.0
sjmp ini
wrong: jnb P2.4, alarm
clr P2.1
red:
lcall delay
djnz R4, red
setb P2.1
djnz R1, beg
clr P2.4
sjmp beg
36
hr2:
hr1:
37
Conclusion:
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Bibliography:
https://www.elprocus.com/know-about-types-of-registers-in-8051-microcontroller/
http://www.electronicshub.org/microcontrollers/
http://www.8052.com/tutsfr.htm
https://www.elprocus.com/steps-to-learn-soldering-process-in-designing-electronic-circuits/
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