Beruflich Dokumente
Kultur Dokumente
Introduction to
Push-Pull and Cascaded
Power Converter
Topologies
Bob Bell
Principal Applications Engineer
July 10, 2003
1
Good Morning !
Welcome to National Semiconductors continuing series of ON-Line
Seminars
Today our topic is an introduction to a family of DC-DC power
converters referred to as Cascaded
7/10/2003
2
2003 National Semiconductor Corporation
7/10/2003
Outline:
Buck Regulator Family Lines
Push-Pull Topology Introduction
Push-Pull Controller
Cascaded Push-Pull Topologies
Cascaded Controller
Cascaded Half-Bridge Topology Introduction
3
7/10/2003
Vo
Vo
Buck Converter
Boost Converter
Vin
Vi n
Np
Ns
Vo
Np
Ns
Vo
Na ux
Forward Converter
Flyback Converter
4
2003 National Semiconductor Corporation
Shown on this chart is the power stage arrangements for some of the
most popular power converter topologies which use a single primary
switching element. The Buck and Boost are the simplest and apply to
non-isolated power converters.
The Forwards and Flyback topology are used in isolated converters
where it is desirable to electrically isolate the Primary and Secondary
grounds.
7/10/2003
Ns
Vo
Ns
Vin
Vo
Np
Np
Ns
Ns
Push-Pull Converter
Vin
L
Ns
Vo
Np
Ns
7/10/2003
IL
D*Ts
Ts
Q1
I(Q1)
VOUT
L1
D1
C1
I(D1)
VOUT = D * VIN
6
2003 National Semiconductor Corporation
7/10/2003
Buck Converter
Characteristics
Non-Isolated Grounds
Voltage Step-down Only
Single Output Only
Very High Efficiency
Low Output Ripple Current
High Input Ripple Current
High Side (Isolated) Gate Drive Required
Large Achievable Duty Cycle Range
Wide Regulation Range (due to above)
7
2003 National Semiconductor Corporation
{Read Chart}
7/10/2003
Forward Converter
L1
D1
Vout
Np
Nr
D2
Ns
C1
Vin
D3
Q1
Vout = Vin x D x Ns
Np
I(L1)
1
I(D1) =
I(Q1) x Np/Ns
I(D2)
8
2003 National Semiconductor Corporation
7/10/2003
Freewheel
Diode D2
Current
Vin =48V
Vout =3.3V
Iout = 5A
9
2003 National Semiconductor Corporation
This slide shows each of the rectifier diode currents which sum together
to form the inductor current.
7/10/2003
Forward Converter
Characteristics
A Forward Converter is a Buck type converter
with an added isolation transformer
Grounds are isolated
Voltage Step-down or Step-up
Multiple Outputs Possible
Low Output Ripple Current
High Input Ripple Current
Simple Gate Drive
Limited Achievable Duty Cycle Range
10
2003 National Semiconductor Corporation
{Read Chart}
10
7/10/2003
Push-Pull Topology
D1
L
+
Vout
np
ns
R
-
np
Vin
Vg
ns
D2
Q2
PUSH
Q1
PULL
Vout = Vin x D x Ns x 2
Np
Q1
Q2
D
11
2003 National Semiconductor Corporation
11
7/10/2003
Output
Inductor
Current I(L1)
Vin = 48V
Vout =3.3V
Iout = 5A
Push Primary
Switch V DS(Q1)
Pull Primary
Switch V DS(Q2)
12
2003 National Semiconductor Corporation
Shown here are oscilloscope waveforms for the Drain voltages of the
two primary switches and the output inductor current.
When a given primary is active the Drain voltage is zero and the
alternate switches Drain is 2X the input voltage. This is due to the
transformer voltage bring reflected from the active primary to in-active
primary.
When neither switch is active then both Drain voltages are at the input
voltage.
12
7/10/2003
Output Diode
Current I(D1)
Vin = 48V
Vout =3.3V
Iout = 5A
Output Diode
Current I(D2)
13
2003 National Semiconductor Corporation
Shown here is the current for each of the two output diodes.
These two current sum to form the output inductor current shown on the
previous slide.
Note that as discussed previously when neither of the primary switches
are active, the output inductor current has a negative slope and flows
half in each of the two secondary diodes.
13
7/10/2003
FLUX DENSITY
B (GAUSS)
Operation in
Quadrant 1 only
BSAT
BSAT
Operation in
Quadrants 1 & 3
BR
MAGNETIC FIELD
INTENSITY
H (OERSTED)
Forward Converter
B-H Operating Area
MAGNETIC FIELD
INTENSITY
H (OERSTED)
Push-Pull Converter
B-H Operating Area
14
2003 National Semiconductor Corporation
Shown here are the transformer BH curves for the Forward and the
Push-Pull topology.
The X axis represents Magnetic Field Intensity which is proportional to
the Ampere*Turns.
The Y axis represents Flux Density which is proportional to the Core
area and the Volt * Seconds for the winding that is active.
The slope is proportional to the primary magnetizing inductance.
The Forward converter operates in a single quadrant of the BH curve,
moving up the curve when the switch is active and resetting during the
OFF time.
The Push-Pull converter operates in two quadrants of the BH curve,
see-sawing back and forth as the each primary is activated.
This important fact allows the maximum power capability of a Pus h-Pull
transformer to be twice that of a Forward transformer.
14
7/10/2003
Push-Pull Characteristics
A Push-Pull Converter is a Buck type converter
with a dual drive winding isolation transformer
Push-Pull transformers and filters are much
smaller than standard Forward converter filters
Voltage Stress of the Primary Switches is: Vin *2
Voltage Step-down or Step-up
Multiple Outputs Possible
Low Output Ripple Current
Lower Input Ripple Current
Simple Gate Drive (dual)
Large Achievable Duty Cycle Range
15
2003 National Semiconductor Corporation
{Read Chart}
15
7/10/2003
ENABLE
Features
Internal 15-100V start-up
regulator
CM control, internal slope
comp.
Set frequency with single
resistor
100k 600kHz
Synchronizable Oscillator
Error amp
Precision 1.25V reference
Programmable soft-start
Dual mode over -current
protection
Direct opto-coupler interface
Integrated 1.5A gate drivers
Fixed output driver deadtime
Thermal shutdown
OSC
Rt / SYNC
Vcc
OUT1
J
45uA
0
5V
COMP
5K
1.25V
K
SLOPECOMP
RAMP
GENERATOR
Vcc
R
OUT2
PWM
100K
VFB
RTN
1.4V
LOGIC
50K
SS
2K
CS
0.5V
0.625V
CLK
SS
Packages: MSOP10,
Vcc
7.7V REG
CLK
10uA
SS / SD
16
SHUTDOWN
COMPARATOR
16
7/10/2003
Performance:
Input Range: 36 to 75V
Output Voltage: 3.3V
Output Current: 0 to 10A
Board Size: 2.3 x 2.3 x 0.45
Load Regulation: 1%
Line Regulation: 0.1%
Current Limit
Measured Efficiency:
84.5% @ 5A
82.5% @10A
17
2003 National Semiconductor Corporation
Shown here is a demo board utilizing the LM5030 controller in a PushPull topology.
The power level is on the low side for a Push-Pull implementation.
The purpose is to demonstrate the operation of the controller.
The waveform shown earlier were taken from this board.
<Read Performance>
17
7/10/2003
Input:
36 75V
Output:
3.3V @ 10A
18
2003 National Semiconductor Corporation
18
7/10/2003
<Read Performance>
19
7/10/2003
20
2003 National Semiconductor Corporation
20
7/10/2003
Buck
Stage
Push-Pull
Stage
Vin
Vpp
BUCK
CONTROL
CONTROLLER
FEEDBACK
: N : 1 : 1
Vout
PUSH
OSCILLATOR
PULL
21
7/10/2003
Cascaded Voltage-Fed
Converter Benefits
A Voltage -Fed Push-Pull Converter is a Buck
type converter consisting of a Buck Regulation
stage followed by (cascaded by) a Push-Pull
Isolation Stage
The Push-Pull Stage FET voltage stresses are
reduced to Vout x N x 2 over all line conditions
The output rectification can be easily optimized
due to reduced and fixed voltage stresses
The output rectification is further optimized
since the power is equally shared between the
rectifiers over all load and line conditions
Favorable topology for wide input ranges
22
2003 National Semiconductor Corporation
22
7/10/2003
Push-Pull Stage
33 - 76V
Vcc
Vcc
HB
HI
Vin
HO
HD
HS
LD
LI
LO
LM5101
LM5041
Vss
PUSH
FEEDBACK
PULL
FB
Push and Pull outputs operate continuously, alternating with a s light overlap.
Output voltage is controlled by the Buck stage which operates at 2X the Push-Pull frequency.
Continuous output current from the Push-Pull stage requires minimal filtering.
High Efficiency achieved with low Push-Pull switching losses and matched Sync rectifier loading
23
2003 National Semiconductor Corporation
23
7/10/2003
Cascaded Current-Fed
Converter Benefits
A Current-Fed Push-Pull Converter is a Buck
type converter consisting of a Buck Regulation
stage followed by (cascaded by) a Push-Pull
Isolation Stage
There is no high current output inductor!
Reduced switching loss in Push-Pull stage
Favorable topology for multiple outputs since all
outputs are tightly coupled
Favorable topology for wide input ranges, since
the Buck stage pre -regulates while the Push-Pull
and Secondary operate independently of the
input voltage level
24
2003 National Semiconductor Corporation
24
7/10/2003
Vin = 60V
Vout =2.5V
Iout = 20A
Trace 2:
Push_Pull SWPULL V DS
Trace 3:
Buck Stage Switching
Node
Note: There is an overlap
time where both the Push
and the Pull switches
are ON.
This is required to
maintain the inductor
current path.
25
2003 National Semiconductor Corporation
Shown here are scope plots of the Push-Pull stage drain voltages and
the voltage at the common junction of the Buck stage switches.
Note that the Buck stage operates at twice the frequency of either the
Push or Pull switch.
Also note the overlap of the of the Push-Pull stage.
25
7/10/2003
Vin = 48V
Vout =2.5V
Iout = 20A
26
2003 National Semiconductor Corporation
Shown here are scope plots of the Push-Pull Drain voltages and PushPull switch currents.
On the next slide we will take a more detailed look at the switching
transitions of these waveforms
26
7/10/2003
27
2003 National Semiconductor Corporation
27
7/10/2003
Filter Inductor
15%
Secondary
Rectifiers
40%
Primary
Switching
15%
Estimate for typical 3.3V Output, 35 80V Input
28
2003 National Semiconductor Corporation
28
7/10/2003
Comparison of Rectifier
Stresses
Example: 3.3V output, 35-80V input
Topology
Forward
Push-Pull
Cascaded PP
Topology
Forward
Push-Pull
Cascaded PP
Rectifier Voltage
Stresses
Vin x (Ns/Np)
Vin x (Ns/Np) x 2
Vout x 2
Voltage Stresses
for Example
Conditions
20V
26.7V
6.6V
Example: Assumptions
High Line with XFR Ratio 4:1
High Line with XFR Ratio 6:1
All Line conditions XFR Ratio 6:1
29
2003 National Semiconductor Corporation
29
7/10/2003
Ch 1
Sync1 VDS
Ch 2
Sync2 VDS
Vin = 48V
Vout =2.5V
Iout = 20A
30
2003 National Semiconductor Corporation
This scope plot shows the drain voltage waveforms the two
synchronous rectifiers in a 2.5 Volt output. Excluding the switching
spike, the voltage stress is as expected 5 volts.
30
7/10/2003
31
2003 National Semiconductor Corporation
31
7/10/2003
Vin
Vcc
9V REG
UVLO
2.5V
Vcc
UVLO
Vref
5V REF
LOGIC
45uA
0
SLOPECOMP
RAMP
5V
GENERATOR
COMP
UVLO
HYSTERESIS
(20uA)
OFF TIME
GENERATOR
LM5041-1 ONLY
CLK
5K
0.75V
PWM
HD
100K
FB
1.4V
50K
LD
LOGIC
SS
CS
2K
0.5V
CLK + LEB
PUSH
OSC
0.6V
DRIVER
CLK
10uA
SS
SS
OSCILLATOR
DIVIDE
BY 2
DEADTIME
OR
OVERLAP
CONTROL
SHUTDOWN
COMPARATOR
Vcc
PULL
ENABLE
0.45V
Vcc
DRIVER
Rt / SYNC
TIME
32
Shown here is the block diagram for the LM5041 cascaded controller.
Note on the right are the 4 switch control outputs. Gate drivers are
included within the device for the Push and Pull outputs. A resistor
connected to the TIME pin is used to set either overlap or deadtime of
the Push-Pull outputs. Connecting the resistor to ground sets overlap
time. Connecting the resistor to REF sets deadtime.
The Buck stage outputs are logic level controls which work with
Nationals new LM5100 family of Buck Stage Gate drivers.
The bias, control and protection circuits used in this controller are very
similar to the LM5030 controller, which is current mode control.
A unique LM5041 feature is a line under voltage lockout (UVLO) with
adjustable hysteresis.
32
7/10/2003
89% @ 50A
91% @20A
33
2003 National Semiconductor Corporation
-36 to -75 V
Output
+2.5V @ 50 A
4-layer Board
100V Chipset
LM5041 Cascaded Controller &
LM5101
33
7/10/2003
34
2003 National Semiconductor Corporation
34
7/10/2003
Cascaded Half-Bridge
Concept
Half-Bridge
Stage
Vout
T1
Buck
Stage
Vin
33 - 76V
L1
VDD
VDD
Vcc
Vin
HD
T1
LD
LM5041
LM5102
LM5100
PUSH
PULL
FB
FEED
BACK
35
2003 National Semiconductor Corporation
35
7/10/2003
Cascaded Half-Bridge
Characteristics
A Cascaded Half-Bridge Converter is a Buck type
converter consisting of a Buck Regulation stage
followed by (cascaded by) a Half-Bridge Isolation
Stage.
The isolation stage is Voltage-Fed.
Voltage splitter capacitors and a small output stage
inductor are required.
Dead time is required for Half-Bridge switches
The Half-Bridge Stage FET stresses are reduced, to
Vout x N. (2x less than the Push-Pull)
36
2003 National Semiconductor Corporation
36
7/10/2003
Full -Bridge
Stage
T1
Buck
Stage
L1
Vin
33 - 76V
VDD
VDD
VDD
Vcc
Vin HD
T1
LD
LM5041
LM5102
LM5100
LM5100
PUSH
PULL
COMP
FEED
BACK
37
2003 National Semiconductor Corporation
37
7/10/2003
Cascaded Full-Bridge
Characteristics
A Cascaded Full-Bridge Converter is a Buck type
converter consisting of a Buck Regulation stage
followed by (cascaded by) a Full-Bridge Isolation
Stage
The isolation stage is Current-Fed
No voltage splitter capacitors or output stage
inductor are required as in the Cascaded Half-Bridge
Overlap time is required for Isolation Stage switches
The Full-Bridge Stage voltage stresses are Vout x N,
similar to the half-bridge
Full-Bridge Stage current levels are half that of a
Half-Bridge.
38
2003 National Semiconductor Corporation
38
7/10/2003
Vcc
HI
Q2
LEVEL
SHIFT
VIN
Vcc
HI
Vcc
Q2
LEVEL
SHIFT
Vcc
Q1
LI
Q1
LI
High side gate drivers are necessary to drive the Gate of the Buck
Switch.
An effective way to do this is with a Bootstrapping technique.
On the left illustration, when a low side switch is ON, charge flows from
Vcc to charge up a high side bootstrap capacitor. The charge on this
capacitor is now available to drive the high side gate as shown on the
right illustration.
National Semiconductor has developed a family of dual gate drivers with
level shifter designed specifically for Buck and Bridge configurations.
39
7/10/2003
Typical Applications
UVLO
LEVEL
SHIFT
HO
HS
HI
Vcc
UVLO
LO
LI
Vss
40
2003 National Semiconductor Corporation
The first two devices I would like to introduce are the LM5100 and the
LM5101.
The devices independently control both a high side and a low side gate.
The LM5100 has CMOS level inputs, while the LM5101 has TTL level
input thresholds.
40
7/10/2003
Typical Applications
VDD
HB
HI
HO
HS
DLY
Logic
LI
LO
DLY
Logic
RT1
RT2
41
2003 National Semiconductor Corporation
41
7/10/2003
HI
LM5102
K x RT1
HO
Adjustable Leading
Edge Delay
LI
K x RT2
LO
42
2003 National Semiconductor Corporation
For the LM5102 each output has independently adjustable leading edge
delays set by resistors R1 and R2. The delays have the effect o n the
outputs to create dead-time. This feature is very useful to prevent
excessive shoot-through currents on switching transitions.
42
7/10/2003
Features
2Amp Driver for Complementary High and
Low Side FETs
Adaptive Deadtime with programmable
additional delay
Single TTL-Level logic input
Bootstraps drive high side gate to 116VDC
Short propagation delay (45ns)
Fast rise and fall times (10ns into 1nF)
V DD supply under-voltage lock-out (6.7V)
Low power consumption (1.5mA @ 0.5MHz)
HB
Adapt
Logic
IN
Adapt
Logic
IN
K x RT
HO
TPROP
DLY
Logic
HO
HS
DLY
Logic
LO
RT
TPROP
K x RT
LO
43
2003 National Semiconductor Corporation
43
7/10/2003
Summary:
New 100V controllers and drivers enable
higher performance power converters with a
minimum of external components:
LM5030 Push Pull Controller
LM5041 Cascade Controller
LM510X Gate Drivers
Questions or Comments?
http://www.national.com/appinfo/power/hv.html
http://power.national.com
44
44