PHILIPS TECHNICAL TRAINING

L05 ATSC TRAINING MANUAL

PHILIPS CONSUMER ELECTRONICS

64 PERIMETER CENTER EAST
PO BOX 467300
ATLANTA, GA 31146-7300
MM032405

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Table of Contents
ATSC Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Introduction to L05ATSC Chassis . . . . . . . . . . . . . . . . . . . . . . . . . .11
Customer operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Main Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Video Signal Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
Family Board Video Processing . . . . . . . . . . . . . . . . . . . . . . . . . . .20
ATSC Video Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Deflection panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
CRT board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
Scan Velocity Modulation Circuit . . . . . . . . . . . . . . . . . . . . . . . . . .27
Audio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
ATSC Audio block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
Audio Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
Locating Defective panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
System Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
Service Alignment Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
Customer Service Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36

NTSC SYSTEM
To better understand the ATSC system, a short discussion of the present day NTSC system
would be helpful.
A committee set up by the FCC in 1939 approved the present NTSC (National Television
System Committee) television system. Except for the addition of Color, Stereo, Closed
Caption, and Text, the NTSC system has changed very little.
The NTSC system is based upon a scan rate of 30 frames per second with a four by three
aspect ratio. The aspect ratio is the ratio of the picture width, which is four, and the picture
height, which is three. This aspect ratio is based on 16mm film which was the most widely
used form of visual entertainment at the time television was being developed.
The scan rate of 30 frames per second is achieved by the picture being scanned with 262.5
lines at a vertical rate of 59.94
times per second. (Figure 1) The
picture is scanned with two fields
using an interlace scan making
525 lines per frame. With the number of scan lines used, flicker
would develop if interlace scanning were not used. The even field
starts in the upper left hand corner.
The Odd field starts its scan in the
upper center portion of the picture.
Because 40 horizontal lines are
used for Closed Captioning,
Teletext, and Color Correction,
there are only 242.5 lines in each
FIGURE 1 - INTERLACE SCANNING
field that are actually visible.
ATSC SYSTEM
The Digital broadcast system, also know as ATSC (Advanced Television System Committee),
delivers a high quality picture using complex video and audio compression.
The ATSC channels use the same UHF frequencies and 6 Mhz bandwidth as the NTSC
channels.
There are two types of sets sold today, HD ready and Integrated. HD Ready sets do not
have an ATSC tuner, but are capable of displaying a High Definition picture. These sets show
an enhanced picture when used with a progressive scan DVD player. However, this is not
High Definition. A set top box is required to received the Digital TV broadcast. The
Integrated sets have the ATSC Digital tuner built in.
As required by the FCC, all stations are co-broadcasting the Digital channels. If the plan is
followed, all NTSC transmission in the United States will end on December 31, 2006.
Page 1

When viewing the new ATSC receivers, the first difference one would notice is the wider
screen. The ATSC receiver has an aspect ratio of sixteen by nine. The screen width is 16
units and the screen height is 9 units. NTSC uses a 4 by 3 aspect ratio. The next noticeable
difference would be a much sharper image. The picture definition of an ATSC receiver is
measured in the same way as is in a computer monitor. The highest definition in the ATSC
receiver is 1920 pixels in the horizontal direction by 1080 lines. The NTSC display measured
in pixel resolution would be 313 by 243. The possible compression formats for the ATSC
system are shown in Table 1 below. Although the ATSC tuning system is capable of receiving
these formats, the AV inputs are more limited as will be discussed later. Notice that both
progressive and interlace scanning are possible. Whichever format is being transmitted, the
Philips L05 ATSC chassis will convert the aspect ratio to 1080 by 1920 pixels with a Picture
Rate of 60I. That is 1080 interlace scanning with two fields, each having 540 visible lines.
Some signals may broadcast a 4:3 aspect ratio picture with sidebars. The actual picture
being transmitted has a 16:9
aspect ratio. However, the
visible picture will have a 4:3
aspect ratio.
Only the 1080i and 720P formats are considered to be
High Definition signals. All
other
formats are considered
to
be
a Standard
TABLE 1 - PICTURE FORMATS
Definition format. The 480 x
640 and 480 x 720
formats are equivalent to the 480P or progressive scan outputs of
DVD players. The NTSC signals are converted by this set to 1080i before being fed to the
CRT. If a weak
signal is present, artifacts may become more visible.
BANDWIDTH
The ATSC signal uses the
same six megahertz bandwidth as the NTSC signal.
(Figure 2) To achieve the
higher resolution of the ATV
system, up to 19.28 Mbps
(Mega bits per second) of
data is delivered with the
Terrestrial broadcast system. A higher data rate of
38.57 Mbps is possible
when using cable or satellite. The higher data rate
system also uses the same
six megahertz bandwidth.
FIGURE 2 - ATSC FREQUENCY SPECTRUM
A Pilot signal is added 310
kilohertz from the lower
edge of the band to key the AFT circuit of the receiver. The Pilot signal power is 11.3 dB
Page 2

below the data signal power. To reduce interference with NTSC channels, the ATSC signal is
offset by +45.8KHz. After processing, the transmitted data signal has a bandwidth of 5.38
MHz.
ATSC BROADCAST ENCODING
As with NTSC signal processing, the ATSC signal starts out with analog Red, Green, and
Blue drives from the signal source. (Figure 3) The signal source could be a Camera, Tape
Deck, or one that is computer generated. The signal could be either the higher resolution
HDTV or the lower resolution SDTV from a Composite NTSC signal. These signals are fed to
a Matrix which produces a Y (luminance) signal, a Pr (red), and a Pb (blue) signal. These
three signals are fed to their respective A/D (analog to digital) converters. If the RGB signals
are of HDTV origin, the luminance-sampling rate for the A/D converters is 74.25 MHz. For
signals from an SDTV source, the sampling rate is 13.5 MHz. These signals are then fed to
an MPEG-2 compression system
to reduce the
amount of data
necessary to
broadcast the
signal. In a
similar manner,
six channels of
audio are fed to
their respective
A/D converters
and then to the
AC-3 audio
compression
system. The
Video, Audio,
FIGURE 3 - ATSC ENCODING
Text, and Control
data streams are
combined into a single data stream by the Multiplexer.
ATSC COMPRESSION
The ATSC system uses the MPEG-2 compression format. It uses a 4:1:1 digital sampling
system. (Figure 4 ) For every four Luminance samples, two Chroma samples are taken.
These samples are placed in 8 x 8 arrays containing 64 samples. By using a complex
mathematical function called a DCT (Discrete Cosine Transform), the amount of data needed
to store an array is reduced. Four Luminance Arrays and two Chroma Arrays make up one
Macro block. In the 1080 by 1920 display mode, there are 68 rows of Macro blocks and 120
blocks per row. In the SDTV mode which is 640 by 480, there are 30 rows with 40 blocks per
row displaying 1200 Macro blocks.
The Macro blocks make up an "I" (Intra) frame or a complete frame of video. (Figure 5) If
Page 3

FIGURE 4 - COMPRESSION

there is very little change

in the video for the next
three frames, the next
two frames are skipped.
Only changes in the "I"
frame are placed in the
"P" (Predictor) frame.
The "B" frames or the
skipped frames are
reconstructed in the
receiver.
The Video and Audio
data streams along with
the Control and Text
Data are fed to the
Multiplexer which produces data packets that
are 187 bytes in length
containing information
from all four sources. All
Picture, Audio, Control,
and Text information are
now in a single data bit
stream.
TRANSPORT

To prevent data loss in

transmission, there are
four Forward Error
Correction circuits.
(Figure 6) The four are
the Data Randomizer,
Reed Solomon encoder,
Data Interleaver, and
Trellis Encoder. In the
FIGURE 5 - FRAME ORDER
High Data rate system,
there are only three
Forward Error correction circuits. The Trellis Encoder is replaced by a map per in the High
Data rate system. The output of the Forward Error correction circuits are fed to a
Multiplexer as an eight level digital data stream in the Terrestrial system. In the High Data
Rate system, this is a sixteen level digital data stream. The Multiplexer adds data segment
and data field sync. This Sync is for data signal synchronization and has no relationship to
the scan rate of the TV receiver. The Scan rate and Synchronization of the picture and audio
are encoded in the video data stream. The Pilot is then added to the signal before it is sent
to the Modulator and Up Converter. The Pilot is used to key the AFT circuit in the receiver.

Page 4

FIGURE 6 - TRANSPORT

DATA STRUCTURE
The Data Symbols are grouped into Data Frames,
each containing two Data Fields. (Figure 7) Each
Field contains 313 Data segments. Each Segment
begins with 4 symbols to provide segment synchronization and 828 Symbols of Data. The 828 Symbols
of the data segment contains the data of the 187
bytes of a transport packet and the Forward Error
Correction overhead. In the Terrestrial broadcast

FIGURE 7 - DATA FIELDS

system, the Symbols are an eight level
signal, each carrying 3 bits of data. In
the high data rate system, the symbols
are a 16 level signal, each carrying 4
bits of data. Each Data field is separated by a sync segment. The Data
Segment Sync is 4 symbols wide.
(Figure 8) Three bits of data are
mapped into 8 level VSB symbols.
The voltage level of each symbols represents a 3 bit data code. Since the
FIGURE 8 - 8VSB SEGMENT ENCODING
Trellis encoder changes each 8 bit word
to a 12 bit word, 4 symbols are required to represent one byte of data. At the start of each
Data Field, the Data Segment contains Field Data information and voltage reference levels to
Page 5

train the data recovery circuits in the receiver.

Since the picture and audio information is in a Digital form, there will not be a problem with
Ghosting or Snow as with the present analog NTSC signal. Once sufficient signal is detected
by the ATSC receiver to operate the set, a clear picture will appear on the screen.
RECEIVER INPUT
In the receiver, the ATSC signal is fed to the Tuner from an Antenna, Cable, or Satellite.
(Figure 9) The Tuner receives the ATSC signal and down-converts it in much the same

FIGURE 9 - ATSC TUNER

manner as in the NTSC tuner. The output of the Tuner, approximately 44 MHz, is fed to the
IF filter and AFC circuit to separate the Pilot and Data signals. The Pilot is used to drive the
Automatic Frequency Control circuit to adjust the frequency of the 2nd mixer in the Tuner. A
precise frequency and phase lock is necessary to recover the Data from the signal.
The output of the IF circuit is fed to the Synchronous Detector and AGC circuit. It separates
the Segment sync and provides AGC control for the Tuner. The level of the Segment sync
keys the AGC circuit which feeds a DC control voltage back to the Tuner. The data signal
from the IF circuit is also fed to an NTSC rejection filter. If the filter detects NTSC
interference, the circuit is switched On. If no interference is detected, the filter is switched
Off. The output of the NTSC rejection filter is fed to the Equalizer and the Data Field sync
recovery circuit. The Data Field sync recovery circuit is also synchronized by the Segment
sync from the Synchronous detector. The Data Field sync detector has as its output, Data
Field sync one and Data Field sync two. This sync has no relationship to the scan rate of the
TV display. It is used to provide sync for data recovery. The picture will be processed and
appear on screen once the Data Field Sync is detected. The output of the NTSC rejection
filter is also fed to the Equalizer. The Equalizer compensates for linear channel distortions,
such as tilt and ghosts. The output of the Equalizer is then fed to the Phase Tracker and
Trellis Decoder or Map per. The Trellis Decoder is used when the signal is an eight level
terrestrial broadcast signal. The Trellis Decoder is switched Off and a map per is used if the
signal is a higher rate sixteen level 38.8 Mbps data rate signal. These circuits change the
eight or sixteen level signal back to an eight bit data signal. The signal is then fed to the
Forward Error correction circuits which are the Data De-Interleaver, Reed Solomon Decoder,
and Data De-Randomizer. This is the reverse order that was used by the Forward Error
correction circuits in the transmitter.

Page 6

DIGITAL DECODING

FIGURE 10 - DECODING

The output of the Data

De-randomizer is fed to a
Multiplexer, which separates the Video, Text,
Audio, and Control data
bit streams. (Figure 10)
The MPEG-2 decoder
decompresses the Video
data bit stream to produce a digital Y, R, and B
signals. These signals
are fed to their respective Digital to Analog
(D/A) decoders. The signal is now analog at this
point. The
analog Y,
Pr, and Pb signals are
then fed to the monitor

section. Horizontal and

Vertical sync from the
decoder are also fed to the
monitor to operate the
sweep circuits. The Audio
bit stream is fed to the AC-3
decoder which produces six
digital audio output signals.
These are fed to their
respective digital to analog
decoders. Six analog audio
signals are then output to
the monitor.
FIGURE 11 - RECEIVE FRAME ORDER
The decoder decompresses
the "I" frames of video and
stores it in memory. (Figure 11) The decoder then processes the "P" frame and "I" frame to
produce a complete frame of video for the "P" frame. The "I" and "P" frames are interpolated
to recreate the two "B" frames of video. Once four frames are processed, they are read by
the sync generator to produce the "Y", "Pr", and "Pb" outputs to the monitor. The frames are
stored in the 1080 by 1920 format by the DPTV120 decoder. The DPTV 110 monitor uses a
1080 interlaced display. The odd lines are read for the first field and the even lines are read
for the second field. Each field displays 540 lines.
The Control data bit stream from the Multiplexer is fed to the Microprocessor. The Control
data contains information about the transmitted signal. For example, the number of Bit
streams, the Compression format used, Channel guide information, and the Closed Caption
Page 7

information. When the signal is transmitted in the lower bit rate SDTV mode, four or more
video and associated audio bit streams can be transmitted. This allows up to four subchannels in each channel.
L05 ATSC CHASSIS
ATSC Cable Transmission
The previous material shows the 8VSB terrestrial broadcast system. Since cable TV is a
closed system, a faster data transfer method can be used. The 8VSB system can transmit a
maximum of 19.2 megabits of data per second.
Cable uses either 64QAM or 256QAM to distribute digital TV data. This system uses a
combination of amplitude and phase
modulation to transmit the signal.
Compression
methods and error correction are the same as with the 8VSB
system.
The 64QAM system is shown in Figure
12. The 64QAM system is capable of a
data transfer rate of 26.97 megabits per
second.
Figure 13 shows the 256QAM mapping.
The 256QAM system is capable of
transmitting 38.4 megabits per second.

FIGURE 12 - 64QAM

FIGURE 13 - 256QAM

Page 8

Introduction
The L05 ATSC chassis is designed for the model year 2005. This set has a fully integrated
ATSC as well as a NTSC tuning system. This set will come in a 26 and 30 inch screen sizes
in a 16x9 format. There will be a 32 inch version using a 4x3 ratio screen.
The set consist of a Main panel, CRT board, Side I/O panel, ATSC module, and Deflection
controller panel. The panels consists primarily of conventional components with some surface mounted devices.
The functions for the 1fH video processing is performed in one IC (TDA1200xx, IC7200), the
Hercules chip. This IC is located on the solder side of the Main panel. NTSC tuning and
switching for AV1, AV2, and CVI inputs are performed on the Main panel. The CVI input
located on the Main panel are for 1fH (480i) signals only.
The ATSC Tuner and 1fH to 2Fh conversion is performed on the ATSC module. Component
inputs for the CVI HD and HDMI are located on the ATSC module. This input can accept
480i, 480p, 1080i, or 720p signals. The ATSC module converts whatever signal is applied to
a 1080i format. The ATSC tuning system can tune all channels in the VHF, UHF, and Cable
bands.
The Microprocessor communicates with the memory IC located on the Main panel, Keyboard,
Remote Receiver, NTSC Tuner, Deflection Controller panel, and ATSC module. The Memory
IC retains the settings for favorite stations, customer-preferred setting, and circuit settings.
The circuit settings can be accessed by the service technician via the Service Alignment
Mode.
On-screen graphics and Closed Caption decoding are performed in IC 7200 for NTSC. IC
7200 is located on the Main signal panel. On-screen graphics and Closed Caption for the
ATSC channels are performed in the ATSC module.
Customer Operation
There are two different menu structures in the L05 ATSC, one for the Analog and one for the
Digital mode. Press the A/D button on the Remote control to toggle between the two modes.
There is no selection in menu to switch between Digital and Analog. It can only be performed
with the Remote.
The Digital channels may have one or more subchannels if the station is transmitting in the
SDTV mode. The customer must press the A/D button to place the TV in the Digital mode.
Then press the channel number followed by a period and the sub channel number. If the
station is transmitting in the 1080i format, the sub channel number should be one.

Page 9

Rear input jacks

Side Jack
Panel

ATSC Module
Page 10

Family board

This page shows the channel install

menus. Note that there are different
menus in the Digital and Analog modes.
The Digital mode in most cases will
require 20 to 40 minutes to install the
channels.

Digital mode
Main
Picture
Sound
Features
Install

Language
Tuner Mode
Auto Program
Channel Edit
Auto Chron
...More

Analogue mode
Main
Picture
Sound
Features
Install

Language
Tuner Mode
Auto Program
Channel Edit
Fine Tune

Install
Language
Tuner Mode
Auto Program
Channel Edit
Auto Chron
Weak Dig Sig

Install
Language
Tuner Mode
Auto Program
Channel Edit
Fine Tune

Auto Scan
Tuner Input: Cable
Autoscanning /

Auto Program
Channel

12

Auto Program
Channel

13

Auto Program
Channel

14

Digital 80

OR
Auto Scan
Tuner Input: Air
Autoscanning /

Digital 35

2
4
2
4

1
6

3
5

Page 11

This shows how to edit channels in both

the Digital and Analog modes.
It is necessary to have the remote control to switch between the Digital and
Analog mode.

Digital mode
Main
Picture
Sound
Features
Install

Language
Tuner Mode
Auto Program
Channel Edit
Auto Chron
Weak Dig Sig

Analogue mode
Main
Picture
Sound
Features
Install

Install
Language
Tuner Mode
Auto Program
Channel Edit
Fine Tune

Install
Language
Tuner Mode
Auto Program
Channel Edit
Auto Chron
Weak Dig Sig

Language
Tuner Mode
Auto Program
Channel Edit
Fine Tune

Channel
Skipped

Channel edit
3 NTSC
4 NTSC
5 DTV
6 NTSC
7 NTSC
8 NTSC
9 NTSC

Skipped
Added
Skipped
Added
Added
Skipped
Added

Channel Edit
Channel
Skipped

12

5 DTV WATE-DTV

Channel Edit
Channel
Skipped

On

Channel Edit
Channel
Skipped

Off

Channel edit
3 NTSC
4 NTSC
5 DTV
6 NTSC
7 NTSC
8 NTSC
9 NTSC

Skipped
Added
Added
Added
Added
Skipped
Added

5 DTV WATE-DTV

2
4
USE THE A/D
BUTTON TO
SWITCH
BETWEEN
ANALOG AND
DIGITAL

Page 12

2
4
7
6

1
9
3
5
8
6
8

Power Supply
Power Supply Block (Figure 14)
Both power supply sections are located on the Family Board. The supplies are divided into
two sections, the Auxiliary and Main section. A single filter and rectifier circuit supplies both
sections. The Auxiliary supply operates in a low power mode when the load is reduced. In
the standby mode, the 3.3 and 6 volt supplies are operating. The 3.3 volt supply provides
power to the processor section of the Hercules. The 6 volt supply provides power to the IR
receiver. The Main supply is switched Off via the Standby line.
When the set is turned On, the "B" line from the Hercules processor goes High switching
7547 which turns 7535, 7509, and 7545 On. The +3V3A, +6VA, +12VA, and +8VA supplies
are then switched On. The load placed on the Aux Power supply will cause it to switch to the
full power mode. At the same time, the STBY line switches Low turning the Main SMPS supply On. The supply produces a +6 volt, +140 volt, -16 volt, and +16 volt supplies.
The +Vaudio (+16 volt) supply switches on the degauss relay.

FIGURE 14 - POWER SUPPLY BLOCK

Page 13

Auxiliary Power Supply (Figure 15)

IC 7510 is the heart of the Auxiliary Power supply. In the Standby mode, VIA the current
sensing and Control circuits, a low power condition is detected by the IC. The IC then goes
into a Burst Mode operation to reduce the power used by the circuit. In the Burst Mode, the
supply will operate at approximately 25 kHz. In full power operation the frequency will be
approximately 66 kHz.
When power is first applied to the set, Start up is supplied to the IC by the internal Start-Up
current through Pin 14. Startup voltage is also applied to the IC to Pin 2 by the AC_IN line
which is tied to the neutral side of the AC line. During normal operation, power is supplied to
the IC by the HOT windings, Pins 1 and 2, of transformer 5504. Output drive from Pin 11 is
applied to the Gate of Transistor 7525. Voltage developed across the current sensing resistors in the Source of 7525 provides current sense information to the IC. When 7525 is
switched Off, the voltage on Pin 1 of 5504 goes High. This winding supplies the operating
voltage the power supply circuit. It also turns Transistor 7567 On causing the Gate of 7525 to
stay Low as long as Pin 1 of 5504 is High. This prevents 7525 from turning On until the field
of 5504 has collapsed.
Regulation is accomplished by monitoring the +3 volt supply. This voltage is fed to Shunt regulator 7542 which controls the current through opto-isolator 7516. Shunt Regulator 7542
begins conducting when Pin 3 of the IC reaches 2.5 volts. At this point current flows through
the opto-isolator, 7516. The transistor inside 7516 turns On applying a control voltage to Pin
6 of 7510. If a problem should develop in the feedback circuit causing an excessive voltage
on Pin 6, Transistor 7549-2 will turn On, switching Transistor 7532 On. This will a voltage to
the Demag circuit on Pin 7 causing the IC to latch Off. The IC will stay latched until power is
removed and reapplied to the set.
In the Standby mode, the "B" control line from the Hercules Processor is Low. Only the +3,
+3V3, and +6 volt supplies are present. When the set is turned On, the "B" line will go High,
turning Transistors 7509, 7545, and 7535 On. This will switch On the +8VA, +12VA, +8V,
+3V3A, +6VA, and +5V supplies.
In normal operation, voltage from Pin 12 of 5504 is rectified by 6540 to produce a negative
voltage which prevents Transistor 7561 from turning On. If AC is removed from the set, this
negative voltage will disappear. The voltage across the filter capacitors on the +3V line will
turn 7561 On. The Power Down line will then go Low signaling the processor to shut the set
down.

Page 14

Mono Carrier: AUX Power Supply

Page 15

30WSRF-HD
----------JMP
--JMP
----100MHZ
--- 120R
BAS316
SI2307DS-E3
-----------

3139 123 5933.1

9530

2556

47u 16V

2555

47u 16V

2534

3546

68K

2564

100n

220R

3561 220R

3562

2584
I545
9515

2579

0V
C

BAS316

68K
6553

3548

4548

68K

3540

68K

4566
3566

6554

7509
SI2307DS

B
A4

F537 +6VA

Vaux_GND

F585
+6V

7544
L78L33ACZ
IN

OUT

F586 +5V

COM
2

47u 16V

2558

2557

Vaux_GND

68K

3583
B
0V

7575
E 0V PDTC143ZT

7576
BC847BW

6V

5K6
3585

A
2

2K2

I596
B
2V
E

27K
3544

I593

7547
C PDTC143ZT

0V

1n0

3
2V5

Vaux_GND

Vaux_GND
Vaux_GND

BAS316

470u

2587

100n
3553

REF

7542
TL431CZ-AP
2K2

3587

22K

MainSupplyGndA

10K
2578

2u2

47u 16V

I592

2543

82K

8V

3543

6547

1V5

C
9V

Vaux_GND

7545
SI2305DS

I547
68K
2589
5V7

680R

BZX384-C6V8
3590

1K0

3539
3

NAFTA

27VRF-HD
----------JMP
--JMP
----100MHZ
--- 120R
BAS316
SI2307DS-E3
-----------

0V

3537

Vaux_GND1

10K

1
9V

10n

3540
3548
3551
3566
4523
4540
4548
4551
4566
4585
5523
6553
7535
9515
9524
9529
9530
9534

STPS10L60D Vaux_GND1
3542

I590

2575

REGION
SIZE

3594

7516
TCET1103(G)

Vaux_GND

10K

10u

3596

2583

F580 +3V3A
3

68K

Vaux_GND

470U

2591

2588

1K2

3529

47n

10K

7549-1
IMX1

C
0V6

2521

3593

B I597
0V6

7549-2
IMX1

270R

I594

3591

100K

3595

C
15V8

I529

+3V
+3V3

9524

4540

SB340L-7010

1
K
8V1

20V

3549

Vaux_GND1

3547

Vaux_GND

I539

1n0
6552

Deflection
Controller
1535
1
2
3

2u2

6538
BAV21WS

+8V

3
F583

OUT
COM

Vaux_GND1Vaux_GND1

5527

10V

IN

2546 I589

2590

100n

470U

3m3

47K

6545

5K6

3597

I531

F584

1
Vaux_GND

56K
2520

I512

1n0

5526

470u

0083
HEATSINK

+12VA

Vaux_GND1

STPS10L60D
2538
F535

I540

+8VA

33R

7543
L78L33ACZ

2K2

Vaux_GND

3560

F582

470u 16V

2536

12

I532
3530

Vaux_GND E

9534

To 1405
Of

Panel

To P1534 Of
2n2

33K
2544
2

3586

0V

11

0088
HEATSINK

1n0

I526 G
3V4

7561
PDTC143ZT

SB340L-7010
6546

BAV21WS

OVER
POWER
PROTECTION

D
2523

3526
I530

6544

SS28411-00

3532

11
3V4

470p
7525 158V

1K0

Driver

9
10

2522

Vaux_GND

POWER_DOWN
A4

B
0V

7535
SI2307DS

F578

10u

3545

I533

3538

OUTPUT
DRIVER

MAXIMUM
ON-TIME
PROTECTION

BURST
DETECTOR

CURRENT
SENSING

9
0V

Vaux_GND1
Vaux_GND1

2535

47K

6536

470p

CIRCUIT

Sense

3533

Demag

LOGIC
CONTROL

I537

6537

START-UP

5521

I536

BAS316

HVS

POWER-ON
RESET

INPUT
CONTROL
CIRCUIT

Ctrl

C
3V4 7567
BC847B

I599

0086
HEATSINK

SB340L-7010

4523

6543
BAS316

15K
5524

Vaux_GND1
I564

4m7 6V3

B
0V1

CURRENT SOURCE
OVER
TEMPERATURE
PROTECTIOM

6
1V3

14
158V

VALLEY
VOLTAGE
CONTRLLED
OSCILLATOR

2K2

3568

CURRENT SOURCE

Gnd

FREQUENCY
CONTROL

C
0V

Drain

2525

47K
6549

B
15V8

SUPPLY
MANAGEMENT

BZX384-C15

3527
I509

7532
E
BC857B 15V8
I554

F581

Vcc

470p
6539

5523

5504

I568

3536
START-UP

3531

330K

3598

4M7
6531

BAS316

470n
3528

2528

7510
TEA1507

3550

I558

I556

BZX384-C12
3565

1m0

3567

BAS316

3588

470K
6534

6550
SARS03

220K

4R7

1532

T 1000mA
3535
10n
3592

2580

2592

68p
10K

3K3
3534

4585

3589

22u

2510

100n

100n

2585

6512

BZX384-C18
2526

2539

300K

1M5

2
15V9

BAS316

6542

3599

I528

220R

F577

I588

I563

C
3V7

I595

6540

3525

3563

**

RGP10D

B
4V5

F534 I534
3V2
C

Vaux_GND1

I538

* *

6533

Vaux_GND1

MAINSUPPLYGND

Vaux_GND

+5V
+6VA

* *

1n0

4R7

7585
BC857B

9509

E
0V

2524

I510

3551

*
*

FIGURE 15 - AUXILIARY POWER SUPPLY

AC_IN
I553

4551

Panel

*
*

*
*

I560

Vaux_GND

Vaux_GND1

Vaux_GND

1u0
2582

I557

+3V3A
1
+8V
2
3
4
5
Vaux_GND
6
Vaux_GND1
9554
7
4567
8
9
10
9536
11
12
9523

2576
100n
0V
7577
BC847BW C

Vaux_GND1

Vaux_GND1

Vaux_GND1

B
0V7

10n

B
0V7

Vaux_GND

6548
BAW56W

Vaux_GND
Vaux_GND

C BC847BW
7583
7584
C BC847BW
B
10V7
B
E
0V

3581

330p
6532
BAV21WS

1533

Source Select +
Microcontroller
Or
To P1533 Of

2586

I565
VCC

1
2
3
4
5
6
7
8

To 1533 Of
+3V3A
1534

VDC

AUXILIARY POWER SUPPLY

A10

22K
2577
100u

Vaux_GND

E
Vaux_GND

Vaux_GND

9529

Stdby_con
A4

AUX_ON|ITV_MSG
A4

Main power supply (Figure 16)

The Main Power supply provides the VBAT (141 volt), and Audio voltage supplies. This supply is switched Off during the Standby mode. During Standby the STBY_Con line is High
which turns Transistor 7573 On. This causes the opto-isolator 7513 to turn On hard. This
places a higher voltage on the control Pin of IC 7511 causing the IC to shut down. The operating voltage from the Auxiliary supply keeps a small voltage on Pin 2 of 7511 to prevent it
from cycling On and Off.
When the set is turned On, the STBY_Con line goes Low switching 7573 Off. The VBAT supply is the reference voltage for regulation. Since this voltage is missing during startup, the
Shunt Regulator 7571 is turned Off. The voltage on Pin 6 of 7511 goes Low, which turns the
drive from the IC On. When the set is On during normal operation, the supply voltage on Pin
2 of the IC is supplied by Pin 2 of Transformer 5512. When the VBAT supply reaches the
correct voltage, Pin 3 of the Shunt Regulator 7571 reaches 2.5 volts switching it On. This
switches the opto-isolator On to provide a regulation feedback path.
Transistor 6551 provides a power on ramping of the VBAT supply.
Power FET drive points

Page 16

POWER SUPPLY

A1

+Vaudio

AC_IN

9504

3541

2503
2n2

2541

F542

Vaux_GND1

9510

2542

RES

2507

2n2

2504
1507
1
2

VDC

4
2505

2R0

"$"

Audio_Gnd

AUDIO_GND2

AUDIO_GND1

F509
I584

5512
18

I552

5551

I514

3513

6551

I551

17

F552

5552
Vbatt

14

I516

11

8
S 0V

10

470p

HOT GROUND
COLD GROUND

MainSupplyGndA

I572

*
*

9577
1577

F565
+Vaudio
+16V

AUDIO_GND2

I574
8V2

2K2
2571

I573

I576

7573
PDTC114ET
F573

15n

To P14 Of

Panel

HOT

COLD

82K

3575

15K

I578

4K7

3576

1545
Provision For
Lightning Protection

Stdby_Con
A4

1n0
3573

7513
TCET1103(G)

10n

2512

100n

1K2

3512

15K

3519

Page 17

"$"
FOR MAINS 120V AC 170V (177V)
220V AC 309V (317V)
..V.. Normal Operation
(..V..) Standy Mode

MainSupplyGnd

-16V

F 2.5A

3579

2518

1546
Provision For
Lightning Protection

22u
9563

-Vaudio

2 8V2

5V 3

3K3

VCC

1n0

3571

F564

+6V
1

3518

For EMC
5563

2562

2574

5513

I571
9V3

15V6 4

7571
TL431CZ-AP

I527

470P

I523

1u0
I520

F561

2561

I519 100n

I521

I562

9572
1572

F 2.5A

OVER
POWER
PROTECTION

I518

AUDIO_GND2 5561

*
*

AUDIO_GND1

470p
6562

REF

MAXIMUM
ON-TIME
PROTECTION

1K0

47K
2516

11
2V2

AUDIO_GND1

I561

3511 4R7 F510

Driver

1N5062
3520

0V

CURRENT
SENSING

OUTPUT
DRIVER

POWER-ON
RESET

3515

3522

6575

CIRCUIT

Sense

3516 0R1

CONTROL

F562

2565

2570

LOGIC

F563
2563

3574

1n5

STPS10L60D
6563
I579

12

160V 100u

6564

1n0

5562

13

2552

3K3

3521

15

5511

BAS316

3524
D 295V

2515

3514

7
0V

1n0

BURST
DETECTOR

Demag

2519

Ctrl

START-UP
CURRENT SOURCE

7512

2V3
G

470p

INPUT
CONTROL
CIRCUIT

0V
RGP10D
2517

HVS

VOLTAGE
CONTRLLED
OSCILLATOR

OVER
TEMPERATURE
PROTECTIOM

6511

I513
14
297V

2514

Gnd

FREQUENCY
CONTROL

Drain

CURRENT SOURCE
VALLEY

I508

TUNER IF
(For
Lightning
Protection)

START-UP

SUPPLY
MANAGEMENT

I515

100p

Vcc

330K
2513

22u 50V

2511

2
15V5

3517

I511

3M3

3501

1n5

3506

3M3
2509

1510
TO 1013 OF

2V3

7511
TEA1506T/N1

47K
6514

I517

I505
I522

2551

0V
I524

140V

27u

16

2K2

7514
BC847B

3M3

3500

10n

4
3

Vaux_GND1

F508

2572

DMF2405H60
9503
RES
I581

7541
BC857B

3
9513

3509
-T

5500

F541

For ITV Only

16V4

I501

F507

DMF35
9502

*
*

RES

470n
3505

*
F504

4
1

2500

For ITV only

2
1

9501
RES
5501

-T 2R0
I507 9511

2508

F506

9500

16V4

6500

100n
3510

T4E.250V

F503

Front Interface Panel

1505

I542

RES

2
I502

9505
RES

2502

1500

3523

3503

5506

3
F500

5502

DSP-301N
I580

+T

I525

3502

1503
LKS1AF 4

9512

Rs
4R5

1502
PFC5000

*
AC Main Plug
Or
From 1505 Of

33n

1
5564
DMF2405H60
4
1

3504

1501
PFC5000

I583

2506

FIGURE 16 - MAIN POWER SUPPLY

1M5

F501

RES

2501

F502

Rh
4R5

1504
2
1

9506

I582

220R

47K
6541

DEGAUSSING COIL

47u 25V

I506
3508

BZX384-C12

I543

FIGURE 17 - OVERALL VIDEO SIGNAL FLOW BLOCK

Video Signal Flow

Overall Block (Figure 17)
The video processing section located on the Family Board (Mono Carrier board) performs all
of the 1fH processing. AV1, AV2, CVI, and Side inputs are fed to this board. The CVI input
on this board will only accept 1fH signals. 1fH RGB signals from the Family board is fed to
the Deflection board and then to the ATSC module. The ATSC module rescales the picture
from the Family board. It also has an HDMI and CVI connection. The HDMI and CVI connections can accept either 480i, 480p, 720p, or 1080i. The ATSC module also has a built in
Digital Tuner. The ATSC module resizes the picture to 1080i regardless of the input.
The YPbPr output of the ATSC module is fed to the Deflection Controller board for video processing and deflection control. RGB from the Deflection Controller board is fed to the CRT
panel.
Customer adjustments such as Brightness, Contrast, Color, and Tint are performed on the
Deflection Processor panel.

Page 18

FIGURE 18 - FAMILY BOARD VIDEO PROCESSING

Page 19

Family Board Video Processing (Figure 18)

Video processing on the Family board is performed by IC 7200, Hercules. IF from the NTSC
Tuner, 1000, is fed to SAW filer 1002 and then to 7200. The demodulated video is fed to an
internal switch which selects between the Tuner video, AV1, AV2, or the Side Jack panel.
Monitor video is output on Pin 81. There is no monitor out for the ATSC section. The video is
fed to an internal Comb filter to separate the Luminance and Chrominance, YC. The Chroma
is fed to the Color Demodulator and to the YUV switch along with the Luminance. The YUV
switch selects between the internal demodulated signal and the YPbPr signal. This is a 1fH
only input.

TUNER IF

F001

TUNER
I016
13
12

34V5

4.9V

4.3V
4.3V

1011

VT_Supply

POWER SUPPLY

470u

F004

FOR EMC ONLY

2007

F002

1 2 3 4 5 6 7 8 9 10 11

2006

14
15

AGC
VT
AS|CE
SCL
SDA
NC1
VS
ADC
VST
NC2
IF

F005
1010

60

CGND

F003

A4

3001

I002

2001

RES

1005

3009

CGND

2004

CGND

FIGURE
19 - NTSC TUNER
CGND CGND
F011

CGND

* *

40

CGND

NTSC Tuner (Figure 19)

The Tuner for the NTSC signals is located on the Family board. The VT_Supply is derived
from the VBat supply. It is regulated to 33 volts by zener diode 6001. The Tuner is controlled
by the I2C bus from the Hercules processor.

Page 20

*
*

30

*
+5V

1
2
3

CGND

4001

4003

*
*

5002

SDA

I015 F008

2003

RES

BAS
60
BZX79-C33

I001

2008

3000

2005

I014 F007

4000

47n

SCL
A4

*
*

6001 10u 50V

CGND

RES
2002

TO 0282
OF

1000

RF
IN

FOR ITV ONLY

For Compair only

1403

1255

FIGURE 20 - VIDEO TEST POINTS

Video Test Points (Figure 20)
The connection points between modules can provide test points to determine which circuit
board requires repair or replacement. The RGB and Sync signals from the Hercules is fed to
the Deflection Controller board on connector 1254. These signals are buffered by transistors
7492, 7491, and 7490 before being fed to the ATSC module on connectors 1401 and 1254.
After the signal is processed, it is fed back to the Deflection panel on connectors 1255 and
1403. Refer to the wiring interconnect diagram for additional check points.

Page 21

U1201

FIGURE 21 - ATSC BLOCK

ATSC Block (Figure 21)
RGB from the Deflection module and Component video from the YPbPr input if fed to U1201,
switch. The YPbPr input on the ATSC module can be 480i, 480p, 720p, or 1080i. The A/D,
U201 shares a 16bit bus with the HDMI receiver. The Customer selected signal is fed to
U201, the ATSC processor. The ATSC processor enhances and rescales the signals from
these inputs. The ATSC tuner, U701, is fed to the IF section, U703, and then to filters U704
and U703. The ATSC processor can decode either 8VSB terrestrial, 64QAM, or 256QAM signals.
The output of the ATSC processor is fed to the POD processor IC. Most of the POD processing circuit is not present since this set does not have that feature. Two memory ICs, U502
and U503 stores the picture information while the video is being processed. The analog
YPbPr 1080i signals are output to the Deflection panel.

Page 22

FIGURE 22 - DEFLECTION BLOCK

Deflection Panel Block (Figure 22)
The Deflection panel performs the signal processing and Deflection processing functions.
YPbPr from the ATSC module is fed to 7402 signal processor. This circuit performs the Color,
Tint, Brightness, and Contrast control functions. The Y signal is fed to a Sync Separator to
separate the Horizontal and Vertical Sync which is output on Pins 37 and 35. RGB is output
on Pins 12, 13, and 14. These signals are sent to the CRT panel.
Horizontal drive is output on Pin 37 where it is fed to the deflection circuits on the Family
board. Vertical Sync is output on Pin 35 of 7402 to IC 7404. IC 7404 develops the Vertical
and EW drive for the deflection circuits.
DC monitor signals are output on Pins 4, 6, and 7 of 7402 and fed to an Under voltage
detection circuit. If a positive or negative voltage develops on any of these lines, this circuit
will force Pin 21 of 7404 Low, causing the set to shut down. The shutdown is activated when
Pin 21 goes below 5 volts.
CRT board
As shown in figure 23, the Filament voltage, 200 volt, 8 volt, and 12 volt supplies are fed to
the CRT panel on connector 1351. The 141 volt supply powers the SCAVEM.

Page 23

Deflection Controller board

Deflection (Figure 23)
Horizontal drive from 7221 is fed to Transistor 7404 located on the Family board. This drive
circuit has two power sources. During startup, it is powered by the +6 volt supply. Once the
High Voltage circuit is running, it is powered by Pin 9 of the IFT. 7404 drives Transformer
5402 which drives the HOT (Horizontal Output Transistor). The HOT drives the IFT and the
Horizontal Deflection Coil. The IFT is powered by the VBAT (141 volt) supply.
The IFT produces High voltage, Focus voltage and G2 voltage to drive the CRT. In addition,
a 200 volt supply is produced to drive the CRT panel, a +14 and -14 volt supply for the
Vertical output, Filament voltage, +200 volt VideoSupply, and a +12V_lot supply.
Transistor 7408 monitors the IFT secondary to sense the presence of over voltage. If the
High Voltage goes High, the voltage on Pin 6 of the IFT will go High. When the voltage on
diode 6480 exceeds 15 volts, transistor 7408 will turn On. If 7408 turns On, it will turn 7407
On causing the x_ray protect line to go Low. The Processor will then shut the set down. In
addition the EW_DRIVE circuit is monitored. If the EW_DRIVE fails, transistor 7406 will turn
On constantly placing a dc voltage on the source. This will turn 7407 On.
IC 7451 is the Vertical Output IC. It is powered by the +14 and -14 volt supply from the IFT.
The Vertical pulse is rectified by 6458, keeping the V_PROTN line High. If the vertical output
should fail, the V_PROTN line will go Low. The Hercules processor will then shut the set
down.

Page 24

LINE + FRAME DEFLECTION

A2

F402

+12V_LOT
33K

3492

33K

3491

47u

4R7

3443

4R7

470p
6403

I416 3493

RGP10D 2410

2459

8n2

1K5
6492

2435

BZX384-C8V2

3477

15n

18K
2477

2478

3462

68K

3459

3442

22K
6442

9442

BZX384-C15

1u0
6480

BZX384-C33

6457
+14V

6M8

7407
PDTC144ET C
3V3

6488
I440

I460

I431

I482

*
*

B
0V

GND_DEF

100n

GND_EW
3480

+14V
9435

F456

1R0

BYV27-200-TAP

F457

F478

47u
CRT_GND

3455

I493

470p
6456

I475

2R2

+12V_LOT
CRT_GND
2461

CRT_GND

5458

560n

1K0
I414

I461 I459 RGP10D

2424

Vbatt

RES

BAS316
B
6V
7410
C 0V BC857B

GND_HOR

3451

1R0

10u

GND_DEF

3450
I492

1u0 250V

470p

100n
2436

2448

4R7

3435

X_RAY
A4

10R

V_PROTN

3496
E 0V

10K

F482

CRT_GND

GND_EW

BYV27-200-TAP

BZX384-C3V3

4R7

4R7

I465

F453

10K
6491

3433

A2

3497

I412

3419

Filament

1u0

4R7
6485

5V7 E

I411

3415

CRT_GND

1R5

F452

5452

2u2

I410

CRT_GND

2u2

-14V

6490

3414

5459

BZX384-C27

6464
3441

GND_HOR

100R

3408

330R

S
50V

220p

3402

100K
2497

F475

HD
A5

3481

BAS316
7V
7404
BSH103
I413
G
3V6

CRT_GND
I470

6489

470p

6461

2u2
2491

3485

I468

2499

GND_DEF
8
6487

6467

BYV29X-500

BAS316
2458

2494

GND_HOR
F419

470p

CRT_GND

6452

11

5408

* *

2493
470p

CRT_GND
2426

45V7

BAS316
2466

0V

2425

BZV85-C6V8

1R0

I427

VideoSupply
6453 RGP10G

I432

3458

I466

I426

C
0V

2454

2419 I428

I473

3456

I456

470u

5457
I457

470u

3416
47R

2449

1u

2488

0V

* *

CRT_GND
I455

2460

6
PSD10-204B

6486

330p

GND-LINEDRIVE

I419

12

7405
BU2527DX
126V

2412

2418

2417

4
1

F418

5402
1

2416

I418

3490
150R

2413

2423

I488

33n

6404
DMV1500M

2409

BAS316

6481

22R

10

100n

2471

15n

Page 25

GND_EW

CRT_GND

MainSupplyGnd

FLYB

4434

50V7

13V9

220n

F459

2470

OUT 5
0V5

1
2
3

VERTICAL
DEFLECTION
COIL

F461

2R7
3472

-14V
REGION
SIZE
2411
2412
2413
2413
2417
2418
2419
2421
2422
2433
2451
3418
3424
3425
3434
3435

27VRF-HD
2KV 820P
1K6V 12N
630V 27N
----250V 390N
250V 560N
----2KV 220P
100V 220N
100R
---------

NAFTA
30WSRF-HD
2KV 220P
1K6V 12N
630V 27N
----250V 330N
250V 1U2
2KV 330P
2KV 330P
--100V 100N
100R
1MA 612V
1MA 612V
-----

REGION
SIZE
3442
3459
3478
3489
4401
4418
5408
5450
5456
6476
9411
9435
9440
9442
9476
9489

NAFTA
27VRF-HD
30WSRF-HD
----820K
470K
----------------W7132-004 Y
W7131-003 Y
JF0101-85039 B JF0101-85038 B
--SD20417-02 Y
BZV85-C6V8
BZV85-C6V8
JMP
--JMP
JMP
----JMP
JMP
---------

CRT_GND

BZX384-C15

3432
3432

ATSC
10K
10K

BAS316
Tri+
1K
1K5

4401
3434
1K0

6434

I464

*
*

4495

9432

3467

100R

6458

1K0

100n

2464

I430

3432

2468

I463

1R5

3466

GND

CRT_GND

6449
I481

220n

*220n

2465

CRT_GND

THERMAL
PROTECTION

100n

CRT_GND

MainSupplyGnd

3471

2R7

GND-LINEDRIVE

2n2

2463
10K

GND_EW

9484

F458
1451

POWER
AMPLIFIER

100R

10K

3439

3n3
3461

I435

BAS316
2473

BAS316
3438

2407

GND_EW
I499

GND_EW

For ATSC only

10R

GND_EW

6483

1n0

0V6 7 IN+

6484

I434

VSUPO

VSUP
I462

MainSupplyGnd
GND_EW

2432

100R
9490
3478

CRT_GND

0V6 1 IN-

3463

100n

I471

3489

FLYBACK
GENERATOR

9489

2n2

3488

220K

82K
10n

2496

A5

*
*
*
*

A4

A2,A5

Vguard
BZX384-C6V8

22K

VDRB

22K

3468

I436

I415

100R

2R2

680K
3437

A5

S
0V

9440

BZX384-C6V8
3436

100K

3418

VDRA

2467

I433 3428

1M0

3440

6482

3426

2472

3427
EHTinfo
A2,A5

680K

A5

4418

10n

EW_DRIVE

*
*

I417

G
4V6

2495

3499

F476

14V9
D

7406

Vbatt

7451
TDA8177F

3473
I423

-14V7

6471
RGP10D

2462

I490

12V7

GND_HOR

3431

FIGURE 23 - DEFLECTION

3421

BYD33D
2411

+6V

GND_DEF

I458

I425

* *

7408
BC857B
E
42V4

680K
3460

1406

F465

GND_EW

CRT_GND

G2

9476

1405

CRT_GND

1403

FOCUS

A5

I494

22K

1R0

3469

COIL
CRT Socket

5409

2451

56K

3453
RGP10D I469

1404
1

CRT_GND

F481

2n2

DEFLECTION

HFB

3K9
2474

GND_DEF GND_DEF GND_DEF

3486

A2,A5

F472

150p

470p
6466

TO PICTURE TUBE

470u

I489

HORIZONTAL

2492

EHT

2469

1402 From 5450 Of LOT

(30PWXXXX Only)

I424

F464

6476
BZV85-C6V8

CRT Panel
Or
TO 1351 OF

2431

BZV85-C6V8

CRT_GND

5450

I453

TO 1351 OF

F404

9402

F455

5401

A2

3425

Filament

L.LIN

3413

3474

F416

150R

GND_HOR

3412

F462
EHTinfo

F483

150R

3424

NC

9
V

F401 3401 47K

VT_Supply

2433

A2

5456
CD25405-00 5
GND_HOR

2422

+12V_LOT
VideoSupply
EHTinfo

2421

A5,B1

9411

1401
7
6
5
4
3
2
1

SVM_ROT

2404

Vbatt

Frame_FB
CRT_GND

F_15050_017.eps

Page 26

B1
F345
1335

AQUADAG
WIRE

+200A
6331

BAV21WS

CRT SOCKET
1354
1
5
6
7
8
9
10
11
12

GND_RGB

100R

1K0

3335

B2

I334

3336

I335

3332

100R

I332

B
B2

100R

CRT

Green

F339

1K0

3331

Blue

GND_LS1
Red

F341

TO CRT SOCKET

I331

F338

3334

1K0

F340

I350
5304

3R3
3345

GND_LS1

EHT

I373

TO CRT SOCKET
V
3357

FOCUS

9310

V
10n

3391

10n
2319

2313

150R

33R

+200A

F331

9328

I351 I323
2321

3351

F354

I348

3390

Line + Frame
Deflection

* 9306
* 3306

F383

47u

From 1401 of

I327
1 F352
DC_Filament
2
3
+141V
4
EHT-INFO
5
200V
6
+8V_+12V
7

VG2

3R3
1351

GND_RGB
I322

SVM_ROT
A2,B3

GND_LS1

GND_LS1

GND_LS1

FROM LOT, MAIN CHASSIS

GND_RGB
GND_RGB

LINE + FRAME DEFLECTION

I377

F347

3347

1336 VG2

+12A1

4n7
RES

820p
2317

2324

1K5

F342
9309

GND_LS1

5308

5u6

I336

+12A
F398

3999

F399

F397

470u

2347

1K2

* 5324
*9324

3305

+8V_+12V
I379

1R0

GND_RGB
5303

GND_LS1

10n
10n
2357

+3V
1K8
6325

+12A1

I308

3325

GND_RGB

2320

+12V_SVM

5u6
I302

BZX79-C3V3

FIGURE 24 - CRT

VG1

3307

DYN FOCUS

I333

3333

B2

1
5
6
7
8
9
10
11
12

STATIC FOCUS

6333

* 3308
* 1K0

BAV21WS

6332
I330

BAV21WS

9308

GND_LS1

GND_RGB

REGION
SET
3306
3308
5324
9306
9308
9309
9324

NAFTA
30WSRF-HD
----100MHZ 50R
JMP
JMP
JMP
---

1
2
3
4
5

22p

2360

B
3V4

100n

2334

E 3V4 I313

7353
BC847B C

+12A

I384

F337

F335

F334

GND_RGB

R-CRT
G-CRT
B-CRT
F336
CUT OFF

GND_RGB

1340

Deflection Controller
- ATSC

Deflection Controller
of Trident Panel
Or
To 1404 Of

From 1202 of

9304

3327

3328

B2

I344

220R
100R

+3V

GND_RGB

1K0

3355

2K2

8p2
3353

2341

GND_RGB

I399

I382

GND_RGB

+3V

B
3V4

I383

3V3 1
VIP

VIN

100n

2331

1K0

3344

I397

I309

2K2

8p2
3343

2337

GND_RGB

I395

GND_RGB

I396

CURRENT SOURCE

9 139V

GND_RGB

**

MIRROR

12V7

F348

I390

MIRROR

MIRROR

4
GND_RGB

MIRROR

DIFFERENTIAL
STAGE

MIRROR

120K

3341

GND_RGB

MIRROR

V BIAS

6 200V

7 140V

8 162V

5 13V3

VCN

IOM

GND_RGB

0077

CURRENT SOURCE

9 128V4

V BIAS

I393

GND_RGB

0078

I342

1K0
2369

3317

4313

33n

GND_RGB

GND_RGB

* 4314

2346

MIRROR

MIRROR

680p

* 2353
I398

4311

I394

IOM 5 5V

VOC 8 158V5

GND_RGB

I347

I346

680p

2343

GND_RGB

* 4312

GND_RGB

VCN 7129V

G - AMPLIFIER

GND_RGB

680p

2333
GND_RGB

GND_RGB

* 9301

330p

IOM 5 5V

VOC 8 158V5

I391

VCN 7 128V7

GND_RGB

6307

2336 33n

MIRROR

MIRROR

R - AMPLIFIER

0069

9 127V8

CURRENT SOURCE

VOC

B - AMPLIFIER

3V3 1 VIP

3V3 3 VIN

3337
120K

DIFFERENTIAL
STAGE

7340
TDA6111Q

VIP

3V3 1

7330
TDA6111Q

VIN

I389

3V3 3

GND_RGB

I392

GND_RGB

2K2

8p2
3338

2335

V BIAS

GND_RGB

I311

GND_RGB

MIRROR

DIFFERENTIAL
STAGE

MIRROR

120K

3352

GND_RGB

GND_RGB

1K0

3340

7352
BC847B
E 3V4

+12A

100n

2330

7351
BC847B
E 3V6

+12A

7350
TDA6111Q

+3V

B
3V6

I310

3V3 3

I329

9303

100R

GND_RGB

I328

100R

3322

3326

GND_RGB

GND_RGB

220R

3324

9302

220R

2358

CUT_OFF

3329

3321

22p

F332

470R

22p
2K7
4n7

2K7

VDDH

2355
3354
2352

3320
3323

2332

470R
470R

3339
4n7
3342

VDDH

RGB AMPLIFIER

GND

4n7

VFB

VDDH

GND
GND

2K7
2344
VFB
4315

GND_RGB

2340

VFB

2338
2339

VDDL
VDDL

100n
100n
100n

B2

33n

VDDL
2356

FIGURE 25 - CRT DRIVE

Page 27

BAS316

6308

+12A

+12A1

+200A

+12A1

+200A

+12A1

CUT_OFF

+200A

B1

B1

B2

B1

SCAVEM

3373
I360

3364

560R

2384

100n
3363

200V

0087
HEATSINK

4362

E
7332
125V
BC327-40

I386
I367

4K7

B
3V1

7364
KTD600K

B
0V3

GND_RGB

3369
150K

I316
3R3

3370

560R

3368

ROTATION

10R

7366
TDA8941

10n

VCC

1K8
6334

GND_RGB

3384
330K
3380

OUT- 7 8V1

I380

4V 5

IN-

3V9 3

IN+

33K

F381
F382
OUT+ 2 4V1
GND_RGB

GND_RGB

Vcc
4

MODE

STANDBY/
MUTE LOGIC
20K

I319

SVM_ROT

3350

B1

100n

2367

4K7

3385

GND
8
GND_RGB
3372
150K

GND_RGB
GND_RGB

20K

GND_RGB

9325
GND_RGB

GND_RGB

GND_RGB

SHORT CIRCUIT
AND
TEMPERATURE
PROTECTION

SVR

I381

6K8

4363

5V5 6

100n

2389

GND_RGB

GND_RGB

1381
1
2
3

TO
ROTATION COIL

+12V_SVM
GND_RGB

*
*

18K

3396

I387

3381

*
BZX384-C3V3

GND_RGB

E
0V

I320

0V8
B
C
5V3

7333
BC337-40

100n

150R

7365
BC847B

2390

5K1
I371

2370

2387

0V

1K8

100n

3378

1K0

3383

47K

220p
3379

I325

2391

+12V_SVM

I315

470p

GND_RGB

3377

3309

B
6V4

GND_RGB GND_RGB

2365

3374

E
2V8

10u

22R

GND_RGB

E 7V4
2393

100n
3394

2385
I364

220R

47K

I326

4n7

220p

2383
I365

5V3 B

C
52V2
3311

C
2V8

3398
2392

F362

120K

100n

2368

9393

7331
BC847B C

1362

3
2
1

56R

I375

3367

1N4148

6362
I370

For ATSC

TO
SCAVEM COIL

120K

I369

7362
5V1 E
BC857B

+12V_SVM

For HD
1
2
3

I317

3393

9322

3399

9323
270R

F361

3392

5361

1361

10R

3366

270R

C
52V2
470p

2364

6361
BAV99

C
121V
I314
7363
KTB631K

B
22R 120V3

GND_RGB GND_RGB

E
5V2
I362
3362

6363
4K7

BAV99

FIGURE 26 - SCAVEM AND ROTATION

3395

7361
BC847B

6V B

E
121V
3310

I366
13V C
I361

I368

125V B

100n

2361

2381

47n 50V

3361

560R
3397

8K2

3382

For ATSC Only

100n

2382

1u0

3371

5362

3365

*
+12V_SVM

47u

2363

1K5

2R7

I321
+141V

560R

Page 28

ROTATION & SCAVEM

CRT Drive (Figure 25)

RGB drive is fed to the CRT board on connector 1340 to transistors 7351, 7352, and 7353.
The signal is then fed to the three CRT drive amplifier ICs, 7330, 7340, and 7350. These
amplifiers are powered by the 200 volt supply.
SCAVEM and Rotation (Figure 26)
The Rotation and SCAVEM (SCAn VElocity Modulation) signals are both on the SVM_ROT
line. The Rotation signal is a low frequency signal. The high frequency is filtered out by
capacitor 2367. The Rotation signal is blocked by capacitor 2391.
The Rotation signal is amplified by 7366. A four transistor output circuit drives the SCAVEM
coil.
Audio
Family board audio input (Figure 27)
NTSC IF for audio, Side input, AV1, and AV2 are fed to the Hercules, 7200. The selected
audio is output on Pins 66 and 67 and fed to the ATSC module. Audio demodulation for
NTSC in done in the Hercules.

FIGURE 27 - FAMILY BOARD AUDIO INPUT

Page 29

Page 30

FIGURE 28 - ATSC Audio Block

ATSC Audio Block (Figure 28)

All of the audio in the set is routed through the ATSC module. Audio for the HD CVI
connection located on the ATSC module and audio from the Family board is fed to switch
U104. The selected audio is fed to A/D U103. Digital audio is fed to the ATSC decoder,
U201. Digital audio from the HDMI receiver, U802, is also fed to U201. The ATSC decoder
selects between the HDMI, Analog inputs or the internal ATSC decoder. After processing,
digital audio is output to U101, buffered by U102, and then fed back to the Family board.
Audio Output (Figure 29)
Selected audio output from the ATSC module is fed back to IC 7200, Hercules. The Hercules
performs the audio control functions, Volume etc. The audio is then output on Pins 68 and 69
and fed to the audio amplifier, 7990. The audio amplifier is a dual 10 watt amplifier. It is
powered by the +VAUDIO and -VAUDIO supplies which are +16 and -16 volts. To mute the
amplifier, the VOL_MUTE line goes Low, switching transistor 7992 Off, switching transistor
7991 On. The output of the amplifier is fed to the Side Jack panel.

Page 31

Page 32

FIGURE 29 - AUDIO OUTPUT

HEADPHONE

1
I166
3156

F154

I170

I168
5

2178

5
4
3
2
1

1278

1232

470pF

1254

4
3
2
1

TO
SPEAKERS

4
2
1279

3157

470pF

I162

2176

I163

I171

3
2
1

TO
ECO SUB

8
9

3161

39K

2181

1u

I169

FIGURE 30 - SIDE JACK PANEL

Side Jack Panel (Figure 30)

The output of the audio amplifier is fed to the Headphone Jack located on the Side Jack
panel. The output to the speakers is switched Off when the headphone plug is inserted.
Locating the Defective panel (Figure 31)
When troubleshooting the set, the defective panel requiring replacement or additional repair
must be located. The Power supplies, Deflection, NTSC Tuning, 1 fH inputs, and Audio
output are located on the Family board. The 2 fH inputs, ATSC Tuning, Digital Audio
processing is located on the ATSC panel. Video processing and Deflection signal circuits are
located on the Deflection Controller panel.
If the set turns On without a picture or sound, first check the Power supplies located on the
Family board. If the set comes On, then shuts Off, there may be a problem with the shutdown circuits also located on the Family board. If the picture is missing, but sound is present,
switch to an ATSC channel. If the picture returns, the problem is most likely on the Family
board. If the picture is still not present, check the YPbPr signals on connector P1255 located
on the ATSC module. If video is present at this point, then check the Deflection Controller.
Check the RGB out to the CRT panel on connector 1340 on the CRT panel.
If High Voltage is not present when the voltage supplies turn On, check the Horizontal and
Vertical drive from the Deflection Controller panel. These signals can be checked on connector 1251 located on the Family board.
Page 33

Page 34

FIGURE 31 - WIRING INTERCONNECT DIAGRAM

System Control (Figure 32)

The Main system control is performed by the microprocessor located in the Hercules, IC
7200. The customer communicates with the processor via the IR sensor and Keyboard. The
I2C bus communicates with the Tuner 1000 and the EEPROM 7601 located on the Family
board. It also communicates with the TV Signal Processor 7402 and Deflection Processor
7404 located on the Deflection Controller board.
The Hercules Processor communicates with the ATSC module via the A through E control
lines. Line E is the Data transmit line. Line D is the Data receive line from the ATSC module.
Line C is the Bus Request line. Line B gives the ATSC module the command to turn On
when the set is switched On. Line A sends a reset command to the ATSC module when the
set is turned On.

Page 35

Page 36

FIGURE 32 - SYSTEM CONTROL

FIGURE 33 - SERVICE ALIGNMENT MODE

Service Alignment Mode SAM (Figure 33)
Making changes in the settings requires entering the SAM. To enter SAM, press 0 6 2 5 9 6
Info on the remote control. Use the cursor-up and cursor-down buttons to highlight a selection. Press the cursor-right, cursor-left buttons, or enter a value to make changes.
Customer Service mode CSM (Figure 34)
To enter the Customer Service Mode, press 1 2 3 6 5 4 on the remote control. This allows
the customer to read settings after being directed to this mode by service personal. No
changes can be made in this mode. The screen show is with the set in the Digital Mode. To

FIGURE 34 - CUSTOMER SERVICE MODE - DIGITAL

Page 37

view the Analog settings, place the set in the Analog mode by pressing the D/A button on the
remote and then re-entering the Customer Service Mode. (Figure 35) Refer to the Service
manual for an explanation of the CSM and SAM settings.

FIGURE 35 - CUSTOMER SERVICE MODE - ANALOG

SDM (Service Default Mode)
The Service Default Model allows the Error Codes, Operation Hours, and Software version
to be read if the OSD is working. The SDM can be entered by pressing 0 6 2 5 9 6 Menu on
the remote control.
If the picture is not present, error codes can be read by shorting the SDM Jumper to ground.
Remove power from the set and short the SDM jumper, 9252, to ground. Reapply power
and turn the set On. After a short period of time, the Power LED will blink to indicate the
errors. The LED will blink the number of times for the first error. The LED will then pause
and then blink the number of times for the second error, etc.
If a critical error exist, the Power LED will blink when the set is turned On for the number of
times for the error.

Page 38

Abbreviation list
Description
1080i
1080p
480i
480p
ADC A/D
AFC
AGC
AM
AV
C-FRONT
CBA
ComPair
CSM
CVBS
CVBS-EXT
CVBS-INT
CVBS-MON
CVBS-TER-OUT
DAC
DFU
DNR
DRAM
DSP
DTS
DVD
EEPROM
EPLD
EXT
FBL
FLASH
FM
FMR
FRC
FRONT-C
FRONT-DETECT
FRONT-Y_CVBS
H
HD
HDMI
HP
I2C
I2S

1080 visible lines, interlaced

1080 visible lines, progressive scan
480 visible lines, interlaced
480 visible lines, progressive scan
Analogue to Digital Converter
Automatic Frequency Control: control signal used to tune to the correct
frequency
Automatic Gain Control: algorithm that controls the video input of the
feature box
Amplitude Modulation
Audio Video
Chrominance front input
Circuit Board Assembly (or PWB)
Computer aided rePair
Customer Service Mode
Composite Video Blanking and Synchronization
CVBS signal from external source (VCR, VCD, etc.)
CVBS signal from Tuner
CVBS monitor signal
CVBS terrestrial out
Digital to Analogue Converter
Directions For Use: owner's manual
Dynamic Noise Reduction
Dynamic RAM
Digital Signal Processing
Digital Theatre Sound
Digital Video Disc
Electrically Erasable and Programmable Read Only Memory
Electronic Programmable Device
EXTernal (source), entering the set by cinches (jacks)
Fast Blanking: DC signal accompanying RGB signals
FLASH memory
Field Memory / Frequency Modulation
FM Radio
Frame Rate Converter
Front input chrominance (SVHS)
Front input detection
Front input luminance or CVBS (SVHS)
H_sync to the module
High Definition
High Definition Multimedia Interface
HeadPhone
Integrated IC bus
Integrated IC Sound bus
Page 39

IC
IF
Interlaced

Integrated Circuit
Intermediate Frequency
Scan mode where two fields are used to form one frame. Each field contains
half the number of the total amount of lines. The fields are written in 'pairs',
causing line flicker.
IR
Infra Red
IRQ
Interrupt ReQuest
Last Status The settings last chosen by the customer and read and stored in RAM or in the
NVM. They are called at start-up of the set to configure it according the customers wishes
LCD
Liquid Crystal Display
LED
Light Emitting Diode
LINE-DRIVE Line drive signal
LVDS
Low Voltage Differential Signalling, data transmission system for high speed
and low EMI communication.
MPEG
Motion Pictures Experts Group
NVM
Non Volatile Memory: IC containing TV related data (for example, options)
OSD
On Screen Display
Progressive Scan Scan mode where all scan lines are displayed in one frame at the same
time, creating a double vertical resolution.
RAM
Random Access Memory
RC
Remote Control transmitter
RC5
Remote Control system 5, the signal from the remote control receiver
RGB
Red, Green, and Blue. The primary colour signals for TV. By mixing
levels of R, G, and B, all colors (Y/C) are reproduced.
RGBHV
Red, Green, Blue, Horizontal sync, and Vertical sync
ROM
Read Only Memory
SAM
Service Alignment Mode
SIF
Sound Intermediate Frequency
SC
SandCastle: two-level pulse derived from sync signals
SCL
CLock Signal on I2C bus
SDA
DAta Signal on I2C bus
SDRAM
Synchronous DRAM
SIF
Sound Intermediate Frequency
STBY
STandBY
VGA
Video Graphics Array
XTAL
Quartz crystal
YPbPr
Component video (Y= Luminance, Pb/Pr= Colour difference signals)
Y/C
Luminance (Y) and Chrominance (C) signal
Y-OUT
Luminance-signal

Page 40

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Happy Repairing!!

Highly Recommended Repair Ebook:

If youre a LCD Monitor repairer, then this is the best guide for you.
Why? Because, the author revealed all his LCD Monitor Repairing
secrets for you. I think, with just few Repair tips you learned from
this guide you will get back your investment!
Click Here to read more.

This eBook will show you how to test the electronic component
correctly and accurately. Some of you may say that I dont
need this eBook because it is too simple! Do you know that, in fact
there is lots of testing electronic components secrets I have learned
from this guide? Do you know how to test aTRIAC correctly and
accurately? If you answer no then I guess you have to get this
EBook. Click Here to read more.

Are you tired of searching the service manuals to look for the value
of a burnt resistor? If the answer is YES, then this eBook is a must
have guide for you. You can save a lot of time and be able to repair
customers Electronic equipment with burnt resistors in it.
Click here to read more.