AO4812

30V Dual N-Channel MOSFET

General Description

Product Summary

The AO4812 uses advanced trench technology to provide

excellent RDS(ON) and low gate charge. The two MOSFETs
make a compact and efficient switch and synchronous
rectifier combination for use in buck converters.

ID (at VGS=10V)

VDS

30V
6A

RDS(ON) (at VGS=10V)

< 30m

RDS(ON) (at VGS =4.5V)

< 42m

100% UIS Tested

100% Rg Tested

SOIC-8
Top View

D1

Bottom View

D2

Top View
S2
G2
S1
G1

D2
D2
D1
D1

G1

G2
S1

S2

Pin1

Absolute Maximum Ratings TA=25C unless otherwise noted

Parameter
Symbol
Drain-Source Voltage
VDS
Gate-Source Voltage

VGS
TA=25C

Continuous Drain
Current
Pulsed Drain Current

Units
V

20

ID

TA=70C

Maximum
30

IDM

30

Avalanche Current C

IAS, IAR

10

Avalanche energy L=0.1mH C

TA=25C

EAS, EAR

mJ

Power Dissipation B

Junction and Storage Temperature Range

Thermal Characteristics
Parameter
Maximum Junction-to-Ambient A
Maximum Junction-to-Ambient A D
Maximum Junction-to-Lead

Rev 9: February 2011

PD

TA=70C

TJ, TSTG

Symbol
t 10s
Steady-State
Steady-State

1.3

RJA
RJL

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-55 to 150

Typ
48
74
32

Max
62.5
90
40

Units
C/W
C/W
C/W

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AO4812

Electrical Characteristics (TJ=25C unless otherwise noted)

Parameter

Symbol

STATIC PARAMETERS
Drain-Source Breakdown Voltage
BVDSS
IDSS

Zero Gate Voltage Drain Current

Conditions

Min

ID=-250A, VGS=0V
TJ=55C

Gate-Body leakage current

VDS=0V, VGS=20V
VDS=VGS ID=250A

1.2

ID(ON)

On state drain current

VGS=10V, VDS=5V

30

100

nA

1.8

2.4

25

30

40

48

VGS=4.5V, ID=5A

33

42

2.5

310

pF

VGS=10V, ID=6A
Static Drain-Source On-Resistance

TJ=125C

gFS

Forward Transconductance

VDS=5V, ID=6A

15

VSD

Diode Forward Voltage

IS=1A,VGS=0V

0.76

IS

Maximum Body-Diode Continuous Current

DYNAMIC PARAMETERS
Ciss
Input Capacitance
Output Capacitance

Crss

Reverse Transfer Capacitance

Rg

Gate resistance

Gate Threshold Voltage

Units
V

VGS(th)

Coss

Max

30

VDS=30V, VGS=0V

IGSS

RDS(ON)

Typ

255
VGS=0V, VDS=15V, f=1MHz
VGS=0V, VDS=0V, f=1MHz

45
1.6

pF

35

50

pF

3.25

4.9

SWITCHING PARAMETERS
Total Gate Charge
Qg(10V)

5.2

6.3

nC

Qg(4.5V)

2.55

3.2

nC

Qgs

Gate Source Charge

Qgd

Gate Drain Charge

tD(on)

Turn-On DelayTime

tr

Turn-On Rise Time

tD(off)

Turn-Off DelayTime

VGS=10V, VDS=15V, ID=6A

VGS=10V, VDS=15V, RL=2.5,

RGEN=3

0.85

nC

1.3

nC

4.5

ns

2.5

ns

14.5

ns

tf

Turn-Off Fall Time

3.5

ns

trr

Body Diode Reverse Recovery Time

IF=6A, dI/dt=100A/s

8.5

Qrr

Body Diode Reverse Recovery Charge IF=6A, dI/dt=100A/s

2.2

ns
nC

A. The value of RJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25C. The
value in any given application depends on the user's specific board design.
B. The power dissipation PD is based on TJ(MAX)=150C, using 10s junction-to-ambient thermal resistance.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150C. Ratings are based on low frequency and duty cycles to keep
initialTJ=25C.
D. The RJA is the sum of the thermal impedence from junction to lead RJL and lead to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300s pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-ambient thermal impedence which is measured with the device mounted on 1in2 FR-4 board with
2oz. Copper, assuming a maximum junction temperature of TJ(MAX)=150C. The SOA curve provides a single pulse ratin g.

THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.

Rev 9: February 2011

www.aosmd.com

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AO4812

TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS

15

30
10V

VDS=5V

7V

25

4.5V
10

20
ID(A)

ID (A)

4V
15
3.5V
5

10
5

VGS=3V
0

0
0

2
3
4
VDS (Volts)
Fig 1: On-Region Characteristics (Note E)

1.5

2.5

3.5

4.5

VGS(Volts)
Figure 2: Transfer Characteristics (Note E)
1.8
Normalized On-Resistance

40

35
RDS(ON) (m )

25C

125C

VGS=4.5V
30

25
VGS=10V

1.6

VGS=10V
ID=6A

1.4

17
5
2
VGS=4.5V
10
I =5A

1.2

1
0.8

20
0

12

15

ID (A)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage (Note E)

25

50

75

100

125

150

175

0
Temperature (C)
Figure 4: On-Resistance vs. Junction Temperature
18
(Note E)

100

1.0E+02
ID=6A
1.0E+01

40

1.0E+00

60

IS (A)

RDS(ON) (m )

80

125C

1.0E-01
1.0E-02

125C
25C

1.0E-03

40

1.0E-04

25C

1.0E-05

20
2

10

VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)

Rev 9: February 2011

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0.0

0.2

0.4

0.6

0.8

1.0

1.2

VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)

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AO4812

TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS

400

10
VDS=15V
ID=6A

350
300
Capacitance (pF)

VGS (Volts)

Ciss

250
200
150
Coss

100
2
50
0

Crss

0
0

3
4
5
Qg (nC)
Figure 7: Gate-Charge Characteristics

100.0

10

15
20
25
VDS (Volts)
Figure 8: Capacitance Characteristics

30

10000
TA=25C
10s
RDS(ON)
limited

1000

100s

1.0

Power (W)

ID (Amps)

10.0

1ms
10ms
TJ(Max)=150C
TA=25C

0.1

100

10

10s
DC

0.0
0.01

0.1

1
VDS (Volts)

10

100

0.00001

0.1
10
1000
Pulse Width (s)
Figure 11: Single Pulse Power Rating Junction-toAmbient (Note F)

Figure 10: Maximum Forward Biased Safe

Operating Area (Note F)

0.001

Z JA Normalized Transient
Thermal Resistance

10
D=Ton/T
TJ,PK=TA+PDM.ZJA.RJA
1

In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse

RJA=90C/W

0.1

PD

0.01
Single Pulse

Ton

0.001
0.00001

0.0001

0.001

0.01

0.1

10

100

1000

Pulse Width (s)

Figure 12: Normalized Maximum Transient Thermal Impedance (Note F)

Rev 9: February 2011

www.aosmd.com

Page 4 of 5

AO4812

Gate Charge Test Circuit & Waveform

Vgs
Qg
10V

+
+ Vds

VDC

Qgs

Qgd

VDC

DUT
Vgs
Ig

Charge

Resistive Switching Test Circuit & Waveforms

RL
Vds
Vds
90%

+ Vdd

DUT

Vgs

VDC

Rg

10%

Vgs

Vgs

t d(on)

tr

t d(off)

t on

tf
toff

Unclamped Inductive Switching (UIS) Test Circuit & Waveforms

L

E AR = 1/2 LIAR

Vds

BVDSS

Vds

Id

+ Vdd

Vgs

Vgs

I AR

VDC

Rg

Id

DUT
Vgs

Vgs

Diode Recovery Test Circuit & Waveforms

Q rr = - Idt

Vds +
DUT

Vds Isd
Vgs
Ig

Rev 9: February 2011

Vgs

Isd

+ Vdd

t rr

dI/dt
I RM
Vdd

VDC

IF

Vds

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Page 5 of 5