ISSUES IN HARDWARE-SOFTWARE DESIGN AND CO-DESIGN

There are two approaches embedded system design.

1. When the software development cycle ends then the cycle for the process of
integrating software into hardware begins when a system is designed.
2. The software development life cycle and life cycle of integrating software into
hardware cycle run concurrently when co-designing a system.
SOFTWARE HARDWARE TRADE OFF:
It is possible to implement certain subsystems hardware as software which gives the
following advantages:

Easier to change when new hardware versions are available.

Programmability for complex operations.
Faster development time.
Modularity and portability.
Use of standard software engineering, modeling and RTOS tools.
Less cost for simple systems.

Hardware implementation advantages:

Reduced memory for program

Reduced number of chips but an increase in cost.
Simple coding for device drivers.
Internally embedded codes which are more secure than external ROM.

CHOOSING A RIGHT PLATFORM FOR DESIGNING OF EMBEDDED SYSTEM

LIST OF UNITS TO BE CHOOSEN:
Processor ASIP or ASSP
Multiple processors
System on chip
Memory

Buses and other hardware units

Software language, RTOS
Code generation tools
Tools for finally embedding the software
into binary image.

MEMORY AND PROCESSOR SENSITIVE SOFTWARE

PROCESSOR-SENSITIVE:

1. A processor can have memory-mapped IO (or) IO-mapped IOs.

2. IO instructions are processor-sensitive.
3. Fixed point ALU only.
4. Provision for execution of SIMD(Single instruction multiple data) and
VLIW(Very large instruction word) instructions.
5. Assembly language sometimes facilitates an optimal use of the processors
special features and instructions.
6. In order to prevent the programming in assembly,advanced processors provide
compiler sub unit.
MEMORY-SENSITIVE:
1. Real time programming model and algorithm used by programmer depend on the
memory available and processor performance.
2. An example is video processing in which number of frames processed per second
will depends on memory available and processor performance
3. Memory address of IO device registers,buffers,control registers and vector
addresses for the interrupt source groups are prefixed in the microcontroller.
4. Programming for these takes into account the addresses.
5. Same addresses must be allotted for these by the RTOS.

ALLOCATION OF ADDRESSES TO MEMORY,PROGRAM

SEGMEMTS AND DEVICES
A program code can be segmented and each segment can be stored at a different
memory block.
Each segment has a pointer address, offset address, starting memory address and
ending memory address. Using offset, a code or data word is retrieved from a
segment.
These are different data structures at the memory .
One of them is Stack which means allotted memory block where
elements are read in the form of LIFO mode by the processor. There can be multiple
data stacks for tasks or threads in multitasking or multithreading software where
context is saved.At the memory a block of address is allocated to the stack which

gives the return addresses of the calling function.

1. Initially the input data saved as a stack at RAM which is retrieved in
LIFO mode.An application can create the run-time stack structure.There may be
multiple data stacks having separate pointer address.
2. Every task or thread in multitasking or multithreading software has a
stack where context is saved.
Other datasets allotted in memory are
STRING:
A string is allotted memory for ASCII or a Unicode character followed by null
character at the end.
CIRCULAR QUEUE:
A circular queue is a allotted address for queue where both pointers cannot
increment beyond memory blocks and it resets to starting value on insertion beyond
boundary.
ONE DIMENSIONAL ARRAY:
A pointer address always points to the first element of array.From this first element
pointer and index of the element an address is constructed which is used by the processor
to access one of the array elements.
TABLE:
It is a two dimensional array data set that is alloted a memory block.Three
pointers, table-base,column-index and destination-index pointers can retrieve an
element of the table.A base pointer points to the first element.One index for a row
and one for column are also present.

HASH TABLE:

Hash table is allocated a memory block for data set that is collection of pairs of
key and value .It has key or name in one column and value or object in second
column.A Hash key identifies a hash element.
LOOK UP TABLES:
Have columns and store the pointers to the values. The first column of a table is
used as a pointer to the value to get the set of values.
LINKED LISTS:
Here each element stores a pointer to the next element in the list.It has one
memory block allotted to each of its elements.The top pointer points to the first
element and the last element points to null.

DEVICE,INTERNAL DEVICESAND I/O DEVICES ADDRESSES AND

DEVICES DRIVERS:
All IOports and devices have address I/O devices address by certain processors.
A device has address according to system hardware or processor assigned ones. This
isallocated to
Device data register or RAM buffer.
Device control register which saves control bits and configuration bits.
Device status registers which saves flag bits. It indicates need for servicing and
device interrupts.
Set of IO devices address is fixed by system hardware. A locator or loader cannot
reallocate these to any set of address. The addresses of I/O devices registers, buffers,
control registers, vector addresses for interrupt sources are prefixed. Open source
drivers are available for ports, busses and physical media attachments.

PORTING ISSUES OF OS IN AN EMBEDDED PLATFORM:

The portability issue arises when OS is used in an embedded platform. The

platform dependency issues and the need for appropriate OS-Hardware interface
functions as follows.
Platform dependency
I/O instructions

Need of appropriate OS-Hardware interface functions

Port instruction data type may be different on different
platform.

Interrupt servicing routines

1. Unsigned char*
2. Unsigned int
3. Unsigned long
4. Unsigned short
Interrupt vectors are to be defined different. OS support

Data types

these different platforms.

OS should have appropriate APIs for data types.

Interface specific data types

Byte order

1. Unsigned byte
2. Unsigned word
3. Unsigned int
4. Unsigned long
A network interface card supports 32-bit unsigned integers
It may depend on the processor. Lower byte first in an
integer and upper byte first in integer and some processor

Data alignment

support both.
1. Two or three byte stored in a address which
processor access 4 bytes in an access.
2. Same data structure at C source file show
differently on different platforms
OS maintains lists for different data structures. It provide

Linked lists

standard implementation of doubly linked lists and circular

Memory page size

lists.
PAGE_SIZE is 4 kB in Linux. A processor may support
different page size.

PERFORMANCE AND PERFORMANCE ACCELERATORS:

PERFORMANCE MODELLING:
1. SYSTEM PERFORMANCE INDEX:
It is a measure of success. The performance of each life cycle of
development process is

tested. It is ability to meet required functions and specifications using minimum amount
of memory, power dissipation, devices.
2. MULTIPROCEESSOR SYSTEM PERFORMANCE:
It is measured by
Optimized partition of program into tasks or set of instructions

between various processors.

Optimized scheduling of instruction and data to available

processor times and resources.

3. MIPs, MFLOPs AND DMIPS AS PERFORMANCE INDICES:
These are design characteristics for expected system performance. Processor performance
is measured in DMIPS Dhrystone million instructions per second. Embedded benchmarks
are:
Telecommunications
Consumer electronics
Auto motive and industrial electronics
Office automation
Consumer electronics
4. PERFORMANCE METRICS:
Performance metrics depends on buffer requirements IO performance and band
widthrequirements. The buffer helps in accelerating the performance of system. Memory
or IO buffer requirement is a constraint. Io performance is measured by throughput and
buffer utilization and larger band width requirement is a constraint.
5. REAL TIME PROGRAM PERFORMANCE:
Three performance metric describe the real time program performance
Ratio of sum of interrupt latencies as function of execution times
CPU load
Worst case execution time with respective mean execution time
Choice of appropriate real time programming model is
1. SYSTEM THROUGHPUT:
Comparitive performance with respect to previous life cycle in
development process.
2. LATENCY OR RESPONSE TIME:
It is response time of each task or ISR and it is unrelated to throughput.
3. DELAY ZITTERS:

Delay between retrieval of data frames or packets can vary. It degrade

system performance and image zitter may not be tolerable

PERFORMANCE ACCELERATORS:
Several ways to accelerate the performance as follows:

Conversion of CDFGs into DFGs.

Eg: using loop flattening and look up tables.
Reusing the used arrays and memory and appropriate variable selection.
Using data as data structure instead of queue and queue instead of list.
Computing slowest cycle first and examining possibilities of its speed-up.
Code such that more words are fetched from ROM as byte than multibyte words.
Co-processors and IPs such as Java accelerators accelerate the performance.