UNIT II

COMPUTER ORGANIZATION
REGISTER TRANSFER LANGUAGE AND MICROOPERATIONS :
Register Transfer language. Register Transfer, Bus and memory transfers, Arithmetic Mircro-operatiaons, logic
micro operations, shift micro operations, Arithmetic logic shift unit.

2.i OBJECTIVE:In This Unit, we are going to discuss about the Register transfer language, their functionality
and other issues. We are also going to discuss control instructions and data manipulation instructions.
2.ii INTRODUCTION:- About the data transfer and manipulation by using register transfer language. We also
discussed about the various types of instruction formats and addressing modes, computer registers and
finally computer generated control instructions.

2.1 REGISTER TRANSFER LANGUAGE:Simple Digital Systems:

Combinational and sequential circuits are used to create simple digital systems. These are the low-level
building blocks of a digital computer. Simple digital systems are frequently characterized in terms of
the registers they contain, and
the operations that they perform.

What matters the most Typically is,

What operations are performed on the data in the registers?
What information is passed between registers?

Micro Operations:The operations on the data in registers are called micro operations.
Ex:- Shift, Load, Clear, Increment etc.
An elementary operation performed (during one clock pulse), on the information stored in one or more
registers is shown below:R <-f(R, R)
f: shift, load, clear, increment, add, subtract, complement, and,
or, xor,
What is meant by REGISTER TRANSFER LEVEL?
Viewing a computer, or any digital system, in the way of

The systems registers

The data transformations in them, and

The data transfers between them. is called the register transfer level.

Register Transfer Language:The symbolic notation used to describe the micro operation transfers among registers is called a Register
Transfer Language. For any function of the computer, the register transfer language can be used to describe the
(sequence of) micro operations.
Features of Register transfer language

A symbolic language

A convenient tool for describing the internal organization of digital computers

Can also be used to facilitate the design process of digital systems

registers are designated by capital letters, sometimes followed by numbers

(e.g., a, r13, ir)

Often the names indicate function:

MAR - memory address register.

PC - program counter.

IR - instruction register.
Registers and their contents can be viewed and represented invarious ways

A register can be viewed as a single entity:

Registers may also be represented showing the bits of data they contain.
Block diagrams of a register

2.2 Register Transfer: Copying the contents of one register to another is a register transfer.
1.

A register transfer is indicated as

In this case the contents of register R2 are copied (loaded) into register R1

A simultaneous transfer of all bits from the source R1 to the destination register R2, during one
clock pulse

Note that this is a non-destructive; i.e. the contents of R1 are not altered by copying (loading) them
to R2.

2. A register transfer such as

R3 - R5 implies that the digital system has
the data lines from the source register (R5) to the destination register (R3).
Parallel load in the destination register (R3).
Control Functions:Often actions need to only occur if a certain condition is True, this is similar to an if statement in a
programming language. In digital systems, this is often done via a control signal, called a controlfunction. Ifthe
signal is 1, the action takes place.
This is represented as:

Simultaneous Operations:

If two or more operations are to occur simultaneously, they are separated with commas, these are
called as simultaneous Functions.

Here, if the control function P = 1, load the contents of R5 into R3, and at the same time (clock),
load the contents of register IR into register MAR

Basic Symbols for Register Transfers:-

Hard Ware Implementation of Controlled Transfers:Implementation of controlled transfer.

Block Diagram.

Timing Diagram

2.3 Bus and Bus Transfer:Bus is a path (of a group of wires/cables) over which information is transferred, from any of several sources
to any of several destinations.
A typical digital computer has may registers and paths must be provided to transfer information from 1
register to another. As the number of wires will be excessive, a more efficient data transfer method should be used
which uses a common bus structure.
The Transfer of information from a bus into many registers can be accomplished by connecting the bus lines
to the inputs of all destination registers and activating the load control of a particular destination register selected.
From a register to bus: BUS <- R

Constructing a common bus is with multiplexers. The multiplexers select the source register whose binary
information is then placed on the bus. The construction of a bus system for four registers is shown in the fig. Each
register has four bits, numbered 1 through 4.The bus consists of four 4x1 multiplexers each having four data inputs,
and two selection inputs x,y.
Working:The bits in the same significant position in each register are connected to the data inputs of one multiplexer
to form one line of the bus. Mux 0 multiplexes the four 0 bits of the registers, MUX 1 multiplexes the four 1 bits of
the registers and similarly for the other two bits.
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The two selection lines x, y are connected to the selection inputs all 4 multiplexers. The selection lines
choose the 4 bits of one register and transfer them into the four line common bus. When xy =00, the 0 data inputs of
all four multiplexers are selected and applied to the outputs that form the bus. see the function table for more details.

Transfer from Bus to a Destination Register:In the previous topic we have seen how data was being transferred from register to a bus, whereas in this
topic we will be seeing the opposite of it. Firstly we are going to see bus systems with gates instead of multiplexers.
Three state Bus Buffer:A 3 state gate is a digital circuit that exhibits three states. Two of the states are signals equivalent to logic 0
and logic 1 as in a conventional gate. The third state is a high- impedance state. The third state which means that the
output is disconnected and does not have a logic significance.

The below figure shows 4 registers R0,R1,R2,R3 are connected to a 2X4 decoder and the bus lines are
connected to the bus system. there are two select lines z,w.

The above fig demonstrates how a bus system is used with three state buffers.. The outputs of four buffers
are connected together to form a single bus line. The control inputs determine which of the four normal inputs will
communicate with the bus line. Not more than 1 buffer should be in active state at any given time.
Bus Transfer in RTL:Depending on whether the bus is to be mentioned explicitly or not, register transfer can be indicated as either
In the former case the bus is implicit, but in the latter, it is explicitly indicated.
Memory Transfer: Memory (RAM) can be thought as a sequential circuits containing some number of registers
These registers hold the words of memory
Each of the r registers is indicated by an address
These addresses range from 0 to r-1
Each register (word) can hold n bits of data
Assume the RAM contains r = 2k words. It needs the

following

n data input lines

n data output lines
k address lines
A Read control line
A Write control line
Collectively, the memory is viewed at the register level as a device, M.
Since it contains multiple locations, we must specify which address in memory we will be using
This is done by indexing memory references
Memory is usually accessed in computer systems by putting the desired address in a special register, the
Memory Address Register (MAR, or AR)
When memory is accessed, the contents of the MAR get sent to the memory units address lines
Memory Read:- R1<- M[MAR]
To read a value from a location in memory and load it into a register, the register transfer language notation looks
like the above mentioned.
This causes the following to occur
The contents of the MAR get sent to the memory address lines

 A Read (= 1) gets sent to the memory unit

The contents of the specified address are put on the memorys output data lines
These get sent over the bus to be loaded into register R1.
Memory Write M[MAR] <- R1
To write a value from a register to a location in memory looks like this in register transfer language.
This causes the following to occur : The contents of the MAR get sent to the memory address lines
A Write (= 1) gets sent to the memory unit
The values in register R1 get sent over the bus to the data input lines of the memory
The values get loaded into the specified address in the memory
Summary of R. Transfer Micro Operations:A<- B

Transfer content of reg. B into reg. A

AR <- DR(AD)

Transfer content of AD portion of reg. DR into reg. AR

A<- constant

Transfer a binary constant into reg. A

ABUS <- R1,

Transfer content of R1 into bus A and, at the same time,

R2 <- ABUS

Transfer content of bus A into R2

AR

Address register

DR

Data register

M[R]

Memory word specified by reg. R

Equivalent to M[AR]

DR <- M Memoryread operation: transfers content of memory word specified by AR into

M <- DR

DR

Memorywrite operation: transfers content of DR into memory word specified by AR

2.4 Arithmetic Microoperations:A microoperation is an elementary operation performed with the data stored in registers. The microoperations most
often encountered in digital
computers are classified into four categories:
1. Register transfer microoperations: transfer binary information from one register to another.
2. Arithmetic microoperations: perform arithmetic operations on numeric data stored in registers.
3. Logic microoperations: perform bit manipulation operations on nonnumeric data stored in registers.
4. Shift microoperations: perform shift operations on data stored in registers. .This type of
Micro operation does not change the information content when the binary information moves from the source
register to the destination register. The other three types of micro operations change the information content during

the transfer. In this section we introduce a set of arithmetic micro operations. In the next two sections we present the
logic and shift micro operations

2.4(a) Binary adder:To implement the add microoperation with hardware, we need the registers that hold the data and the digital
components that performs the arithmetic addition. The arithmetic micro operation defined by the statement below
R3 R1 + R2
States that the contents of register R1 are added to the contents of register R2 and the sum transferred to register R3.
The digital circuit generates the arithmetic sum of two binary numbers of any length is called a BINARY
ADDER. It is shown below in binary adder.

The Multiplication operation is implemented with a sequence of addition and shift micro operations.
The Division operation is implemented with a sequence of subtraction and shift micro operations.

2.4(b) Binary Adder-Subtractor:

The addition and subtraction operations can be combined into one common circuit by including an
Exclusive-OR gate with each Full Adder. Here, the input mode(M) controls the operations, when M=0; the circuit
performs adder operation and when M=1; the circuit performs subtraction operation. Its shown in above diagram.

2.4(c) Binary Increment

The increment micro operation adds one to a number in a register. The diagram of 4 bit combinational
circuit is incremented in Half-Adder is shown above.

2.4(d) Arithmetic circuit:

The arithmetic micro operation can be implemented in one composite arithmetic circuit, that has 4 full
adder circuits for 4 bit adder and 4 multiplexers for choosing different operations. There are two 4 bit inputs A and
B and 4 bit outputs D. The logic bit 0 signal is fixed voltage value is 0 and logic 1 signal can be generated through
inverter of logic 0.
The output of binary adder is D=A+Y+C in;
When S0S1=00; if Cin=0/1 then the value of B is applied to Y. It is explained brief ly in below function table in
arithmetic circuit.

2.5 LOGIC MICROOPERATIONS:Specify binary operations on the strings of bits in registers

Logic micro operations are bit-wise operations, i.e., they work on the individual bits of data.
useful for bit manipulations on binary data .
useful for making logical decisions based on the bit value.
Example:9

 There are, in principle, 16 different logic functions that can be defined over two
binary input variables. However, most systems only implement four of these: AND (^),
OR (v),
XOR (),
Complement/NOT.
The others can be created from combination of these.

List of Logic Micro operations:There can be16 different logic operations performed with 2 binary variables, The logical operations listed in
the second column represent a relationship between the binary content of two registers A & B. Each bit of the
register is treated as a binary variable and the micro operation is performed on the string of the stored in the
registers.

Hard Ware Implementation of Logic Micro Operations:There are 4 (AND, OR, XOR & Compliment) micro operations used by most computers. Logic Gates are
implemented for each bit or pair of bits in the registers to perform the required logic function.
Logic Diagram

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The above circuit generates the four basic logic micro operations .It consists of four gates and a multiplexer.S1,
S0 are the two selection inputs. The outputs of the gates are applied to the data input of the multiplexer. The
respective gate performs the respective logic operation.
Function table:

The function table lists out the logic micro operations obtained for each combination of the selection variables.
Applications of Logic Micro Operations: A Logic micro operations can be used to manipulate individual bits or a portions of a word in a register
Consider the data in a register A. In another register, B, is bit data that will be used to modify the contents of
A

Selective Set: In a selective set operation, the bit pattern in B is used to set certain bits in A.

If a bit in B is set to 1, that same position in A gets set to 1, otherwise that bit in A keeps its previous value.
Selective Complement: In a selective complement operation, the bit pattern in B is used to complement certain bits in A .

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 If a bit in B is set to 1, that same position in A gets complemented from its original value, otherwise it is
unchanged.
Selective Clear: In a selective clear operation, the bit pattern in B is used to clear certain bits in A.

If a bit in B is set to 1, that same position in A gets set to 0, otherwise it is unchanged.

Mask Operation: In a mask operation, the bit pattern in B is used toclear certain bits in A.

If a bit in B is set to 0, that same position in A gets set to 0, otherwise it is unchanged.

Clear Operation:

In a clear operation, if the bits inthe same position in A and B are the same, they are cleared in A,
otherwise they are set in A

Insert Operation: An insert operation is used to introduce a specific bit pattern into A register, leaving the other bit
unchanged.
This is done as
A mask operation to clear the desired bit positions, followed by
An OR operation to introduce the new bits into the desired positions.
Example
Suppose you wanted to introduce 1010 into the low order four bits of
A: 1101 1000 1011 0001A (Original)
1101 1000 1011 1010A (Desired)
1101 1000 1011 0001 A (Original)
1111 1111 1111 0000 Mask

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positions

1101 1000 1011 0000 A (Intermediate)

0000 0000 0000 1010 Added bits
1101 1000 1011 1010 A (Desired)

2.6 SHIFT MICROOPERATIONS: There are three types of shifts

Logical shift
Circular shift
Arithmetic shift
The type of the information that is inputted in to the serial i/p differentiates them. A right shift operation
i/p

Logical Shift:Serial input to the shift is a 0

A right logical shift operation:

In a Register Transfer Language, the following notation is used

shl for a logical shift left
shr for a logical shift right
Examples:

Circular Shift: In a circular shift the serial input is the bit that is shifted out of the other end of the register.
A right circular shift operation:

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A left circular shift operation:

In a RTL, the following notation is used,

cil for a circular shift left.
cir for a circular shift right.
Examples:
R2 <- cir R2
R3 <- cil R3
Arithmetic Shift:o

An arithmetic shift is meant for signed binary numbers (integer).

An arithmetic left shift multiplies a signed number by two.

An arithmetic right shift divides a signed number by two.

The main distinction of an arithmetic shift is that it must keep the sign of the number the same as
it performs the multiplication or division.

A right arithmetic shift operation:

A left arithmetic shift operation:

In a RTL, the following notation is used,

ashl for an arithmetic shift left.
ashr for an arithmetic shift right.
Examples:
R2

ashr R2

R3

ashlR3

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Hard Ware Implementation of Shift Microo Operations:The following circuit shows the Hardware required for the Shift micro operations.

Four Multiplexers are required to implement the operations. As indicated 0 indicates shift right(down) and 1
indicates shift left(up).A0 thru A3 are the inputs and H0 thru H3 are the outputs of the operations performed.

2.7 ARITHMETIC LOGIC SHIFT UNIT:The Arithmetic Logic Unit is a single common operational unit in the computer that performs all the micro
operations. Its abbreviated as the ALU. It is a combinational circuit, the results of the operations performed bythe
ALU are stored in a register .The operation performance, and result storage is done in single clock pulse. The one
stage diagram of the ALU looks like this,
Usually, Shift unit is separated from the ALU to make things simpler.
Subscript i indicates a typical stage. Inputs Ai , Bi are applied to both the
arithmetic and logic units.S1 and S0 denote the select inputs. A 4 X 1
multiplexer is used, it chooses between the arithmetic output in Ei and logic
output Hi. Selection inputs S2, S3 are used to select the data by the multiplexer.
The two data i/ps of the multiplexer receive inputs Ai-1 for the shift right
operation and Ai+1 for the shift left operation. The above circuit provides eight
arithmetic operations, four logic and two shift operations in a single stage. S3,
S2, S1, S0&Cin. are the variables that select the operations. Cin is used for
selecting an arithmetic operation only.
Function Table for ALSU

1. X- dont care condition.

2. First eight arithmetic operations.
3. Next 4 logic operations.
4. next 2 Shift operations.

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