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OBJECTIVES

To plot the given Boolean function 𝐹 = 𝐴′ 𝐷 + 𝐵 ′ 𝐷 + 𝐴𝐵 ′ 𝐷 in a Karnaugh Map and

simplify it into sum-of-products form.

To obtain the complement of the given Boolean function and express it in sum-of-

products form.

To design and construct a circuit implementing both the given Boolean function and its

complement using the least number of NAND gates possible.

To obtain the truth table for the given Boolean function and its complement, and then

verify that the two circuits are indeed complements of each other.

MATERIALS

Alexan Digital Trainer

two 7400 quad two-input NAND gate

insulated connecting wires

cutter or scissors

PROBLEM ANALYSIS

At the onset, we see that the given Boolean function

BD

′ ′ ′

𝐹 = 𝐴 𝐷 + 𝐵 𝐷 + 𝐴𝐵 𝐷 A 00 01 11 10

𝑚0 𝑚1 𝑚3 𝑚2

consists of three variables 𝐴, 𝐵, and 𝐷. Now even 0

though 𝐹 = 𝐹(𝐴, 𝐵, 𝐷) is not expressed in sum-of- 0 1 1 0

minterms form—but rather, in sum-of-products 𝑚4 𝑚5 𝑚7 𝑚6

form—it is still possible to use the Karnaugh map (or 1 0 1 0 0

K-map) to obtain the minterms of 𝐹 and then

simplify the function to an expression with a minimum Figure 9-1. Karnaugh map for

number of terms. To do this, we use a three-variable 𝐹 = 𝐴′ 𝐷 + 𝐵 ′ 𝐷 + 𝐴𝐵 ′ 𝐷

K-map, as shown in Figure 9-1.

The area in the map covered by the given Boolean function 𝐹 includes all the squares

marked with 1’s in Figure 9-1. As expressed, 𝐹 consists of two terms with two literals each

and one term with three literals. Each term with two literals is represented by two squares in a

three-variable map. That is, 𝐴′𝐷 is represented in squares 001 and 011 while 𝐵′𝐷 is

represented in squares 001 and 101. The three-literal term 𝐴𝐵′𝐷 on the other hand, belongs

in square 101.

Laboratory Activity No . 9| 2

As indicated by the three 1’s in the K-map of Figure 9-1, the given Boolean function 𝐹

has a total of three minterms: 1, 3, and 5. Therefore, 𝐹 can be expressed in sum-of-minterms

form as

𝐹 𝐴, 𝐵, 𝐷 = ∑ 1, 3, 5 .

Furthermore, we see from the K-map of Figure 9-2 that 𝐹 can actually be minimized

into a function with two terms instead of three:

𝐹 𝐴, 𝐵, 𝐷 = 𝐴′ 𝐷 + 𝐵′𝐷 .

This is the simplified expression of the given Boolean function in sum-of-products form. To

obtain a simplified expression of the complement of 𝐹, we just mark by 0’s all the squares not

marked by 1’s and then combine them into valid adjacent squares, as shown in Figure 9-3.

Because the minterms not included in the standard sum-of-products form of a function denote

the complement of a function, we see that 𝐹′ is represented in the map by squares not

marked by 1’s. That is, we have

𝐹′ 𝐴, 𝐵, 𝐷 = 𝐴𝐵 + 𝐷′ .

as the simplified expression of the complement of the given Boolean function in sum-of-

products form.

BD BD

A 00 01 11 10 A 00 01 11 10

𝑚0 𝑚1 𝑚3 𝑚2 0 𝑚0 𝑚1 𝑚3 𝑚2

0 0 1 1 0 0 1 1 0

𝑚4 𝑚5 𝑚7 𝑚6 𝑚4 𝑚5 𝑚7 𝑚6

1 0 1 0 0 1 0 1 0 0

𝑨′𝑫

𝑩′𝑫 𝑫′ 𝑨𝑩

simplified expression of 𝐹 simplified expression of 𝐹′

PROCEDURE

To verify that the obtained simplified expressions of 𝐹 and 𝐹′ are indeed complements of

each other, the circuit of Figure 9-4 is constructed on the digital trainer, as illustrated in Figure

9-5. After double-checking all pin connections, power is supplied to the trainer. The logic

outputs of 𝐹 and 𝐹′ in response to varying states of inputs are then observed and recorded

in Figure 9-6 and Table 9-1.

Laboratory Activity No . 9| 3

Figure 9-4 Circuit diagram—with pin assignments and logic gate analysis—for the

implementation of 𝐹 = 𝐴′ 𝐷 + 𝐵′𝐷 and 𝐹 ′ = 𝐴𝐵 + 𝐷′ using two 7400 quad two-

input NAND gates

7400 7400

Laboratory Activity No . 9| 4

Figure 9-6 below shows the logic output levels at LED4 and LED5 for all the eight possible

states: 000, 001, 010, 011, 100, 101, 110, and 111. We see from this diagram that LED4 and

LED5 are always opposite—that is, LED5 is OFF whenever LED4 is ON, and vice versa. In terms

of 0’s and 1’s, Table 9-1 shows that for all eight possible states, the truth values for 𝐹 and 𝐹′

are always complements of each other. This proves that the obtained simplified expressions

for both 𝐹 and 𝐹′ using the map method are valid.

INPUT INPUT OUTPUT

S1 S2 S3 LED1 LED2 LED3 LED4 LED5

0

Table 9-1. Truth Table

Corresponding to Figure 9-6

1

INPUT OUTPUT

2 D1 D2 D3 IN4

𝑨 𝑩 𝑫 𝑭 𝑭′

3

0 0 0 0 1

4 0 0 1 1 0

0 1 0 0 1

5

0 1 1 1 0

1 0 0 0 1

6

1 0 1 1 0

7 1 1 0 0 1

1 1 1 0 1

D1 D2 D3 IN1 IN2 IN3 IN4 IN5

We can further verify whether the experimentally determined truth values of 𝐹 and 𝐹′

depicted in Table 9-1 are correct or not by constructing the truth tables for the Boolean

functions 𝐹 = 𝐴′ 𝐷 + 𝐵′𝐷 and 𝐹 ′ = 𝐴𝐵 + 𝐷′ . Indeed, if we compare the theoretical truth

values of 𝐹 and 𝐹′ listed in Table 9-2, we see that the experimental and theoretical logic

level outputs of 𝐹 and 𝐹′ coincide.

Laboratory Activity No . 9| 5

0 0 0 0 0 0 0 1 1

0 0 1 1 1 1 0 0 0

0 1 0 0 0 0 0 1 1

0 1 1 1 0 1 0 0 0

1 0 0 0 0 0 0 1 1

1 0 1 0 1 1 0 0 0

1 1 0 0 0 0 1 1 1

1 1 1 0 0 0 1 0 1

CONCLUSION

Based on the results of this experiment, it can be concluded that:

A Boolean function of 𝑛 variables can be simplified using an 𝑛-variable Karnaugh map,

with the simplified function easily expressed in either sum-of-products of sum-of-

minterms form.

By combining 0’s instead of 1’s in a K-map, a simplified expression of the function’s

complement can be obtained.

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