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VLSI Handbook- CHP07

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VLSI Handbook- CHP07

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Als PDF, TXT **herunterladen** oder online auf Scribd lesen

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- Coils
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- DESIGN-OF-BROADBAND-COUPLING-CIRCUITS-FOR-POWER.docx
- Tutorial 1 Solutions
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Passive Components

The VLSI Handbook.

Ed. Wai-Kai Chen

Boca Raton: CRC Press LLC, 2000

7

Passive Components

7.1

Magnetic Components

Integration Issues Designs for Integrated

Circuits Magnetic Core Materials

Ashraf Lotfi

Bell Laboratories

Lucent Technologies

7.2

7.3

Resistors

7.4

Capacitors

Junction Capacitors MOS Capacitors

Integration Issues

It is well known and recognized that magnetic components should be avoided when designing integrated

circuits due to their lack of integrability. New developments in the field of magnetic component fabrication are promising devices that can be integrated and miniaturized using monolithic fabrication

techniques as opposed to today's bulk methods. The driving forces for such developments rest in certain

applications that benefit or rely on inductive or magnetically coupled devices using ferromagnetic media.

Examples of such applications include tuned RF tanks, matching networks, dc-dc power conversion and

regulation, network filters, and line isolators/couplers.

Emerging applications requiring more mobility, lower power dissipation, and smaller component and

system sizes have been drivers for the development of highly integrated systems and/or subsystems. In

order to match these trends, it has become necessary to be able to integrate high-quality magnetic devices

(i.e., inductors and transformers) with the systems they operate in as opposed to being stand-alone

discrete devices. Not only does their discrete nature prevent further miniaturization, but their very nature

also hampers improved performance (e.g., speed).

The main features of a monolithic magnetic device include:

1.

2.

3.

4.

5.

6.

7.

Enhanced high-frequency performance

Energy storage, dc bias, and power handling capabilities

Use of ferromagnetic materials as a magnetic core

Photolithographic fabrication of windings and magnetic core

Multi-layer mask fabrication for complete magnetic device design

Standard or semi-standard IC processing techniques

Due to the use of standard photolithography, etching, and patterning methods for their fabrication,

monolithic magnetic devices may appear compatible with IC processes. However, two main characteristics

make these devices more suitably fabricated off-line from a mainstream IC process:

Coarser design rules. Usually, magnetic device designs do not require sub-micron geometries as

demanded by semiconductor designs. This discrepancy means that an expensive sub-micron

process for these components would unnecessarily raise the device cost.

Use of ferromagnetic core materials. The use of iron, cobalt, nickel, and their alloys is at the heart

of a high-quality magnetic device. Some of these materials are alien and contaminating to semiconductor cleanrooms. As a result, processing sequences and logistics for full integration with

semiconductors is still in the development phase.

With these two major differences, integration of magnetics and semiconductors may require the use of

multi-chip modules or single package multi-die cases. Full integration into a single monolithic die

requires separate processing procedures using the same substrate.

The construction of a monolithic micromagnetic device fabricated on a substrate such as silicon or

glass is shown in Fig. 7.1. In this diagram, the magnetic layer is sandwiched between upper and lower

conductor layers that are connected together by means of an electrically conducting via. This structure

is referred to as a toroidal device from its discrete counterpart.

FIGURE 7.1

Conversely, a dual structure can be made where two magnetic layers sandwich the conductor layer (or

layers). This dual structure can be referred to as an EE device since it is derived from the standard discrete

EE core type. In either case, as required by the operation of any magnetically coupled device, the

magnetic flux path in the magnetic film and the current flow in the coil conductor are orthogonal, in

accordance with Ampere's circuital law. Interlayer insulation between conductors and the magnetic

layer(s) is necessary, both to reduce capacitive effects and to provide a degree of electrical voltage

breakdown. These parameters are affected by the choice of insulator systems used in microfabricated

circuits, due to the differing values of dielectric constants and breakdown voltages used. Some commonly

used insulator systems include silicon dioxide and polyimide, each of which has distinctly different

processing methods and physical characteristics. Conductor layers for the coil windings can be fabricated

using standard aluminum metallization. In some cases, copper conductors are a better choice due to

their higher conductivity and hence lower resistive losses. This is especially important if the device is to

handle any significant power. The magnetic film layer is a thin film of chosen magnetic material typically

between 1 and 10 m in thickness. Such materials can be routinely deposited by standard techniques

such as sputtering or electrodeposition. The specific method chosen must yield magnetic films with the

desired properties, namely permeability, parallel loss resistance, and maximum flux density. These parameters vary with the deposition conditions and techniques, such that significant development and optimization has occurred to produce the desired results.

Since the design may call for energy storage and hence gaps in the core, the fabrication method can

be modified to incorporate these features. Figure 7.2 shows the geometry of a planar magnetic core with

a gap produced by photolithography. In this case, the gap is formed as a result of the artwork generated

for the core design. Figure 7.3 shows the design of a gap using multi-layer magnetic films. The energy

storage region exists in the edge insulation region between the two magnetic layers.

FIGURE 7.2

Planar, single-layer magnetic core configuration for energy storage (top view).

FIGURE 7.3

The fabrication and construction of conductors for the coil usually involve depositing standard interconnect metals (e.g., aluminum) by sputter deposition. The thicknesses are chosen based on the currentcarrying capability and the frequency of operation, as well as the desired configuration (inductor or

transformer). The dc resistance of the conductors must be minimized to reduce dc losses, but the

conductor thickness and arrangement must also result in minimal ac losses. This can be accomplished

by reduced resistivity (i.e., copper vs. aluminum) and by multiple conductor layers to reduce skin and

proximity effects at high frequencies.

Unlike discrete magnetic components, monolithic micromagnetic devices are designed to operate at

substantially higher frequencies. Due to their integrated nature and smaller physical size, interconnection

and coupling parasitics are lower, thus enabling high-frequency response. However, the smaller physical

size also places upper limits on such characteristics as inductance, current levels, power levels, and

dissipation. With these limits, the maximum energy storage, E, is lower. In any inductor, the energy stored

due to the current flowing (I) is related to the magnetic fields in the volume of the device by:

1 2

1

E = --- LI = --2

2

B H dv

(7.1)

where L is the transformer or inductor's inductance in Henries, and I (A) is the maximum current carried

by the corresponding winding. This is related to the magnetic flux density, B, and magnetic field, H,

present in the volume of the device. So, for a small physical volume, one can see from Eq. (7.1) that the

energy stored is also small. This limited energy storage capability limits these devices to operation in

low-power circuits. In order to obtain a high B-H product for more energy storage, a combination of

high-permeability and low-permeability regions should be fabricated (i.e., a gap in the high permeability

path is introduced). This gap region helps to maintain a high flux density as well as an appreciable field.

The highly permeable region, on the other hand, while being able to maintain high flux density does not

support large magnetic fields due to the fundamental relationship between magnetic field and flux:

B = 0 r H

(7.2)

In Eq. (7.2), 0 is the permeability of vacuum (4 107 H/m) and r is the relative permeability of

the medium in which the magnetic field produces the corresponding magnetic flux density. The size of

this gap determines both the energy storage levels and the inductance attainable (which is lower than

the inductance attainable without a gap). In micromagnetic fabrication, two approaches may be taken

to create this air gap region. One is to introduce a planar lithographical feature into the core structure

(Fig. 7.2), and the other is to rely on multiple magnetic core layers separated by insulating layers (Fig.

7.3). The drawback of the lithographical gap is the limits imposed by the design rules. In this case, the

gap may not be any smaller than the minimum design rule, which can be quite coarse. Excessive gap

sizes result in very low inductance, requiring an increase in number of turns to compensate for this

drop. Consequently, electrical losses in these windings increase and also the fabrication becomes more

complicated. The drawback of multiple magnetic core layers is the need to add another level of processing

to obtain at least a second (or more) magnetic layer(s). The stack-up of these layers and the edge

terminations determine the amount of energy storage possible in the device. Unlike the lithographically

produced gap, the energy storage in this case is much more difficult to estimate due to the twodimensional nature of the edge termination fields in the gap region surrounding the multi-layer magnetic cores. In uniform field cases, the energy stored in volume of the gap can be obtained from Eqs.

(7.1) and (7.2) due to the continuity and uniformity of the flux density vector in both the core and gap

regions, giving:

2

1 2 1 B V gap

E = --- LI --- -------------2

2 0

(7.3)

where Vgap is the volume of the gap region in cubic meters (m3). The approximation is valid as long as

the gap region carries a uniform flux density and is magnetically long compared to the length of the

highly permeable core region (i.e., gap length/r gap >> core length/r mag). Usually, this condition can be

satisfied with most ferromagnetic materials of choice, but some ferromagnetic materials may have low

enough permeabilities to render this approximation invalid. In this event, some energy is stored within

the ferromagnetic material and Eq. (7.3) should be modified. Eq. (7.3) is very useful in determining the

size of gap needed to support the desired inductance and current levels for the device. For example, if a

250-nH inductor operating at 250 mA of current bias were needed, the gap volume necessary to support

these specifications would be about 2 105 mm3, assuming a material with a maximum flux density of

1.0 T. In the planar device of Fig. 7.2 with nominal magnetic film dimensions of 2 m in the normal

direction and 200 m in the planar direction, the required gap width would be about 5 m. Since the

gap in this case is obtained by photolithography, the minimum feature size for this process would need

to be 5 m. If a different material of lower maximum flux density capability of 0.5 T were used instead,

the rated current level of 250 mA would have to be downgraded to 62 mA to prevent saturation of the

magnetic material. Conversely, the gap length of 5 m could be increased to 20 m while maintaining

the same current level, assuming adjustments are made to the turns to maintain the desired inductance.

Such tradeoffs are common, but are more involved due to the interaction of gap size with inductance

level and number of turns.

Another aspect of the design is the conductor for coil windings for an inductor or for primary and

secondary windings in the case of a transformer. The number of turns is usually selected based on the

desired inductance and turns ratio (for a transformer), which are typically circuit design parameters. As

is well known, the number of turns around a magnetic core gives rise to an inductance, L, given by:

0 r N A

-H

L = -------------------l

2

(7.4)

In this relation, N is the number of turns around a magnetic core of cross-sectional area A (m2) and

magnetic path length l (m). The inductance is reduced by the presence of a gap since this will serve to

increase the path length. The choice of conductor thickness is always made in light of the ac losses

occurring when conductors carry high-frequency currents. The conductors will experience various current redistribution effects due to the presence of eddy currents induced by the high-frequency magnetic

fields surrounding the conductors. The well-known skin effect is one of such effects. Current will crowd

toward the surface of the conductor and flow mainly in a thickness related to the skin depth, ,

1

= ------------------- m

f 0

(7.5)

For a copper conductor, = 66/ f ( MHz ) m. At 10 MHz, the skin depth in copper is 20 m, placing

an upper limit on conductor thickness. When the interconnect metallization is aluminum,

= 81/ f ( MHz ) m, so the upper limit at 10 MHz becomes 25 m of metal thickness. Usually, the

proximity of conductors to one another forces further optimization due to the introduction of losses due

to eddy currents induced by neighboring conductors. In this case, the conductor thickness should be

further adjusted with respect to the skin depth to reduce the induced eddy currents. The increase in

conductor resistance due to the combined skin and proximity effects in a simple primary-secondary

winding metallization scheme (shown in Fig. 7.4) can be calculated as an increase over the dc resistance

of the conductor from:

Rac = Rdc --- --- ---------------------------------------------- + -----------------------------------------------

2 cosh h cos h cosh h + cos h

(7.6)

In this relationship, h is the thickness of the metallization being used and Rac is obtained once the dc

resistance (Rdc, also a function of h) is known. A distinct minimum for Rac can be obtained and yields

the lowest possible ac resistance when:

--- = --

2

(7.7)

2

2

(7.8)

When the geometry differs from the simple primary-to-secondary interface of Fig. 7.4 to more turns,

layers, shapes, etc., a more complicated analysis is necessary.4 The simple relation of Eq. (7.7) is no longer

FIGURE 7.4

FIGURE 7.5 The variation of high-frequency metallization resistance with metal thickness for the configuration in

Fig. 7.4. A distinct minimum is observed due to skin and proximity effects.

valid. Nevertheless, this relation provides a very good starting point for many designs. A qualitative

explanation of this behavior stems from the fact that a thicker metallization will produce less dc resistance,

but provides poor ac utilization due to current crowding near the surface. On the other hand, a thinner

metallization increases the dc resistance, while providing better ac conductor utilization. The optimum

situation is somewhere in between these two extreme cases, as can be seen from Fig. 7.5.

The principles presented in this section regarding design issues are at the core of every magnetic

component design for integrated circuits. However, many design details especially at elevated frequencies are beyond the scope of this text. It is important to note that many of the limitations on highfrequency designs (100 MHz and higher) are imposed by the properties of the magnetic materials used

in the cores of these devices.

The most common magnetic materials used for discrete magnetic components operating at higher

frequencies are ferrites. This is mainly due to their high resistivity (1 to 10 m). Despite a low saturation

flux density of about 0.3T, such a high resistivity makes ferrites suitable for applications up to 1 MHz,

where hysteresis core losses are still limited. When the frequency is raised over 1MHz, the core losses

become excessive, thus degrading the quality factor and efficiency of the circuit. Moreover, the permeability of all magnetic materials experiences a roll-off beyond a maximum upper frequency. Commonly

used ferrites (e.g., MnZn ferrites) operate up to 1 to 2 MHz before permeability roll-off occurs. Higher

roll-off frequencies are available, but with higher loss factors (e.g., NiZn ferrites). Ferrites, however, are

not amenable to integrated circuit fabrication since they are produced by a high-temperature sintering

process. In addition, their low flux saturation levels would not result in the smallest possible device per

unit area. A set of more suitable materials for integrated circuit fabrication are the magnetic metal alloys

usually derived from iron, cobalt, or nickel. These alloys can be deposited as thin films using IC fabrication

techniques such as sputtering or electrodeposition and possess saturation flux levels of 0.8T to as high

as 2.0T. Their main drawback due to their metallic nature is a much lower resistivity. Permalloy, a common

magnetic alloy (80% nickel and 20% iron) has a resistivity of 20 108 m, with a saturation flux density

of 0.8T. Other materials such as sendust (iron-aluminum-silicon) have improved resistivity of 120 108

m and saturation flux density of 0.95T.

2000 by CRC Press LLC

To overcome the problem of low resistivity, the magnetic layers must be deposited in thin films with

limited thickness. Since eddy currents flow in the metallic films at high frequencies, their effect can be

greatly reduced by making the film thickness less than a skin depth. The skin depth in the magnetic film,

m, is given by:

1

m = ------------------------ m

f o r

(7.9)

In a thin film of permalloy (r = 2000), the skin depth at 10 MHz is 3 m. In order to limit eddy current

losses in the film, its thickness must be chosen to be less than 3 m. This limitation will conflict with

the inductance requirement, since a larger inductance requires a thicker magnetic film (see Eq. 7.4). Such

difficulties can be overcome by depositing the magnetic film in multiple layers insulated from one another

to restrict eddy current circulation. Such a structure would still provide the overall thickness needed to

achieve the specified inductance while limiting the eddy current loss factor. The use of multi-layers also

allows the reduction of die size due to the build-up of magnetic core cross-section (A in Eq. 7.4) in

vertical layers, rather than by increasing the planar dimensions. As a result, it can be seen that a tradeoff

exists between number of layers and die size to yield the most economical die cost.

In addition to eddy current losses due to the low magnetic metal resistivity, hysteresis losses occur in any

magnetic material due to the traversing of the non-linear B-H loop at the frequency of operation. This is

due to the loss of energy needed to rotate magnetic domains within the material. This loss is given by

P hys = f H dB

(7.10)

which is the area enclosed by the particular B-H loop demanded by the circuit operation and f is the

frequency of operation. Total loss is expressed in many forms, depending on the application. In many cases,

it is given in the form of a parallel or shunt resistance (Fig. 7.6) and it therefore presents a reduction

in impedance to the source as well as a reduction in the overall quality factor of the inductor or transformer.

It also represents a finite power loss since this loss is simply V2/Rp watts, where V is the applied voltage.

Notice that Rp is a non-linear resistance with both frequency and flux level dependencies. It can be

specified at a given frequency and flux level and is usually experimentally measured. It can also be

extracted from core loss data usually available in the form

2

V

P = kf B = ----Rp

(7.11)

In this relation, k, , and are constants for the material at hand. This model is useful for circuit

simulation purposes, thereby avoiding the non-linear properties of the magnetic material. Care, however,

should be exercised in using such models since with a large enough excitation, the value of the shunt

resistor changes.

FIGURE 7.6

Air core inductors do not use a magnetic core to concentrate the lines of magnetic flux. Instead, the flux

lines exist in the immediate neighborhood of the coils without tight confinement. As a result, the inductance

of an air core coil is considerably lower than one with a magnetic core. In fact, at low frequencies, the quality

factor is reduced by a factor of r when the loss factor is small. At high frequencies, however, the loss factor

may be so high that the addition of a magnetic core and increased inductance actually ends up degrading

the quality factor below the air core value. Discrete air core inductors have been used in RF applications

and have been wound using discrete magnet or Litz wire onto forming cylinders.

For integrated circuits, especially RF and microwave circuits, spiral metallization deposited on a

substrate is a common means to obtain small amounts of inductance with relatively high quality factors.

Inductance values that can be obtained by these techniques are usually in the low nH range (1 to 20 nH).

Estimating inductance values using air cores is much more complicated than in the case of highly

permeable cores due to the lack of flux concentration. Formulas have been derived for different spiral

air coil shapes (assuming perfectly insulating substrates) and are tabulated in several handbooks for

inductance calculations.69 An example of a useful inductance formula9 is:

8r avg

8r avg

1 ( r out r in ) 2

7 2

+ ------ ----------------------ln ----------------------+ 3.583 0.5 (7.12)

L = 4 10 N r avg ln ----------------------

24

r

(

r

r

)

(

r

r

)

avg

out

in

out

in

In this formula, rout and rin are the outer and inner radii of the spiral, respectively, and the average

radius ravg is

( r out + r in )

r avg = ----------------------2

(7.13)

The formula is an approximation that loses accuracy as the device size becomes large (i.e., large rout with

respect to rin).

The loss factors of such devices are strongly influenced by the non-idealities of the substrates and

insulators on which they are deposited. For example, aluminum spiral inductors fabricated on silicon

with highly doped substrates and epitaxial layers can have significant reductions in quality factor

due to the conductivity of the underlying layers. These layers act as ground planes, producing the

effect of an image of the spiral underneath. This in turn causes a loss in inductance. This can be as

much as 30 to 60% when compared to a spiral over a perfect insulator. In addition, an increase in

the loss factor occurs due to circulating eddy currents in the conductive under-layers. Increases in

the effective resistance of 5 to 10 times the perfect insulator case are possible, increasing with

increased frequency. All these effects can be seen to degrade the performance of these inductors,

thus requiring design optimization.1012

These substrate effects appear in the form of coupling capacitances from the spiral metal to the

substrates, as well as spreading resistances in the substrate itself. The spreading resistance is frequency

dependent, increasing with higher frequency. The amount of coupling to the substrate depends on the

coupling capacitances and hence the separation of the spiral from the substrate. This distance is the

dielectric thickness used in the IC process. Only with very large dielectric thicknesses are the substrate

effects negligible. In practical cases where it is relatively thin and limited to a few microns, the effects are

very large, giving an overall quality factor, Q, which is significantly lower than the Q of the spiral without

the substrate. Fig. 7.7 shows a typical degradation curve of Q on a resistive substrate for thick and

thin separations or dielectric thicknesses. The trends of this curve are also similar if the dielectric

thickness variable is replaced by the substrate resistivity as a variable. The exact amount of degradation

depends on the separation involved, the dielectric constant, and the resistivity of the substrate. With

FIGURE 7.7

these quantities known, it is possible to construct a circuit model to include these effects and hence solve

for the overall quality factor, including the substrate effects.

In order to improve the inductor quality factor on a resistive substrate, some design solutions are

possible. One solution to this problem is to increase the substrate resistivity. Another is to design a

spiral with small footprint to reduce coupling to the substrate. In order to offset the increased resistance

(which also reduces Q), thicker metallization would be necessary and clearly a tradeoff situation arises

requiring some design optimization by circuit modeling or, more accurately, by electromagnetic finiteelement analysis.

7.3 Resistors

Resistors have been available for use in integrated circuits for many years.1316 Some of these are made

in silicon and thus are directly integrated with the rest of the IC process. Others, similar to the magnetic

device case, are thin-film resistors fabricated in an off-line process that is not necessarily compatible with

silicon IC processing. Integrated silicon resistors offer simplicity in fabrication but have less than ideal

characteristics with loose tolerances. For this reason, many circuits rely on the ratio of resistor values

rather than on their absolute values. Thin-film resistors, on the other hand, are far superior, offering

tight tolerances and the ability to trim their absolute value down to very precise values. They also display

more stability in terms of temperature and frequency dependence.17

Usually, resistors in integrated circuits are characterized in terms of their sheet resistance rather than

their absolute resistance value. Sheet resistance, Rsheet, is defined as the resistance of a resistive strip with

equal length and width so that

R sheet = --- (

t

(7.14)

where is the material resistivity (m) and t is its thickness (m). Once Rsheet is given, the resulting

resistor value is obtained by multiplying by its length-to-width aspect ratio. In order to avoid very high

aspect ratios, an appropriate sheet resistivity should be used. For example, with Rsheet = 10 / a 10:1

length-to-width ratio would give a 100- resistor. However, to obtain a 1-k resistor, it would be better

to use a different material with, for example, Rsheet = 100 / with the same 10:1 ratio instead of using

a 100:1 ratio with the low-resistivity material.

In this category, the existing semiconductor is used as the resistive material. The resistor may be fabricated

at a number of stages during the IC process, giving rise to different resistors with different characteristics.

Some of the most common include:

Diffused Resistors

This can be formed during either the base or emitter diffusion of a bipolar process. For an npn process,

the base diffusion resistor is a p-type of moderate sheet resistivity, typically in the range of 100 to 200

/. This can provide resistors in the 50 to 10 k range. The heavily doped n+ emitter diffusion will

produce an n+-type resistor with low sheet resistivity of 2 to 10 /. This can provide resistors with low

values in the 1 to 100 range. Due to tolerances in the photolithographic and etching processes, the

tolerance in the absolute resistance can be as high as range. Due to tolerances on the photolithographic

and etching processes, the tolerance on the absolute resistance can be as high as 30%. However, resistor

pairs can be matched closely in temperature coefficients and doping profiles, especially when placed sideby-side on the chip, so that the resultant tolerance of the resistor ratio can be made to be less than 1%.

Since a diffusion resistor is based on a p-type base over an n-type epitaxy, or an n+-type emitter over a

p-type base, it is essential that the formed p-n junctions are always reverse-biased to ensure that current

flows in the intended portion of the resistor. The presence of such a reverse-biased p-n junction also

introduces a distributed capacitance from the resistor body to the substrate. This will cause highfrequency degradation, whereby the resistor value drops from its nominal design value to a lower

impedance value due to the shunting capacitance.

Pinched Resistors

A variation to the diffused resistor that is used to increase the sheet resistivity of base region is to use

the n+-type emitter as a means to reduce the cross-sectional area of the base region, thereby increasing

the sheet resistivity. This can increase the sheet resistance to about 1 k/. In this case, one end of

the n+-type emitter must be tied to one end of the resistor to contain all current flow to the pinched

base region.

Epitaxial Resistors

High resistor values can be formed using the epitaxial layer since it has higher resistivity than other

regions. Epitaxial resistors can have sheet resistances around 5 k /. However, epitaxial resistors have

even looser tolerances due to the wide tolerances on both epitaxial resistivity and epitaxial layer thickness.

MOS Resistors

A MOSFET can be biased to provide a non-linear resistor. Such a resistor provides much greater values

than diffused ones while occupying a much smaller area. When the gate is shorted to the drain in a

MOSFET, a quadratic relation between current and voltage exists and the device conducts current only

when the voltage exceeds the threshold voltage. Under these circumstances, the current flowing in this

resistor (i.e., the MOSFET drain current) depends on the ratio of channel width-to-length. Hence, to

increase the resistor value, the aspect ratio of the MOSFET should be reduced to give longer channel

length and narrower channel width.

Thin-Film Resistors

As mentioned before in the magnetic core case, a resistive thin-film layer can be deposited (e.g., by

sputtering) on the substrate to provide a resistor with very tight absolute-value tolerance. In addition,

given a large variety of resistor materials, a wide range of resistor values can be obtained in small

footprints, thereby providing very small parasitic capacitances and small temperature coefficients. Some

common thin-film resistor materials include tantalum, tantalum nitride, and nickel-chromium. Unlike

semiconductor resistors, thin-film resistors can be laser trimmed to adjust their values to very high

accuracies of up to 0.01%. Laser trimming can only increase the resistor value since the fine beam

evaporates a portion of the thin-film material. By its nature, laser trimming is a slow and costly operation

that is only justified when very high accuracy on absolute values is necessary.

7.4 Capacitors

As in the inductor case, the limitation on integrated capacitors is die size, due to the limited

capacitance/unit area available on a die. These limitations are imposed by the dielectrics used with

their dielectric constants and breakdown voltages. Most integrated capacitors are either junction

capacitors or MOS capacitors.

Junction Capacitors

A junction capacitor is formed when a p-n junction is reversed-biased. This can be formed using the

baseemitter, basecollector, or collectorsubstrate junctions of an npn structure in bipolar ICs. Of

course, the particular junction must be maintained in reverse-bias to provide the desired capacitance.

Since the capacitance arises from the parallel plate effect across the depletion region, whose thickness in

turn is voltage dependent, the capacitance is also voltage dependent, decreasing with increased reversebias. The capacitance depends on the reverse-voltage in the following form:

C0

C ( V ) = -----------------------------n

( 1 + V 0 )

(7.15)

The built-in potential, 0, depends on the impurity concentrations of the junction being used. For

example, 0 = 0.7 V for a typical bipolar baseemitter junction. The exponent n depends on the doping

profile of the junction. The approximations n = 1/2 for a step junction and n = 1/3 for a linearly graded

junction are commonly used. The resultant capacitance depends on C0, the capacitance per unit area

with zero bias applied. This depends on the doping level and profile. The baseemitter junction provides

the highest capacitance per unit area, around 1000 pF/mm2 with a low breakdown voltage (~5 V). The

basecollector junction provides about 100 pF/mm2 with a higher breakdown voltage (~40 V).

MOS Capacitors

MOS capacitors are usually formed as parallel plate devices with a top metallization and a high conductivity n+ emitter diffusion as the two plates, with a thin oxide dielectric sandwiched in between. The

oxide is usually a thin layer of SiO2 with a relative dielectric constant r of 3 to 4, or Si3N4 with r of 5

to 8. Since the capacitance obtained is 0rA/toxide, the oxide thickness, toxide is critical. The lower limit on

the oxide thickness depends on the process yields and tolerances, as well as the desired breakdown voltage

and reliability. MOS capacitors can provide around 1000 pF/mm2, with breakdown voltages up to 100 V.

Unlike junction capacitors, MOS capacitors are voltage independent and can be biased either positively

or negatively. Their breakdown, however, is destructive since the oxide fails permanently. Care should

be taken to prevent overvoltage conditions.

References

1. Saleh, N. and Qureshi, A., Permalloy thin-film inductors, Electronics Letters, vol. 6, no. 26, pp.

850-852, 1970.

2. Soohoo, R., Magnetic film inductors for integrated circuit applications, IEEE Trans. Magn., vol.

MAG-15, pp. 1803, 1979.

3. Mino, M. et al., A new planar microtransformer for use in micro-switching converters, IEEE

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