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http://mbedlabs.com/2015/02/17/difference-harvard-princeton-von-neumann-architecture/
The Harvard architecture executes instructions in fewer instruction cycles that the Von Neumann architecture. This is
because a much greater amount of instruction parallelism is possible in the Harvard architecture. Parallelism means
that fetches for the next instruction can take place during the execution of the current instruction, without having to
either wait for a dead cycle of the instructions execution or stop the processors operation while the next instruction
is being fetched.
Advantage of this architecture is that each instruction takes one instruction cycle.
Example: in PIC Microcontroller, of 4 MHz , it requires 4 clock cycles to execute one instruction cycle. Hence, 1
million instructions could be executed in one second.
Summary:
Princeton Architecture
Harvard Architecture