7/7/2015

AnaloguetoDigitalConverters(ADC)

AnaloguetoDigitalConverters(ADC)
Flash(Simultaneous)ADC
TheflashADCusescomparatorsthatcomparereferencevoltageswiththeanalogueinput
voltage.Whentheanaloguevoltageexceedsthereferencevoltageforagivencomparator,a
Highisgenerated.Ingeneral(2n1)comparatorsarerequired.Soforan8bitconversion255
comparatorsarerequired.HowevertheflashADCprovidesafastconversiontimebecauseof
theparallelprocess.

3BitFlashAnaloguetoDigitalConverter(ADC)
Thereferencevoltageforeachcomparatorissetbytheresistivevoltagedividernetwork.The
outputofeachcomparatorisconnectedtoaninputofthepriorityencoder.Theencoderis
sampledbyapulseontheEnableinputanda3bitbinarycoderepresentingtheanalogueinput
appearsontheencoderoutput.Thebinarycodeisdeterminedbythehighestorderinput
havingaHighlevel.
PrincipleofOperation:
TheflashADCcomprisesanarrayofcomparators.
Eachcomparatorisconnectedtoaresistivevoltagedividerandtotheanalogueinput
voltage.
Theresistivevoltagedividerconsistsofequalvaluedresistorsconnectedinserieswith
thereferencevoltageVREF.
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Thuseachcomparatorcomparestheanalogueinputvoltagewithaslightlydifferent
voltagefromthedivider.
Thosecomparatorswhichareconnectedtodividerresistorswherethedividervoltageis
lowerthantheanalogueinputvoltagewillgiveahighoutput
Theothercomparatorswillproducealowoutput.
Largeranalogueinputvoltageswillresultinmorecomparatorhighoutputs.
Thepatternofcomparatorhigh/lowoutputsisappliedtoencodercircuitswhichconvert
thedataintoabinaryoutputnumberwhichisproportionaltotheratiooftheanalogue
inputvoltagetothereferencevoltage.

SuccessiveApproximationADC

TheADCisinterfacedtoacontrollerusuallyamicroprocessor.
Thecontrollerdecideswhenaconversionistobeperformedandinitiatestheconversion
byassertingtheStartConvertsignallineintothecontrollogic.
TheControlLogicmonitorstheinputtodeterminewhetherthepresentcontentsofthe
registerrepresentavaluewhichisbeloworabovetheanalogueinputvoltage.
EachbitissetinturnstartingwiththeMSBandworkingdowntotheLSB.
Theeffectofsettingeachbitisnotedbythecontrollogicand
ifsettingaparticularbitresultsinaDACoutputinexcessoftheanalogueinput
voltage,thebitisclearedbeforemovingontothenextbit
otherwisethebitisleftset.
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Attheendoftheprocess,theLSBisadjustedandtheconversioniscomplete.
Thecontrollogicsignalsthistothecontroller/microprocessorbyassertingtheEndof
Conversionlineandthedigitaloutputistakenfromtheregisteroutput.

ThemainadvantagesoftheflashtypeofADCoverthesuccessiveapproximationADC:
ThesuccessiveapproximationtypeofADCincludesinitscircuitsabinarycounterthatis
clockedbyagatedclockoscillator.
Theclockisgatedonsolongasthecounteroutputislowerthanthebinaryequivalentof
theanalogueinputvoltage.
Oncethecounteroutputexceedstheanalogueoutputbinaryequivalenttheoscillatoris
gatedoffandthecounteroutputistakentobethebinaryequivalentoftheanalogue
input.
Onaverage,therampconversionofADCrequiresoftheorderof(2n1)clockcyclesfor
eachconversionwherenisthebitlengthoftheADCoutput.Thus,a16bitconverterwill
need65535clockpulsesforeachconversion.
ThislimitsthemaximumfrequencythatcanbehandledbysuchADCstoperhaps100
kHzmaximum.
Theflashconverteriscapableofperformingconversionsinatimeintervalrelatedtothe
slewrateofthecomparatorsandthepropagationdelayoftheencodercircuits.
ThustypicalflashADCscanperformconversionsfastenoughtoworkonrealtimevideo
datai.e.dataconversionatfrequenciesoftensofMHz.

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