You are on page 1of 44

DC BIASING -BJTs

Chapter 4

Introduction
The term biasing is used for application of dc voltages to
establish a fixed level of current and voltage.
Transistor must be properly biased with dc voltage to
operate as a linear amplifier.
If amplifier is not biased with correct dc voltages on input
and output, it can go into saturation or cutoff when the input
signal applied.
There are several methods to establish DC operating point.
In DC analysis all capacitor act as open circuit.

Biasing
• Biasing: The DC voltages applied to a transistor in order
to turn it on so that it can amplify the AC signal or to
establish a fixed level of current and voltage.
• The base current, 𝐼𝐵 is the first to be determined. Once 𝐼𝐵
is known, the remaining quantities can be determined.
• The basic relationships for a transistor
• 𝑉𝐵𝐵 ≅ 0.7𝑉; 𝐼𝐸 = 𝛽 + 1 𝐼𝐵 ≅ 𝐼𝐶 ; 𝐼𝐶
= 𝛽𝐼𝐵

Operating Point
• The DC input establishes an
operating point or quiescent
point called Q-point
• Quiescent means quiet,
still, inactive
• A transistor’s operating
point (Q-point) is defined by
IC, VCE, and IB

 Note :for FB. . voltage across the pn junction is p positive whereas for RB it is opposite with n positive.7V  BC junction must be reversed based 9n-region more positive) with the reverse bias voltage being any value within the maximum limits of device.6 – 0.Active Operating Region • For the BJT to be biased in its linear or active region the following must be true:  BE junction must be forward biased (p-region more positive) with a resulting forward biased voltage of about 0.

The three states of operation • Active or linear region operation  Base-Emitter junction is forward biased  Base-Collector junction is reverse biased • Cutoff region operation  Base-Emitter junction is reverse biased  Base-Collector junction is reverse biased • Saturation region operation  Base-Emitter junction is forward biased  Base-Collector junction is forward biased .

The DC Operating Point The goal of amplification in most cases is to increase the amplitude of an ac signal without altering it. .

.The DC Operating Point For a transistor circuit to amplify it must be properly biased with dc voltages. The dc operating point between saturation and cutoff is called the Q-point. The goal is to set the Q-point such that that it does not go into saturation or cutoff when an a ac signal is applied.

VCC −1 V + I = ( ) CE c Slope of the dc load line? RC Rc . giving equal amount above and below the Qpoint.The DC Operating Point Recall that the collector characteristic curves graphically show the relationship of collector current and VCE for different base currents. With the dc load line superimposed across the collector curves for this particular transistor we see that 30 mA of collector current is best for maximum amplification. Note that this is three different scenarios of collector current being viewed simultaneously.

applying too much ac voltage to the base would result in driving the collector current into saturation or cutoff resulting in a distorted or clipped waveform. However. Note the collector current swings do not exceed the limits of operation(saturation and cutoff).The DC Operating Point With a good Q-point established. as you might already know. (Example 5-1) . let’s look at the effect a superimposed ac voltage has on the circuit.

• 𝐼𝐶𝐶𝐶𝐶 = 𝑉𝐶𝐶 𝑅𝐶 • 𝑉𝐶𝐶 ≅ 0𝑉 . current through the transistor is at its maximum possible values.Saturation • When the transistor is operating in saturation.

DC biasing circuit • Fixed-bias circuit .highly dependent on βdc • Emitter-stabilized bias circuit  Add emitter resistor  Greatly reduces effect of change of β  Equations • Collector-emitter loop – – – – Less common than CE circuit Collector connected to ground Similar analysis Voltage gain < 1 • Voltage divider bias circuit • DC bias with voltage feedback .

determine the Q point for the output circuit. Best Q for a linear amplifier .) 3. find the intersection of the load line and characteristic curve determined from the Q point found in step 2.BJT . From the output characteristics. For the input characteristics determine the Q point for the input circuit from the intersection of the load line and the characteristic curve where Q point is between saturation and cut off(Note that some transistor do not need an input characteristic curve. Draw the load lines on the transistor characteristics curve 2.DC Analysis • Using KVL for the input and output circuits and the transistor characteristics. 4.Midway between saturation and cut-off . the following steps apply: 1.

Base/Fixed Bias This type of circuit is very unstable since its β changes with temperature and collector current. . Base biasing circuits are mainly limited to switching applications.

two dc voltage supplies are needed to bias a BJT which is not practical This biasing circuit is called base bias. or fixed bias. VBB is eliminated by connecting the resistor RB to the supply VCC As shown in the above circuit.Base/Fixed Bias In a simple biasing circuit. • Single power supply • Coupling capacitors .

𝑠𝑠 𝑉𝐶𝐶 = 𝑉𝐶 𝑎𝑎𝑎 𝑉𝐵𝐵 = 𝑉𝐵 . 𝑉𝐵𝐵 = 𝑉𝐵 − 𝑉𝐸 . •Therefore. since 𝑉𝐸 = 0.Base/Fixed bias Applying KVL. 𝑉𝐶𝐶 𝑉𝐶𝐶 = 𝐼𝐵 𝑅𝐵 + 𝑉𝐵𝐵 𝑉𝐶𝐶 − 𝑉𝐵𝐵 𝐼𝐵 = 𝑅𝐵 = 𝑉𝐶 − 𝑉𝐸 .

The Base-Emitter Loop • From KVL +𝑉𝑐𝑐 − 𝐼𝐵 𝑅𝐵 − 𝑉𝐵𝐵 Solving for base current 𝑉𝐵𝐵 − 𝑉𝑐𝑐 𝐼𝐵 = 𝑅𝐵 .

Collector-Emitter Loop • Collector current 𝐼𝐶 = 𝛽𝐼𝐵 • From KVL 𝑉𝐶𝐶 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 .

Feedback bias: collector-feedback bias .

Feedback bias: Emitter-feedback bias .

𝑉𝐶𝐶 𝐼𝐶 = � 𝑅𝐶 𝑉 𝐶𝐶 =0𝑉 .Load line for fixed bias circuit The Q-point is the operating point:  Where the value of RB sets the value of IB  Where IB and the load line intersect  That sets the values of VCE and IC DC load line is defined by two points. consider 𝐼𝐶 = 0𝑚𝑚 and 𝑉𝐶𝐶 = 0𝑉 thus 𝑉𝐶𝐶 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 𝑉𝐶𝐶 = 𝑉𝐶𝐶 � 𝐼𝐶 =0𝑚𝑚 .

DC Load Line .

Circuit Values Affect the Q-Point Increasing level of IB Decreasing value of VCC Increasing level of RC .

Emitter-Stabilized Bias Circuit This type of circuit is independent of β making it as stable as the voltage-divider type. Two key equations for analysis of this type of bias circuit are shown below. The drawback is that it requires two IB ≈ IE/β power supplies. With these two currents known we can apply Ohm’s law and Kirchhoff's law to solve for the voltages. IC ≈ IE ≈( -VEE-VBE)/(RE + RB/βDC) .

Base-emitter loop(input loop) Collector-emitter loop(output loop) 1 2 KVL at loop 1 −𝑉𝐶𝐶 + 𝐼𝐵 𝑅𝐵 + 𝑉𝐵𝐵 + 𝐼𝐸 𝑅𝐸 = 0 Since 𝐼𝐸 = 𝛽 + 1 𝐼𝐵 : 𝑉𝐶𝐶 − 𝐼𝐵 𝑅𝐵 − 𝛽 + 1 𝐼𝐵 𝑅𝐸 − 𝑉𝐵𝐵 = 0 Solving for IB 𝐼𝐵 = 𝑉𝐶𝐶 −𝑉𝐵𝐵 𝑅𝐵 +(𝛽+1)𝑅𝐸 KVL at loop 2 +𝑉𝐶𝐶 − 𝐼𝐸 𝑅𝐸 − 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 = 0 Since 𝐼𝐸 ≅ 𝐼𝐶 : 𝑉𝐶𝐶 = 𝑉𝐶𝐶 − 𝐼𝐶 (𝑅𝐶 + 𝑅𝐸 ) Also 𝑉𝐶𝐶 = 𝑉𝐶 − 𝑉𝐸 𝑉𝐸 = 𝐼𝐸 𝑅𝐸 𝑉𝐶 = 𝑉𝐶𝐶 + 𝑉𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 𝑉𝐵 = 𝑉𝐶𝐶 − 𝐼𝐵 𝑅𝐵 = 𝑉𝐵𝐵 + 𝑉𝐸 .

Load Line for Emitter-bias circuit From equation (2) 𝑉𝐶𝐶 = 𝑉𝐶𝐶 − 𝐼𝐶 (𝑅𝐶 + 𝑅𝐸 ) The end points of the load line are: 𝑉𝐶𝐶 = 𝑉𝐶𝐶 � 𝐼𝐶=0𝑚𝑚 𝐼𝐶𝐶𝐶𝐶 𝑉𝐶𝐶 = � 𝑅𝐶 + 𝑅𝐸 𝑉 𝐶𝐶=0𝑉 .

so for all practical purposes we say that IE approximately equals IC.  The current in the base-emitter circuit is much smaller. 2 current path between point A and ground: one through R2 and the other through BE junction and RE.  Vcc is dc collector supply voltage.Voltage-Divider Bias  Voltage-divider bias is the most widely used type of bias circuit. IE≈ IC ..  DC bias voltage at base of transistor is developed by a resistive voltage-divider consists of R1 and R2.

• There are two ways of analyzing the voltage divider bias circuit :• 1.Voltage-Divider Bias • This is a very stable bias circuit. Exact analysis • 2. Approximate analysis . • The currents and voltages are almost independent of variations in β.

Voltage Divider Bias For the Voltage Divider Bias configurations • Draw Equivalent Input circuit • Draw Equivalent Output circuit • Write necessary KVL and KCL Equations • Determine the Quiescent Operating Point .

1. Exact Analysis Step 1 : Redraw circuit Step 3 : Replace thevenin equivalent circuit Step 2 : find thevenin equivalent circuit Step 4 : Apply KVL to determine IB and VCE 𝑉𝑇𝑇 − 𝐼𝐵 𝑅𝑇𝑇 − 𝑉𝐵𝐵 − 𝐼𝐸 𝑅𝐸 = 0 Substitute 𝐼𝐸 = (𝛽 + 1)𝐼𝐵 𝑉𝑇𝑇 − 𝑉𝐵𝐵 𝐼𝐵 = 𝑅𝑇𝑇 + (𝛽 + 1)𝑅𝐸 𝑅𝑇𝑇 = 𝑅1 //𝑅2 𝑉𝑇𝑇 = 𝑉𝑅𝑅 𝑅2 𝑉𝐶𝐶 = 𝑅1 + 𝑅2 𝑉𝐶𝐶 = 𝑉𝐶𝐶 − 𝐼𝐶 (𝑅𝐶 + 𝑅𝐸 ) .

𝐼𝐸 = 𝑅1 + 𝑅2 𝑅𝐸 And 𝐼𝐶𝐶 ≅ 𝐼𝐸 Apply KVL at output loop: 𝑉𝐶𝐶 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝐼𝐸 𝑅𝐸 Substitute 𝐼𝐶𝐶 ≅ 𝐼𝐸 𝑉𝐶𝐶 = 𝑉𝐶𝐶 − 𝐼𝐶 (𝑅𝐶 +𝑅𝐸 ) . So approx. I1 ≅ I2 Testing βRE ≥ 10R2. IB < I2. If satisfied 𝑅2 𝑉𝐶𝐶 𝑉𝐸 𝑉𝐵 = . 𝑉𝐸 = 𝑉𝐵 − 𝑉𝐵𝐵 .2. Approximate Analysis Used for circuit that have a very small IB due to large resistance between base and ground. If Ri ≥ R2.

required negative collector supply voltage or with a positive emitter supply voltage. The analysis of pnp is basically the same as npn. To obtain pnp. .Voltage-Divider Bias for PNP Transistor Pnp transistor has opposite polarities from npn.

• And.  R 1 VB =  R +R β R DC E 2  1 V E = V B + V BE IE V EE − V E = RE VC = I C RC V EC = V E − VC  V EE   .Analysis of voltage bias for pnp transistor • Base voltage • Emitter voltage • By Ohm’s Law.

In this bias circuit the Q-point is only slightly dependent on the transistor beta.Collector Feedback configuration Another way to improve the stability of a bias circuit is to add a feedback path from collector to base. . β.

Base – Emitter Loop Solve for IB KVL at input loop: 𝑉𝐶𝐶 − 𝐼𝐶′ 𝑅𝐶 − 𝐼𝐵 𝑅𝐵 − 𝑉𝐵𝐵 − 𝐼𝐸 𝑅𝐸 = 0 Where IB ≤ IC. 𝐼𝐸 ≅ 𝐼𝐶 Knowing IC = βIB and IE ≅ IC. so approx. the loop equation becomes: 𝑉𝐶𝐶 − 𝛽𝐼𝐵 𝑅𝐶 − 𝐼𝐵 𝑅𝐵 − 𝑉𝐵𝐵 − 𝛽𝐼𝐵 𝑅𝐸 = 0 Solving for 𝐼𝐵 𝑉𝐶𝐶 − 𝑉𝐵𝐵 𝐼𝐵 = 𝑅𝐵 + 𝛽(𝑅𝐶 + 𝑅𝐸 ) .: IC′ = 𝐼𝐶 + 𝐼𝐵 ≅ 𝐼𝐶 = 𝛽𝐼𝐵 .

Collector Emitter Loop KVL at output loop: 𝐼𝐸 𝑅𝐸 + 𝑉𝐶𝐶 + 𝐼𝐼𝐶 𝑅𝐶 − 𝑉𝐶𝐶 = 0 Since IC′ ≅ IC as IB=0 and IC = βIB: 𝐼𝐶 (𝑅𝐶 +𝑅𝐸 ) + 𝑉𝐶𝐶 − 𝑉𝐶𝐶 = 0 Solving for VCE: 𝑉𝐶𝐶 = 𝑉𝐶𝐶 − 𝐼𝐶 (𝑅𝐶 + 𝑅𝐸 ) .

we obtained the base current Qpoint – We then applied KVL to the collector-emitter circuit and using load line analysis on the collector-emitter characteristics.BJT DC Analysis .Summary • Calculating the Q-point for BJT is the first step in analyzing the circuit • To summarize: – We ignored the AC (variable) source • Short circuit the voltage sources • Open Circuit the current sources – We applied KVL to the base-emitter circuit and using load line analysis on the base-emitter characteristics. we obtained the collector current and voltage Q-point • This process is also called DC Analysis • We now proceed to perform AC Analysis .

. Knowing these voltages is a requirement before logical troubleshooting can be applied. We will discuss some of the faults and symptoms.Troubleshooting Shown is a typical voltage divider circuit with correct voltage readings.

Emitter voltage goes down to 0 V. Collector voltage goes up to 10 V(VCC). Base voltage goes down to 0 V.Troubleshooting R1 Open With no bias the transistor is in cutoff. .

Base reading voltage will stay approximately the same. Emitter voltage will be approximately the base voltage + . Collector voltage goes up to 10 V(VCC).7 V. .Troubleshooting Resistor RE Open: Transistor is in cutoff.

Base voltage stays approximately the same. . Collector voltage goes up to 10 V(VCC). Emitter voltage goes down to 0 V.Troubleshooting Base Open Internally: Transistor is in cutoff.

. Collector voltage goes up to 10 V(VCC) Emitter voltage goes down to 0 V. Base voltage stays approximately the same.Troubleshooting Open BE Junction: Transistor is in cutoff.

Collector voltage will drop to . Emitter voltage will drop to .41 V because of current flow from forward-biased collector-base junction.41 V because of small current flow from forward-biased base-emitter junction.11 V because of more current flow through the emitter.RC Open: Troubleshooting Base voltage goes down to 1. .

.  The dc load line helps to establish the Q-point for a given collector current.  The Q-point is the best point for operation of a transistor for a given collector current.Summary  The purpose of biasing is to establish a stable operating point (Q-point).  The linear region of a transistor is the region of operation within saturation and cutoff.