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Analog Circuits by Kanodia

DIODE CIRCUITS_EX

EXAMPLE 1.1

Consider the circuit with two diodes as shown in Figure. Diode D1


is Ge diode with cut-in voltage Vg = 0.2 V while D2 is Si diode with
cut-in voltage Vg = 0.6 V . The forward dc resistances of diodes D1 and
D2 are 20 W and 15 W, respectively. Determine the current through
diodes when
(a) R = 10 kW , and
(b) R = 1 kW .
SOLUTION :

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In this problem we follow the methodology of analysis of diode circuits


discussed in Section 3.3. Let currents through diode D1 and D2 be I1
and I2 as shown in the Figure.
(a) When R = 10 kW

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Step 1: First we assume that both diodes D1 and D2 are in forward


biased mode.

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Step 2: We replace both the diodes by their piecewise linear equivalent


model as shown in the figure.

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Step 3: Now the resultant circuit is simple resistive circuit with dc


sources. We can apply KVL and KCL in the resultant circuit.
Writing KVL in first half loop, we get
- 100 + 10_I1 + I2i + 0.02I1 + 0.2 = 0

10.02I1 + 10I2 = 99.8


Writing KVL in second half loop, we get

...(i)

- 0.02I1 - 0.2 + 0.6 + 0.015I2 = 0


0.02I1 - 0.015I2 = 0.4
Solving Eq (i) and (ii), we get,

...(ii)

I1 = 15.692 mA
I2 =- 5.743 mA
Step 4: Now we verify our initial assumption that diode is ON.
(i) Since I1 is positive (current through diode is from p to n ),
diode D1 is On and our assumption is true.
(ii) Since I2 is negative, our initial assumption that D2 is ON is
incorrect. Hence we conclude that D2 is OFF.
Step 5: Now, we repeat the analysis by assuming that D2 is OFF.
Since D2 is OFF, I2 = 0 . Substituting I2 = 0 in Eq (i), we get

While writing KVL in the first half loop, note


that current through R is _I1 + I2i . Also in
Eq (i) and (ii) all resistances are in kW and
currents are in mA.

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10.02I1 + 10 # 0 = 99.8
I1 = 9.96 mA
Step 6: Again we verify our assumption that D1 is ON and D2 is OFF.
Since I1 is positive, D1 is ON. To confirm that diode D2 is indeed
OFF, we find the voltage across it. By writing KVL in the second
half loop, we get
- 0.02I1 - 0.2 + VD2 = 0

- 0.02 _9.96i - 0.2 + VD2 = 0


Since diode D2 is Si diode and forward voltage across it is less than
cut-in voltage (0.6 V in this example), diode D2 is indeed OFF.
Hence, our second assumption is true and current through diodes are
I1 = 9.96 mA and I2 = 0 .
(b) When R = 1 kW
Again, first we assume that both diodes D1 and D2 are in forward
biased mode. Writing KVL in the first half loop, we get
- 100 + 1_I1 + I2i + 0.02I1 + 0.2 = 0

1.02I1 + I2 = 99.8
Writing KVL in the second half loop, we get

...(iii)

- 0.02I1 - 0.2 + 0.6 + 0.015I2 = 0


0.02I1 - 0.015I2 = 0.4
Solving Eq (iii) and (iv), we get

...(iv)

I1 = 53.74 mA

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and
I2 = 44.99 mA
Since both currents are positive, our initial assumption that diodes
D1 and D2 are ON is correct. However we can verify this by finding
voltages across the diodes. If we calculate the voltages across diodes
D1 and D2 , they are
VD1 = 0.02I1 + 0.2

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= 0.02 # 53.74 + 0.2 = 1.2748 V

VD2 = 0.015I2 + 0.6

= 0.015 # 44.99 + 0.6 = 1.2748 V


Since voltage across both the diode VD1 and VD2 are positive, both the
diodes are forward biased and our assumption is true.
EXAMPLE 1.2

The circuit shown in Figure consists of two identical silicon diodes


each having a forward dc resistance of 30 W and cut-in voltage 0.6 V.
Find the value of output voltage _Vo i for the following values of input
voltages
(a) V1 = V2 = 5 V
(b) V1 = 0 , V2 = 5 V
(b) V1 = 5 V , V2 = 0
(c) V1 = V2 = 0

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SOLUTION :

We can see that anode of diode D1 is connected to + 5 V through


a resistor of 4.7 kW. To make D1 forward biased, voltage V1 should
always be less than 5 - 0.7 = 4.3 V . Similarly, to make diode D2
voltage V2 should be less than 4.3 V. Now, we analyze the circuit for
different inputs.
(a) When V1 = V2 = 5 V , there is not enough voltage across D1 and D2
to forward bias them. Hence both D1 and D2 are reversed biased and
currents though both of them is zero as shown in the Figure.
Hence,
I1 = I2 = 0
Since there is no current through 4.7 kW resistor, there is no
voltage drop across resistor R and Vo = 5 V .
(b) V1 = 0 , V2 = 5 V
For this case, we know that diode D2 will be OFF and diode
D1 will be ON. So, diode D2 can be replaced by an open circuit and
D1 by its piecewise equivalent model. The equivalent circuit can be
drawn as shown in Figure.

Writing KVL in the loop, we get

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5 - 4.7I - 0.03I - 0.06 - 0.33I = 0


So,
I = 4.4 V = 0.869 mA
5.06 K
To find Vo , we write another KVL expression including Vo .

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5 - 4.7I - Vo = 0
So,

Vo = 5 - 4.7I

= 5 - _4.7i_0.869i = 0.915 V

(c) V1 = 5 V , V2 = 0 V
In this case diode D1 will be OFF and D2 will be ON. So we can
replace D1 by an open circuit and D2 by its piecewise linear equivalent
model. Therefore, the resultant circuit becomes exactly same as that
of case (b). Hence, output Vo = 0.915 V
(d) V1 = 0 V , V2 = 0 V
In this case both the diodes D1 and D2 will be ON, so we replace them
by their piecewise linear equivalent model. The resultant circuit is
shown in Figure below.

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We can see that both the parallel branches have same resistance
and sources, so current through them will be equal. Due to this
symmetry we assume that current through each parallel branch is I
and therefore current through 4.7 kW resistance would be 2I . Writing
KVL around the upper loop only, we get
5 - 2IR - 0.030I - 0.6 - 0.33I = 0

5 - 2I_4.7i - 0.03I - 0.6 - 0.33I = 0

I_2 # 4.7 + 0.03 + 0.33i = 5 - 0.6


So,
I = 4.4 = 0.45 mA
9.76
To find Vo for this condition, we write another KVL expression
containing Vo . This gives,
5 - 2IR - Vo = 0

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Vo = 5 - 2IR

= 5 - 2 # 0.45 # 4.7 = 0.77 V


EXAMPLE 1.3

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For the circuit shown in Figure, determine:


(a) the current through 22 W resistance
(b) the value of dc voltage to be inserted in series with 22 W resistance
so that current through it becomes zero
Assume diodes D1 and D2 are identical Si diodes with cut-in voltage
Vg = 0.6 V and forward resistance rf = 10 W

SOLUTION :

We follow the methodology of analysis of diode circuits discussed in


Section 3.3.
Step 1: First we assume that both diodes D1 and D2 are in forward
biased mode.
Step 2: We replace both the diodes by their piecewise linear equivalent
model as shown in the figure. Let currents in loop I and loop II be I1
and I2 respectively. Also, I1 and I2 are the current through diode D1
and D2 respectively.

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Step 3: Now the resultant circuit is simple resistive circuit with dc


sources. We can apply KVL and KCL in the resultant circuit.
Writing KVL in loop I, we get
4 - 18I1 - 10I1 - 0.6 - 47_I1 - I2i = 0

I1 _18 + 10 + 47i - 47I2 = 3.4

75I1 - 47I2 = 3.4


Similarly, writing a KVL equation for loop II, we get,

...(i)

- 10I2 - 0.6 - 22I2 - 47_I2 - I1i = 0

47I1 - I2 _47 + 10 + 22i = 0.6


47I1 - 79I2 = 0.6

I1 = 0.06469 A . 64.7 mA

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...(ii)

Solving Eq (i) and (ii), we get

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I2 = 0.03089 A . 31 mA
Step 4: Now we verify our initial assumption that diode D1 and D2
are ON. Since both I1 and I2 are positive, diode D1 and D2 are ON
and our assumption is true. Hence, current through 22 W resistance
is I2 . 31 mA .

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(b) Now, we insert a voltage source Vx in series with 22 W resistor such


that current I2 = 0 .

Writing KVL in the loop I, we get


or

4 - 18I1 - 10I1 - 0.6 - 47_I1 - I2i = 0

Substituting I2 = 0 , we get,

75I1 - 47I2 = 3.4


I1 = 3.4 = 45.33 mA
75

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Applying KVL for loop II, we get,


-_10 # 0i - 0.6 - _22 # 0i - Vx + 47I1 = 0

Vx = 47I1 - 0.06

Substituting I1 = 0.04533 A , we get,


Vx = 1.53 V
EXAMPLE 1.4

The circuit shown in Fig// contains two identical Si diodes with cutin voltage Vg = 0.7 V and zero forward resistance. Determine the
diode current I1 , I2 and output voltage Vo , if the input
(a) Vi = 0 and
(b) Vi = 4 V
SOLUTION :

(a) Vi = 0
Step 1 : First we guess the states of diodes. From the applied polarity
of source. We assume that both D1 and D2 are forward biased.
Step 2 : We replace both the diode by their simplified equivalent
model. The resultant circuit is as shown in figure.
Step 3 : Now the resultant circuit is simple resistive circuit with dc
sources. We can apply KVL and KCL in the circuit. By writing KVL
in the left half loop.
- 0.7 - 10k _I1 + I2i + 5 = 0

10I1 + 10I2 = 5 - 0.7

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I1 + I2 = 0.43 mA
By writing KVL in the second half loop

...(i)

5 - _5k i I2 - 0.7 - 10k _I2 + I1i + 5 = 0

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10I2 + 10I1 + 5I2 = 10 - 0.7


10I1 + 15I2 = 9.3

I1 + 1.5I2 = 0.93 mA
Solving Eq. (i) and (ii), we get

...(ii)

I1 = 0.57 mA

I2 = 1 mA
Step 4 : Now, we verify our initial assumption that diode both diodes
D1 and D2 are ON. Since current through I1 is negative, our assumption
that D1 is ON is incorrect. However, I2 is positive so D2 is ON.
Step 5 : Now we repeat the analysis by assuming that D1 is OFF and
D2 is ON. Since D1 is OFF I1 = 0 . D1 can be replaced by an open
circuit as shown in figure.
By applying KVL
5 - _5k i I2 - 0.7 - _10k i I2 + 5 = 0

_15k i I2 = 10 - 0.7
I2 = 9.3 = 0.62 mA
15k
Output voltage can be obtained by writing KVL including V0 .

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V0 + 5I2 - 5 = 0
V0 = 5 - 5I2

= 5 - 5_0.62i

= 1.9 V
Thus for Vi = 0 , we have I1 = 0 , I2 = 0.62 mA , V0 = 1.9 V
(b) Vi = 4 V
Step 1 : Again, we assume that both D1 and D2 are forward biased.
Step 2 : We replace both the diodes by their simplified equivalent
circuit as shown in the figure.

Step 3 : Writing KVL in the first half loop, we get


4 - 0.7 - _10k i_I1 + I2i + 5 = 0

10I1 + 10I2 = 9 - 0.7

I1 + I2 = 0.83 mA
Writing KVL in the second half loop we get
5 - _5k i I2 - 0.7 - _10k i_I1 + I2i + 5 = 0

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10I1 + 15I2 = 10 - 0.7

I1 + 1.5I2 = 0.93 mA
Solving Eq. (i) and (ii), we get

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...(i)

...(ii)

I1 = 0.63 mA

I2 = 0.2 mA
Step 5 : Since both I1 and I2 are positive, our assumption that D1 and
D2 are ON is true.
Output voltage can be obtained by writing KVL,
V0 + 5I2 - 5 = 0
V0 = 5 - 5I2

= 5 - 5_0.2i

=4V
EXAMPLE 1.5

The diodes in the circuit shown in Figure have piecewise linear


parameters of Vg = 0.6 V and rf = 0 . Find the diode current I1 , I2 and
output voltage Vo for the following input combinations:
(a) V1 = 10 V , V2 = 0
(b) V1 = 10 V , V2 = 5 V
(c) V1 = V2 = 10 V

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SOLUTION :

(a) V1 = 10 V , V2 = 0
Step 1 : We can assume that is this case diode D1 is forward biased
and D2 is reverse biased.
Step 2 : Replace D1 by piecewise linear model and D2 by an open
circuit. The resultant circuit is shown in figure. Current through D2
is I2 = 0 .

Step 3 : Writing KVL in the upper half loop.


10 - 0.5I1 - 0.6 - 9.5I1 = 0
10I1 = 10 - 0.6
I1 = 9.4 = 0.94 mA
10k
Since I1 obtained by the assumption that D1 is ON and D2 is OFF, is
positive. Our assumption is true.
Output voltage

V0 = _9.5k i_I1i

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= 9.5 # 0.94 = 8.93 V

(b) V1 = 10 V , V2 = 5 V
Step 1 : Since V1 and V2 are positive, in the circuit cathodes of Diode
D1 and D2 are also positive with respect to their anodes. Hence we
assume both D1 and D2 are forward biased.
Step 2 : By replacing D1 and D2 with their piecewise linear model, we
obtain the equivalent circuit as shown in the figure.

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Step 3 : Writing KVL in upper half loop

10 - _0.5k i I1 - 0.6 - _9.5k i I = 0

10 - _0.5k i I1 - 0.6 - _9.5k i_I1 + I2i = 0


10I1 + 9.5I2 = 10 - 0.6

10I1 + 9.5I2 = 9.4 mA


Writing KVL in the lower half loop

...(i)

5 - _0.5k i I2 - 0.6 - _9.5k i_I1 + I2i = 0


10I1 + 9.5I2 = 5 - 0.6

...(ii)
10I1 + 9.5I2 = 4.4 mA
Step 4 :
We can see that Eq. (i) and (ii) can not be true. It implies that any of
our assumption is not true. Let us assume that D1 is forward biased
and D2 is reversed biased.
Replacing D1 with its piecewise linear model and D2 by its open
circuit we obtain the equivalent circuit as shown in figure.

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By applying KVL in the upper half loop

10 - _0.5k i I1 - 0.6 - _9.5k i I1 = 0

_10k i I1 = 10 - 0.6
I1 = 9.4 = 0.94 mA
10k
Since I1 is positive, our assumption that D1 is ON is true.

Output voltage

V0 = _9.5k i I1

= 9.5 # 0.94 = 8.93 V


(c) V1 = V2 = 10 V
Step 1 : Assume that both diodes D1 and D2 are forward biased.
Step 2 : Replacing D1 and D2 by their piece wise linear model, we
obtain the resulting circuit as shown in figure.

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Since both the parallel branches are identical, current through them
will be equal current through 9.5 kW resistor is therefore I + I = 2I .
Writing KVL in the upper half loop
10 - _0.5k i I - 0.6 - _9.5k i_2I i = 0

_19.5k i I = 10 - 0.6
I = 9.4 = 0.482 mA
19.5k
Thus, current through diodes

I1 = I2 = 0.482 mA

Output voltage

V0 = _9.5k i_2I i

= 9.5 # 2 # 0.482

- 9.16 V

EXAMPLE 1.6

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For the circuit shown in Figure, determine current I1 and output


voltage Vo when
(a) R1 = 5 kW and R2 = 10 kW
(b) R1 = 10 kW and R2 = 5 kW .
Assume diodes D1 and D2 are identical diodes with cut-in voltage
Vg = 0.6 V and forward resistance rf = 0 .

SOLUTION :

(a) R1 = 5 kW , R2 = 10 kW
Step 1 : First we assume that both D1 and D2 are ON.
Step 2 : Replacing D1 and D2 by their simplified equivalent model, we
obtain an equivalent circuit as shown in figure.
Step 3 : By applying KVL in the first half loop
10 - _5k i I1 - 0.6 = 0
I1 = 10 - 0.6 = 1.88 mA
5k
Applying KVL in second half loop
0.6 - 0.6 - _10k i I2 + 10 = 0

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I2 = 10 = 1 mA
10k
Since both ID1 and I2 are positive D1 and D2 are ON and our initial
assumption is true current through diode D1
ID1 = I1 - I2
= 1.88 - 1 = 0.88 mA
(b) R1 = 10 kW , R2 = 5 kW
Step 1 : Again, we assume that both the diodes D1 and D2 are ON.
Step 2 : Replacing D1 and D2 by their simplified equivalent circuit, we
obtain the resultant circuit as shown in the figure.
Step 3 :
Applying KVL in the left half loop, we get
10 - _10k i I1 - 0.6 = 0
I1 = 10 - 0.6 = 0.94 mA
10k
Applying KVL in the second half loop
0.6 - 0.6 - _5k i I2 + 10 = 0

I2 = 2 mA

Current through diode D1


ID1 = I1 - I2

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= 0.94 - 2 =- 1.06 mA
Since ID1 is negative, our assumption that D1 is ON is not true.
Step 4 : Now we perform the analysis again by assuming that D1 is
OFF and D2 is ON. Since D1 is OFF ID1 = 0 . The equivalent circuit
is shown in figure.
Applying KVL

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10 - _10k i I2 - 0.6 - _5k i I2 + 10 = 0

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_15k i I2 = 20 - 0.6
I2 = 19.4 = 1.29 mA
15k

Output voltage

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V0 = _5k i I2 - 10

= _5 # 1.29i - 10 =- 3.55 V

EXAMPLE 1.7

For the circuit shown below determine ID , V1 , V2 and Vo . Assume cutin voltage for Si diode is 0.7 V.
SOLUTION :

The diode is in the on state since the anode has positive potential and
the cathode negative potential. The equivalent circuit is shown below.
Applying KVL to the circuit of Fig. A, we get

20 - 10_ID i - 0.7 - 5_ID i + 6 = 0


ID = 26 - 0.7 = 1.68 mA
10 + 5
V1 = ID _10i = _1.68i_10i = 16.8 V

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V2 = ID _ 5i = _1.68i_ 5i = 8.4 V
From the circuit of Fig. B
ID =

Vo - _- 6i
5

Vo = ID _ 5i - 6 = _1.68i_ 5i - 6 = 2.4 V
Alternatively, applying KVL to the path consisting of Vo , V2 and 6 V
battery we have
Vo - V2 + 6 = 0
Vo = V2 - 6 = 8.4 - 6 = 2.4 V
Step 1 : By observing the polarities of applied source, we assume that
diode D is ON.
Step 2 : Replacing diode with its simplified model, we obtain an
equivalent circuit as shown in figure.
Step 3 : Applying KVL in the circuit
20 - _10k i ID - 0.7 - _5k i ID + 6 = 0

_15k i ID = 26 - 0.7
ID = 25.3 = 1.68 mA
15k
Step 4 : Since ID is positive, out assumption that diode is ON is true.

V1 = _10k i ID = 10 # 1.68 = 16.8 V

V2 = _5k i ID = 5 # 1.68 = 8.4 V

V0 = V2 - 6

= 8.4 - 6 = 2.4 V
EXAMPLE 1.8

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Determine Vo and ID for the circuits shown in Figure (a) and (b).
Assume cut-in voltage for Si diode is 0.7 V.

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SOLUTION :

(a) The diode is assumed to be in the on state. Replacing diode by its


simplified model, we obtain the equivalent circuit as shown in Figure.
Writing KVL in the circuit, we get

- 10 + 0.7 + _5 ki ID = 0

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ID = 9.3 = 1.86 mA
5k
Rewriting KVL equation using Vo we have
- 10 + 0.7 - Vo = 0
Vo =- 9.3 V
(b) Again, the diode is in the on stage. Replacing diode by its
simplified model, we obtain the equivalent circuit as shown in Figure.
Writing KVL in the circuit, we get
12 - ID _10 k + 5 ki - 0.7 = 0
ID = 11.3 = 0.753 mA
15 k
Rewriting KVL equation using Vo , we get
12 - ID _10 ki - Vo = 0

Vo = 12 - _0.753 # 10i = 4.47 V

EXAMPLE 1.9

For each of the circuits shown in Figure (a) and (B), determine Vo and
ID . Assume the diodes are Si diodes with a cut-in voltage of 0.7 V.

SOLUTION :

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(a) First we convert the current source into its equivalent voltage
source as shown in Figure.

V1 = _20i_ 1 i = 20 V
The diode in the circuit is forward bias, therefore we replace it by

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simplified equivalent model. The resulting circuit is shown in Figure.


Applying KVL, we get
20 - ID _1 ki - 0.7 - ID _2 ki = 0
ID = 19.3 = 6.43 mA
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Output voltage,

Vo = ID _2 ki = _6.43i_ 2i = 12.86 V

(b) In this circuit cathode of diode is connected to + 20 V and its


anode is at - 5V , so we can assume that diode is in forward bias
mode. Replacing diode by its simplified model, we obtain an equivalent
circuit as shown in Figure.
Writing KVL in the circuit, we get
20 - ID _10 ki - 0.7 + 5 = 0
ID = 24.3 = 2.43 mA
10
Again writing KVL equation using Vo , we have

20 - ID _10 ki - Vo = 0
Vo = 20 - _2.43i_10i =- 4.3 V

EXAMPLE 1.10

For each of the circuits shown in Figure (a) and (b), determine ID ,
Vo1 and Vo2 . Given that cut-in voltage for Si diode is 0.7 V and for Ge
diode is 0.3 V.

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SOLUTION :

(a) As we can see, both the diodes are ON in the circuit of Figure(a).
We replace both the diode by their simplified equivalent model as
shown in Figure.
Applying KVL we have

15 - 0.7 - ID _10 ki - 0.3 = 0


ID = 14 = 1.4 mA
10 k

Output voltage,
Vo2 = 0.3 V
Writing KVL equation to the left part of the circuit including Vo1 , we
get

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15 - 0.7 - Vo1 = 0
Vo1 = 14.3 V
(b) Since cathodes of both the diode is negative with respect to
anodes, they are in ON state. Replacing diode by their simplified
model, we obtain the equivalent circuit as shown in figure.
Applying KVL equation to the circuit
- 20 + 0.7 + 0.3 + ID _5 ki + ID _10 ki = 0
ID = 19 = 1.26 mA
15 k
Applying KVL equation to the left part of the circuit, we get
- 20 + 0.7 + 0.3 - Vo1 = 0
Vo1 =- 19 V

Output voltage,

Vo2 =- ID _10 ki =-_1.26i_10i =- 12.6 V

EXAMPLE 1.11

For the circuit shown in Figure, diode D1 is Si diode with Vg = 0.7 V


and D2 is Ge diode with Vg = 0.3 V . Find the current I and voltages
Vo1 and Vo2 .
SOLUTION :

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By seeing the polarity of applied source, we can assume that both the
diode are forward biased. So, we replace them by simplified equivalent
model. The resultant circuit is shown in Figure.
From the equivalent circuit, we have
Vo1 = 0.7 V
and
Current in 10 kW,

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Vo2 = 0.3 V
I1 = 15 - Vo1 = 15 - 0.7 = 1.43 mA
10
10

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Current in 1 kW,

I2 = Vo1 - Vo2 = 0.7 - 0.3 = 0.4 mA


1
1

Since,

I1 = I + I2

(KVL)

I = 1.43 - 0.4 = 1.03 mA


Note that both the currents I1 and I2 are positive, therefore our initial
assumption that D1 and D2 are forward biased is true.
EXAMPLE 1.12

The diodes in the circuit in Figure have piecewise linear parameters of


Vg = 0.7 V and rf = 0 . Find the voltage Vo , and current ID1 .
SOLUTION :

We can see that both the diodes are in the conducting state. Replacing
them by their equivalent circuit, we obtain the circuit as shown in
figure.
From the equivalent circuit, we have
Vo = 0.7 V

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Since both the parallel branches are identical, current through them
will be equal
ID1 = ID2
I = ID1 + ID2
So,

So,

I = 2ID1 = 2ID2
I = 12 - Vo = 12 - 0.7 = 11.3 mA
1k
1k
ID1 = ID2 = I = 5.65 mA
2

EXAMPLE 1.13

Assume the diode D is an ideal silicon diode in the clipping circuit


shown in Figure (a). Determine the output voltage waveform if input
is
(a) sine wave of peak amplitude 15 V as shown in Figure (b).
(b) a square-wave as shown in Figure (c).
SOLUTION :

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Here, we follow the step-by-step problem solving methodology of


analysis of clipping circuits discussed in Section 3.4.
(a) Sine wave input
Step 1: In the first step, we find the input voltage level for which
diode D will be ON. We can see that anode of diode is connected
to + 5 V . In the positive half cycle, polarity of input is as shown in
Figure. Hence vi and VR are aiding each other. The diode D is forward
biased in entire positive half cycle of input.
Output voltage can be obtained by writing KVL in the circuit
vi + 5 - vo = 0
vo = vi + 5 V
Therefore, output voltage is equal to input voltage with a shift
of + 5 V (upwards). In other words, in positive half cycle, Vi changes
between 0 and + 15 V . Hence Vo changes between + 5 V and + 20 V .
or

Step 2: We now identify the input voltage level for which diode D will
be OFF. In the negative half-cycle, when the instantaneous amplitude

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of vi is less than (more negative) than - 5 V , the diode will be OFF.


So, we replace it by an open circuit as shown in Figure. In this case
output will be zero. The input waveform and output waveform are as
shown in Figure.

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(b) Square-wave input


Step 1: We first identify the input voltage level when diode D is ON.
Similar to part (a), for vi > 0 , polarities are such that vi and VR are
aiding each other and the diode D is forward biased. Therefore diode
can be replaced by short circuit as shown in the Figure.
Writing KVL for the loop shown, we get,
vi + 5 - vo = 0

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or,
vo = vi + 5
So input voltage waveform will be shifted upward by + 5 V as shown
in Figure. Since vi changes between 0 and + 15 V , vo changes between
+ 5 V and + 20 V .
Step 2: We now identify the input voltage level when diode D is OFF.
On that when vi =- 10 V , diode will be OFF and acts as an open
circuit as shown in the Figure. Output voltage will be zero in this
case. Input output voltage waveforms are shown in the Figure.

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EXAMPLE 1.14

Assume that diodes D1 and D2 are ideal in the circuit of Figure.


Determine the output voltage waveform when the input voltage is
vi = 8 sin wt V .
SOLUTION :

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Step 1: When vi = 0 , we see that cathode of D1 is at positive potential


than anode. Hence D1 is OFF. Similarly, anode of D2 is at negative
potential than its cathode. Hence D2 is also OFF. This condition will
continue till the instantaneous value of vi is less than 2 V.

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Replace both the diodes D1 and D2 by open circuit as shown in the


Figure. Therefore, input appears same at the output i.e., vo = vi .

Step 2: When instantaneous vi 2 2 V , anode of D1 is more positive


compared to cathode. Therefore, D1 is turned ON. However, D2 is still
OFF as its anode at - 4 V . Replace diode D1 by short circuit and D2
by an open circuit as shown in Figure.

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Writing KVL expression for the left half loop, we get


vi - i1 _10 ki - i1 _10 ki - 2 = 0
i1 _10 + 10i = vi - 2
i1 = vi - 2
20

Output voltage,
vo = i1 (10 k) + 2
Substituting i1 from Eq (i) into Eq (ii), we get
vo = c vi - 2 m_10i + 2
20

...(i)
...(ii)

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...(iii)
vo = 1 vi + 1
2
Therefore, in this condition, each value of input is multiplied by 0.5
and shifted upward by + 1 V . At the peak value of input, vi = 8 V ,
output will be vo = 5 V .
Step 3: In the negative half cycle when - 4 V < vi < 0 , both D1 and
D2 are OFF and replaced by open circuits as shown in Figure. Hence,
the output will be same as input under this range of input.
Step 4: In negative half cycle when vi #- 4 V , anode of diode D2
becomes less negative compared to cathode and it gets forward biased.
However, D1 remains OFF in this input range. Replacing D1 by an
open circuit and D2 by short circuit, we obtain an equivalent circuit
as shown in Figure. Output in this case will be vo =- 4 V .

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The input and output waveforms are shown in fig//.

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EXAMPLE 1.15

The input voltage for the circuit shown in Figure (a) is shown in
Figure (b). Determine the waveform of output voltage vo . Assume
diodes D1 and D2 are Si diodes with Vg = 0.7 V .

SOLUTION :

Step 1: First we determine the input voltage level at which diode


D1 conducts. Since cathode of D1 is at + 5 V , its anode should be
at 0.7 V higher voltage than cathode to become ON, i.e., to make
D1 on; vi $ 5.7 V . Hence, in the positive half cycle of input, when
instantaneous voltage at anode of D1 is more than 5.7 V, diode D1
will be ON. However, for this input range, diode D2 will be OFF,
since its anode is at - 5 V and input is in positive half cycle.

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Replacing D1 by is simplified model and D2 by an open circuit,


we obtain the equivalent circuit as shown in Figure. Therefore, the
output will be
vo = 5 + 0.7 = 5.7 V
Step 2: We now find the input voltage level for which diode D2
conducts. Since anode of D2 is at - 5 V , its cathode should be at a
potential 0.7 V below this (more negative). Thus, when instantaneous
input reaches - 5 - 0.7 =- 5.7 V in the negative half cycle, diode D2
will be ON. However, diode D1 will not be ON in the negative half
cycle of input.
Replace D2 by its simplified model and D1 by an open circuit as
shown in Figure. Therefore, the output will be

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vo =- 5 - 0.7 =- 5.7 V

Step 3: Note that in positive half cycle when the input vi < 5.7 , both
the diodes D1 and D2 are off and acts as open circuit as shown in
Figure. Therefore, for this input range output vo = vi .
Step 4: Similarly in the negative half cycle when the input - 5.7 < vi < 0
, both the diodes D1 and D2 are off and acts as open circuit as shown
in Figure. Therefore, also for this input range output vo = vi . The
input output waveforms are shown in Figure.

EXAMPLE 1.16

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The diodes shown in Figure are assumed to be ideal.


(a) Plot transfer characteristic of the circuit showing all intercepts
and slopes.
(b) If an input voltage of vi = 40 sin wt is applied to the circuit, find
the values of wt at which diode D2 starts and stops conducting
in a cycle.

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SOLUTION :

(a) We can see that in positive half cycle, diode D1 is forward biased.

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Since it is an ideal diode, it Can be replaced by a short circuit. The


resulting equivalent circuit is shown in figure.

Now, the circuit to the left of points A and B can be replaced by its
Thevenin equivalent. Thevenin voltage and resistance can be obtained
by the circuits of Figure and Figure respectively.
Thevenin Voltage,
vTh = 10 vi = 20 sin wt
10 + 10
Thevenin Resistance,

RTh = 10 k + _10 k || 10 ki = 15 k

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The resultant equivalent circuit is shown in Figure.

Now the equivalent circuit becomes as the circuit of a simple


parallel-biased clipper circuit. If VTh < 10 V (i.e. vi is less than 20 V
), diode D2 is OFF and acts as open circuit. Therefore output will be
vo = vTh = 20 sin wt .
When vTh exceeds 10 V (i.e., vi exceeds 20 V), diode D2 conducts
and the output will be clipped off at 10 V.
In negative half cycle of input, both D1 and D2 are off and act
as an open circuit. Hence output voltage vo = 0 . Thus, the transfer
characteristic of the circuit is as shown in Figure.

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(b) The output waveform can be obtained by superimposing input


waveform on transfer characteristic. As explained,
For 0 < vi < 20 V ,

vo = vi

For vi > 20 V ,

vo = 10 V

For vi < 0 ,
vo = 0
Figure// shows input waveform, VTh waveform and output waveform
vo . As seen from figure, D2 starts conducting when vo = 10 V , i.e.,
when vTh = 20 sin wt
Therefore,

wt1 = 30c

D2 stops conducting when vo = 10 V


i.e.,

wt2 = 90 + sin -1 _0.5i = 120c

EXAMPLE 1.17

The triangular waveform shown in Figure (a) is applied to clipping


circuit of Figure (b). D1 and D2 are silicon diodes with Vg = 0.7 V and
rf = 0 . Draw the output waveform of the circuit.

SOLUTION :

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Step 1: By observing the polarities of reference voltages, we can see


that in positive half cycle of input, diode D1 does not conduct till vi
exceeds 5.3 + 0.7 = 6 V . Diode D2 does not conduct in entire positive
half cycle as its cathode remains positive w.r.t. anode. Therefore, for
the input range 0 < vi < 6 V both the diodes are OFF and act as
open circuit as shown in Figure. The output in this case,
vo = vi

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Step 2: When vi 2 6 V in positive half cycle of input, D1 conducts. D2


is still OFF. Therefore, the equivalent circuit for this range of input
voltage (vi > 6 V ) is as shown in Figure. From the circuit we can see
that the output voltage is clipped-off to + 6 V .

Step 3: During the negative half cycle, when vi becomes more negative
then - 7.3 - 0.7 =- 8 V , D2 conducts. However, D1 will be OFF in
the entire negative half cycle. The equivalent circuit for this input
range is shown in Figure.

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Step 3: Note that in negative half cycle, when the input - 8 V < vi < 0
, both diode are OFF in this condition also and output is same as
input. The input output voltages are shown in Figure below.
EXAMPLE 1.18

The input waveform shown in Figure (a) is applied to the clipper


circuit of Figure (b). Draw the transfer characteristic of the circuit if
(a) the diode D is ideal
(b) diode D is a practical diode with parameters Vg = 0.5 V and
Rf = 40 W

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SOLUTION :

(a) When the diode is ideal


Step 1 : First we obtain Thevenin equivalent of the circuit across the
branch containing diode and 5 V source.
Thevenin Voltage _vTh i :
Thevenin voltage or open circuit voltage vTh can be obtained from the
circuit shown in figure.
50
v = 1v
vTh =
50 + 200 i 5 i
Thevenin Resistance _RTh i :
Thevenin resistance is obtained when the input vi is short circuited
as shown in the figure.
Writing nodal equation at output
v0 - vTh + v0 - 5.5 = 0
40
40
2v0 = vTh + 5.5
v0 = 1 vTh + 2.75
3
(vTh = 1/5vi )
v0 = 1 vi + 2.75
10
Diode will be OFF when

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vTh < 5.5 V


1 v < 5.5
or
5 i
vi < 27.5 V
In that case, diode acts as an open circuit and output
v0 = vTh = 1 vi
5
So,
when vi H 27.5 V
v0 = 1 vi + 2.75 V ,
10
when vi < 27.5 V
v0 = 1 vi ,
5
(b) When the diode is a practical diode with Vg = 0.5 V and rf = 40 W
Again we consider the circuit including Thevenin equivalent
Diode will be ON when

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vTh H 5 + 0.5

or
vTh H 5.5 V
In that case, diode can be replaced by its piecewise linear model as
shown in figure.

RTh = 200 W || 50 W = 40 W

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Step 2 : Now, the equivalent circuit becomes as shown in figure

Note that diode will be ON when


vTh H 5 V
1
or
v H5V
5 i
vi H 25 V
Therefore when vi H 25 V , diode becomes ON and acts as short circuit
as shown in figure. The output will be
v0 = 5 V

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Step 3 : Diode is OFF if vTh < 5 V


1v < 5
or
5 i
vi < 25 V
In this condition, diode acts as an open circuit as shown in figure
output will be
v0 = vTh = 1 vi
5
So,
v0 = 5 V , when vi H 25 V
v0 = 1 vi , when vi < 25 V
5
The transfer characteristics is shown in figure.

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The transfer characteristics can be drawn as shown in figure.

EXAMPLE 1.19

Consider a diode clipper circuit as shown in Figure. The diodes are


assumed to be ideal and a sinusoidal voltage of peak magnitude of
15 V is applied to the circuit. Draw
(a) transfer characteristics
(b) output voltage waveform vo
SOLUTION :

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Step 1 : In the positive half cycle when vi < 3 V , D1 is OFF and D2 is


ON. Therefore the equivalent circuit is as shown in figure.
Writing node equation at output
v0 - 3 + v0 - 10 = 0
10k
20k

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2v0 - 6 + v0 - 10 = 0
So,
v0 = 16 V = VA
3
Step 2 : We can see from the figure that D1 will remain OFF until
vi < VA or vi < 163 V . We can also verify this by knowing the directions
of current. This can be calculated as follows :
Let D1 starts conducting and D2 is also forward biased. So the
equivalent circuit is shown as below.

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In this case

vi = VA
I1 = vi - 3 + vi - 10
10k
20k

I1 = vi c 3 m - c 16 m
20
20
If D1 will be forward biased then I1 > 0
So
vi c 3 m - c 16 m > 0
20
20
vi > 16 V
3
So, when vi > 16 V , v0 = vi
(D1 ON, D2 ON)
3
(D1 OFF, D2 ON)
and, when vi < 16 V , v0 = 16 V
3
3
Step 3 : From the figure // we can see that D2 will remain ON until

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vi < 10 V . when vi > 10 V D2 will be reverse biased. We can also


verify this by knowing the direction of current through D2 .
I2 = 10 - vi < 0
20k
vi > 10 V
In that case circuit becomes as shown figure.
So, When vi > 10 V , v0 = 10 V
(D1 ON, D2 OFF)
Step 4 :
Note that in entire negative half cycle D1 will be OFF and D2 will be
ON, So
v0 = 16 V
3
Transfer characteristics :
From the result of step 1-4, we summarize
v0 = 16 V , when vi < 16 V
3
3
16
v0 = vi , when
V < vi < 10 V
3
v0 = 10 V , when vi > 10 V
Transfer characteristics can be drawn as shown in figure.

Output voltage :

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EXAMPLE 1.20

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The clipping circuit shown in Figure contains ideal diodes D1 and D2 .


If the input voltage varying from 0 to 120 V in time 0 to T as shown
in Figure (b), determine the transfer characteristics for the circuit.

SOLUTION :

Step 1 : From the figure we can see that as input increase from 0
to 120 V, first diode D2 will start conducting because its cathode
is connected at a less voltage (15 V) as compared to cathode of D2
_75 Vi .
Step 2 : We find the input level for which D2 starts conducting. Let D1
is OFF is this input range. The equivalent circuit is shown in figure.
Current through D2
I2 = vi - 15 = vi - 15
100 + 200
300
For D2 to ON, I2 should be positive
I2 > 0
vi - 15 > 0
or
300
vi > 15 V
In this case, output will be

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v0 = vi - 100I2
= vi - 100 c vi - 15 m
300
So, when vi > 15 V
( D1 OFF, D2 ON)
v0 = 2 vi + 5
3
Step 2 : Note that for vi < 15 V , both D1 and D2 are OFF and the
equivalent circuit is shown in figure.
So,
(D1 OFF, D2 OFF)
v0 = 15 V , when vi < 15 V
Step 3 : Now we find the input level at which D1 also starts conducting.
If both D1 and D2 are conducting, equivalent circuit becomes as shown
in figure,
Writing node equation
I1 + I2 + 75 - vi = 0
100
I1 + 75 - 15 + 75 - vi = 0
200
100

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I1 + 60 + 75 - vi = 0
200
100
I1 + 60 + 150 - 2vi = 0
200
I1 + 210 - 2vi = 0
200
I1 = 2v1 - 210
200
D1 conducts, if I1 is positive, so
I1 > 0
2vi - 210 > 0
200
vi > 105 V

or

So, when
vi = 105 V , v0 = 75 V
From the results of step 1-4, we have

(D1 ON, D2 ON)

for vi < 15 V ,

(D1 OFF, D2 OFF)


v0 = 15 V
2
(D1 OFF, D2 ON)
for 15 V < vi < 105 V , v0 = vi + 5
3
for vi > 105 V ,
(D1 ON, D2 ON)
v0 = 75 V
The transfer characteristics can be drawn as shown in figure.

EXAMPLE 1.21

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Draw the output vo of the circuit shown in Figure (a) for a sinusoidal
input shown in Figure (b). Assume the diodes are ideal.

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SOLUTION :

Step 1: First we determine the input voltage level at which diode


D1 conducts. Since cathode of D1 is at + 5 V , its anode should be at
a voltage higher than cathode to become ON, i.e., to make D1 on;
vi $ 5 V . Hence, in the positive half cycle of input, when instantaneous
voltage at anode of D1 is more than 5 V, diode D1 will be ON. However,
for this input range, diode D2 will be OFF, since its anode is at - 3 V
and input is in positive half cycle.
Replacing D1 by short circuit and D2 by an open circuit, we
obtain the equivalent circuit as shown in Figure. Therefore, the
output will be
vo = 5 V , for vi $ 5 V
Step 2: We now find the input voltage level for which diode D2
conducts. Since anode of D2 is at - 3 V , its cathode should be at a
potential below (more negative) than - 3 V . Thus, when instantaneous
input reaches - 3 V in the negative half cycle, diode D2 will be ON.
However, diode D1 will not be ON in the negative half cycle of input.
Replace D2 by its simplified model and D1 by an open circuit as
shown in Figure. Therefore, the output will be
vo =- 3 V , for vi #- 3 V
Step 3: Note that in positive half cycle when the input vi < 5 V , both
the diodes D1 and D2 are off and acts as open circuit as shown in
Figure. Therefore, for this input range output vo = vi .
Step 4: Similarly in the negative half cycle when the input
- 3 V < vi < 0 , both the diodes D1 and D2 are off and acts as open
circuit as shown in Figure. Therefore, also for this input range output
vo = vi . The input output waveforms are shown in Figure.

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EXAMPLE 1.22

Draw the output voltage waveform for the circuit shown in Figure
(b) if the sinusoidal signal shown in Figure (a) is applied. Given that
cut-in voltage of diode is 0.7 V.

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SOLUTION :

First we find the input voltage level at which diode D starts


conducting. Since cathode of D1 is at + 5 V , its anode should be
at 0.7 V higher voltage than cathode to become ON, i.e., to make
D1 on; vi $ 5.7 V . Hence, in the positive half cycle of input, when
instantaneous voltage at anode of D1 is more than 5.7 V, diode D1
will be ON. The equivalent circuit for this input range is as shown in
Figure. Therefore, vo = 5 + 0.7 = 5.7 V .
However, for vi < 5.7 V in positive half-cycle and for entire
negative half cycle diode does not conduct and acts as an open circuit.
Therefore vo = vi . The output waveform is as shown in figure.

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EXAMPLE 1.23

Consider the circuit shown in Figure//. Given that cut-in voltage of


diode is Vg = 0 and zener voltage is VZ = 3 V . For the input range of
- 10 # vi # + 10 V , plot
(a) vo versus vi
(b) current i1 versus vi
SOLUTION :

(a)
(i) For - 10 # vi # 0 , both diodes are conducting, so the equivalent
circuit is as shown in Figure. The output in this input range is
vo = 0 .

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(ii) For 0 # vi # 3 , Zener diode is in reverse bias but since the


applied voltage is less than zener breakdown voltage VZ , it will
not breakdown and acts as an open circuit as shown in Figure.
However, diode D will be OFF in this condition.
Current,

i1 = 0 ,

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vo = 0

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(iii) For vi 2 3 , zener diode goes into breakdown and acts as a voltage
source of 3 V with polarity as shown in Figure. Diode D remains
OFF in this condition as its cathode becomes positive w.r.t. its
anode.

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Applying KVL in the loop, we get


or

vi - i1 _10 ki - 3 - i1 _10 ki = 0
i1 = vi - 3 mA
20

Output voltage,

vo = 10i1 = c vi - 3 m_10i
20

= 1 vi - 1.5
2
At vi = 10 V , vo = 3.5 V , i1 = 0.35 mA
Using above results we can draw the transfer characteristics of the
circuit as shown in Figure below.
(b) For vi 1 0 , both diodes forward biased. The equivalent circuit is
as shown in Figure. From the circuit,
i1 = vi - 0
10
At vi =- 10 V ,

i1 =- 1 mA

For 0 # vi # 3 ,

i1 = 0
i1 = vi - 3
20

For vi 2 3 ,
At vi = 10 V ,

i1 = 0.35 mA

Therefore, the current

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EXAMPLE 1.24

The diode in the circuit of Figure has piecewise linear parameters


Vg = 0.7 V and rf = 10 W . Plot vo versus vi for - 30 V # vi # 30 V .
SOLUTION :

(a) First we find the input voltage level at which diode D starts

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conducting. Since cathode of D1 is at + 10 V , its anode should be at


0.7 V higher voltage than cathode to become ON, i.e., to make D1
on; vi $ 10.7 V . The equivalent circuit for this input range is as shown
in Figure.
Writing node equation at the output
vo - vi + vo - 10.7 = 0
100
10
vo - vi + 10vo - 107 = 0
11vo = vi + 107
So,
vo = 1 vi + 9.72
11
1
For vi = 30 V ,
vo = (30) + 9.72 . 12.5 V
11
For vi < 10.7 V diode is in reverse bias and acts as an open circuit.
Therefore, vo = vi . Note that also for all negative values of vi , diode
is OFF and vo = vi . The plot between input and output (transfer
characteristics) is drawn in Figure.

EXAMPLE 1.25

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The square wave shown in Figure (a) is applied to the circuits of


Figure (b) and (c). Plot vo for each circuit if,
(a) cut-in voltage of diode is Vg = 0
(b) cut-in voltage of diode is Vg = 0.6 V .

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SOLUTION :

(a) First consider the circuit of Figure (b). When input voltage
vi =+ 20 V , cathode of diode will be at 20 + 2 = 22 V . Since, cathode
is positive w.r.t anode, diode will be OFF and acts as an open circuit
as shown in figure.
Therefore v0 = 0
Now, when input become negative i.e. vi =- 5 V , cathode of diode
will have a voltage equal to - 5 + 2 =- 3 V . Since cathode is negative
w.r.t anode and diode will be ON. An ideal diode _Vg = 0i can be
replaced by short circuit as shown in figure.
vi + 2 - v0 = 0
- 5 + 2 - v0 = 0
v0 =- 3 V

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So, output can be drawn as shown in figure.


If Vg = 0.6 V , then for vi = 20 V output will be same since diode
is OFF and equivalent circuit of figure does not change.

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So
v0 = 0
For vi =- 5 V , diode is forward biased and can be replace by a battery
of Vg = 0.6 V as shown in figure.
vi + 2 + 0.6 - v0 = 0
- 5 + 2 + 0.6 - v0 = 0

v0 =- 2.4 V
Now, output is drawn as shown in figure.

(b) Now consider the circuit of figure (c). Diode D will be ON for
vi > 5 V , if diode is ideal. So for vi = 20 V , diode is ON and replaced
by a short circuit as shown in figure.
v0 = vi = 20 V
when vi =- 10 V , anode of diode becomes negative w.r.t cathode,
so it will be OFF. The equivalent circuit is shown in figure v0 = 5 V .

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The output is shown in figure.


If Vg = 0.6 V . Then In forward bias we replace diode by a 0.6 V
battery as shown in figure.
vi - 0.6 - v0 = 0
v0 = vi - 0.6
= 20 - 0.6 = 19.4 V

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In reverse bias, when vi =- 5 V diode is OFF and the circuit remains


same as that of figure.
So
v0 = 5 V
The output is shown in figure.

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EXAMPLE 1.26

Sketch the output voltage waveform over the input voltage waveform
for the circuit shown, given that the input varies linearly from 0 to
150 V. Assume ideal diodes.
SOLUTION :

Step 1 : By seeing the polarity of applied reference voltage, we can


guess that initially when vi . Starts increasing from 0 to 150 V, D2 will
be ON first as its cathode is connected to + 100 V source. Let D1 is
OFF initially.

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Chapter 1

So, we replace D1 by an open circuit and D2 by a short circuit


as shown in figure.
Writing node equation at output
v0 - 25 + v0 - 100 = 0
100
200
2v0 - 50 + v0 - 100 = 0
3v0 - 150 = 0
v0 = 50 V = vA
Step 2 : We can see from the figure that D1 will remain OFF until
vi < VA or vi < 50 V . We can also verify this by knowing the directions
of current.
Let D1 starts conducting and D2 is also forward biased. So, the
equivalent circuit is shown as below.
In this case

vi = vA
I1 = vi - 25 + vi - 100
100
200

I1 = vi c 3 m - c 150 m
100
300
D1 will be forward biased, then I1 > 0
So
vi c 3 m - c 150 m > 0
100
300
or
vi > 50 V
So, when

vi < 50 V , v0 = 50 V

(D1 OFF, D2 ON)

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(D1 ON, v2 ON)


vi > 50 V , v0 = vi
Step 3 : We can see from the figure that D2 will remain ON until
vi < 100 V . When vi > 100 V , D2 will be reverse biased. We can also
verify this by knowing the direction of current through D2 .
I2 = 100 - vi
200k
If D2 is OFF, then I2 should be negative
100 - vi < 0
200
vi > 100 V
In that case circuit becomes as shown in figure.

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So, when
(D1 ON, D2 OFF)
vi > 100 V , v0 = 100 V
The operation of the circuit is summarized in the table below.
Input

Output

Diode status

vi # 50 V

vo = 50 V

D1 off, D2 on

50 V 1 vi # 100 V

vo = vi

D1 on, D2 on

vi 2 100 V
vo = 100 V
D1 on, D2 off
Transfer characteristics can be drawn as shown in figure.

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The operation of the circuit is summarised in the table given below.

EXAMPLE 1.27

In the circuit shown in Figure assume diodes cut-in voltage is 1 V.


(a) Plot the transfer characteristic for the circuit
(b) Sketch vo if vi = 40 sin wt
SOLUTION :

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(a) From the circuit, we can see that in positive half cycle diode D1
will always be OFF as its cathode is connected to input. However,
diode D2 will start conducting when instantaneous voltage at anode of
D2 is greater than cut-in voltage i.e., vi $ 1 V . The equivalent circuit
is therefore as shown in Figure.

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Applying KVL to the circuit of Figure

vi - i_1 ki - 1 - i_1 ki = 0
i = vi - 1 ,
2

for vi $ 1 V

vo = 1 + i_1 ki
Substituting i , we get
vo = 1 + vi - 1
2
or,
...(i)
vo = 1 vi + 1 , for vi $ 1 V
2
2
In the negative half cycle, diode D2 will never conduct since its anode
is negative w.r.t. cathode. However in negative half cycle, diode D1
Output voltage,

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Diode Circuits_Ex

Chapter 1

starts conducting when instantaneous voltage at cathode of D1 is less


than - 1 V i.e. cathode is more negative compared to its anode or
vi #- 1 V . Applying KVL to the circuit of Figure
vi - i_1 ki + 1 - i_1 ki = 0
1
i = vi +
2
Output voltage,
vo =- 1 + i_ 1 i
Substituting i , we get
vo =- 1 + vi + 1
2
1
1
So,
vo = vi - , for vi #- 1 V
2
2
For - 1 V 1 vi 1 1 V , both D1 and D2 are off. Therefore,

...(ii)

...(iii)
vo = vi
From the above results, the transfer characteristic can be drawn as
shown in Figure.
(b) Using Eq (i), (ii) and (iii), we can draw the output characteristics
as shown in Figure.

EXAMPLE 1.28

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Figure (a) shows the circuit of a negative clamper and Figure (b) show
the input waveform applied to the circuit. Assume cut-in voltage of
diode to be Vg = 0.6 V . Determine the steady state output voltage vo .

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SOLUTION :

Step 1: We can see that diode conducts in the positive half cycle of
input. Thus, it acts as a short circuit as shown in Figure.
Step 2: Therefore, during positive half cycle the capacitor charges
upto peak voltage of input less diode cut-in voltage i.e., it charges
upto _Vm - Vg i .
Step 3: In the positive half cycle, when the input starts decreasing
from the value _Vm - Vg i , the diode becomes reverse-biased as shown
in fig//. This is because capacitor stops charging, as it does not
accept voltage below the value, _Vm - Vg i .
Step 4: In fact, the capacitor now tends to discharge through resistor
R . Since time constant ( RC = 22 m sec ) is much larger than the
time period of the input waveform (T = 1 msec ), the discharge of the
capacitor is negligible. Therefore, the voltage across the capacitor
remains constant at _Vm - Vg i . Under this condition, the capacitor
charged to _Vm - Vg i is equivalent to a DC source of _Vm - Vg i volts
with polarity as shown in fig//.
Step 5: The output at any instant of time is then equal to algebraic
sum of input voltage and voltage across the capacitor. Applying
Kirchhoffs voltage law around the input loop in fig//, we get
vi - _Vm - Vg i - v0 = 0
v0 = vi - _Vm - Vg i
v0 = vi - _12 - 0.6i

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...(i)
v0 = vi - 11.4
This expression shows that in the positive half cycle of input,
output wave shape is same as that of input. However, there is a dc
shift of 11.4 V below 0 (downwards).
Note that for negative half cycle of input, diode D does not
conduct in the steady-state (recall that for clamping circuit, diode
conducts in first half cycle of input ac and capacitor in the circuit is
charged. After the capacitor is charged, ideally, the diode does not
conduct in subsequent cycles of input).
Form Eq (i), it is clear that positive peak of output will appear at
12 - 11.4 = 0.6 V and negative peak will be at - 12 - 11.4 =- 23.4 V
. The steady state output waveform is therefore as shown in Figure.
Note that since output is drawn for steady state, the time axis 0 is
not shown.

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EXAMPLE 1.29

For the DC restorer circuit shown in Figure (a), plot the output
voltage for the input shown in Figure (b). Assume diode D is ideal.

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SOLUTION :

Step 1: First we consider the part of ac signal for which diode is


forward biased (ON).
Step 2: From the circuit, we can see that diode conducts only when
its cathode has a potential less than + 5 V . In the interval 0 to t1 ,
vi = 10 V , so diode does not conduct in this interval.
Now, consider the interval from t1 to t2 , when vi =- 20 V . This
makes cathode of diode more negative compared to its anode. So,
diode conducts in this interval and acts as a short circuit as shown in
Figure. Therefore, the capacitor gets charged to a maximum voltage
voltage VC with polarity as shown in Figure.
Writing KVL in the circuit
vi + VC - 5 = 0
- 20 + VC - 5 = 0

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vi =- 20 V

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VC = 20 + 5 = 25 V
Step 3: As we know that in clamping circuits, after the capacitor
is charged, ideally, the diode does not conduct in subsequent cycles
of input). In the subsequent cycles diode acts as open circuit and
capacitor acts as a 25 V source with polarity as shown in Figure.
Step 4: Now in steady state, output of clamper can be obtained by
writing KVL in the circuit of Figure.

vi + 25 - vo = 0
vo = vi + 25
Therefore, input voltage is shifted upward by + 25 V . Figure shows
the output waveform vo . It is clear form the figure that positive peak
_10 Vi of input is appear at 10 + 25 = 35 V in the output and negative
peak _- 20 Vi appears at - 20 + 25 =+ 5 V .
EXAMPLE 1.30

Draw the output vo for the clamping circuit shown in Figure (a) for
the given sinusoidal input signal shown in Figure (b).

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SOLUTION :

Step 1: First we consider the part of ac signal for which diode is


forward biased (ON).
Step 2: During the positive half cycle of input, cathode of diode is
positive w.r.t. its anode, so it does not conduct.
During the negative half cycle of input, the diode conducts and
acts like a short circuit as shown in Figure. Now, the capacitor is
charged to peak voltage of input Vm = 10 V with polarities as shown
in Figure.
Writing KVL in the circuit
vi + VC = 0
- 10 + VC = 0

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vi =- Vm =- 10 V

VC = 10 V
Step 3: During the positive half cycle of the input signal, the diode
does not conduct, and acts like an open circuit as shown in Figure. In
fact, after the capacitor is charged once, ideally, the diode does not
conduct in subsequent cycles of input. In the subsequent cycles diode
acts as open circuit and capacitor acts as a 10 V source with polarity
as shown in Figure.
Step 4: In steady state, output of clamper can be obtained by writing
KVL in the circuit when diode if OFF and capacitor has been charged
upto a fixed value. Therefore,

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vi + 10 - vo = 0
vo = vi + 10
Hence, the input is shifted upwards by + 10 V . That is, positive peak
of input will appear at 10 + 10 = 20 V in the output and negative
peak of input will appear at - 10 + 10 = 0 as shown in Figure.
EXAMPLE 1.31

Draw the output vo for the clamping circuit shown in Figure (a) for
the given sinusoidal input signal shown in Figure (b).

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Chapter 1

SOLUTION :

Step 1: First we consider the part of ac signal for which diode is


forward biased (ON).
Step 2: During the positive half cycle of input, anode of diode is
positive w.r.t. cathode , therefore diode conducts in this cycle and
acts as a short circuit. The equivalent circuit is shown in Figure.
Now, the capacitor is charged to Vm = 12 V with polarities as shown
in Figure.
Writing KVL in the circuit
vi - VC = 0
12 - VC = 0

vi = Vm = 12 V

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VC = 12 V
Step 3: During the negative half of the input signal, the diode does
not conduct and acts like an open circuit as shown in Figure. In
steady state, output of clamper can be obtained by writing KVL in
the circuit when diode if OFF and capacitor has been charged upto a
fixed value. Therefore,

vi - 12 - vo = 0

vo = vi - 12
Hence, the input is shifted by 10 V downwards. That is positive
peak of input _+ 12 Vi will appear at 12 - 12 = 0 in the output and
negative peak _- 12 Vi will appear at - 12 - 12 =- 24 V as shown
in Figure.

EXAMPLE 1.32

Sketch vo versus time for the circuit with the input shown in Figure.
Assume diode is ideal and the time constant RC is large.

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SOLUTION :

Step 1: First we consider the part of ac signal for which diode is


forward biased (ON).
Step 2: During the positive half cycle of input when vi =+ 20 V ,
cathode of diode is positive w.r.t. its anode, so it does not conduct.
During the negative half cycle of input when vi =- 20 V , the
diode conducts and acts like a short circuit as shown in Figure. Now,
the capacitor is charged to a maximum value VC with polarities as
shown in Figure.
Writing KVL in the circuit
vi + VC + 5 = 0
- 20 + VC + 5 = 0

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vi =- 20 V

VC = 20 - 5 = 15 V

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Step 3: During the positive half cycle of the input signal, the diode
does not conduct, and acts like an open circuit as shown in Figure. In
fact, after the capacitor is charged once, ideally, the diode does not
conduct in subsequent cycles of input. In the subsequent cycles diode
acts as open circuit and capacitor acts as a 15 V source with polarity
as shown in Figure.
Step 4: In steady state, output of clamper can be obtained by writing
KVL in the circuit when diode is OFF (open circuit) and capacitor
acts as a voltage source as shown in Figure.
vi + 15 - vo = 0
vo = vi + 15
Hence, the input is shifted upwards by + 15 V . Since input changes
from + 20 V to - 20 V , output will change from 20 + 15 =+ 35 V to
- 20 + 15 =- 5 V . The output waveform is shown in Figure.
EXAMPLE 1.33

Design a diode clamper to generate the output vo from the input vi


shown in Figure if cut-in voltage of diode

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(a) Vg = 0 and (b) Vg = 0.7 V

SOLUTION :

From the output waveform we can see that input is shifted by


10 - 27 = 7.3 V downward. This can be possible with a biased
negative clamper. Figure shows a biased negative clamper with bias
voltage VR .
v0 = vi - 7.3 V
Since input is shifted by 7.3 V. This is the maximum voltage by which
capacitor must be charged when diode conducts. Assume that the
diode conducts in positive half cycle when vi =+ 10 V . The equivalent
circuit when diode conducts is shown in figure.
Writing KVL
vi - VC - VR = 0
10 - 7.3 - VR = 0

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VR = 2.7 V
Since out in voltage Vg = 0 , we replaced the forward biased diode by
short circuit.
(b) Now, when Vg = 0.7 V , the forward biased diode is replaced by a
source of 0.7 V as shown in figure.
Applying KVL
vi - VC - 0.7 - VR = 0
10 - 7.3 - 0.7 - VR = 0

VR = 10 - 8 = 2 V

EXAMPLE 1.34

Design a suitable circuit represented by the box shown below which


has input and output waveforms as indicated.

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SOLUTION :

From the output waveform, we can see that input is shifted upward by
30 - 20 = 10 V . This can be possible with a biased positive clamper.
The circuit of a biased positive clamper is shown in figure with a bias
voltage VR .
Since input is shifted by 10 V, this is the maximum voltage by which
capacitor must be charged when diode is ON. Assume that in negative
half cycle of input when vi =- 20 V , capacitor charges upto 10 V
with polarity as shown in figure.
writing KVL
vi + 10 - VR = 0
- 20 + 10 - VR = 0

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VR =- 10 V
Note :- As a general method of designing calmper circuit, we can
remember that in positive clamper diode conducts in negative half
cycle of input with polarity as shown in figure, whereas in negative
clamper diode conducts in positive half cycle of input with polarity
as shown in figure//.
EXAMPLE 1.35

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For the circuit shown below find and plot the waveform of vo for the
input indicated. Assume cut-in voltage for diode is 0.7 V.

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SOLUTION :

Step 1: First we consider the part of ac signal for which diode is


forward biased (ON).
Step 2: From the circuit, we can see that diode conducts, in the
negative half cycle and replaced by its equivalent model as shown
in Figure. So, when vi =- 24 V , the capacitor gets charged to a
maximum voltage voltage VC with polarity as shown in Figure.
Writing KVL in the circuit
vi + VC + 0.7 - 6 = 0
- 24 + VC + 0.7 - 6 = 0

vi =- 20 V

VC = 30 - 0.7 = 29.3 V
Step 3: As we know that in clamping circuits, after the capacitor
is charged, ideally, the diode does not conduct in subsequent cycles
of input). In the subsequent cycles diode acts as open circuit and
capacitor acts as a 29.3 V source with polarity as shown in Figure.
Step 4: Now in steady state, output of clamper can be obtained by
writing KVL in the circuit of Figure.
vi + 29.3 - vo = 0
vo = vi + 29.3
Therefore, input voltage is shifted upward by + 29.3 V . Figure shows
the output waveform vo . It is clear form the figure that positive peak
_12 Vi of input is appear at 12 + 29.3 = 41.3 V in the output and
negative peak _- 24 Vi appears at - 24 + 29.3 =+ 5.3 V .
EXAMPLE 1.36

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Mahadeva/123/1.58

For the circuit shown find and plot the output waveform for the input
indicated. Also sketch the output waveform assuming ideal diode.

SOLUTION :

Step 1: First we consider the part of ac signal for which diode is


forward biased (ON).
Step 2: From the circuit, we can see that diode conducts, in the

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positive half cycle when vi exceeds 20 V. The diode acts as short


circuit when it conducts as shown in Figure. Therefore, during positive
cycle when input reaches to its peak value Vm , capacitor get charged
to a maximum voltage VC with polarity as shown in Figure.
Writing KVL in the circuit
vi - VC - 20 = 0
100 - VC - 20 = 0

vi = Vm =+ 100 V

VC = 100 - 20 = 80 V
Step 3: As we know that in clamping circuits, after the capacitor
is charged, ideally, the diode does not conduct in subsequent cycles
of input). In the subsequent cycles diode acts as open circuit and
capacitor acts as a 80 V source with polarity as shown in Figure.
Step 4: Now in steady state, output of clamper can be obtained by
writing KVL in the circuit of Figure.
vi - 80 - vo = 0
vo = vi - 80
Therefore, input voltage is shifted downward by 80 V . Figure shows
the output waveform vo . It is clear form the figure that positive peak
_100 Vi of input is appear at 100 - 80 = 20 V in the output and
negative peak _- 100 Vi appears at - 100 - 80 =- 180 V .
EXAMPLE 1.37

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A centre-tapped full wave rectifier has load resistance RL = 50 W


. Each diode has a forward dynamic resistance Rf = 2 W . The rms
voltage across each half of secondary winding is 20 V and the dc
winding resistance of each half of secondary winding is 5 W. Calculate
(a) dc power delivered to load
(b) % load regulation
(c) Efficiency of rectification
(d) TUF of secondary
SOLUTION :

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Given that:
RMS voltage across half secondary,

V2 = 20 V

Resistance of each half of secondary,

RS = 5 W

Diode forward resistance,

Rf = 2 W

Load resistance,

RL = 50 W

Maximum voltage across each half of secondary,


Vm =
Peak input current,

Im

2 V2 = 2 # 20 = 28.28 V
Vm
=
RS + Rf + RL

=
Output dc current,

28.28 = 0.496 A
5 + 2 + 50

Idc = 2Im = 2 # 0.496 = 0.315 A


p
p

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Chapter 1

(a) DC power delivered to load

Pdc = I dc2 RL = _0.315i # 50 = 4.96 W


VNL = 2Vm = 18 V
p
2

No load output,

VFL = Idc RL = 0.315 # 50 = 15.75 V


% Load regulation = VNL - VFL # 100 %
VFL

Full load output,


(b)

= 18.0 - 15.75 # 100 % = 14.28 %


15.75
(c) Efficiency,

(d)

RL
h = 82
p _RS + Rf + RL i
50
= 82
= 0.711
p _5 + 2 + 50i
dc power delivered to load
TUF =
ac power rating of secondary
Pdc = 4.96
Im
V2 # Irms V
2#
2
4
.
96
=
= 0.707 or 70.7 %
20 # 0.496
2

EXAMPLE 1.38

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A full-wave rectifier circuit is powered by ac mains. Power transformer


has a centre-tapped secondary. The voltage across each half secondary
is 220 sin 314t . Forward resistance of each of the diode is 10 W. If the
equivalent load resistance is 1 kW, find
(a) the peak value of current
(b) the dc or average value of current
(c) the rms value of current
(d) the ripple factor and
(e) the rectification efficiency
SOLUTION :

Given that:

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Peak voltage across half secondary,

Vm = 220 V

Diode forward resistance,

Rf = 10 W

Load resistance,

RL = 1 kW

(a) Peak value of current


220
Im = Vm
=
= 0.2178 A
Rf + RL 10 + 1000
(b) The dc or average value of current is
Idc = 2Im = 2 # 217.8 = 138.66 mA
p
p
(c) The rms value of current is
Irms = Im = 154 mA
2

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Note that secondary winding resistance is


assumed to be zero in this problem.

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(d) The ripple factor is given as

c IIrms m - 1
2

r =

dc

2
c 154 m - 1 = 0.482
138.66
(e) The rectification efficiency is given as
RL
h _%i = 82
p _Rf + RL i
1000
= 82
p _10 + 1000i

h _%i = 0.8025 # 100 % = 80.25 %

EXAMPLE 1.39

An ac supply of 220 V is applied to a half-wave rectifier circuit through


transformer of turns ratio 20 : 1. Assume the diode is ideal. Calculate
(a) dc output voltage and
(b) Peak inverse voltage
SOLUTION :

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The secondary voltage can be obtained using transformer equation.


RMS voltage across secondary winding is therefore,
V2 = V1 # N2 = 230 # 1 = 11 V
20
N1
Peak secondary voltage,
Vm =

2 V2 =

o
n
w.

2 # 11 = 15.5 V

(a) dc output voltage

a
i
d

Vdc = Vm = 15.5 = 4.95 V


p
p
(b) In half-wave rectifier, PIV of a diode is given by

w
w

PIV = Vm = 15.5 V
EXAMPLE 1.40

A half wave rectifier is used to supply 35 V dc to a resistive load of


500 W. The diode has a forward resistance of 20 W Find the maximum
value of the ac voltage required at the input.
SOLUTION :

Output dc voltage,

Vdc = 35 V

Diode forward resistance,

Rf = 20 W

Load resistance,
RL = 500 W
Average(dc) value of load current,
Vdc = Vm RL
p (Rf + RL)
Where Vm is the maximum value of ac input voltage.

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Vm =
=

Chapter 1

Vdc # p (Rf + RL)


RL
35 # p (20 + 500)
= 114.35 V
500

EXAMPLE 1.41

In a centre-tap full-wave rectifier, the load resistance is 2000 W. Each


diode has a forward-bias resistance of 10 W. The peak value of voltage
across each of the secondary winding is 220 V. Find,
(a) dc value of output current
(b) rms value of output current
(c) ripple factor
SOLUTION :

Maximum input voltage,

Vm = 210 V

Diode forward resistance,

Rf = 10 W

Load resistance,

RL = 2 kW

First we calculate the peak value of input current,


220
Im = Vm
=
= 109.4 mA
2000 + 10
RL + Rf
(a) DC value of output current
Idc = 2Im = 2 # 109.4 = 69.6 mA
p
p
(b) RMS value of output current
Irms = Im = 109.4 = 77.35 mA
2
2
(c) Ripple factor,
r =

c I m -1
dc

r =

c 69.6 m - 1 =

Irms

EXAMPLE 1.42

77.35

d
o
n
.
w
w

c
.
ia

n
i
o.

_1.11i - 1 = 0.482
2

A sinusoidal voltage of peak magnitude of 50 V and frequency 50 Hz


is applied to a half wave rectifier circuit shown in Figure. Let Rf
denotes the forward resistance of diode. Given that Rf = 20 W and
load resistance RL = 800 W . Find:
(a) Im , Idc , Irms
(b) ac-power input and dc-power output
(c) dc-output voltage
(d) efficiency of rectification
(e) ripple factor
SOLUTION :

We have,
Maximum input voltage,

Vm = 50 V

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Diode forward resistance,

Rf = 20 W

Load resistance,

RL = 800 W
50
= 61 mA
Im = Vm =
rd + RL 20 + 800

(a) Peak input current,

Page 53

Idc = Im = 61 = 16.4 mA
p
p

Average current,

Irms = Im = 30.5 mA
2

RMS current,

2
Pac = I rms
_Rf + RL i

(b) AC power input,

= _30.5 # 10 -3i _20 + 800i


2

= 0.763 watt

Pdc = I dc2 RL

DC power output,

= _19.4 # 10 -3i # 800


2

= 0.301 watt
Vdc = Idc RL

(c) DC output voltage,

= 19.4 # 10 -3 # 800 = 15.52 volts


RL
h _%i = 42
# 100
p _Rf + RL i
800
= 42
# 100 = 39.53%
p _20 + 800i

(d) Efficiency,

c IIrms m - 1 = 1.21
2

r =

(e) Ripple factor,

dc

EXAMPLE 1.43

o
n
w.

a
i
d

n
i
.
o
c
.

A crystal diode having internal resistance Rf = 10 W is used for


half-wave rectification as shown in Figure. If the applied voltage is
20 sin _314t i and load resistance is RL = 1000 W , find:
(a) peak, average and rms values of load current
(b) dc voltage and dc power output
(c) ac input power
(d) rectification efficiency, h
(e) ripple factor
(f) percent regulation

w
w

SOLUTION :

Given that,
Maximum input voltage,

Vm = 20 V

Diode forward resistance,

Rf = 10 W

Load resistance,

RL = 1000 W
Im = Vm
Rf + RL

(a) Peak current,

=
Average or dc current,

20
= 19.8 mA
10 + 1000

Idc = Im /p = 6.303 mA

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RMS current,

Irms = Im /2 = 9.9 mA

(b) DC voltage

Vdc = Idc RL = 6.303 V

DC power,

Pdc = I dc2 RL = 39.72 mW

(c) AC input power,

Chapter 1

2
Pac = I rms
_Rf + RL i

= 1010 # _9.9i = 98.99 mW


h _%i = Pdc # 100
Pac
2

(d) Rectifier efficiency,

= 39.72 # 100 = 40.12%


98.99
(e) Ripple factor
(f) % regulation
No load voltage

Full load voltage,


So,% regulation

r =

Irms
c Idc m - 1 = 1.21
2

VR = VNL - VFL # 100


VL
VNL = Vdc | R " 3
= Vm RL
p _Rf + RL i
L

RL " 3

= Vm = 20 = 6.366
p
p

VFL = Vdc = 6.3 V


VR = VNL - VFL # 100
VFL
= 6.366 - 6.3 # 100
6.3
= 1.05%

EXAMPLE 1.44

d
o
n
.
w
w

c
.
ia

n
i
o.

Consider a full-wave rectifier circuit with two identical diodes having


forward resistance of 10 W. The load resistance is 1 kW. If a 24 V peak
sinusoidal signal is applied, find
(a) peak, dc and rms load currents
(b) dc output voltage and dc power
(c) ac input power
(d) Rectifier Efficiency in percent
SOLUTION :

Given that
Maximum input voltage,

Vm = 24 V

Diode forward resistance,

Rf = 10 W

Load resistance,

RL = 1 kW
24
=
= 23.76 mA
Im = Vm
Rf + RL 10 + 1000

(a) Peak load current,


DC load current,

Idc = 2Im = 2 # 23.76 = 15.12 mA


p
p

RMS load current,

Irms = Im / 2 = 16.80 mA

(b) DC output voltage,

Vdc = Idc RL
= 15.12 # 10 -3 # 1000 = 15.12 V

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Page 55

Pdc = I dc2 RL

DC power,

= _15.12 # 10 -3i # 10 3 = 228.26 mW


2

2
Pac = I rms
_Rf + RL i

(c)AC power input,

= _16.8i _1010i = 285.06 mW


h _%i = Pdc # 100 = 228.26 # 100 = 80.07%
285.06
Pac
2

(d) Rectifier Efficiency,


EXAMPLE 1.45

A sinusoidal voltage of 30 V peak magnitude is applied to a fullwave bridge rectifier circuit. The forward resistance of each diode is
Rf = 5 W and the load resistance is 2400 W. Calculate
(a) peak, dc and rms values of load current
(b) dc and rms output voltages
(c) dc output power
(d) ac input power
(e) Rectifier efficiency
(f) percentage regulation
SOLUTION :

Given that,

n
i
.
o
c
.

Maximum input voltage,

Vm = 30 V

Diode forward resistance,

Rf = 5 W

Load resistance,

RL = 2400 W
Vm
30
Im =
=
= 12.44 mA
2400 + 10
RL + 2Rf

(a) Peak load current,

o
n
w.

Idc = 2Im = 7.924 mA


p

DC load current,

(b) DC output voltage,

Irms = Im = 8.797 mA
2
Vdc = Idc RL = 19.01 V

RMS outpout voltage,

Vrms = Irms RL = 21.11 V

RMS load current,

(c) DC output power,

w
w

a
i
d

Pdc = I dc2 RL = _7.924 # 10 -3i # 2400


2

= 150.69 mW

(d) AC input power,

2
Pin = I rms
_RL + 2Rf i

= _8.797 # 10 -3i _2400 + 10i


2

= 186.503 mW

%h = Efficiency = Pdc # 100


Pin
= 80.79%
(f) Percentage regulation, VR = VNL - VL # 100
VL
(e) Efficiency,

No-load voltage,

VNL = Vdc | R " 3


= 2Im RL
p R "3
L

2Vm RL
p _2Rf + RL i

RL " 3

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Full-load voltage
Percentage regulation

Diode Circuits_Ex

Chapter 1

= 2Vm = 2 # 30 = 19.09
p
p
VL = Vdc = 19.01 V
VR = 19.09 - 19.01 # 100
19.01
= 0.466%

EXAMPLE 1.46

A full-wave centre-tapped rectifier has rms input of 20-0-20 V at the


secondary winding of the centre-tapped transformer. The frequency
of input is 50 Hz and load resistance is RL = 10 W .
(a) Find Vdc , Idc and ripple factor
(b) Repeat part (a) if 10 mF capacitor is shunted across the load
(c) Repeat part (a) if 100 mH inductor is present in series with load
SOLUTION :

Given that,
Maximum input voltage,

Vm = 20 2 V

Load resistance,

RL = 10 W

(a)
Average (dc) load voltage, Vdc = 2Vm
p
= 2 # 20 2 = 18.012 V
p
Average load current,
Ripple factor

r =
=

(b) For capacitor filter


Average load voltage,
So, average load current,
Ripple factor

d
o
n
.
w
w

Idc = Vdc = 1.8012 A


RL

c
.
ia

n
i
o.

Vrms
c Vdc m - 1
2

20
c 18.012 m - 1 = 0.4825

Vdc . Vm =

2 Vrms

Vdc = 20 # 2 = 28.28 V
Idc = Vdc = 2.828 A
RL
r =

1
4 3 fCRL

1
4 # 3 # 50 # 10000 # 10 -6 # 10
= 0.0288
=

(c) For series inductor filter


Average (dc) load voltage, Vdc = 2Vm = 2 # 28.28 = 18.012 V
p
3.14
Average (dc) load current, Idc = Vdc = 1.8012 A
RL

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r =

Ripple factor,

Page 57

RL
6 2 pfL

10
6 2 # p # 50 # 100 # 10 -3
= 0.075
=

EXAMPLE 1.47

In a regulated power supply, the voltage waveform across the load


is observed as shown in Figure. Determine the ripple factor and
percentage ripple content.

SOLUTION :

From figure, we have


Vdc = 12 V

DC load voltage,
Ripple voltage (peak-to-peak),
RMS ripple voltage,
So, ripple factor,

a
i
d

Vr = 0.25 V
Vr (rms) = 0.25 = 0.088 V
2 2
Vr (rms) 0.088
r =
=
= 0.00737
12
Vdc

w
w

o
n
w.

n
i
.
o
c
.

Percentage ripple = 0.74 %


EXAMPLE 1.48

Consider a regulated power supply containing a full-wave rectifier and


a capacitor filter. The filter feeds a load resistance of 1 kW. If the DC
voltage across the load is 12 V and the peak-to-peak value of ripple
were not to exceed 0.2 V, find the minimum capacitance value of the
filter capacitor. Assume a power line frequency of 50 Hz.
SOLUTION :

Peak-to-peak ripple voltage,


Vr = 0.2
The ripple waveform can be assumed to be triangular in shape.
Therefore, rms value of ripple voltage
Vr (rms) = Vr = 0.2 = 0.058 V
2 3
2 3
Ripple factor in the case of capacitor filter is given by

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r =

Vr (rms)
Vdc

Chapter 1

Vdc = 12 V

= 0.058 = 0.0048
12
1
= 0.0048
4 3 fCRL
Substituting the value of RL and f , we get
Therefore,

r =

C =

1
= 601 mF
_4 3 # 50 # 0.0048 # 1 # 10 3i

EXAMPLE 1.49

The output of a full-wave rectifier operating at a line frequency of


50 Hz is applied to an LC filter. The filter is required to provide a
a ripple of 1 percent. In the design of filter, it is specified that L/C
ratio should not exceed 0.005 with L in henries and C in microfarads.
Find the required values of L and C for the given filter.
SOLUTION :

Ripple factor of LC filter is given by


1
r =
6 2 w2 LC
For f = 50 Hz , w = 2pf = 314 , therefore
1
r =
2
6 2 _314i LC
or,
r = 1.2 ,
LC
Given that
r = 1.2 = 0.01,
LC

d
o
n
.
w
w
where C is in mF

c
.
ia

n
i
o.

LC = 120
L = 0.005
Also,
C
Using above two relation, we can find the values of L and C
C =

24000 = 155 mF

L = 0.005 # 155 = 0.775 H


EXAMPLE 1.50

A 120 V (rms) sinusoidal input is applied to a full-wave bridge


rectifier having a load resistor of 1 kW. Assume cut-in voltage of diode
Vg = 0.7 V , and forward resistance Rf = 0 . Find
(a) the dc load voltage
(b) required PIV rating of each diode.
(c) the maximum current through each diode during conduction
(d) required power rating of each diode
CONFUSION CLEARING CORNER

SOLUTION :

Peak input voltage,

Vim =

2 Vrms =

2 # 120 = 169.7 V

Note that in bridge rectifier there are two


diodes conducting at a time (in one cycle of
input). Therefore, peak voltage across the load
will be peak voltage of the input less two cutin voltage (2 # 0.7 = 1.4 V )..

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Page 59

Peak input voltage across load


Vm = Vim - 2Vg = 169.7 - 2 # 0.7 = 168.3 V
Im = Vm = 168.3 = 168.3 mA
RL
1k

Peak input current,

Vdc = 2Vm = 2 # 168.3 = 107.2 V


p
3.14
(b) For calculating PIV consider the circuit of Figure. Since diode has
a cut-in voltage, in the circuit forward biased diode D3 is replaced by
a 0.7 V source so writing KVL in the lower half loop
(a) DC load voltage,

PIV - Vm - 0.7 = 0
So,

PIV = Vm + 0.7 = 168.3 + 0.7 = 169 V

(c) Maximum current through diode


Im = 168.3 mA
(d) Diode power rating is given by product of voltage across the diode
is forward bias and maximum current through diode. In forward bias
voltage across diode is equal to cut-in voltage, so
Diode power rating,

Pmax = Vg Im
= 0.7 # 168.3 = 117.81

EXAMPLE 1.51

n
i
.
o
c
.

Consider the circuit shown in Figure with given input waveform.


Assume diodes D1 and D2 are ideal.
(a) Explain the operation of the circuit
(b) Find the dc output voltage and current
(c) Determine the average and peak diode currents
(d) Calculate the required PIV rating of each diode

w
w

o
n
w.

a
i
d

SOLUTION :

(a) Circuit Operation


From the circuit we can observe that during the positive half cycle of
vi , diode D1 conducts and D2 is reverse biased. The equivalent circuit

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Chapter 1

is shown in Figure. The circuit can be simplified as shown in Figure.

From the circuit of Figure, we have


vi
io =
10 k + 10 k
= 200 sin wt
20
So,
io = 10 sin wt mA ,
The output voltage is

0 # wt # p

vo = io _10 ki

= _10 sin wt mAi_10 ki

c
.
ia

= 100 sin wt V , 0 # wt # p
During negative half cycle of vi , D2 conductors and D1 is off. The
equivalent circuit is therefore as shown in Figure and simplified circuit
is also shown in Figure.

d
o
n
.
w
w

n
i
o.

Note that the circuit during negative half cycle is same as that of
positive half cycle. Therefore, io and vo are same as obtained above.
The waveforms of io and vo are shown below.
vi
io =
10 k + 10 k

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= 200 sin wt
20
So,

io = 10 sin wt mA ,

and

vo = 100 sin wt V ,

p # wt # 2p
p # wt # 2p

Thus, thus the circuit operation is similar to a full-wave rectifier.


(b) vo is a full rectified voltage with peak value of 100 V i.e. Vm = 100 V
DC output voltage, Vdc = 2Vm
p
= 2 # 100 = 63.6 V
3.14
DC output current,

Idc = Vdc
RL

n
i
.
o
c
.

= 63.6 = 6.36 mA
10
(c) Form the circuit of Figure, we can see that current through each
diode when it is forward biased is given by

So,

o
n
w.

a
i
d

id = io + i1
i1 = vi = 200 sin wt V = 20 sin wt mA
10
10 k
i = 10 sin wt + 20 sin wt

w
w

= 30 sin wt mA ,
0 # wt # p
During the negative half cycle of vi , D2 is on and D1 is off. The diode
current is a half-rectified sinusoid with a peak value of 30 mA.
Peak diode current is
Id _maxi = 30 mA
Idc_diode i = Im = 30 = 9.55 mA
p
p
(d) During the positive half-cycle of input signal, the diodes D1 is
conducting and D2 is non-conducting. So, D1 can be replaced by short
circuit, and, D2 and by open circuit as shown in fig//. Thus, the
entire voltage Vm across the secondary winding appears across the
load resistor RL .
Again, as we know PIV is defined as the voltage in reverse
direction (anode negative, cathode positive) across a non-conducting
diode, we mark polarity of PIV as shown in fig//. By writing KVL in
upper half loop, we get PIV for diode D2
PIV - Vm = 0
PIV = Vm = 100 V

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PIV for diode D1 is also same which can be found out by applying
KVL in upper half loop during the negative half-cycle in the circuit
of figure.
EXAMPLE 1.52

For the ideal diode circuit shown below


(a) Explain the operation of circuit
(b) Calculate average output voltage and current
(c) Calculate average and peak diode current
(d) PIV across each diode
Given that RL = 10 kW

SOLUTION :

d
o
n
.
w
w

c
.
ia

n
i
o.

(a) Circuit Operation


We can see from the circuit that during the positive half cycle of vi
, diode D1 is reversed biased whereas D2 conducts. Replacing D1 by
an open circuit and D2 by a short circuit, we obtain the equivalent
circuit as shown in Figure. The circuit can be drawn in simplified
further as shown in Figure.

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a
i
d

Using voltage division rule in the circuit of Figure, we have


Output voltage,
vo = vi c 5 m
5 + 10

o
n
w.

= 200 sin wt c

So,

w
w

5
10 + 5 m

vo = 66.67 sin wt V ,
io = vo
R

Page 63

n
i
.
o
c
.

0 # wt # p

= 66.67 sin wt V
10
io = 6.667 sin wt mA , 0 # wt # p
During the negative half cycle of vi , D1 if ON and D2 is OFF. The
equivalent circuit and simplified equivalent circuits are shown in
Figure. The circuit is same as that in positive half cycle.
. vo and io are still given by Eqs (i) and (ii) respectively. The waveforms
of vo and io are shown below.

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Therefore, the output voltage vo is a full-wave rectified voltage. The


circuit thus operates as full-wave rectifier.
(b) From the waveforms shown above, we note that
Peak output voltage,

Vm = 66.67 V

Peak output current,

Im = 6.667 mA
Vdc = 2Vm
p

DC output voltage,

= 2 # 66.67 = 42.4 V
3.14
DC output current,

Idc = Vdc = 42.4 = 4.24 mA


10
RL

d
o
n
.
w
w

c
.
ia

n
i
o.

(c) In the positive half cycle, we can see from the circuit of Figure//
that when diode D2 is forward biased current through it is same as

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output current io . Since in negative half cycle D2 is reverse biased,


the current through diode will be half rectified sinusoid with a peak
value of 6.667 mA.
Idm = Im = 6.667 mA
Average diode current is
Idc_diode i = Idm = 6.667 = 2.12 mA
p
2
(d) Let we find the PIV across diode D1 . In positive half-cycle of
input, D1 is OFF and D2 is ON as shown in Figure. Again, as we know
PIV is defined as the voltage in reverse direction (anode negative,
cathode positive) across a non-conducting diode, we mark polarity
of PIV as shown in fig//. By writing KVL in loop containing vi and
PIV , we get PIV for diode D1
PIV - vi = 0
Since maximum value of input is 200 V, we get
PIV = vi (max) = 200 V
EXAMPLE 1.53

A full-wave bridge rectifier is required to provide a no load dc voltage


of 9 V. What should be the rms value of voltage appeared on the
secondary of the transformer ? If the secondary winding resistance
is 3 W and dynamic resistance of each diode is 1 W, determine the
dc output across a load resistance of 100 W. Also determine the
regulation.
SOLUTION :

Given that
No load dc voltage,

o
n
w.

a
i
d

n
i
.
o
c
.

Vdc = 9 V

w
w

Secondary winding resistance,

RS = 3 W

Diode forward resistance,

Rf 1 W

As we know, for full-wave bridge rectifier no load dc output voltage is


Vdc = 2Vm = 9 V
p
9p
Peak voltage across secondary,
Vm =
= 14.14 V
2
V
RMS voltage across secondary, VS_rmsi = m = 14.14 = 10 V
1.414
2
Vm
Full-load peak current,
Im =
Rs + 2Rf + RL
= 14.14 = 0.135 A
105
DC load current,

Idc = 2Im
p
= 2 # 0.135 = 86.45 mA
p

Full-load voltage,

VFL = Idc RL

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Chapter 1

= 86.56 # 10 -3 # 100 = 8.66 V


VR = VNL - VFL # 100
VFL

Voltage regulation,

= 9 - 8.6 = 4.06%
8.6
EXAMPLE 1.54

For the rectifier circuit shown in Figure, calculate


(a) Average load voltage Vdc
(b) Average load current Idc
(c) RMS value of load current Irms
(c) RMS value of ripple voltage Vr_rms i

SOLUTION :

Since transformer ratio is 1, RMS value of secondary voltage


VS (rms) = 230 V
Vdc = Vm =
p

(a) Average load voltage,

2 # 230 = 103.5 V ,
p
V
dc
=
= 103.5 mA ,
RL
= Im
2
=

(b) Average load current,


(c) RMS load current

Idc
Irms

d
o
n
.
w
w

= Vm =
2RL
(d) Ripple factor

2 VS _rmsi
p

c
.
ia

n
i
o.

r =

2 # 230 = 162.6 mA
2#1

Vr _rmsi
= 1.21,
Vdc

So, RMS value of ripple voltage,


Vr _rmsi = 1.21 # Vdc = 125.3 V
EXAMPLE 1.55

A 230 V-0-230 V (rms) input voltage is connected to a full-wave


rectifier circuit shown in Figure. Calculate the dc voltage across and
dc current through the load.

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SOLUTION :

Peak input voltage across each half of secondary


Vm = 230 2
DC load voltage,

Vdc = 2Vm = 2 # 230 2 = 207 V


p
p

DC load current,

Idc = Vdc = 207 = 207 mA


RL
1k

EXAMPLE 1.56

n
i
.
o
c
.

The half-wave rectifier circuit shown in Figure is required to provide


a dc voltage of 10 V across the load. Obtain the ratio of number of
turns np : ns of primary and secondary windings of the transformer.

w
w

o
n
w.

a
i
d

SOLUTION :

From half-wave rectifier circuit, the dc load voltage is given by


Given, Vdc = 10 V
Vdc = Vm
p
where, Vm is the peak value of sinusoid applied across the
secondary winding of the transformer.
Vm = pVDC = p # 10 = 31.42 V
RMS values of voltage appeared across the secondary
Vs = Vm = 31.42 = 22.22 V
1.414
2
RMS voltage across primary winding of the transformer
Vp = 220 V
From transformer equation, we have

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Vp
n
= p
ns
Vs
V
np
= p = 220 = 9.9 :1 , 10 : 1
ns
22.22
Vs
EXAMPLE 1.57

Figure shows the output waveform of a half-wave rectifier with


capacitor filter. The value of the capacitor is 1000 mF and the value
of load resistance is 100 W with frequency of input voltage equal to
50 Hz. Determine the ripple factor and dc voltage.

SOLUTION :

From the figure, we have


Peak value of load voltage,

Vm = 6.4 V

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Vr = 0.6 V
DC load voltage,
Vdc = Vm - Vr = 6.4 - 0.3 = 6.1 V
2
If we assume ripple as triangular waveform, RMS value of ripple
voltage
Vr _rmsi = Vr = 0.6 = 0.173 V ,
2 3
2 3
Peak-to-peak ripple voltage,

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Vr _rmsi 0.173
=
= 0.0284
6.1
Vdc
Ripple factor from theoretical expression is
1
r =
4 3 fCRL
1
=
= 0.02887
4 3 # 50 # 1000 # 10 -6 # 100

So, ripple factor,

r =

EXAMPLE 1.58

Calculate the ripple factor in the case of a full-wave rectifier with


p -filter having the component values C1 = C2 = 500 mF and load
resistance RL = 100 W .
SOLUTION :

For p -filter ripple factor is given by


r =

2
8w2 C1 C2 LRL

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2
8 # 4p2 (50) 2 # 500 # 500 # 10 -12 # 100

EXAMPLE 1.59

In a full-wave bridge rectifier circuit input applied to the primary


winding of the transformer is 160 sin 314t V . Assume cut-in voltage
of each diode is Vg = 0.7 V . Determine the required turns ratio of the
transformer to produce a peak output voltage of 25 V.
SOLUTION :

Peak voltage at primary,


Vp = 160 V
If the diodes are assumed to be ideal then as we know, the peak
output voltage will be same as peak voltage appeared at secondary
winding. But, in this case diodes cut-in voltage is 0.7 V. Since two
diodes conducts simultaneously in a bridge rectifier, the peak voltage
across load will be equal to peak voltage across secondary minus the
drop of cut-in voltage of two diodes. Therefore, peak value of output
voltage
Vm = Vs - 2Vg = 25 V ,

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Vs " peak voltage at secondary

So,
Vs = 25 + 2 # 0.7 = 26.4 V
Let turn ratio of primary winding and secondary winding is np : ns .
From transformer equation, we can write
V
np
= p
ns
Vs

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w.

np
= 160 = 6.06
ns
26.4
EXAMPLE 1.60

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A full-wave centre-tapped rectifier is required to deliver 0.1 A and


15 V (average) to a load. The ripple voltage is to be no larger
than 0.4 V peak-to-peak. The input signal at primary winding of
transformer is 120 V (rms) at 60 Hz. Assume diode cut-in voltages of
0.7 V. Determine the required turns ratio and the filter capacitance
value.
SOLUTION :

Given that
Average load current,

Idc = 0.1 A

Average load voltage,

Vdc = 15 V

Peak-to-peak ripple voltage,

Vr = 0.4 V

Peak voltage at primary,

Vp = 120 2 V

Diode cut-in voltage,

Vg = 0.7 V
RL = Vdc = 15 = 150 W
0.1
Idc

Load resistance,

If the diodes are assumed to be ideal then


as we know, the peak output voltage will be
same as peak voltage appeared at secondary
winding. But, in this case diode cut-in voltage
is 0.7 V . Since only one diode conducts at
a time, the peak voltage across load will be
equal to peak voltage across secondary minus
the drop of cut-in voltage of one diode.
Vm = Vs - Vg

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Therefore, peak value of output voltage


Vm = Vs - Vg ,

Vs " peak voltage at secondary

Vs = Vm + 0.7
Vdc = 2Vm = 15
p

So,
Since,

...(i)

Vm = 15 # p = 23.55 V
2
From Eq (i), peak voltage across secondary winding is therefore
Vs = 23.55 + 0.7 = 24.25 V
V
np
= p = 120 2 7 = 7.2
ns
23.55
Vs

Turn ratio,

Vr _RMSi
1
...(ii)
=
Vdc
4 3 fCRL
Assuming a triangular ripple waveform as given earlier, the rms value
of ripple is given by
Vr _RMSi = Vr
2 3
From Eq (ii),
Vr
1
=
2 3 Vdc
4 3 fCRL
Vr = Vdc
2fCRL
r =

C =

Vdc =
15
= 2083 mF
2fRL Vr
2_60i_150i_0.4i

EXAMPLE 1.61

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Consider a zener diode voltage regulator circuit with a zener voltage


of 10 V, as shown in Figure. The input voltage varies from 13 V to
16 V. The load current varies between 10 mA and 85 mA, minimum
zener current is 15 mA. Find the maximum value of Rs .

SOLUTION :

VZ = 10 V

Zener voltage,
Minimum input voltage,
Maximum input voltage,
Minium load current,
Maximum load current,

Vi_mini = 13 V

Vi_maxi = 16 V

IL_mini = 10 mA

IL_maxi = 85 mA

Minimum zener current,


IZ_mini = 15 mA
(i) Maximum value of Rs is given by
Is = IZ + IL
IZ = Is - IL
Zener current will be minimum when current Is is minimum and load
current IL is maximum, so we can write
IZ (min) = Is (min) - IL (max)

...(i)

Current through resistance Rs is given as

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Is = Vi - VZ
Rs
Vi (min) - VZ
Rs (max)
Substituting this into Eq (i), we have
Vi (min) - VZ
IZ (min) =
- IL (max)
Rs (max)
or,

or,

Is (min) =

Vi (min) - VZ
= IZ (min) + IL (max)
Rs (max)
Rs_maxi =
=

Vi_mini - VZ
IZ_mini + IL_maxi

13 - 10
= 30 W
+
15
85i # 10 -3
_

EXAMPLE 1.62

In the circuit shown in Figure, find the maximum and minimum value
of zener diode current.
SOLUTION :

Minimum current through the 5 kW resistor


Is (min) = 80 - 50 = 6 mA
5k
Maximum current through the 5 kW resistor
Is (max) = 120 - 50 = 14 mA
5k
The load current,
IL = 50 = 5 mA
10
In the circuit, applying KCL

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Is = IZ + IL

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IZ = Is - IL
Zener current will be minimum when current Is is minimum, so we
can write
IZ (min) = Is (min) - IL
= 6 - 5 = 1 mA
Zener current will be maximum when current Is is maximum, so we
can write
IZ (max) = Is (max) - IL
= 14 - 5 = 9 mA

EXAMPLE 1.63

(a) In the circuit shown in Figure, assume IL varies from 0 to 4 mA


and IZ has safe values from 1 to 5 mA. Determine the values of
Vi that can regulate the voltage correctly.
(b) If IZ is fixed at 50/15 mA (i.e. RL = 15 kW fixed), then find the

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safe voltage range of Vi .


SOLUTION :

(a) Given that,


VZ = 50 V

Zener voltage,
Minimum load current,
Maximum load current,
Minimum zener current,

IL_mini = 0

IL_maxi = 4 mA
IZ_mini = 1 mA

Maximum zener current,


IZ_maxi = 5 mA
As explained in Section//, Maximum zener current is given by Eq
(2.17.2) as
IZ (max) = Is (max) - IL (min)
Is (max) = IZ (max) + IL (min)
Vi _maxi - VZ
= IZ (max) + IL (min)
Rs

or,

Vi (max) - 50
= 5+0
5
Vi (max) = _5 # 5i + 50 = 75 V
Zener current will be minimum when current Is is minimum and load
current IL is maximum, so we can write
IZ (min) = Is (min) - IL (max)

c
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Is (min) = IZ (min) + IL (max)


Vi (min) - VZ
or,
= IZ (min) + IL (max)
Rs
Vi (min) - 50
= 1+4 = 5
5
Vi (min) = 75 V
Thus, for VL = 50 V regulated and IL = 0 to 4 mA, V = 75 V . No
variation is permissible.
(b) Now,
IL = 50 = 10 mA (fixed)
15
3
or,

Since,

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Is (max) = IZ (max) + IL
Vi _maxi - VZ
= IZ (max) + IL
Rs

Vi _maxi - 50
= 5 + 10 = 25
3
3
5
25
or
Vi _maxi = 50 + 5 #
= 91.66 V
3
Minimum current through Rs ,
or,
or,

or

Is (min) = IZ (min) + IL
Vi (min) - VZ
= IZ (min) + IL
Rs
Vi (min) - 50
= 1 + 10 = 13
5
3
3
Vi (min) = 50 + 5 # 13 = 71.66 V
3

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7Vi _maxi,Vi (min)A = 791.66 V, 71.66 V A

So Vi varies from 71.66 V to 91.66 V if the load current is fixed at


50/15 mA and IZ varies from 1 to 5 mA.
EXAMPLE 1.64

The circuit shown in Figure is used to provide regulation for


50 mA # IZ # 1 A . Determine the range of load currents for which the
regulation is achieved if the unregulated voltage Vs varies between
7.5 V and 10 V. Assume zener voltage VZ = 5 V .
SOLUTION :

Given that,
VZ = 5 V

Zener voltage,
Minimum input voltage,
Maximum input voltage,
Minimum zener current,
Maximum zener current,

Vi _mini = 7.5 V

Vi _maxi = 10 V

IZ_mini = 50 mA

IZ_maxi = 1 A

From Eq (2.17.1), we know that minimum zener current


IZ (min) = Is (min) - IL (max)
IL (max) = Is (min) - IZ (min)
Vi (min) - VZ
IL (max) = <
F - IZ (min)
Rs
IL (max)

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= ; 7.5 - 5 E - 50 mA
4.75

= 526.3 - 50 = 476.3 mA
Maximum zener current

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.

IZ (max) = Is (max) - IL (min)

IL (min) = Is (max) - IZ (max)


Vi (max) - VZ
IL (min) = <
F - IZ (max)
Rs
IL (min) = ; 10 - 5 E - 1 A
4.75
= 1.05 - 1.0 = 0.05 A = 50 mA
Thus, the range of load currents for regulation is :
50 mA # IL # 476.3 mA
EXAMPLE 1.65

The regulator shown in Figure is required to provide a load voltage of


6 V for all load currents IL # 0.5 A . Input Vs is being varied between
8 V and 10 V, and the zener diode provides regulation for IZ > 0 .
(a) What is the required valued of series resistance Rs ?
(b) Determine the power dissipated rating of the zener diode

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SOLUTION :

Given that,
Vi _mini = 8 V ,

IL _mini = 0 A ,

Vi _maxi = 10 V ,

IL_maxi = 0.5 A ,

VZ = 6 V ,

IZ_mini = 0 A

As obtained in section//,
Rs =
IZ (max) =

Vi_mini - VZ
IZ_mini + IL_maxi

Vi (max) - VZ
- IL (min)
Rs (min)

= 10 - 6 - 0 = 1 A
4
(b) Power rating of Zener is given by
PZ _maxi = VZ IZ (max)

= 6#1 = 6W

EXAMPLE 1.66

The circuit shown in Figure regulates at a voltage of 6 V. The


minimum and maximum zener diode currents are 10 mA and 40 mA
respectively. The load current IL varies from 0 to IL _maxi .
(a) Determine the value of R
(b) What is the value of IL _maxi ?
(c) Find the power rating of the zener diode.
SOLUTION :

Given that,
Vs = 22 V ,

VZ = 6 V ,

IZ _mini = 10 mA ,
(a) We know that,

IL _mini = 0 A

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IZ _maxi = 40 mA

Rs =

Vi - VZ
IZ (max) + IL (min)

Rs =

22 - 6 = 400 W
40 mA + 0

(b)
IZ (min) = Is (min) - IL (max)
Is is fixed and given by
Is = 22 - 6 = 40 mA
400
IL (max) = Is - IZ (min) = 40 - 10 = 30 mA
(c) Power rating of zener diode
PZ = IZ (max) # VZ
= _40i_ 6i

PZ = 240 mW

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