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1. Assembler
2.
Emulator
Dheeraj Suri
8086 Microprocessor
1.
Assembler
2. Emulator
Dheeraj Suri
8086 Microprocessor
AAA
ASCII
Adjust for
Addition
Instruction Descriptions
Numerical data coming into computer from
a terminal is usually in ASCII code.
In this code, the numbers 0 to 9 are
represented by ASCII codes 30h to 39h.
8086 Microprocessor
Instruction Descriptions
AAA
ASCII
Adjust for
Addition
Example:
; Assume AL = 0011 0101, ASCII
5
; BL = 0011 1001, ASCII 9
ADD AL,BL ; Result: AL = 0110 1110 = 6Eh,
which is incorrect BCD
AAA
14
13
12
11
10
4
AF
Dheeraj Suri
0
CF
8086 Microprocessor
BCD
Binary
Coded
Decimal
Dheeraj Suri
8086 Microprocessor
BCD
Binary
Coded
Decimal
9
0000
1001
0000
0001
9
1001
1
0001
Dheeraj Suri
8086 Microprocessor
Instruction Descriptions
AAD converts two unpacked BCD digits in
AH and AL to the equivalent binary number
in AL. The adjustment must be made before
dividing the two unpacked BCD digits in AX
by an unpacked BCD byte. After the
division, AL will contain the unpacked BCD
quotient and AH will contain the unpacked
BCD remainder.
Note: If an attempt is made to divide by 0,
the 8086 will do a type 0 interrupt.
AAD
BCD-toBinary
Convert
before
Division
14
13
12
11
10
SF
ZF
Dheeraj Suri
PF
7
8086 Microprocessor
AAD
BCD-toBinary
Convert
before
Division
Instruction Descriptions
Example:
;AX = 0607h unpacked BCD for 67
; decimal CH = 09h , now adjust to
; binary
AAD
DIV CH
14
13
12
11
10
SF
ZF
Dheeraj Suri
PF
8
8086 Microprocessor
Instruction Descriptions
Before you can multiply two ASCII digits,
you must first mask the upper 4 bits of
each. This leaves unpacked BCD (one BCD
digit per byte) in each byte. After two
unpacked BCD digits are multiplied, the
AAM instruction is used to adjust the
product of two unpacked BCD digits in AX.
AAM
BCD
Adjust
after
Multiply
Flags affected : PF, SF, and ZF are updated. But AF, CF, and OF are left undefined.
15
14
13
12
11
10
SF
ZF
Dheeraj Suri
PF
9
8086 Microprocessor
AAM
BCD
Adjust
after
Multiply
Instruction Descriptions
; AL = 00000101 = unpacked BCD 5
; BH = 00001001 = unpacked BCD 9
MUL BH
; AL X BH ; result in AX
; AX = 00000000 00101101 = 002D h
AAM
OR AX,
3030H
Flags affected : PF, SF, and ZF are updated. But AF, CF, and OF are left undefined.
15
14
13
12
11
10
SF
ZF
Dheeraj Suri
PF
10
8086 Microprocessor
Instruction Descriptions
AAS
ASCII
Adjust for
Subtracti
on
Flags affected : AF and CF are updated, but OF, PF, SF and ZF are left undefined.
15
14
13
12
11
10
4
AF
Dheeraj Suri
0
CF
11
8086 Microprocessor
Instruction Descriptions
AAS
ASCII
Adjust for
Subtracti
on
; ASCII 9 ASCII 5 (9 5)
; AL = 00111001 = 39 H = ASCII 9
; BL = 00110101 = 35 H = ASCII 5
SUB
AL,BL
AAS
Flags affected : AF and CF are updated, but OF, PF, SF and ZF are left undefined.
15
14
13
12
11
10
4
AF
Dheeraj Suri
0
CF
12
8086 Microprocessor
Instruction Descriptions
AAS
ASCII
Adjust for
Subtracti
on
Flags affected : AF and CF are updated, but OF, PF, SF and ZF are left undefined.
15
14
13
12
11
10
4
AF
Dheeraj Suri
0
CF
13
8086 Microprocessor
Instruction Descriptions
These instructions add a number from some
source to a number from some destination
and put the result in specified destination.
The Add with Carry instruction, ADC, also
adds the status of the carry flag into the
result. The source may be an immediate
number, a register, or a memory location
specified by any one of the 24 addressing
modes. The destination may be a register or
a memory location specified by any one of
the 24 addressing modes. The source and
the destination in an instruction cannot
both be memory locations and they must be
of same type.
ADC
Add with
Carry;
ADD
Add
14
13
12
11
OF
10
SF
ZF
Dheeraj Suri
4
AF
2
PF
0
CF
14
8086 Microprocessor
Instruction Descriptions
If one wants to add a byte to a word, one
must copy the byte to a word location and
fill the upper byte of the word with 0s
before adding.
Examples(CODING):
ADC
Add with
Carry;
ADD
Add
ADC CL, BL
ADD DX, BX
; Add contents of BX to
contents
; of DX
14
13
12
11
OF
10
SF
ZF
Dheeraj Suri
4
AF
2
PF
0
CF
15
8086 Microprocessor
Instruction Descriptions
Examples(CODING)(continued):
ADC
Add with
Carry;
ADD
Add
ADC AL,
PRICES[BX]
ADD
PRICES[BX],AL
;Add contents of AL to
contents
; of memory location at
effective
; address PRICES[BX]
14
13
12
11
OF
10
SF
ZF
Dheeraj Suri
4
AF
2
PF
0
CF
16
8086 Microprocessor
Instruction Descriptions
Examples(NUMERICAL):
ADC
Add with
Carry;
ADD
Add
;
;
;
;
ADD CL, BL
Addition of unsigned
numbers CL = 01110011 =
115D + BL=01001111 =
79D Result in CL
; CL = 11000010 = 194D
; Addition of signed numbers
; CL = 01110011 = + 115 D
; +BL = 01001111 = + 79D
; Result in CL
ADD CL, BL
; CL = 11000010 = -62D
incorrect because the result
is too large to fit in 7 bits.
14
13
12
11
OF
10
SF
ZF
Dheeraj Suri
4
AF
2
PF
0
CF
17
8086 Microprocessor
ADC
Add with
Carry;
ADD
Add
Instruction Descriptions
Flag results for signed addition, Example:
CF = 0
PF = 0
AF = 1
ZF = 0
SF = 1
SF
Dheeraj Suri
ZF
AF
PF
CF
18
8086 Microprocessor
ADC
Add with
Carry;
ADD
Add
Instruction Descriptions
Flag results for signed addition, Example:
OF = 1 Incorrectly indicated that the result
was negative. If you are adding two
signed 16-bit values, the OF will be
set if the magnitude of the result is
too large to fit in the lower 15 bits of
the destination.
NOTE: PF is meaningful only for an 8-bit result.
AF is set only by a carry out of bit 3. Therefore,
the DAA instruction cannot be used after word
additions to convert the result to correct BCD.
SF
ZF
Dheeraj Suri
4
AF
2
PF
0
CF
19
8086 Microprocessor
AND
AND
correspon
ding Bits
of Two
operands
- AND
Destinati
on,
Source
Instruction Descriptions
This instruction ANDs each bit in a source
byte or word with the same number bit in a
destination byte or word. The result is put
in the specified destination. The contents of
the specified source will not be changed.
The result for each bit position will follow
the truth table for a two-input AND gate. In
other words, a bit in the specified
destination will be a 1 only if that bit is a 1
in both the source and the destination
operands. Therefore, a bit can be
masked(reset) by ANDing it with 0.
Flags affected : PF, SF, and ZF are updated by AND. But CF and OF are both 0. AF is
undefined.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
SF
Dheeraj Suri
ZF
PF
0
20
8086 Microprocessor
AND
AND
correspon
ding Bits
of Two
operands
- AND
Destinati
on,
Source
Instruction Descriptions
The source operand can be an immediate
number, the contents of a register, or the
contents of a memory location specified by
one of the 24 addressing modes. The
destination can be a register or a memory
location. The source and the destination
cannot both be memory locations in the
same instruction. CF and OF are both 0 after
AND. PF, SF, and ZF are updated by AND. AF
is undefined. Note that PF has meaning only
for an 8-bit operand.
Flags affected : PF, SF, and ZF are updated by AND. But CF and OF are both 0. AF is
undefined.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
SF
Dheeraj Suri
ZF
PF
0
21
8086 Microprocessor
AND
AND
correspon
ding Bits
of Two
operands
- AND
Destinati
on,
Source
Instruction Descriptions
EXAMPLES(CODING):
; AND word in DS at offset[SI]
; with word in CX register
AND
CX,[SI]
; Result in CX Register
AND BH, CL
Flags affected : PF, SF, and ZF are updated by AND. But CF and OF are both 0. AF is
undefined.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
SF
Dheeraj Suri
ZF
PF
0
22
8086 Microprocessor
AND
AND
correspon
ding Bits
of Two
operands
- AND
Destinati
on,
Source
Instruction Descriptions
EXAMPLES(NUMERICAL):
; BX = 10110011 01011110
AND BX,
00FFH
Flags affected : PF, SF, and ZF are updated by AND. But CF and OF are both 0. AF is
undefined.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
SF
Dheeraj Suri
ZF
PF
0
23
8086 Microprocessor
CALL
Call a
procedure
.
Instruction Descriptions
The CALL instruction is used to transfer
execution to a sub-program or procedure.
There are two basic types of calls, near and
far. A near call is a call to a procedure
which is in the same code segment as the
CALL instruction. When the 8086 executes a
near CALL instruction, it decrements the
stack pointer by 2 and copies the offset of
the next instruction after the CALL onto the
stack. This offset saved on the stack is
referred to as return address, because this
is the address that execution will return to
after the procedure executes. A near CALL
instruction will also load the instruction
pointer with the offset of the first
instruction in the procedure. A RET
instruction at the end of the procedure Dheeraj Suri
24
8086 Microprocessor
Dheeraj Suri
25
8086 Microprocessor
Examples:
CALL MULTO
Call BX
CALL WORD
PTR (BX)
26
8086 Microprocessor
Examples(continued):
CALL SMART- ;A direct call to another segment far or
DIVIDE
;intersegment call. SMART-DIVIDE is the name
;of the procedure. The procedure must be
;declared far with SMART_DIVIDE PROC FAR
;at its start. The Assembler will determine the
;code segment base for the segment which
;contains the procedure and the offset of the
;start of the procedure. It will put these values
;in as part of the instruction code.
CALL
DWORD
PTR[BX]
Dheeraj Suri
27
8086 Microprocessor
Instruction Descriptions
This instruction copies the sign of a byte in
AL to all the bits in AH. AH is then said to be
the sign extension of AL. The CBW operation
must be done before a signed byte in AL can
be divided by another signed byte with the
IDIV instruction. CBW affects no flags
CBWConvert
Signed
Byte to
Signed
Word
14
13
12
11
10
Dheeraj Suri
28
8086 Microprocessor
Instruction Descriptions
Example:
CBWConvert
Signed
Byte to
Signed
Word
14
13
12
11
10
Dheeraj Suri
29
8086 Microprocessor
Instruction Descriptions
This instruction resets the carry flag to 0.
No other flags are affected.
CLC
Clear the
Carry
Flag (CF)
Example:
CLC
14
13
12
11
10
0
CF
Dheeraj Suri
30
8086 Microprocessor
CLD
Clear
Direction
Flag
Instruction Descriptions
This instruction resets the direction flag to
0. No other flags are affected. If the
direction flag is reset, SI and DI will
automatically be incremented when one of
the string instructions, such as MOVS,
CMPS, or SCAS, executes.
Example:
CLD
14
13
12
11
10
DF
Dheeraj Suri
31
8086 Microprocessor
CLI
Clear
Interrupt
Flag
Instruction Descriptions
This instruction resets the interrupt flag to
0. No other flags are affected. If the
interrupt flag is reset, the 8086 will not
respond to an interrupt signal on its INTR
input. The CLI instruction, however, has no
effect on the non-maskable interrupt input,
NMI.
14
13
12
11
10
IF
Dheeraj Suri
32
8086 Microprocessor
CMC
Complem
ent the
Carry
Flag
Instruction Descriptions
If the Carry flag (CF) is a 0 before this
instruction, it will be set to a 1 after the
instruction. If the carry flag is 1 before this
instruction, it will be reset to 0 after the
instruction executes. Obviously CMC affects
only the Carry Flag.
Example:
CMC
14
13
12
11
10
0
CF
Dheeraj Suri
33
8086 Microprocessor
CMP
Compare
Byte or
Word
CMP
Destinati
on,
Source
Instruction Descriptions
Compares a byte/word from the specified source
with a byte/word from the specified destination.
The source can be a an immediate number, a
register, or a memory location. The destination
can be a register or a memory location. The
source and destination cannot both be memory
locations in the same instruction. The
comparison is actually done by subtracting the
source byte or word from the destination byte or
word. The source and the destination are not
changed, but the flags are set to indicate the
results of comparison. AF, OF,SF, ZF, PF, and CF
are updated by the CMP instruction.
Flags affected : AF, OF, SF, ZF, PF and CF are updated. Rest flags are unaffected.
15
14
13
12
11
OF
10
SF
ZF
Dheeraj Suri
4
AF
2
PF
0
CF
34
8086 Microprocessor
CMP
Compare
Byte or
Word
CMP
Destinati
on,
Source
Instruction Descriptions
For the instruction CMP CX, BX
will be left as follows:
CF
ZF
SF
CX =
BX
; Result of
subtraction
; is 0
CX >
BX
CX <
BX
; Subtraction
; required
; borrow, so CF = 1
Flags affected : AF, OF, SF, ZF, PF and CF are updated. Rest flags are unaffected.
15
14
13
12
11
OF
10
SF
ZF
Dheeraj Suri
4
AF
2
PF
0
CF
35
8086 Microprocessor
CMP
Compare
Byte or
Word
CMP
Destinati
on,
Source
Instruction Descriptions
Example:
CMP
AL,01H
CMP BH,
CL
CMP CX,
; Compare word in DS at
TEMP_MIN ; displacement TEMP_MIN with
word
; in CX
CMP
;Compare CS with word in DS at
TEMP_MAX ; displacement TEMP_MAX
, CX
Flags affected : AF, OF, SF, ZF, PF and CF are updated. Rest flags are unaffected.
15
14
13
12
11
OF
10
SF
ZF
Dheeraj Suri
4
AF
2
PF
0
CF
36
8086 Microprocessor
CMP
Compare
Byte or
Word
CMP
Destinati
on,
Source
Instruction Descriptions
Example:
CMP
PRICES[BX],
49H
Flags affected : AF, OF, SF, ZF, PF and CF are updated. Rest flags are unaffected.
15
14
13
12
11
OF
10
SF
ZF
Dheeraj Suri
4
AF
2
PF
0
CF
37
8086 Microprocessor
CMPS/CM
PSB/CMP
SW
Compare
String
Bytes or
String
Words
Instruction Descriptions
The CMPS instruction can be used to
compare a byte/word in one string with a
byte/word in another string. SI is used to
hold the offset of a byte or word in the
source string, and DI is used to hold the
offset of a byte or word in the other string.
The comparison is done by subtracting the
byte or word pointed to by DI from the byte
or word pointed to by SI. The AF, CF, OF, PF,
SF and ZF flags are affected by the
comparison, but neither operand is affected.
---- contd.
14
13
12
11
OF
10
SF
ZF
Dheeraj Suri
4
AF
2
PF
0
CF
38
8086 Microprocessor
CMPS/CM
PSB/CMP
SW
Compare
String
Bytes or
String
Words
Instruction Descriptions
After the comparison, SI and DI will
automatically be incremented or decremented to
point to the next elements in the two strings. If
the direction flag has previously been set to a 1
with an STD instruction, then SI and DI will
automatically be decremented by 1 for a byte
string or by 2 for word string. If the direction
flag has been previously set to 0 with a CLD
instruction, SI and DI will automatically be
incremented after the compare. They will be
incremented by 1 for byte strings and by 2 for
word strings. The string pointed to by DI must
be in the extra segment, the string pointed to by
SI must be in the data segment.
14
13
12
11
OF
10
SF
ZF
Dheeraj Suri
4
AF
2
PF
0
CF
39
8086 Microprocessor
Instruction Descriptions
CMPS/CM
PSB/CMP
SW
Compare
String
Bytes or
String
Words
; Point SI at the
; source string
; DF cleared, so SI & DI
; would auto increment
; after compare
MOV CX,100
REPE CMPSB
14
13
12
11
OF
10
SF
ZF
Dheeraj Suri
AF
PF
CF
40
8086 Microprocessor
CMPS/CM
PSB/CMP
SW
Compare
String
Bytes or
String
Words
Instruction Descriptions
-- NOTE:
CX functions as a counter which the REPE prefix
will cause to be decremented after each
compare. The B attached to the CMPS tells the
assembler that the strings are of type byte. If
you want to tell the assembler that strings are of
type word, write the instruction as CMPSW. The
REPE CMPSW instruction will cause the pointers
in SI and DI to be incremented by 2 after each
compare if the direction flag is cleared or
decremented by 2 if the direction flag is set.
SF
Dheeraj Suri
ZF
4
AF
2
PF
0
CF
41
8086 Microprocessor
CWD
Convert
Signed
Word to
signed
double
word
Instruction Descriptions
CWD copies the sign bit of a word in AX to
all the bits of the DX register. In other
words, it extends the sign of AX into all of
DX. The CWD operation must be done
before a signed word in AX can be divided
by another signed word with the IDIV
instruction. CWD affects no flags.
Example: --- contd.
14
13
12
11
10
Dheeraj Suri
42
8086 Microprocessor
CWD
Convert
Signed
Word to
signed
double
word
Instruction Descriptions
Example:
; DX = 00000000 00000000
; AX= 11110000 11000111
; = -3897 decimal
CWD
14
13
12
11
10
Dheeraj Suri
43
8086 Microprocessor
DAA
Decimal
Adjust AL
after BCD
Addition
Instruction Descriptions
This instruction is used to make sure the
result of adding two packed BCD numbers is
adjusted to be a legal BCD number. The
result of addition must be in AL for DAA to
work correctly. If the lower nibble in AL
after addition is greater than 9 or AF was
set by the addition, then the DAA
instruction will add 6 to the lower nibble in
AL. If the result in the upper nibble is now
greater than 9 or if the carry flag was set by
the addition or correction, then the DAA
instruction will add 60H to AL
Flags affected : DAA instruction updates AF, CF, PF, and ZF. OF is undefined after
the DAA instruction.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
XX
ZF
Dheeraj Suri
AF
PF
CF
44
8086 Microprocessor
DAA
Decimal
Adjust AL
after BCD
Addition
Instruction Descriptions
Examples:
; AL = 0101 1001 = 59 BCD
; BL = 0011 0101 = 35 BCD
ADD AL,BL
DAA
ADD AL,BL
DAA
Flags affected : DAA instruction updates AF, CF, PF, and ZF. OF is undefined after
the DAA instruction.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
XX
ZF
Dheeraj Suri
AF
PF
CF
45
8086 Microprocessor
DAA
Decimal
Adjust AL
after BCD
Addition
Instruction Descriptions
Examples: (continued).
; 1101 > 9 so add 0110 0000
Flags affected : DAA instruction updates AF, CF, PF, and ZF. OF is undefined after
the DAA instruction.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
XX
ZF
Dheeraj Suri
AF
PF
CF
46
8086 Microprocessor
DAA
Decimal
Adjust AL
after BCD
Addition
Instruction Descriptions
Examples: (continued).
MOV
COUNT,00h
MOV AL,
COUNT
ADD AL,01h
DAA
MOV
COUNT,AL
Flags affected : DAA instruction updates AF, CF, PF, and ZF. OF is undefined after
the DAA instruction.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
XX
ZF
Dheeraj Suri
AF
PF
CF
47
8086 Microprocessor
DAS
Decimal
Adjust
after BCD
Subtracti
on
Instruction Descriptions
This instruction is used after subtracting
two packed BCD numbers to make sure the
result is correct packed BCD. The result of
subtraction must be in AL for DAS to work
correctly. If the lower nibble in AL after
subtraction is greater than 9 or the AF was
set by the subtraction, then DAS would
subtract 6 from the lower nibble of AL.
If the result in the upper nibble is now
greater than 9 or if the carry flag was set,
the DAS instruction will subtract 60 from
AL. Examples in the next slide.
Flags affected : DAS instruction updates AF, CF, SF, PF, and ZF. OF is undefined
after the DAS instruction.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
XX
SF
Dheeraj Suri
ZF
AF
PF
0
CF
48
8086 Microprocessor
DAS
Decimal
Adjust
after BCD
Subtracti
on
Instruction Descriptions
Examples:
;AL = 1000 0110 = 86 BCD
DAS
SUB AL,BH
; AL = 11010111 = D7h, CF = 1
Flags affected : DAS instruction updates AF, CF, SF, PF, and ZF. OF is undefined
after the DAS instruction.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
XX
SF
Dheeraj Suri
ZF
AF
PF
0
CF
49
8086 Microprocessor
DAS
Decimal
Adjust
after BCD
Subtracti
on
Instruction Descriptions
Examples:
DAS
Flags affected : DAS instruction updates AF, CF, SF, PF, and ZF. OF is undefined
after the DAS instruction.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
XX
SF
Dheeraj Suri
ZF
AF
PF
0
CF
50
8086 Microprocessor
DAS
Decimal
Adjust
after BCD
Subtracti
on
Instruction Descriptions
Examples:
MOV AL,
COUNT
DAS
MOV COUNT,
AL
Flags affected : DAS instruction updates AF, CF, SF, PF, and ZF. OF is undefined
after the DAS instruction.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
XX
SF
Dheeraj Suri
ZF
AF
PF
0
CF
51
8086 Microprocessor
Instruction Descriptions
Flags affected : AF, OF, PF, SF, and ZF are updated, but CF is not affected.
15
14
13
12
11
OF
10
SF
ZF
Dheeraj Suri
4
AF
PF
52
8086 Microprocessor
DEC
Decrement
Destination
Register or
Memory
DEC
Destination
Instruction Descriptions
Examples:
DEC CL
DEC BP
DEC BYTE
PTR[BX]
Flags affected : AF, OF, PF, SF, and ZF are updated, but CF is not affected.
15
14
13
12
11
OF
10
SF
ZF
Dheeraj Suri
4
AF
PF
53
8086 Microprocessor
DEC
Decrement
Destination
Register or
Memory
DEC
Destination
Instruction Descriptions
Examples(continued):
DEC WORD
PTR[BP]
DEC
TOMATO_CAN
_COUNT
Flags affected : AF, OF, PF, SF, and ZF are updated, but CF is not affected.
15
14
13
12
11
OF
10
SF
ZF
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AF
PF
54
8086 Microprocessor
Instruction Descriptions
DIV
Unsigned
Divide
DIV source
Flags affected : The CF, OF, SF, ZF, AF, and PF flags are undefined.
15
14
13
12
11
10
IF
TF
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8086 Microprocessor
Instruction Descriptions
DIV
Unsigned
Divide
DIV source
Examples(syntax):
DIV BL
DIV CX
DIV
SCALE[BX]
Flags affected : The CF, OF, SF, ZF, AF, and PF flags are undefined
15
14
13
12
11
10
IF
TF
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8086 Microprocessor
Instruction Descriptions
DIV
Unsigned
Divide
DIV source
Examples(Numerical):
;AX = 37D7h = 14,295 D
;BH = 97h = 151 D
DIV BH
Flags affected : The CF, OF, SF, ZF, AF, and PF flags are undefined
15
14
13
12
11
10
IF
TF
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57
8086 Microprocessor
ESC
Escape
Instruction Descriptions
This instruction is used to pass instructions to a
co-processor, such as the 8087 math processor
which shares the address and data bus with
8086. Instructions for the co-processor are
represented by a 6-bit code embedded in the
escape instruction. As the 8086 fetches
instruction bytes, the co-processor also catches
these bytes from the data bus and puts them in
its queue.
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8086 Microprocessor
HLT Halt
Processing
Instruction Descriptions
The HLT instruction will cause the 8086 to stop
fetching and executing instructions. The 8086
will enter a halt state. The only ways to get the
processor out of the halt state are with an
interrupt signal on the INTR pin, an interrupt
signal on the NMI pin, or a reset signal on the
RESET input.
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8086 Microprocessor
IDIV
Divide by
signed byte
or word
IDIV
source
Instruction Descriptions
This instruction is used to divide a signed word
by a signed byte, or to divide a signed
doubleword (32bits) by a signed word.
When dividing a signed word by a signed byte,
the world must be in the AX register. The divisor
can be in an 8-bit register or a memory location.
After the division, AL will contain the signed
result (quotient), and AH will contain the signed
remainder. The sign of the remainder will be the
same as the sign of the dividend. If an attempt is
made to divide by 0, the quotient is greater than
127 (7Fh), or the quotient is less than -127
(81h), the 8086 will automatically do a type 0
interrupt.
If one wants to divide a signed byte by a signed
byte, one must first put the dividend byte in AL
and fill AH with copies of the sign bit from AL. In
other words, if AL is +ve, then AH should be
filled with all 0s . If AL is ve (sign bit = 1)..
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8086 Microprocessor
Instruction Descriptions
--- then AH should be filled with all 1s. The
8086 convert byte to world instruction, CBW,
does this by copying the sign bit of AL to all bits
of AH. AH is then said to contain the sign
extension of AL.
Likewise, if one wants to divide a signed word by
a signed word, one must put the dividend word
in AX and extend the sign of AX to all bits of DX.
The 8086 Convert Word to Double word
instruction, CWD, will copy the sign bit of AX to
all bits of DX.
IDIV
Divide by
Signed
Byte or
Word
IDIV
source
14
13
12
11
10
XX
XX
XX
XX
XX
XX
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XX
2
XX
0
XX
61
8086 Microprocessor
IDIV
Divide by
Signed
Byte or
Word
IDIV
source
Instruction Descriptions
Examples(Coding):
IDIV BL
IDIV BP
IDIV BYTE
PTR[BX]
MOV AL,
DIVIDEND
CBW
IDIV
DIVISOR
14
13
12
11
10
XX
XX
XX
XX
XX
XX
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XX
2
XX
0
XX
62
8086 Microprocessor
IDIV
Divide by
Signed
Byte or
Word
IDIV
source
Instruction Descriptions
Examples(Numerical):
; A signed word divided by a
; signed byte
; AX = 00000011 10101011
=03ABh = 39 D
; BL = 11010011 = D3h = -2Dh
= -45 decimal
IDIV BL
14
13
12
11
10
XX
XX
XX
XX
XX
XX
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XX
2
XX
0
XX
63
8086 Microprocessor
IDIV
Divide by
Signed
Byte or
Word
IDIV
source
Instruction Descriptions
Examples(Numerical)- contd.:
; A signed byte divided by a
signed byte
; AX = 11011010= - 26h = -38 D
; CH = 00000011 = +3h = +3D
CBW
IDIV CH
; Divide AX by CH
; AL = 11110100 = -0Ch = -12 D
; AH = 11111110 = -2h = -2D
XX
XX
XX
XX
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4
XX
2
XX
0
XX
64
8086 Microprocessor
Instruction Descriptions
IMUL
Multiply
Signed
Numbers
IMUL
Source
Flags affected : CF and OF are updated. AF, PF, SF and ZF are undefined after IMUL
15
14
13
12
11
10
OF
0
CF
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8086 Microprocessor
Instruction Descriptions
IMUL
Multiply
Signed
Numbers
IMUL
Source
Examples (Coding):
IMUL BH
IMUL AX
MOV CX,
MULTIPLIER
MOV AL,
MULTIPLICAND
CBW
IMUL CX
; Result in DX and AX
Flags affected : CF and OF are updated. AF, PF, SF and ZF are undefined after IMUL
15
14
13
12
11
10
OF
0
CF
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8086 Microprocessor
Instruction Descriptions
IMUL
Multiply
Signed
Numbers
IMUL
Source
Examples (Numerical):
; 69 X 14
; AL = 01000101 = 69 Decimal
; BL = 00001110 = 14 Decimal
IMUL BL
;
;
;
;
;
;
;
IMUL BL
Flags affected : CF and OF are updated. AF, PF, SF and ZF are undefined after IMUL
15
14
13
12
11
10
OF
0
CF
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8086 Microprocessor
IN Copy
data from a
port IN
Accumulato
r, Port
Instruction Descriptions
The IN instruction will copy data from a port to the AL
or AX register. If an 8-bit port is read, the data will go
to AL. If a 16-bit port is read, the data will go to AX.
The IN instruction has two possible formats, fixed port
and variable port.
For the fixed port type, the 8-bit address of a port is
specified directly in the instruction. Examples:
IN AL, 0C8h
IN AX, 34h
A_TO_D EQU
4Ah
IN AX,
A_TO_D
14
13
12
11
10
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8086 Microprocessor
IN Copy
data from a
port IN
Accumulato
r, Port
Instruction Descriptions
For the variable-port-type IN instruction, the port
address is loaded into the DX register before the IN
instruction. Since DX is a 16-bit register, the port
address can be any number between 0000h and FFFFh.
Therefore, up to 65,536 ports are addressable in this
mode. Examples:
MOV DX,
0FF78h
IN AL, DX
IN AX, DX
14
13
12
11
10
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8086 Microprocessor
INC
IncrementINC
destination
Instruction Descriptions
The INC instruction adds 1 to a specified
register or to a memory location specified in
any one of the 24 addressing modes
(memory). Examples:
INC BL
; Add 1 to contents of BL
; register
INC CX
; Add 1 to contents of CX
register
Note: Carry flag is not affected. This means that if an 8-bit destination containing FFh or
a 16-bit destination containing FFFFh is incremented, the result will be all 0s with no
Carry
Flags affected : AF, OF, PF, SF, and ZF are affected. CF is not affected.
15
14
13
12
11
10
OF
DF
IF
TF
SF
ZF
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AF
PF
70
8086 Microprocessor
Instruction Descriptions
14
13
12
11
10
IF
TF
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8086 Microprocessor
Instruction Descriptions
INT 3
Flags affected : IF and TF are affected. Other flags are not affected.
15
14
13
12
11
10
IF
TF
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8086 Microprocessor
INTOInterrupt
on
Overflow
Instruction Descriptions
If the overflow flag (OF) is set, this instruction will
cause the 8086 to do an indirect far call to a procedure
you write to handle the overflow condition. Before
doing the call, the 8086 will:
1. Decrement the stack pointer by 2 and push the
flags onto stack.
2. Decrement the stack pointer, by 2 and push CS
onto the stack.
3. Decrement the SP by 2 and push the offset of the
next instruction after the INTO instruction onto the
stack.
4.
Reset TF and IF. Other flags are not affected. To
do the call, the 8086 will read a new value for IP
from address 00010h and a new value of CS from
address 00012h.
INTO
Flags affected :
15
14
13
12
11
10
IF
TF
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73
8086 Microprocessor
IRET
Interrupt
Return
Instruction Descriptions
When the 8086 responds to an interrupt signal
or to an interrupt instruction, it pushes the flags,
the current value of CS, and the current value of
IP onto the stack. It then loads CS and IP with
the starting address of the procedure which one
writes for the response to that interrupt. The
IRET instruction is used at the end of the
interrupt service procedure to return execution
to the interrupted program. To do this return,
the 8086 copies the saved value of IP from the
stack to IP, the stored value of CS from the stack
to CS, and the stored value of the flags back to
the flag register. Flags will have the values they
had before the interrupt, so any flag settings
from the procedure will be lost unless they are
specifically saved in some way.
Note: The RET instruction should not normally be used to return from interrupt
procedures because it doesnot copy the flags from the stack back to the flag
register.
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8086 Microprocessor
JA/JNBE
Jump if
Above/Ju
mp if Not
below or
Equal
Instruction Descriptions
The terms above and below are used when
referring to the magnitude of unsigned numbers.
The number 0111 is above the number 0010. If,
after a compare or some other instruction which
affects flags, the zero flag and the carry flag are
both 0, this instruction will cause execution to
jump to a label given in the instruction. If CF and
ZF are not both 0, the instruction will have no
effect on program execution. The destination
label for the jump must be in the range of -128
bytes to +127 bytes from the address of the
instruction after the JA. JA/JNBE affects no
flags.
14
13
12
11
10
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8086 Microprocessor
JA/JNBE
Jump if
Above/Ju
mp if Not
below or
Equal
Instruction Descriptions
Examples:
CMP AX, 4371h
JA RUN_PRESS
JNBE
RUN_PRESS
14
13
12
11
10
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76
8086 Microprocessor
JAE/JNB/
JNC
Jump if
Above or
Equal/Ju
mp if Not
below/Ju
mp if No
Carry
Instruction Descriptions
The three mnemonics represent the same
instruction. The terms above and below are used
when referring to the magnitude of unsigned
numbers. The number 0111 is above the number
0010. If, after a compare or some other
instruction which affects flags, the carry flag is
0, this instruction will cause execution to jump
to a label given in the instruction. If CF is 1, the
instruction will have no effect on the program
execution. The destination label for the jump
must be in the range of -128 bytes to +127 bytes
from the address of the instruction after the JAE.
JAE/JNB/JNC affects no flags.
14
13
12
11
10
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8086 Microprocessor
JAE/JNB/
JNC
Jump if
Above or
Equal/Ju
mp if Not
below/Ju
mp if No
Carry
Instruction Descriptions
Examples:
CMP AX,4371h ; Compare (AX 4371h)
JAE
RUN_PRESS
CMP AX,
4371h
JNB
RUN_PRESS
ADD AL,BL
JNC OK
14
13
12
11
10
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8086 Microprocessor
JB/JC/JN
AE
Jump if
Below/Ju
mp if
Carry/Ju
mp if Not
above or
Equal
Instruction Descriptions
These three mnemonics represent the same
instruction. Just like previous, the description of
these instructions can be understood.
Examples:
CMP AX,4371h
JB RUN_PRESS
ADD BX,CX
JC ERROR_FIX
CMP AX,4371h
; Compare AX 4371h
JNAE
RUN_PRESS
14
13
12
11
10
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8086 Microprocessor
JBE/JNA
Jump if
Below or
Equal/Ju
mp if Not
above
Instruction Descriptions
JBE & JNA represent the same instruction. The
terms above and equal are used when referring
to the magnitude of unsigned numbers. The
number 0111 is above the number 0010. If, after
a compare or some other instruction which
affects flags, either the zero flag or the carry flag
is 1, this instruction will cause execution to jump
to a label given in the instruction. If CF and ZF
are both 0, the instruction will have no effect on
program execution. The destination label for the
jump must be in the range of -128 bytes to +127
bytes from the address of the instruction after
the JBE. JBE/JNA affects no flags.
14
13
12
11
10
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8086 Microprocessor
JBE/JNA
Jump if
Below or
Equal/Ju
mp if Not
above
Instruction Descriptions
Examples:
CMP AX, 4371h
JBE RUN_PRESS
JNA RUN_PRESS
14
13
12
11
10
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8086 Microprocessor
Instruction Descriptions
This instruction will cause a jump to a label given in
the instruction if the CX register contains all 0s,
execution will simply proceed to the next instruction.
Note that this instruction doesnot look at the zero flag
when it decides whether to jump or not. The
destination label for this instruction must be in the
range of -128 to +127 bytes from the address of the
instruction after JCXZ instruction. JCXZ affects no
flags. Example:
JCXZ
Jump if
CX
register
is Zero
JCXZ SKIP_LOOP
INC BX
LOOP NXT
; Loop until CX = 0
SKIP_LOOP:
; Next instruction
14
13
12
11
10
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8086 Microprocessor
JE/JZ
Jump if
Equal/Ju
mp if
Zero
Instruction Descriptions
JE & JZ mnemonics represent the same
instruction. If the zero flag is set, this instruction
will cause execution to jump to a label given in
the instruction. If the zero flag is not 1,
execution will simply go on to the next
instruction after JE or JZ. The destination label
for the JE/JZ instruction must be in the range of
-128 to +127 bytes from the address of the
instruction after the JE/JZ instruction. JE/JZ
affects no flags. Example : (next slide)
14
13
12
11
10
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8086 Microprocessor
JE/JZ
Jump if
Equal/Ju
mp if
Zero
Instruction Descriptions
NXT: CMP BX, DX
JE DONE
; Jump to DONE if BX = DX
SUB BX, AX
; Else subtract AX
INC CX
; Increment Counter
JMP NXT
; Check again
; Copy count to AX
IN AL, 8Fh
JZ START_MACHINE
14
13
12
11
10
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8086 Microprocessor
JG/JNLEJump if
Greater/J
ump if
Not less
than or
Equal
Instruction Descriptions
JG or JNLE represent the same instruction. The
terms greater or less are used to refer to the
relationship of two signed numbers. Greater
means more positive. The number 00000111 is
greater than the number 11101010, because in
signed notation the second number is negative.
This instruction is usually used after a Compare
instruction. The instruction will cause a jump to
a label given in the instruction if the Zero Flag is
0 and the carry flag is the same as the overflow
flag. The destination label must be in the range
of -128 bytes to +127 bytes from the address of
instruction after JG/JNLE instruction. If the jump
is not taken, execution simply goes on to the
next instruction after the JG or JNLE instruction.
JG/JNLE affects no flags.
14
13
12
11
10
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8086 Microprocessor
JG/JNLEJump if
Greater/J
ump if
Not less
than or
Equal
Instruction Descriptions
Examples:
CMP BL, 39h
JG NEXT_1
JNLE NEXT_1
14
13
12
11
10
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8086 Microprocessor
Instruction Descriptions
JGE/JNL both represent the same instruction. The
terms greater and less are used to refer to the
relationship of two signed numbers. Greater means
more positive. The number 00000111 is greater
than the number 11101010,
because in signed
notation the second number is negative. This
instruction is usually used after the compare
instruction. The instruction will cause a jump to a
label given in the instruction if the sign flag is equal
to the overflow flag. The destination label must be
in the range of -128 bytes to +127 bytes from the
address of the instruction after the JGE/JNL
instruction. If the jump is not taken, execution
simply goes on to the next instruction after the JGE
or JNL instruction. JGE/JNL affects no flags.
Example (on next slide)
JGE/JNL
Jump if
Greater
Than or
Equal/Ju
mp if Not
less Than
14
13
12
11
10
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8086 Microprocessor
Instruction Descriptions
JGE/JNL
Jump if
Greater
Than or
Equal/Ju
mp if Not
less Than
JGE NEXT_1
JNL NEXT_1
14
13
12
11
10
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8086 Microprocessor
Instruction Descriptions
JL/JNGE
Jump if
Less
Than/Jump
if Not
Greater
Than or
Equal
14
13
12
11
10
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8086 Microprocessor
Instruction Descriptions
JL/JNGE
Jump if
Less
Than/Jump
if Not
Greater
Than or
Equal
JL AGAIN
JNGE AGAIN
14
13
12
11
10
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8086 Microprocessor
Instruction Descriptions
JLE/JNG both represent the same instruction. The
terms greater and less are used to refer to the
relationship of two signed numbers. Greater means
more positive. The number 00000111 is greater
than the number 11101010,
because in signed
notation the second number is negative. This
instruction is usually used after the compare
instruction. The instruction will cause a jump to a
label given in the instruction if the zero flag is set,
or if the sign flag is not equal to the overflow flag.
The destination label must be in the range of -128
bytes to
+127 bytes from the address of the
instruction after the JLE/JNG instruction. If the
jump is not taken, execution simply goes on to the
next instruction after the JL or JNGE instruction.
JLE/JNG affects no flags. Example (on next slide)
JLE/JNG
Jump if
Less Than
or
Equal/Jump
if Not
Greater
14
13
12
11
10
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8086 Microprocessor
Instruction Descriptions
JLE/JNG
Jump if
Less Than
or
Equal/Jum
p if Not
Greater
JLE NXT_1
CMP BL,39h
JNG
PRINTER
14
13
12
11
10
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8086 Microprocessor
Instruction Descriptions
14
13
12
11
10
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8086 Microprocessor
Instruction Descriptions
JMPUnconditio
nal Jump
to
Specified
Destination
JMP Continue
JMP BX
14
13
12
11
10
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8086 Microprocessor
Instruction Descriptions
JMPUnconditio
nal Jump
to
Specified
Destination
JMP WORD
PTR[BX]
JMP DWORD
PTR[SI]
14
13
12
11
10
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8086 Microprocessor
Instruction Descriptions
The slides for rest of the instructions are
Under construction. Until then students
Are advised to refer section 6.2 in
Douglas V. Hall!
Flags affected :
15
14
13
12
11
10
OF
DF
IF
TF
SF
ZF
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AF
2
PF
0
CF
96