ECEN 665

OSCILLATORS

An oscillator is a circuit, which produces a periodic signal without

any input signal. It converts DC power (from the supply) to a
periodic signal.
Oscillators are extensively used in both receive and transmit paths.
They are used to provide the local oscillation for the mixers for up
and down conversion.
On this topic, we cover:
1.
2.
3.
4.

Oscillator basics
Oscillator topologies
Phase noise issues
Oscillator implementations and design
1

Oscillator types:
1.
2.
3.
4.
5.

Crystal oscillators
Active-RC and Gm-C oscillators
Ring oscillators
LC timed oscillators
Relaxation oscillators.
etc.

Voltage Controlled Oscillators:

VCOs are used in RF applications, usually, in a Phase locked loop
to provide Different LO frequencies needed for channel selection.
Besides frequency synthesis it is used for other applications.
2

OSCILLATOR BASICS
Most RF oscillators can be viewed as + ve feedback system.
vi

+
+

A(s)

vo

(s)

A( s )
vi ( s )
1 A( s ) ( s )
The Barkhausen Criterion states that sustained oscillation can be achieved.
vo ( s ) =

if
and

A(so ) (so ) = 1

Loop gain equal to unity.

A(so ) (so ) = 0o

For zero vi the output will be finite at a given frequency (o).

For loop gain >1 oscillation will grow.
3

Two-Port vs One-Port Models

The previously shown model is known as the two-port model, because the A(s) and (s)
Networks are both two-port nets in a closed loop.
The one-port model of oscillators is shown below:
Active Network
-Rp

Resonator
Rp

The resonator (LC tank for example) has parasitic resistances (RP) which prevents the
resonator from oscillating because the stored energy will leak through the resistance. To
compensate for this loss a positive feedback negative parallel resistances (-Rp) will be
added to the resonator so that the energy loss in Rp is replenished by the negative
resistance. The negative resistances implementation is typically an active network.

What sets the Frequency and Amplitude of an Oscillator?

The frequency is usually set by Barkhausen Criterion. It is the frequency

at which the loop gain is greater or equal to 1 and the phase is zero.
In many cases, as in LC tuned oscillators, the ideal oscillation frequency
is determined by the LC tank.
fo =

1
2 LC

The amplitude is, however, more a complicated parameter to set.

More on Oscillator Theory:

j

Ideal Oscillator:
iL

o =

iC

1
LC

Once the tank is excited (by a current pulse for example) a certain amount of energy
will be conserved. This energy will alternate between magnetic and electric forms.
In the time domain:

v=L

diL
dt

but i L = ic
and ic = C

dv
dt

d v2
v = LC 2
dt
d v2
or 2 + o2v = 0
dt

where o =

1
LC

The Differential Equation of the Ideal Oscillator

d v2
2
+

v=0
o
2
dt

When solved yields:

v(t ) = V1 e j

o t

+ V2 e j

o t

Choosing the case where the phase angle is zero at t=0

v(t ) = V sin ot

In the frequency domain:

V ( s ) = sL(iL ( s ) + iL (o) ) but

I c ( s ) = iL ( s )
I c = sC v( s )

sLo2iL (o)
V (s) = 2
s + o2
Both poles are at jo as expected !!
7

Real Oscillator:

C
L
RL

Initial excitation well start some oscillation.

This will die out after a while because the
Energy leaks through the parasitic resistances.

RC

o 1
o

Characteristic equation
s 2 LC RC + s(L + RL RC C )

+ RL

o
o 1

or

o2 =
s2 + s

1
4Q 2

L + RL RC C
RL
+
LCRC
LCRC

RL
LC RC

1
4Q 2

L + RL RC C
2 LCRC
8

If oscillation is to be maintained. The energy loss (due to parasitic resistance) is to be

compensated for. This energy is usually provided from the power supply via a negative
resistance, a nonlinear conductance or regenerative feedback, which convert dc power
to signal power.
igm
v
igm
iL
ic
ir
Slope = - a
Negative
C
L
G
Resistor
v
ir

G=

1
QL2 RL // Qc2 Rc

Slope = G

RL and Rc are the

series parasitic Rs
of the L and C , respectively.
L
where Q L = o
RL
QC =

1
oCRC

v
igm + ir

steeper

slope = - a + G
flatter
v
q

The following model equation can be written

iL + ic + ir + igm = 0
1
vdT
L
dv
ic = C
dt
ir = Gv
iL =

Differentiating both sides of the above equation:

1
dv digm
d 2v
=0
v+C 2 +G +
dt
dt
L
dt

d
d 2v
LC 2 + L Gv + igm + v = 0
dt
dt

The above DE describes the behaviour of many oscillator implementations.

10

At the quiescent bias point (which is the equilibrium point)

d
(i gm )
dt

v =0

= a

d 2v
+ L(G a ) + v = 0
LC
dt
In the frequency domain, the characteristic equation at the equilibrium point is given by:
LCs 2 + L(G a )s + 1 = 0
Solving for the poles of the system:
1 G a
G a
s1, 2 =

j
C
LC
C
2
2

= j

In the time domain:

v(t ) = A et cos t
Oscillation
envelope

Oscillation
11

v(t ) = A et cos t
a G
where =
2C
From the above equ., the following observations can be made:
1
1. The oscillator frequency is determined by
LC

>o

2.

if

3.

if < o

(G < a )
(G > a )

growing oscillation.
Decaying oscillation

RHP

LHP

t
t

G<a

G>a

12

In practical oscillators, the slope of the negative resistance or nonlinear element (a) is made
greater than G (a 3G ) . This results in growing oscillations as long as the swing is limited
between points p and q.
If the oscillation swing grows beyond p or q, the
slope (a-G) or become negative and the poles

(a G )

move the LHP causing the oscillation to decay

tempe. Until the swing drops within below p

and/or q. This is how a sustained oscillation is

produced and a steady sate can be reached.
Note that the oscillations will not be pure sinusoid. The harmonics are
Usually far out and can be easily filtered.
Also note that it is hard to determine the oscillation swing exactly!
13

The van der Pol Approximation

In the 1920s , Van der Pol proposed to model the total I-V Chc (igm + ir ) vs v
is the simplest possible manner. He assumed a cubic approximation.
i (v ) = a1v + b1v3
i (v )

where
a1 = a G
b1 =

vx
vx

a G
vx2

Van der Pols analysis leads to the following time domain expression for the
Oscillation voltage.

1
2

(t t o )

1 + e LC cos t +

LC

L
where = a1
C
is introduced to provide the proper phase in relation to the constant to

4 a1
v(t ) =
3 b1

14

At steady state, the zero-to-peak voltage amplitude reaches a maximum

value of

vmax =

4 a1
= 1.15 vx
3 b1

15

Basic LC Oscillator Topologies

(a) Feedback model:

ii

v = (i f + ii )Z = (ii + Gmv )Z

if+ii

v
L

-Gm+-

i f = Gmv

v (1 Gm Z ) = ii Z
v = ii

Z
1 Gm Z

when Z =

1
G + sC +

1
sL

sc
G
s 2 + s + o2
C
sc
sL
=
v = ii 2
i
i 2
s + s (G Gm ) / c + o2
s LC + sL(G Gm ) + 1
The characteristic :
=

s 2 LC + L(G Gm )s + 1 = 0

NOTE: Similarly to that on pp 11

16

(b) Negative Resistance Model:

Gmv
ir
L

g mv

Gm
-

1
gm

gmv

negative resistance
Negative Resistance Realization:
v
i = g m (v )

Gm =

= gm
, <1
v(1 )
1

A MOS device can also be used.

17

See the sustained on the next page. The frequency

Tvpairs=3
Periodic:FALSE
Delay:0
V2
G0

1
LC

A small narrow pulse to start simulations.

The pulse T < 1 (to produce freq. at
p
fo
i.

VO
C15
C:1e-12

R22
R=10000

oL12
I:1e-9

ggain=-100.0u

gm =

1
R

v
gnd
18

19

20

21

22

VCC

Full Oscillator Realization:

LC
Tank

To avoid loading the LC tank (to prevent

reducing its Q), an impedance transformer
to up-convert the impedance (Z 2 > Z1 ).

v
Z2

Impedance
Transformer

Z1

Different realization for the impedance transformation are shown below:

VCC

n :1

COLPITTS OSC.
VCC

Z 2 = n 2 Z1

C1
C2

Z 2 = (1 + C1 C2 )2 Z1

HARTLEY OSC.
VCC

L1
L2

Z 2 = (1 + L2 L1 )2 Z L

23

Note that a resonance, the phase shift of the loop is supposed to be zero (according to
The Barkhausan Criterion). That is why the output signal is fed back to the emitter. The
Zero-phase condition may be satisfied if the output signal is inverted and then fed back to
the base as shown below:
VCC

LC
Load

v
Q2

inverter

Q1

Q2

This topology is widely used and is known as the v Gm oscillator

v
Q1

24

It is interesting to note that the cross-coupled pair (BJT an MOS) presents a negative
resistance to the tank. That is why it can be classified as a negative resistance oscillator.
Since it is a fully differential circuit we may model the cross-coupled pair as follows:

a
v

g mv

v
g mv

The resistance between a and a can be expressed as:

R=

v ( v )
2
=
g mv
gm

25

1 BJT Realization:

VCC
L

Cvp

Cvp

C
VBB

The capacitor divider is used to reduce the voltage swing at the base compared to
that at the collector to avoid saturating the BJTs.
vbase = vcollector

Cvp
C + C

C > Cvp

The AC coupling resistors add noise.

26

2 NMOS (or PMOS) Realization

It is similar to the BJT except that it does not need capacitive division.
V CC

3 CMOS Realization:
p2

P1
v1

v2

N1

N2

Io
27

Current Limited Oscillation

In this case the current of the tail current sources is fully switched from one side of the
pair to the other at a frequency = 1 Assuming that the BJT or MOS switches
o
LC
are fast enough, the current waveform in each branch is a square wave with 50% duty
cycle. Assuming that the tail current is Io , the current wave form in one side of the
pair has the following shape.
Io
0

2T

3T

This can be described by its power series as

1
4
4

i( f ) = I o 1 + sin ot +
sin 3ot + L
2
3

NOTE: If the current wave form deviate from a square wave which is typically the
4
case the factor will change to some other number depending on the
on the current waveform shape!!
28

Consider the NMOS oscillator:

VCC
L2
RL 2
RL 2
L2

o =
2C

2C

v1

v1

2C

L2
QL =

o L
RL

v1 (t ) = = I o sin ot Z
o

2
v12 p = v1 p v2 p = I o R

v2

Io

QL2 RL 2 = R 2

Io

1
LC

= o

R
I R
sin ot = o sin ot
2

R
R
R = Q 2L L // QC2 C
2
2
2

Io

NOTE: The current components at 3, 5, 7 will produce voltage components

with small power because the impedance at these frequencies is small.

29

o =

1
= 12.56 GHz
LC

QL = 50

QL2 = 628.3

QC = 25

QCL = 314.2
R
= 209C
2

Switching of square wave current (pulses)

30

31

Now consider the CMOS oscillator with a similar tank as that used for the NMOS
Oscillator (pp 24).
In one half cycle, the devices P1 and N2 are on while N1 and P2 are off, so the
oscillator can be modeled as follows:
L
Io
v1

v1
Io

R
Io

On the second half cycle, the current through R is still Io but flows in the opposite
direction. So the current waveform (assuming that the PMOS and NMOS devices
switch enough) looks as follows:
+Io

-Io
32

This is different from the wave form previously shown, because it is bipolar. The
Fourier expansion for the CMOS oscillator is:
4
4
4

i (t ) = I o sin ot +
sin 3ot +
sin 5ot L
3
5

The differential voltage of the CMOS oscillator is hence, given by:

v12 (t ) = =
o

v12 p =

4Io

R sin ot

Io R

Note that swing of the CMOS oscillator is double that of the NMOS (or PMOS)
oscillator as seen before.

33

Some Important Points:

1.

In the oscillators cases we considered so far we have assumed that the swing is
small enough so that the swing is determined by the current and the tank parallel
resistance. If this is the case, we consider the oscillator to be current limited. If
The swing grows too much, the swing will be limited by the supply voltage and in
the oscillator is known to be voltage limited.

2.

In current limited cases, the swing increases by increasing the current (tail current)
or by using high Q tank (which increases the resistance.).

3.

The switching speed of the core devices will determine the current waveform shape
which in turn determines magnitude of I at o (fundamental component).

34

Voltage Controlled Oscillators

This is one of the most critical blocks in any RF frequency synthesizers. Adjustable
oscillators are used for tuning to desired frequencies. A VCO is used as part of a
PLL to obtain precise frequencies.

The frequency tuning is done by changing the LC tank capacitance value. This is more
practical than varying the inductance. Different types of variations have been used to
obtain a voltage controlled capacitance. Among them are pm junction varactors and
MOS varactors and MOS varactors.

In a pn junction varactor the oscillator output node is connected to either the p or n side
and the controlling voltage is applied to the opposite terminal

Vosc.

or
VC

VC

Vosc.

35

MOS varactor come in two types. Let us consider NMOS varactors.

Vosc
VW
(VC)
n+

n+
Conventional
MOS

p-well

On this device even

at high frequencies
the capitance will
return to Cox at
p+
some point.

(VC)

Vosc
VW
p+
p-well

MOS Cap

For high
frequency

VW

36

For MOS Cap:

O
Cox

S
Qs

VGW < 0 Accumulation mode

V Qm & Qs

C = COX
Qm

VT > VGW > 0 Depletion mode

C=

Cox Cdep

V Qdep

Qm

C ox + Cdep

Cdep =

Qdep

dQdep
dV

Cox

Cdep
37

VGW > VT
At low frequency:
Since the frequency is low, the minority
charges have time to be pulled from the
bulk to the surface to make up the inv.
layer and the depletion layer does not
change any more so
dQ
C = inv = Cox
dV

Qm

V Qinv Qdep = 0
Qdep
Qinv

At high frequency:
There is no time to attract minority changes
to the surface. So the change comes form
the dep layer
C=

CoxCdep
Cox + Cdep
38

An ideal VCO has the following law

f osc = f o + KVCOVC
Control
Free running
frequency

VCO gain
(Hz/V)

fosc
fo

VC

39

The spectrum of n (t ) is up-converted to C

Qn

Ideal Oscillator

Real Oscillator

The phase noise is measured by dividing the power in 1Hz bandwidth at an offset f
by the power of the carrier (fc).

power in 1Hz at f offset

L(f ) = Phase noise = 40log
dBc Hz
power
of
the
carrier

40

Implications of Phase Noise

In the case of receiver:

If wanted
signal

Interfer
Interfer
IF

RF
Signal

Overlap of the
interference with
the wanted signal
after down conversion

LO
c

LO
~ Oscillator

41

In the case of transmitter:

If the phase noise of the LO at the transmitters side is large, the skirt
of the RF transmitted signal overlaps nearby wanted signals and hence
reduces the SNR.

Wanted
signal

TX

RX

TX

TX

42

Pint

S( f )
Interference
with skirt
due to phase
noise

Assume that, from the blocking specs, that

Pint - Psig = YdB

Wanted
signal

Psig = the signal power integrated over

channel BW.

f1

f2

BWch

Assume also that a given signal to noise ratio (SNR) is to be met.

The noise power = Pn = ff 2 S n ( f )df
1

for simplicity assume the S n ( f ) is constant (Pno )

between f1 & f 2 .

Pn = Pno ( f 2 f1 ) = Pno BWch

1
1 Pn Psig
Pno Pn BWch
Pn
=
=

n =
Pint
Pint
BWch Pint BWch P sig Pint

n = ( 10 log BWch SNR Y ) dBc Hz

n = (10 log BWch + SNR + Y ) dBc Hz

43

LEESONS MODEL
Based on a linear time in variant approach for timed LC tank oscillators, one can
derive an expression for the phase noise.

In(w)
Effective noise source
(white noise)

GL

-Gactive

o
It can be shown that impedance seen by the effective noise source at o + o
(where << o is given by:

Z (o + o ) = j

1 o
GL 2QL

GL is the parallel parasitic conductance of the tank

QL is the loaded Q of the tank
44

The phase noise (for the case of white noise) can, hence be given by:
L( BW ) = 10 log

2
vnoise
2
vsig

1
Z (o + BW )2 in2
= 10 log 2
1 2
Vsig
2
1 2
in 1

o
2

= 10 log
1 GL2 2QL
Vsig
2

in2 can be written as 4 F KT GL this expression for the effective noise curent density is
not physical. (Just a model!) F is difficult to derive and is just a fitting parameter!
2
2 FKT

L( ) = 10 log
Psig 2QL

1
= ioVsig GL
2
The rms power dissipated in GL.
Ps =

45

Even though the LTI model is not accurate, it yields important facts for oscillator design:

1. L( )

1
QL2

increase QL

2. L( )

1
Ps

increase Ps by increasing QL and I

reduce noise inside the oscillator.

3. L( )

Leesons model is not accurate and fails top account for the large signal
Behavior of the oscillator. Yet it gives insight for oscillator design.

46