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ELECTRONICS II BE(EE) 3 AB
Introduction!
ELECTRONICS II BE(EE) 3 AB
Introduction :
We
have
studied
configurations.
discretecircuit
amplifier
contd!
ELECTRONICS II BE(EE) 3 AB
Because r0 = VA/ID
Two major MOSFET capacitances are Cgs and Cgd. We see that:
Shorter devices exhibit much higher operating speeds and wider
amplifier bandwidths.
EX: fT for 0.25 m NMOS transistor can be as high as 10 GHz.
contd!
ELECTRONICS II BE(EE) 3 AB
id
v gs
ID =
BJT
= k n
W
VGS Vt
L
W
1
k n
VGS Vt
2
L
) or
(V
2 ID
GS
DS
gm =
) 1 + VV
2
Vt
id
+
vgs
_
gmvgs
ro
vo
gmv
ro
is
Cgd
+
Vgs
Cgs
gmVgs
rx
ro
gmV
ro
The frequency at which magnitude of hfe drops to unity is called unity-gain bandwidth wT.
Rc
8k
= 100
100 k
1 mA
vO
RL
5k
- 10 V
ELECTRONICS II BE(EE) 3 AB
10
Vcc
Iref
Q1
+
_
Q2
VBE
Implementation!
ELECTRONICS II BE(EE) 3 AB
11
Vcc
Rc
8k
+
vO
= 100
RB
100 k
1 mA
RL
5k
_
- 10 V
Vcc
Iref
Q1
Q2
+
_
VBE
- VEE
ELECTRONICS II BE(EE) 3 AB
12
Now:
Also:
And:
Then:
1
k n
2
W
VGS Vt
L 1
I D1 = I ref =
Io = I D2 =
Io
I ref
(V
DD
VGS
R
)
(
1 W
k n VGS Vt
2 L 2
W
L
= 2
W
L 1
VDD
R
IRef
Io
ID1
D
Q1
I o = I ref
G
G
I D1 =
VGS
D
Q2
S
Because the circuit replicates or mirrors the reference current, it is given the name of
current mirror.
A constant dc current (called reference current) is generated at one location and then
replicated at various other locations through a process called current steering.
Usually a precision resistor external to the chip is used for generating the reference
current.
MOS Current Steering Circuits!
ELECTRONICS II BE(EE) 3 AB
13
VDD +
VDD
IRef
Q4
I2
Q5
I5
Current Sink
Q1
VSG5
I3
I4
Current Source
Q3
Q2
VGS1
W
L 2
I 2 = I ref
W
L 1
- VSS
and
W
L 3
I3 = I ref
W
L 1
For saturation region operation, the voltages at the drains of Q2 and Q3 are constrained as
follows:
14
vo
vi
vgs
gmvgs
ro
15
vCC
The circuit is :-
I
vi
vo
vi
Ro = r0
+
_
gmv
ro v o
There will be five capacitances in total namely: Cgs , Cgd ,Cgb , Csb, and Cdb
(triode region)
(saturation region)
16
Another small capacitance that should be added to Cgs and Cgd is the capacitance that results from the
fact that the source and drain diffusions extend slightly under the gate oxide.
If overlap length is denoted by Lov, the overlap capacitance Cov = WLovCox (typically Lov = 0.05 to 0.1 L)
Csb =
Csbo
VSB
1+
Vo
and
Cdb =
Cdbo
V
1 + DB
Vo
Where Csbo = value of Csb at zero-body source bias, VSB is equal to magnitude of
reverse bias voltage. Vo is equal to junction built in voltage of 0.6 to 0.8 volts.
contd.
ELECTRONICS II BE(EE) 3 AB
17
Cgd
G
+
Vgs
Cgs
gmVgs
ro
_
vbs
_
S
gmbVbs
Cdb
Csb
B
contd.
ELECTRONICS II BE(EE) 3 AB
18
Cgd
Cgs
gmVgs
gmbVbs
ro
Cdb
Csb
_
S
Cgd
G
+
Vgs
Cgs
D
gmVgs
ro
Cdb
_
S
ELECTRONICS II BE(EE) 3 AB
19
Cgd
G
+
Vgs
Cgs
D
gmVgs
ro
_
S
ELECTRONICS II BE(EE) 3 AB
20
Vo/vin (dB)
Mid band
LF band
HF band
fH
fL
ELECTRONICS II BE(EE) 3 AB
f (Hz)