Beruflich Dokumente
Kultur Dokumente
Synchronous PWM
Switching Converter
The NCP3170 is a flexible synchronous PWM Switching Buck
Regulator. The NCP3170 operates from 4.5 V to 18 V, sourcing up to
3 A and is capable of producing output voltages as low as 0.8 V. The
NCP3170 also incorporates current mode control. To reduce the
number of external components, a number of features are internally set
including soft start, power good detection, and switching frequency.
The NCP3170 is currently available in an SOIC8 package.
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SOIC8 NB
CASE 751
Features
MARKING DIAGRAM
8
3170x
ALYW
G
1
3170x
x
A
L
Y
W
G
PIN CONNECTIONS
Typical Applications
VIN
L1 4.7 mH
EN
3.3 V
NCP3170
R1
COMP
FB1
AGND
PGND
CC
AGND
FB
EN
COMP
PG
ORDERING INFORMATION
VSW
PG
VSW
(Top View)
VIN
C1
22 mF
PGND
VIN
C2, C3
22 mF
Device
Package
Shipping
NCP3170ADR2G
SOIC8
(PbFree)
NCP3170BDR2G
SOIC8
(PbFree)
R2
RC
NCP3170
VIN
VDD
EN
Power
Control
(PC)
UVLO
POR
Driver
Voltage
Clamp
VCV
VCL
Soft Start
Reference
Slope
Compensation
0.030 V/A
Current
Sense
ORing
Circuit
Oscillator
+
FB
Pulse by
Pulse
Current
Limit
SSETQ
RCLRQ
VIN
COMP
Soft Start
Complete
998 mV
867 mV
728 mV
Logic
PDRV
HS
VSW
VCW
hs
VCL
LS
NDRV
PG
Zero
Current
Detection
Over
Temperature
Protection
VSW
PGND
AGND
Pin Name
PGND
The power ground pin is the high current path for the device. The pin should be soldered to a large copper
area to reduce thermal resistance. PGND needs to be electrically connected to AGND.
Description
VIN
The input voltage pin powers the internal control circuitry and is monitored by multiple voltage comparators.
The VIN pin is also connected to the internal power PMOS switch and linear regulator output. The VIN pin
has high di/dt edges and must be decoupled to ground close to the pin of the device.
AGND
FB
COMP
EN
Enable pin. Pull EN to logic high to enable the device. Pull EN to logic low to disable the device. Do not leave
it open.
PG
Power good is an open drain 500 mA pull down indicating output voltage is within the power good window. If
the power good function is not used, it can be connected to the VSW node to reduce thermal resistance. Do
not connect PG to the VSW node if the application is turning on into pre-bias.
VSW
The VSW pin is the connection of the drains of the internal N and P MOSFETS. At switch off, the inductor will
drive this pin below ground as the body diode and the NMOS conducts with a high dv/dt.
The analog ground pin serves as small-signal ground. All small-signal ground paths should connect to the
AGND pin and should also be electrically connected to power ground at a single point, avoiding any high
current ground returns.
Inverting input to the OTA error amplifier. The FB pin in conjunction with the external compensation serves to
stabilize and achieve the desired output voltage with current mode compensation.
The loop compensation pin is used to compensate the transconductance amplifier which stabilizes the
operation of the converter stage. Place compensation components as close to the converter as possible.
Connect a RC network between COMP and AGND to compensate the control loop.
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2
NCP3170
Table 2. ABSOLUTE MAXIMUM RATINGS (measured vs. GND pin 3, unless otherwise noted)
Rating
Main Supply Voltage Input
Voltage between PGND and AGND
PWM Feedback Voltage
Error Amplifier Voltage
Symbol
VMAX
VMIN
Unit
VIN
20
0.3
VPAG
0.3
0.3
FB
0.3
COMP
0.3
Enable Voltage
EN
VIN + 0.3 V
0.3
PG Voltage
PG
VIN + 0.3 V
0.3
VSW
VIN + 0.3 V
0.7
VSWST
VIN + 10 V
TJ
+150
TA
40 to +85
Tstg
55 to +150
PD
RqJA
RqJC
1.15
87
37.8
W
C/W
C/W
RF
260 peak
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. The maximum package power dissipation limit must not be exceeded.
PD +
T J(max) * T A
R qJA
2. The value of qJA is measured with the device mounted on 2in x 2in FR4 board with 2oz. copper, in a still air environment with TA = 25C.
The value in any given application depends on the users specific board design.
3. 60180 seconds minimum above 237C.
Symbol
Min
Max
Unit
4.5
18
PG
4.5
18
VSW
0.3
18
EN
18
COMP
0.1
5.5
FB
0.1
5.5
PGND
0.1
0.1
TJ
40
125
TA
40
85
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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NCP3170
Table 4. ELECTRICAL CHARACTERISTICS
(TA = 25C, VIN = VEN = 12 V, VOUT = 3.3 V for min/max values unless otherwise noted (Note 7))
Characteristic
Conditions
Min
Typ
Max
Unit
(Note 5)
4.5
18
1.7
1.7
2.0
2.0
mA
EN = 0 V (Note 5)
13
17
mA
4.41
4.13
Enable = VIN
450
900
500
1000
550
1100
kHz
91
90
96
96
VIN = 12 V
6.0
4.0
11
11.5
VFB = VCOMP
3.5
4.6
6.0
ms
(Note 4)
4.0
6.0
TA = 25C
0.792
0.8
0.808
(Note 4)
201
mS
AOL DC gain
(Note 4)
40
55
dB
(Note 4)
2.0
MHz
NCP3170A
NCP3170B
MODULATOR
Oscillator Frequency
NCP3170A
NCP3170B
NCP3170A
NCP3170B
NCP3170A
NCP3170B
(Note 4)
286
nA
VFB = 0 V
20.1
mA
VFB = 2 V
21.3
mA
(Note 5)
1.41
875
mV
859
mV
712
mV
728
mV
ENABLE
Enable Threshold
POWER GOOD
998
mV
0.195
VIN = 12 V
VIN = 4.5 V
90
100
130
150
mW
VIN = 12 V
VIN = 4.5 V
25
29
35
39
mW
(Notes 4 and 6)
164
43
THERMAL SHUTDOWN
Thermal Shutdown
Hysteresis
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Guaranteed by design
5. Ambient temperature range of 40C to +85C.
6. This is not a protection feature.
7. The device is not guaranteed to operate beyond the maximum operating ratings.
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NCP3170
TYPICAL PERFORMANCE CHARACTERISTICS
(Circuit from Figure 1, TA = 25C, VIN = VEN = 12 V, VOUT = 3.3 V unless otherwise specified)
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NCP3170
TYPICAL PERFORMANCE CHARACTERISTICS
(Circuit from Figure 1, TA = 25C, VIN = VEN = 12 V, VOUT = 3.3 V unless otherwise specified)
30
2.1
24
21
18
15
Input Voltage = 12 V
12
9
6
3
0
50 30
10
30
50
70
90
110
1.5
10
10
30
50
70
90
110 130
Input Voltage = 18 V
1.6
803
Input Voltage = 12 V
801
800
799
798
797
50 30
10
10
30
50
70
90
110
Input Voltage = 18 V
502
Input Voltage = 4.5 V
501
Input Voltage = 12 V
500
499
498
497
496
50 30
130
10
10
30
50
70
90
110 130
TEMPERATURE (C)
TEMPERATURE (C)
735
TRIP VOLTAGE AT FB PIN (mV)
1.7
TEMPERATURE (C)
804
725
720
715
1.8
TEMPERATURE (C)
805
730
Input Voltage = 12 V
1.3
50 30
130
806
802
1.9
1.4
Input Voltage = 18 V
2.0
Input Voltage = 18 V
CURRENT DRAW (mA)
27
710
705
50 30
10
10
30
50
70
90
110
875
870
865
Over Voltage Protection Rising
860
855
50 30
130
10
10
30
50
70
90
110 130
TEMPERATURE (C)
TEMPERATURE (C)
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NCP3170
TYPICAL PERFORMANCE CHARACTERISTICS
(Circuit from Figure 1, TA = 25C, VIN = VEN = 12 V, VOUT = 3.3 V unless otherwise specified)
40
LOW SIDE MOSFET RDS(on) (mW)
130
120
110
Input Voltage = 4.5 V
100
90
Input Voltage = 12 V, 18 V
80
70
60
50 30
10
10
30
50
70
90
110
30
Input Voltage = 4.5 V
25
Input Voltage = 12 V, 18 V
20
15
50 30
130
10
10
30
50
70
90
110 130
TEMPERATURE (C)
TEMPERATURE (C)
215
1001.5
TRIP VOLTAGE AT FB PIN (mV)
Input Voltage = 12 V
210
Input Voltage = 4.5 V
205
200
Input Voltage = 18 V
195
190
185
180
50 30
10
10
30
50
70
90
110
130
1001.0
1000.5
1000.0
999.5
999.0
998.5
Input Voltage = 18 V
998.0
Input Voltage = 12 V
997.5
997.0
996.5
50 30
10
10
30
50
70
90
110 130
TEMPERATURE (C)
TEMPERATURE (C)
4.45
TRIP VOLTAGE AT FB PIN (mV)
TRANSCONDUCTANCE (mS)
35
4.40
4.35
4.30
4.25
4.20
4.15
4.10
4.05
50 30
10
10
30
50
70
90
110
130
TEMPERATURE (C)
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NCP3170
NCP3170A Efficiency and Thermal Derating
100
100
90
90
80
Vo = 5 V
Vo = 3.3 V
70
EFFICIENCY (%)
EFFICIENCY (%)
80
Vo = 1.8 V
60
Vo = 1.2 V
50
40
30
20
60
50
40
30
5 V, 500 kHz
Efficiency
10
0
0
Vo = 3.3 V
Vo = 1.2 V
20
12 V, 500 kHz
Efficiency
10
Vo = 1.8 V
70
Thermal derating curves for the SOIC8 package part under typical input and output conditions based on the evaluation board.
The ambient temperature is 25C with natural convection (air speed < 50 LFM) unless otherwise specified.
5
IOUT, AMBIENT TEMPERATURE (C)
4
1.2 V, 1.8 V,
3.3 V
0
25
35
45
55
65
75
TA, AMBIENT TEMPERATURE (C)
85
4
1.2 V, 1.8 V,
3.3 V, 5.0 V
0
25
35
45
55
65
75
TA, AMBIENT TEMPERATURE (C)
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85
NCP3170
NCP3170B Efficiency and Thermal Derating
100
100
90
90
80
Vo = 3.3 V
70
Vo = 5 V
EFFICIENCY (%)
EFFICIENCY (%)
80
Vo = 1.8 V
60
Vo = 1.2 V
50
40
30
20
60
50
40
30
5 V, 1 MHz
Efficiency
10
0
0
Vo = 3.3 V
Vo = 1.2 V
20
12 V, 1 MHz
Efficiency
10
Vo = 1.8 V
70
Thermal derating curves for the SOIC8 package part under typical input and output conditions based on the evaluation board.
The ambient temperature is 25C with natural convection (air speed < 50 LFM) unless otherwise specified.
5
IOUT, AMBIENT TEMPERATURE (C)
4
1.2 V,
1.8 V
3.3 V
2
0
25
35
45
55
65
75
4
1.2 V,
1.8 V
3.3 V
2
5.0 V
0
25
85
35
45
55
65
75
85
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NCP3170
DETAILED DESCRIPTION
The NCP3170 is a current-mode, step down regulator
with an integrated high-side PMOS switch and a low-side
NMOS switch. It operates from a 4.5 V to 18 V input voltage
range and supplies up to 3 A of load current. The duty ratio
can be adjusted from 8% to 92% allowing a wide output
voltage range. Features include enable control, Power-On
Reset (POR), input under voltage lockout, fixed internal soft
start, power good indication, over voltage protection, and
thermal shutdown.
VIN
C1IN
Rbias
EN
NCP3170
C1DLY
AGND
VIN
C1IN
EN
VIN Start + EN TH
where:
ENTH
VINSTART
R1UV
R2UV
R3UV
VOUT
1)
(eq. 1)
EN TH
R2 UV
R2 UV ) R3 UV
R2 UV
R3 UV
(eq. 2)
= Enable Threshold
= Input Voltage Start Threshold
= High Side Resistor
= Low Side Resistor
= Hysteresis Bias Resistor
= Regulated Output Voltage
VIN
C1IN
R1UV
EN
VIN
R3UV
VOUT
R1UV
EN
R1 UV
4.5 V18 V
C1IN
C1UV
R3 UV
NCP3170
AGND
4.5 V18 V
V OUT * EN TH
NCP3170
NCP3170
R2UV
AGND
R2UV
AGND
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NCP3170
slowly raises and the OTA regulates the output voltage to the
divided reference voltage. In a pre-biased condition, the
voltage at the FB pin is higher than the internal reference
voltage, so the OTA will keep the COMP voltage at ground
potential. As the internal reference is slewed up, the COMP
pin is held low until the FB pin voltage surpasses the internal
reference voltage, at which time the COMP pin is allowed
to respond to the OTA error signal. Since the bottom of the
PWM ramp is at 0.6 V there will be a slight delay between
the time the internal reference voltage passes the FB voltage
and when the part starts to switch. Once the COMP error
signal intersects with the bottom of the ramp, the high side
switch is turned on followed by the low side switch. After the
internal reference voltage has surpassed the FB voltage, soft
start proceeds normally without output voltage discharge.
VIN
C1IN
R1LOG
EN
C1LOG
R2LOG
NCP3170
AGND
Power Good
4.5 V18 V
Vo1
VIN
VSW
EN
PG
FB
AGND
Vo1
NCP3170
4.5 V18 V
Vo2
Vo2
VIN
VSW
EN
FB
AGND
NCP3170
FB
12 V
800 mV
862 mV
726 mV
Pre-Bias Start-up
Comp 2
+
SOFT
Start
Complete
Comp 1
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11
100 kW
PG
NCP3170
Light Load Operation
OOV
Hysteresis = 14 mV
VOOV = 862 mV
Hysteresis = 14 mV
Power Good
VREF = 0.8 V
VOUV = 726 mV
OUV
0.862 V
0.8 V
0.726 V
FB Voltage
Soft Start Complete
6 ms = 166 kHz
Power Good
2 ms = 50 kHz
Switch
Node
0V
Inductor
Current
0A
Feedback
Voltage
Switching Frequency
COMP
Voltage
Reference Votlage
Ramp Threshold
PROTECTION FEATURES
Over Current Protection
Switch
Node
Current Limit
Inductor
Current
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NCP3170
operating in PWM mode. Figure 41 and 42 below shows the
safe operating area for the NCP3170A and B respectively.
While not shown in the safe operating area graph, the output
voltage is capable of increasing to the 93% duty ratio
limitation providing a high output voltage such as 16 V. If
the application requires a high duty ratio such as converting
from 14 V to 10 V the converter will operate normally until
the maximum duty ratio is reached. For example, if the input
voltage were 16 V and the user wanted to produce the
highest possible output voltage at full load, a good rule of
thumb is to use 80% duty ratio. The discrepancy between the
usable duty ratio and the actual duty ratio is due to the
voltage drops in the system, thus leading to a maximum
output voltage of 12.8 V rather than 14.8 V. The actual
achievable output to input voltage ratio is dependent on
layout, component selection, and acceptable output voltage
tolerance.
trip is engaged, switching ceases and high side and low side
MOSFETs are driven off. Further, the power good indicator
will pull low until the thermal trip has been released. Once
the die temperature reaches 120C the part will reinitiate
soft-start and begin normal operation.
Switch
Node
Output
Voltage
Thermal
Comparator
150C
120C
IC
Temperature
FB Voltage
Softstart
Complete
Power
Good
Low Side
Switch
Duty Ratio
Design Procedure
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NCP3170
design point and optimize the performance of your regulator
based on your design criteria.
ra +
where:
DI
IOUT
ra
Example Value
9 V to 16 V
200 mV
20 mV
3A
500 kHz
L OUT +
where:
D
FSW
T
TOFF
TON
VIN
VHSD
VLSD
VOUT
T ON
T
1
T
(1 * D ) +
T OFF
27.5% +
I OUT
ra
F SW
(1 * D )
(eq. 7)
12 V
3.0 A
34%
500 kHz
( 1 * 27.5% )
= Duty ratio
= Switching frequency
= Output current
= Output inductance
= Ripple current ratio
19
17
(eq. 4)
T
15
V IN * V HSD ) V LSD
V IN
V OUT
where:
D
FSW
IOUT
LOUT
ra
(eq. 3)
V OUT ) V LSD
V OUT
4.7 mH +
[
(eq. 5)
INDUCTANCE (mH)
F SW +
D+
= Ripple current
= Output current
= Ripple current ratio
D+
(eq. 6)
3.3 V
D+
DI
I OUT
3.3 V
12 V
= Duty ratio
= Switching frequency
= Switching period
= High side switch off time
= High side switch on time
= Input voltage
= High side switch voltage drop
= Low side switch voltage drop
= Output voltage
13
11
18 V
7V
4.7 mH
5
3
4.4 V
1
10
13
16
19
22
25
28
31
34
37
40
Inductor Selection
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NCP3170
1 ) ra12
2
I RMS + I OUT
3.01 A + 3 A
where:
IOUT
IRMS
ra
1 ) 34%
12
(eq. 8)
1.02 A +
where:
D
FSW
IPP
LOUT
VOUT
= Output current
= Inductor RMS current
= Ripple current ratio
I PK + I OUT
3.51 A + 3 A
where:
IOUT
IPK
ra
I PP +
1 ) ra
2
(eq. 9)
F SW
L OUT
3.3 V
(eq. 11)
( 1 * 27.5% )
4.7 mH
500 kHz
= Duty ratio
= Switching frequency
= Peak-to-peak current of the inductor
= Output inductance
= Output voltage
LP CU_DC + I RMS
where:
DCR
IRMS
LPCU_DC
DCR
61 mW + 3.01 2
6.73 mW
(eq. 12)
= Inductor DC resistance
= Inductor RMS current
= Inductor DC power dissipation
(eq. 13)
67 mW + 61 mW ) 5 mW ) 1 mW
(eq. 10)
12 V * 3.3 V
A
1.85
+
ms
4.7 mH
where:
LOUT
VIN
VOUT
(1 * D )
34%
1)
2
= Output current
= Inductor peak current
= Ripple current ratio
SlewRate LOUT +
V OUT
where:
LPCore
LPCU_AC
LPCU_DC
LPtot
= Output inductance
= Input voltage
= Output voltage
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NCP3170
100 mF at 0 V but measure 20 mF with an applied voltage of
3.3 V depending on the type of capacitor selected.
The output capacitor must be rated to handle the ripple
current at full load with proper derating. The capacitor RMS
ratings given in datasheets are generally for lower switching
frequencies than used in switch mode power supplies, but a
multiplier is given for higher frequency operation. The RMS
current for the output capacitor can be calculated below:
CO RMS + I OUT
1.84 mV +
V ESLOFF +
0.7 mV +
ra
12
where:
D
ESL
FSW
IPP
(eq. 14)
34%
0.294 A + 3.0 A
12
where:
CoRMS
IOUT
ra
V ESLON +
ra
CO ESR )
1
8
F SW
C OUT
where:
CoESR
COUT
FSW
IOUT
ra
VESR_C
34%
5 mW )
1
8
500 kHz
F SW
(eq. 16)
I PP
F SW
(1 * D )
1 nH
1.1 A
(eq. 17)
500 kHz
( 1 * 27.5% )
= Duty ratio
= Capacitor inductance
= Switching frequency
= Peak-to-peak current
DV OUTESR + I TRAN
7.5 mV + 1.5 A
where:
CoESR
(eq. 15)
10.89 mV + 3
I PP
ESL
44 mF
ITRAN
DVOUT_ESR
CO ESR
(eq. 18)
5 mW
DV OUTDIS +
I TRAN
2
F CROSS
L OUT
C OUT
F SW
VIN * V OUT
(eq. 19)
138.1 mV +
(1.5)
2
where:
COUT
D
FSW
FCROSS
ITRAN
LOUT
VIN
VOUT
DVOUT_DIS
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16
50 kHz
4.7 mH
500 kHz
44 mF
12 V * 3.3 V
= Output capacitance
= Duty ratio
= Switching frequency
= Loop cross over frequency
= Output transient current
= Output inductor value
= Input voltage
= Output voltage
= Voltage deviation of VOUT due to the
effects of capacitor discharge
NCP3170
The equation reaches its maximum value with D = 0.5 at
which point the input capacitance RMS current is half the
output current. Loss in the input capacitors can be calculated
with the following equation:
18 mW + 10 mW
where:
CINESR
where:
D
IinRMS
IOUT
27.5%
(eq. 21)
1.34 A 2
IinRMS
PCIN
1.34 A + 3 A
Iin RMS
(eq. 20)
( 1 * 27.5% )
= Duty ratio
= Input capacitance RMS current
= Load current
POWER MOSFET DISSIPATION
where:
PCOND
PD_HS
PSW_TOT
where:
IRMS_HS
RDS(ON)_HS
PCOND
where:
D
ra
IOUT
IRMS_HS
R DS(on)_HS
1 ) ra12
2
(eq. 24)
= Duty ratio
= Ripple current ratio
= Output current
= High side MOSFET RMS current
P SW_TOT + P SW ) P DS ) P RR
(eq. 22)
where:
PDS
PRR
PSW
PSW_TOT
= Conduction losses
= Power losses in the high side MOSFET
= Total switching losses
P COND + I RMS_HS
(eq. 23)
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17
(eq. 25)
NCP3170
QGD
RG
RHSPD
tFALL
VCL
VTH
1
2
IOUT
where:
FSW
IOUT
PSW
PTON
PTOFF
tFALL
tRISE
VIN
V IN
F SW
tRISE ) t FALL
(eq. 26)
= Switching frequency
= Load current
= High side MOSFET switching losses
= Turn on power losses
= Turn off power losses
= MOSFET fall time
= MOSFET rise time
= Input voltage
P DS +
where:
COSS
FSW
PDS
VIN
When calculating the rise time and fall time of the high
side MOSFET, it is important to know the charge
characteristic shown in Figure 44.
1
2
C OSS
V IN
(eq. 29)
F SW
where:
FSW
PRR
V IN
F SW
(eq. 30)
= Switching frequency
= High side MOSFET reverse recovery
losses
= Reverse recovery charge
= Input voltage
QRR
VIN
Vth
where:
PBODY
PCOND
PD_LS
where:
IG1
QGD
RHSPU
RG
tRISE
VCL
VTH
t FALL +
where:
IG2
Q GD
I G1
Q GD
VCL * VTHRHSPU ) R G
(eq. 27)
I G2
Q GD
VCL * VTHRHSPD ) R G
(eq. 31)
where:
IRMS_LS
RDS(ON)_LS
PCOND
where:
D
IOUT
IRMS_LS
ra
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18
R DS(on)_LS
(eq. 32)
I RMS_LS + I OUT
(eq. 28)
(1 * D )
1 ) ra12
2
= Duty ratio
= Load current
= RMS current in the low side
= Ripple current ratio
(eq. 33)
NCP3170
The body diode losses can be approximated as:
P BODY + V FD I OUT F SW NOL LH ) NOL HL
where:
FSW
IOUT
NOLHL
NOLLH
PBODY
VFD
Compensation Network
(eq. 34)
= Switching frequency
= Load current
= Dead time between the high-side
MOSFET turning off and the low-side
MOSFET turning on, typically 30 ns
= Dead time between the low-side
MOSFET turning off and the high-side
MOSFET turning on, typically 30 ns
= Low-side MOSFET body diode losses
= Body diode forward voltage drop
typically 0.92 V
NCP3170A
VIN
Vout
Lout
R1
R2
Rf
Cf
Cc
Rc
Cp
Resistance for
(V)
(V)
(mF)
(kW)
(kW)
(kW)
(pF)
(nF)
(kW)
(pF)
Current Gain
12
0.8
1.8
24.9
NI
NI
NI
NI
NI
15
3.6
12
1.0
2.5
24.9
100
150
15
0.825
NI
12
1.1
2.5
24.9
66.5
150
10
NI
20
12
1.2
2.5
24.9
49.9
150
10
NI
20
12
1.5
3.6
24.9
28.7
150
10
2.49
NI
20
12
1.8
3.6
24.9
20
150
10
2.49
NI
20
12
2.5
4.7
24.9
11.8
150
8.2
3.74
NI
25
12
3.3
4.7
24.9
7.87
150
6.8
4.99
NI
27
12
5.0
7.2
24.9
4.75
150
3.9
10
NI
27
12
10.68
7.2
24.9
2.05
150
3.9
10
NI
30
18
14.8
7.2
24.9
1.43
150
6.8
6.98
NI
30
0.8
1.8
24.9
NI
NI
NI
NI
NI
15
15
1.0
2.5
24.9
100
150
15
0.825
NI
28
1.1
2.5
24.9
66.5
150
10
NI
30
1.2
2.5
24.9
49.9
150
10
NI
30
1.5
3.6
24.9
28.7
150
10
2.49
NI
30
1.8
3.6
24.9
20
150
10
2.49
NI
30
2.5
3.6
24.9
11.8
150
6.8
4.99
NI
50
3.3
3.6
24.9
7.87
150
6.8
4.99
NI
50
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NCP3170
Table 6. COMPENSATION VALUES (continued)
VIN
Vout
Lout
R1
R2
Rf
Cf
Cc
Rc
Cp
Resistance for
(V)
(V)
(mF)
(kW)
(kW)
(kW)
(pF)
(nF)
(kW)
(pF)
Current Gain
12
1.2
1.5
24.9
49.9
82
2.7
6.04
NI
20
12
1.5
1.8
24.9
28.7
82
2.7
6.04
NI
22
12
1.8
1.8
24.9
20
82
2.7
6.04
NI
22
12
2.5
2.7
24.9
11.8
82
1.8
10
NI
32
12
3.3
3.3
24.9
7.87
82
1.5
12.1
NI
52
12
5.0
3.3
24.9
4.75
82
2.2
8.25
NI
52
12
10.68
1.5
24.9
2.05
82
2.2
5.1
NI
52
18
14.8
3.3
24.9
1.43
82
2.2
5.1
NI
52
0.8
1.0
24.9
NI
NI
NI
15
0.499
NI
20
1.0
1.0
24.9
100
NI
NI
6.8
1.69
NI
28
1.1
1.0
24.9
66.5
NI
NI
3.9
3.61
NI
42
1.2
1.5
24.9
49.9
82
2.7
6.04
NI
55
1.5
1.5
24.9
28.7
82
2.7
6.04
NI
55
1.8
1.5
24.9
20
82
1.8
10
NI
55
2.5
1.8
24.9
11.8
82
1.8
10
NI
55
3.3
1.8
24.9
7.87
82
1.8
10
NI
55
NCP3170B
L OUT
F SW
R MAP
6.299 +
V RAMP
VIN
4.7 mH
500 kHz
32
3.3 V
)1.46
12 V
1000
where:
FSW
LOUT
M
Vin
VOUT
VRAMP
RMAP
)1
0.33 V
where:
A
FSW
IOUT
LOUT
M
VIN
VOUT
(eq. 35)
)1
12 V
= Switching Frequency
= Output inductor value
= Current feedback
= Input Voltage
= Output Voltage
= Slope Compensation Ramp
= Current Sense Resistance
36.925 +
where:
G
A
V OUT
M*0.5*M
V OUT
(eq. 36)
1
0.379 W +
3.0 A
3.3 V
6.299*0.5*6.299
4.7 mH
32
3.3 V
)1.46
12 V
(eq. 37)
Y+
V IN
FSW
L OUT
0.379 W
1
I OUT
A
R MAP
1000
= Un-scaled gain
= Switching Frequency
= Output Current
= Output inductor value
= Current feedback
= Input Voltage
= Output Voltage
where:
Vo
VREF
Y
3.3 V
12 V
500 kHz
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20
0.8 V
VREF
0.242 +
V OUT
3.3 V
= Output voltage
= Regulator reference voltage
= Amplitude ratio
(eq. 38)
NCP3170
determining phase margin. To start the design, a resistor
value should be chosen for R1 from which all other
components can be chosen. A good starting value is 24.9 kW.
The NCP3170 allows the output of the DCDC regulator
to be adjusted down to 0.8 V via an external resistor divider
network. The regulator will maintain 0.8 V at the feedback
pin. Thus, if a resistor divider circuit was placed across the
feedback pin to VOUT, the regulator will regulate the output
voltage proportional to the resistor divider network in order
to maintain 0.8 V at the FB pin.
where:
COESR
COUT
FZESR
1
2p
CO ESR
C OUT
(eq. 39)
1
2p
44 mF
5 mW
where:
A
COUT
FP
1
2p
C OUT
VOUT
R1
FB
(eq. 40)
1
2p
0.379 W
44 mF
R2
= Un-scaled gain
= Output capacitor
= Current mode pole frequency
The two equations above define the bode plot that the
power stage has created or open loop response of the system.
The next step is to close the loop by considering the feedback
values. The closed loop crossover frequency should be less
than 1/10 of the switching frequency, which would place the
maximum crossover frequency at 50 kHz.
Figure 45 shows a pseudo Type III transconductance error
amplifier.
R2 + R1
where:
R1
R2
VOUT
VREF
CF
IEA
RC
(eq. 41)
VO (V)
R1 (kW)
R2 (kW)
0.8
24.9
Open
1.0
24.9
100
1.1
24.9
66.5
1.2
24.9
49.9
1.5
24.9
28.7
1.8
24.9
20
2.5
24.9
11.8
3.3
24.9
8.06
5.0
24.9
4.64
R2
CP
VREF
ZFB
CC
V REF
V OUT * V REF
ZIN
R1
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NCP3170
The first pole to crossover at the desired frequency should
be setup at FPO to decrease at 20 dB per decade:
F PO +
1.354 kHz +
where:
Fcross
FPO
F CROSS
G
50 kHz
36.925
RC +
2.925 kW +
(eq. 42)
where:
CC
COUT
FP
RC
CC +
5.70 nF +
where:
CC
FPO
gm
y
CF +
456 pF +
where:
CF
Fcross
gm
R1
R2
RF
y
2
gm
p
F PO
where:
CP
FESR
RC
(eq. 43)
200 ms
0.242
2p
75.2 pF +
1.354 kHz
R1 ) R2
(R1 * RF ) R2 * RF ) R2 * R1)
F cross
FP
(eq. 44)
1
2p
5.70 nF
1.354 kHz
1
RC
2p
F ESR
(eq. 45)
1
2p
2.925 kW
723 kHz
= Compensation capacitor
= Pole frequency
= Transconductance of amplifier
= Amplitude ratio
2p
CC
= Compensation capacitance
= Output capacitance
= Current mode pole frequency
= Compensation resistor
CP +
1
2p
(eq. 46)
24.9 kW ) 7.87 kW
2p
50 kHz
IPK
I ICinrush_PK1 +
V IN
CIN ESR
(eq. 47)
12
1.2 kA +
0.01
I ICinrush_RMS1 +
V IN
CIN ESR
0.316
CIN ESR
C IN
t DELAY_TOTAL
(eq. 48)
12.58 A +
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12 V
0.01
0.316
0.01 W
1 ms
22 mF
NCP3170
where:
CIN
= Output capacitor
CINESR
= Output capacitor ESR
tDELAY_TOTAL = Total delay interval
VIN
= Input Voltage
3.3 V
Output
Voltage
C OUT ) C LOAD
where:
COUT
CLOAD
D
ICL
IOCinrush_RMS
tSS
VOUT
t SS
V OUT D
) I CL
3
Output
Current
D (eq. 49)
tss
492 mA +
where:
IOUT
VOUT
VOUT_TO
XCP3170
Load
OR
V OUT * V OUT_TO
V OUT
I OUT
(eq. 51)
3.3 V * 2.5 V
3.3 V
1A
= Output current
= Output voltage
= Output voltage load turn on
1.0 V
3.3 V
Output
Voltage
1
3
V OUT
R OUT
I CR_PK +
Output
Current
V OUT
R OUT
tss
(eq. 50)
191 mA +
where:
ICLR_RMS
ICR_PK
ROUT
VOUT
1
3
3.3 V
10 W
300 mA +
3.3 V
10 W
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NCP3170
THERMAL MANAGEMENT AND LAYOUT
Consideration
VIN
VSW
Input
Current
L1 4.7 mH
3.3 V
EN
R1
DRIVE
PG
C1
22 mF
C2, C3
22 mF
Cbypass
0.1 mF
FB1
COMP
CC
AGND
PGND
R2
RC
The first loop shown in blue activates when the high side
switch turns on. When the switch turns on, the edge of the
current waveform is provided by the bypass capacitor. The
remainder of the current is provided by the input capacitor.
Slower currents are provided by the upstream power supply
which fills up the input capacitor when the high side switch
is off. The current flows through the high side MOSFET and
to the output, charging the output capacitors and providing
current to the load. The current returns through a PCB
ground trace where the output capacitors are connected, the
regulator is grounded, and the input capacitors are grounded.
The second loop starts from the inductor to the output
capacitors and load, and returns through the low side
MOSFET. Current flows in the second loop when the low
side NMOSFET is on. The designer should note that there
are locations where the red line and the blue line overlap;
these areas are considered to have DC current. Areas
containing a single blue line indicate that AC currents flow
and transition very quickly. The key to power supply layout
is to focus on the connections where the AC current flows.
A good rule of thumb is that for every inch of PCB trace,
20 nH of inductance exists. When laying out a PCB,
minimizing the AC loop area reduces the noise of the circuit
and improves efficiency. A ground plane is strongly
recommended to connect the input capacitor, output
capacitor, and PGND pin of the NCP3170. Drawing the real
high power current flow lines on the recommended layout is
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NCP3170
5. Create copper planes as short as possible from the
VSW pin to the output inductor, from the output
inductor to the output capacitor, and from the load
to PGND.
6. Create a copper plane on all of the unused PCB
area and connect it to stable DC nodes such as:
VIN, GND, or VOUT.
7. Keep sensitive signal traces far away from the
VSW pins or shield them.
where:
ICC
PC
VIN
V IN
(eq. 52)
where:
PD
RqJA
TA
TJ
R qJA
(eq. 53)
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NCP3170
PACKAGE DIMENSIONS
SOIC8 NB
CASE 75107
ISSUE AK
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 75101 THRU 75106 ARE OBSOLETE. NEW
STANDARD IS 75107.
X
A
8
0.25 (0.010)
1
4
Y
G
C
DIM
A
B
C
D
G
H
J
K
M
N
S
X 45 _
SEATING
PLANE
0.10 (0.004)
H
D
0.25 (0.010)
Z Y
SOLDERING FOOTPRINT*
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8_
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
1.52
0.060
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
mm
inches
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NCP3170/D