Assignment 4

Electronic Circuit Devices

Ahmad Faraz
130401014
EE-12-A

Biasing techniques of Mosfet

Unlike BJTs, thermal runaway does not occur with FETs. However, the wide
differences in maximum and minimum transfer characteristics make ID levels
unpredictable with simple fixed-gate bias voltage. To obtain reasonable limits
on quiescent drain currents ID and drain-source voltage VDS, source resistor
and potential divider bias techniques must be used. With few exceptions,
MOSFET bias circuits are similar to those used for JFETs. Various FET biasing
circuits are discussed below:

Fixed Bias.

Fixed bias-FET
DC bias of a FET device needs setting of gate-source voltage VGS to give
desired drain current ID . For a JFET drain current is limited by the saturation
current IDS. Since the FET has such a high input impedance that no gate
current flows and the dc voltage of the gate set by a voltage divider or a
fixed battery voltage is not affected or loaded by the FET.
Fixed dc bias is obtained using a battery VQG. This battery ensures that the
gate is always negative with respect to source and no current flows through
resistor RG and gate terminal that is IG =0. The battery provides a voltage
VGS to bias the N-channel JFET, but no resulting current is drawn from the
battery VGG. Resistor RG is included to allow any ac signal applied through
capacitor C to develop across RG. While any ac signal will develop across RG,
the dc voltage drop across RG is equal to IG RG i.e. 0 volt.
The gate-source voltage VGS is then
VGS = vG vs = vGG 0 = VGG

The drain -source current ID is then fixed by the gate-source voltage as

determined by equation.
This current then causes a voltage drop across the drain resistor RD and is
given as VRD = ID RD and output voltage, Vout = VDD ID RD

Self-Bias.

FET-Self Bias circuit

This is the most common method for biasing a JFET. Self-bias circuit for Nchannel JFET is shown in figure.
Since no gate current flows through the reverse-biased gate-source, the gate
current IG = 0 and, therefore,vG = iG RG = 0
With a drain current ID the voltage at the S is Vs= ID Rs. The gate-source
voltage is then
VGs = VG Vs = 0 ID Rs = ID Rs
So voltage drop across resistance Rs provides the biasing voltage VGg and
no external source is required for biasing and this is the reason that it is
called self-biasing.

The operating point (that is zero signal ID and VDS) can easily be determined
from equation and equation given below :
VDS = VDD ID (RD + RS)
Thus dc conditions of JFET amplifier are fully specified. Self biasing of a JFET
stabilizes its quiescent operating point against any change in its parameters
like transconductance. Let the given JFET be replaced by another JFET having
the double conductance then drain current will also try to be double but
since any increase in voltage drop across Rs, therefore, gate-source voltage,
VGS becomes more negative and thus increase in drain current is reduced.

Potential-Divider Biasing.

fet-potential-divider-biasing
A slightly modified form of dc bias is provided by the circuit shown in figure.
The resistors RGl and RG2 form a potential divider across drain supply VDD.
The voltage V2 across RG2 provides the necessary bias. The additional gate

resistor RGl from gate to supply voltage facilitates in larger adjustment of the
dc bias point and permits use of larger valued RS.
The gate is reverse biased so that IG = 0 and gate voltage
VG =V2 = (VDD/R G1 + R G2 ) *RG2
And
VGS = vG vs = VG ID Rs
The circuit is so designed that ID Rs is greater than VG so that VGS is
negative. This provides correct bias voltage.
The operating point can be determined as
ID = (V2 VGS)/ RS
And
VDS = VDD ID (RD + RS)

Mosfet as a switch
The N-channel, Enhancement-mode MOSFET (e-MOSFET) operates using a
positive input voltage and has an extremely high input resistance (almost
infinite) making it possible to interface with nearly any logic gate or driver
capable of producing a positive output. Also, due to this very high input
(Gate) resistance we can parallel together many different MOSFETS until we
achieve the current handling limit required.
While connecting together various MOSFETS in parallel may enable us to
switch high currents or high voltage loads, doing so becomes expensive and
impractical in both components and circuit board space. To overcome this
problem Power Field Effect Transistors or Power FETs where developed.
We now know that there are two main differences between field effect
transistors, depletion-mode only for JFETs and both enhancement-mode and
depletion-mode for MOSFETs. In this tutorial we will look at using the
Enhancement-mode MOSFET as a Switch as these transistors require a
positive gate voltage to turn ON and a zero voltage to turn OFF making
them easily understood as switches and also easy to interface with logic
gates.
The operation of the Enhancement-mode MOSFET
Loading product data or e-MOSFET, can best be described using its i-v
characteristics curves shown below. When the input voltage, ( VIN ) to the
gate of the transistor is zero, the MOSFET conducts virtually no current and
the output voltage ( VOUT ) is equal to the supply voltage VDD. So the
MOSFET is OFF operating within its cut-off region.

MOSFET Characteristics Curves

The minimum ON-state gate voltage required to ensure that the MOSFET
remains ON when carrying the selected drain current can be determined
from the v-i transfer curves above. When VIN is HIGH or equal to VDD, the
MOSFET Q-point moves to point A along the load line. The drain current ID
increases to its maximum value due to a reduction in the channel resistance.
ID becomes a constant value independent of VDD, and is dependent only on
VGS. Therefore, the transistor behaves like a closed switch but the channel
ON-resistance does not reduce fully to zero due to its RDS(on) value, but gets
very small.
Likewise, when VIN is LOW or reduced to zero, the MOSFET Q-point moves
from point A to point B along the load line. The channel resistance is very
high so the transistor acts like an open circuit and no current flows through
the channel. So if the gate voltage of the MOSFET toggles between two
values, HIGH and LOW the MOSFET will behave as a single-pole singlethrow (SPST) solid state switch and this action is defined as:

1. Cut-off Region
Here the operating conditions of the transistor are zero input gate voltage
( VIN ), zero drain current ID and output voltage VDS = VDD. Therefore for an
enhancement type MOSFET the conductive channel is closed and the device
is switched OFF.

Cut-off Characteristics

The input and Gate are grounded ( 0v )

Gate-source voltage less than threshold

voltage VGS < VTH

MOSFET is OFF ( Cut-off region )

No Drain current flows ( ID = 0 )

VOUT = VDS = VDD = 1

MOSFET operates as an open switch

Then we can define the cut-off region or OFF mode when using an eMOSFET as a switch as being, gate voltage, VGS < VTH and ID = 0. For a Pchannel enhancement MOSFET, the Gate potential must be more positive
with respect to the Source.

2. Saturation Region
In the saturation or linear region, the transistor will be biased so that the
maximum amount of gate voltage is applied to the device which results in
the channel resistance RDS(on being as small as possible with maximum
drain current flowing through the MOSFET switch. Therefore for the
enhancement type MOSFET the conductive channel is open and the device is
switched ON.

Saturation Characteristics

The input and Gate are connected to VDD

Gate-source voltage is much greater than

threshold voltage VGS > VTH

MOSFET is ON ( saturation region )

Max Drain current flows ( ID = VDD / RL )

VDS = 0V (ideal saturation)

Min channel resistance RDS(on) < 0.1

VOUT = VDS = 0.2V due to RDS(on)

MOSFET operates as a low resistance

closed switch

Then we can define the saturation region or ON mode when using an eMOSFET as a switch as gate-source voltage, VGS > VTH and ID = Maximum.
For a P-channel enhancement MOSFET, the Gate potential must be more
negative with respect to the Source.
By applying a suitable drive voltage to the gate of an FET, the resistance of
the drain-source channel, RDS(on) can be varied from an OFF-resistance of
many hundreds of ks, effectively an open circuit, to an ON-resistance of
less than 1, effectively a short circuit.
When using the MOSFET as a switch we can drive the MOSFET to turn ON
faster or slower, or pass high or low currents. This ability to turn the power
MOSFET ON and OFF allows the device to be used as a very efficient
switch with switching speeds much faster than standard bipolar junction
transistors.

Mosfet as an Amplifier
Enhancement MOSFETS, or eMOSFETS, can be classed as normally-off (nonconducting) devices, that is they only conduct when a suitable gate-tosource positive voltage is applied, unlike Depletion type mosfets which are

normally-on devices conducting when the gate voltage is zero. However, due
to the construction and physics of an enhancement type mosfet, there is a
minimum gate-to-source voltage, called the threshold voltage VTH that must
be applied to the gate before it starts to conduct allowing drain current to
flow.
In other words, an enhancement mosfet does not conduct when the gatesource voltage, VGS is less than the threshold voltage, VTH but as the gates
forward bias increases, the drain current, ID (also known as drain-source
current IDS) will also increase, similar to a bipolar transistor, making the
eMOSFET ideal for use in mosfet amplifier circuits.
The characteristics of the MOS conductive channel can be thought of as a
variable resistor that is controlled by the gate. The amount of drain current
that flows through this n-channel therefore depends on the gate-source
voltage and one of the many measurements we can take using a mosfet is to
plot a transfer characteristics graph to show the i-v relationship between the
drain current and the gate voltage as shown.

n-channel eMOSFET i-v Characteristics

With a fixed VDS drain-source voltage connected across the eMOSFET we can
plot the values of drain current, ID with varying values of VGS to obtain a
graph of the mosfets forward DC characteristics. These characteristics give
the transconductance, gm of the transistor.

This transconductance relates the output current to the input voltage

representing the gain of the transistor. The slope of the transconductance
curve at any point along it is therefore given as: gm = ID/VGS for a constant
value of VDS.
So for example, assume a MOS transistor passes a drain current of 2mA
when VGS = 3v and a drain current of 14mA when VGS = 7v. Then:

This ratio is called the transistors static or DC transconductance which is

short for transfer conductance and is given the unit of Siemens (S), as its
amps per volt. Voltage gain of a mosfet amplifier is directly proportional to
the transconductance and to the value of the drain resistor.
At VGS = 0, no current flows through the MOS transistors channel because
the field effect around the gate is insufficient to create or open the n-type
channel. Then the transistor is in its cut-off region acting as an open switch.
In other words, with zero gate voltage applied the n-channel eMOSFET is said
to be normally-off and this OFF condition is represented by the broken
channel line in the eMOSFET symbol (unlike the depletion types that have a
continuous channel line).
As we now gradually increase the positive gate-source voltage VGS , the field
effect begins to enhance the channel regions conductivity and there
becomes a point where the channel starts to to conduct. This point is known
as the threshold voltage VTH. As we increase VGS more positive, the
conductive channel becomes wider (less resistance) with the amount of drain
current, ID increases as a result. Remember that the gate never conducts
any current as its electrical isolated from the channel giving a mosfet
amplifier an extremely high input impedance.
Therefore the n-channel enhancement mosfet will be in its cut-off mode
when the gate-source voltage, VGS is less than its threshold voltage level,
VTH and its channel conducts or saturates when VGS is above this threshold
level. When the eMOS transistor is operating in the saturation region the
drain current, ID is given by:

MOSFET Drain Current

Note that the values of k (conduction parameter) and VTH (threshold

voltage) vary from one eMOSFET to the next and can not be physically
changed as they are specific specification of the material and device
geometry which are in-built during the fabrication of the transistor.
The static transfer characteristics curve on the right is generally parabolic
(square law) in shape and then linear. The increase in drain current, ID for a
given increase in gate-source voltage, VGS determines the slope or gradient
of the curve for constant values of VDS.
Then we can see that turning an enhancement MOS transistor ON is a
gradual process and in order for us to use the MOSFET as an amplifier we
must bias its gate terminal at some point above its threshold level.
There are many different ways we can do this from using two separate
voltage supplies, to drain feedback biasing, to zener diode biasing, etc, etc.
But whichever biasing method we use, we must make sure that the gate
voltage is more positive than the source by an amount greater than VTH. In
this mosfet amplifier tutorial we will use the now familiar universal voltage
divider biasing circuit.