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Introduction to FPGA Vision Using the NI LabVIEW FPGA Module

Publish Date: Jan 15, 2014 | 4 Ratings | 4.75 out of 5 |

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Overview
With FPGA technology and the NI LabVIEW FPGA Module, you can perform high-speed field-programmable gate
array (FPGA) processing on images acquired from Camera Link cameras. FPGA processing is particularly useful in
applications that require low latency between acquisition and the processed image. This document provides an
overview of image processing on an FPGA, including typical use cases.

Table of Contents
1.

Use Cases for FPGA Vision

2.

Related Links

Introduction to FPGA Programming


The NI LabVIEW FPGA Module is a natural extension of the LabVIEW graphical programming environment. You can
perform complex FPGA programming without using low-level languages such as VHDL. If you are familiar with
LabVIEW, transitioning to LabVIEW FPGA presents only a small learning curve, which can drastically reduce
development time in applications that require FPGA programming, eliminating the need for custom hardware designs.
Instead of programming in HDL, you create applications on the LabVIEW block diagram, and LabVIEW FPGA
synthesizes the graphical code and deploys it to FPGA hardware.

Image Processing on the FPGA


Many image processing algorithms are inherently parallel and hence suitable for FPGA implementations. These
algorithms which involve operations on pixels, lines, and region of interest do not need high-level image information,
such as patterns or objects in the image. You can perform these functions on small regions of bits as well as on
multiple regions of an image simultaneously. You can pass the image data to the FPGA in parallel and, because a
central processor is not required to process the data, process that data concurrently. Some examples of image
processing functions that work well on an FPGA are listed below:

Preprocessing
Image transforms

Feature Extraction
Edges, lines, and corners

Image operators

Binary objects

Shading correction

Color

Bayer decoding

Color space conversion

Measurements
Centroid

1D and 2D fast Fourier transform

Filtering (smooth/sharpen)

Binary morphology

Area measurements

In addition to the LabVIEW graphical design environment, LabVIEW FPGA supports a feature for HDL IP integration
called Component-Level IP (CLIP). With CLIP, you can insert HDL IP into an FPGA target so VHDL code can
communicate directly with an FPGA VI. CLIP also facilitates communication between the FPGA and external circuitry
using existing HDL IP.

1. Use Cases for FPGA Vision


Use Case 1: FPGA-Only Processing for High-Speed Control
FPGA image processing reduces the computational resources required for image analysis. Because the FPGA is a
hardware resource, it frees the CPU to perform other operations. CPU intervention is not required to perform the
analysis, so latency is significantly reduced from preprocessed input to processed output. Figure 1 shows an example
of how you can use the FPGA to offload resources from the CPU. In this case, the FPGA performs all of the image

processing, which results in minimum system latency. You can send image information to the CPU for data storage or
image display after processing is complete.

Figure 1. All processing is performed in hardware on the FPGA. The CPU is free to perform other tasks, and system
latency is minimized to the transit time of the data through the FPGA.
Examples of this use case include high-speed sorting, eye-tracking and laser alignment.

Use Case 2: FPGA Preprocessing


You also can use an FPGA with a vision systems processor to perform additional processing. Figure 2 shows how to
preprocess with an FPGA while the CPU performs the more advanced processing algorithms. In this case, the FPGA
performs bit-level processing such as filtering or edge detection. The preprocessed image is then sent to the CPU for
image-level processing such as pattern recognition. System latency is still low in this case because the CPU has
fewer functions to perform than it does in a traditional vision system.

Figure 2. Image acquisition and preprocessing are performed on the FPGA and image data is then passed to the
CPU. The CPU performs more complicated image analysis such as pattern matching and classification.
FPGA image processing is particularly useful in applications that require high-speed bit-level processing. The FPGA
receives image data and processes individual bits using a high-speed onboard clock (up to 100 MHz clock rate). You
perform data transfer and processing in hardware on a single clock cycle. You can break many vision algorithms into
multiple iterative tasks and then break those tasks into parallel operations on the FPGA.
Examples where this type of architecture can be applied include surface and web inspection applications, and optical
coherence tomography (OCT) applications.