Lab Manual

VALLIAMMAI ENGINEERING COLLEGE
SRM NAGAR, KATTANKULATHUR 603 203.
DEPARTMENT OF ELECTRONICS AND COMMUNICATION

ENGINEERING
EC6411 Circuit and Simulation Integrated Laboratory
LABORATORY MANUAL
II YEAR / IV SEMESTER ECE
ACADEMIC YEAR: 2015-2016 EVEN SEMESTER
VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN
Prepared BY D.Murugesan, S.Marirajan, A.G.Muralikrishna
Syllabus
EC6411 CIRCUITS AND SIMULATION INTEGRATED LABORATORY
LTPC0032
DESIGN AND ANALYSIS OF THE FOLLOWING CIRCUITS

1. Series and Shunt feedback amplifiers-Frequency response, Input and output
impedance calculation
2. RC Phase shift oscillator and Wien Bridge Oscillator
3. Hartley Oscillator and Colpitts Oscillator
4. Single Tuned Amplifier
5. RC Integrator and Differentiator circuits
6. Astable and Monostable multivibrators
7. Clippers and Clampers
8. Free running Blocking Oscillators
SIMULATION USING SPICE (Using Transistor)

1. Tuned Collector Oscillator
2. Twin -T Oscillator / Wein Bridge Oscillator
3. Double and Stagger tuned Amplifiers
4. Bistable Multivibrator
5. Schmitt Trigger circuit with Predictable hysteresis
6. Monostable multivibrator with emitter timing and base timing
7. Voltage and Current Time base circuits
TOTAL: 45 PERIODS
LIST OF EXPERIMENTS
CYCLE-I
DESIGN OF FOLLOWING CIRCUITS

1. Current Series feedback amplifiers
2. Voltage Shunt feedback amplifiers
3. RC Phase shift oscillator
4. Wein Bridge Oscillator
5. Hartley Oscillator
6. Colpitts Oscillator
7. Single Tuned Amplifier
8. RC Integrator
9. RC Differentiator
10. Tuned Collector Oscillator Differential amplifier
11. Twin -T Oscillator
12. Wein Bridge Oscillator
13. Double and Stagger tuned Amplifiers Bistable Multivibrator
CYCLE-II
SIMULATION USING PSPICE:
14. Astable Multivibrator
15. Monostable Multivibrator
16. Clippers and Clampers
17. Free running blocking oscillators
18. Schmitt Trigger circuit with Predictable hysteresis
19. Monostable multivibrator with emitter timing and base timing
20. Voltage and Current Time base circuits
ADDITIONAL EXPERIMENT:
21. Simulation of CMOS Inverter & CMOS Differential amplifier using Pspice

Prerequisite Lab Questions

1. What is an amplifier?
2. Explain the basic concept of feedback.
3. Give the types of feedback.
4. Mention the terms feedback factor and open loop gain.
5. Compare the negative feedback and positive feedback.

Circuit Diagram
Model Graph

Ex.No: 1(a) CURRENT SERIES FEEDBACK AMPLIFIER

Aim:
To design and construct the current series feedback amplifier and to obtain the following
parameters for with and without feedback (i) Frequency response (ii) Bandwidth (iii) Input and
Output impedance and (iv) Gain .
Components & Equipments Required:
S.No.
1
2
3
4
5
6
Components/Equipments
Transistor
Resistor
Capacitor
CRO
RPS
Function
Generator
Specifications
BC 107
56k,12k,2.7k,10k,560
0.1F,22F
(0-30 )MHz
(0-30) V
(0 1 )MHz
Quantity
1
1
2,1
1
1
1
Design :
Vcc =12 V , Ic = 2mA , RB = 10k, hfe =1 00 , hie =2k
Vce = Vcc /2 = 12/2 = 6V
VE = Vcc /10 =12/10 =1.2 V
IE Ic = 2mA
RE = VE /IE = 1.cV /2mA = 600
Choose , RE = 560
Vcc = IcRc + Vce +IERE
Rc = (Vcc- Vce- IERE) / Ic
Rc = (12-6-1.2) / 2mA
Rc = 2.4k
Choose , Rc = 2.7k
VBE = VB VE
VB = VBE +VE
VB = 0.7 + 1.2 = 1.9V
VB = Vcc ( R2/(R1+R2)) =1.9V
R2 /(R1+R2) =1.9V / 12V = 0.158
RB = 10k = R1R2/(R1+R2) =R1(0.158)
Tabulation:
(i)Without Feedback:
S.No.
Frequency
(Hz)
Vo
(volts)
Vin =
Gain = 20 log 10(Vo/Vs)
(dB)
Vo
(volts)
Vin =
(dB)
(ii)With Feedback:
S.No.
Frequency
(Hz)

R1 =63.157 k
R2 /(R1+R2) = 0.158 => R2 = 11.58k
Choose, R1 =56 k and R2 = 12k
XE = RE/10 =600/10 = 60
CE =1/(2fXE ) = 26.5F ( for f=1kHz)
Choose Coupling capacitors C1 =C2 =0.1F
Without Feedback:
(i)
Gain Av = hfeRi / hie = (100*2.7k) /2k

Av = 135
(ii)
Input Impedance Ri = (R1R2) hie = 10k2k

Ri = 1.66k
(iii)
Output Impedance Ro = Rc =2.7k
With Feedback:
(i)
Gain Avf = Av / (1+ Av) = 135/(1+0.21*135) =4.6

Avf = 4.6
Where feedback factor =RE /Rc =560 / 2.7k = 0.21
(ii)
Input Impedance Rif = Ri(1+ Av)

Ri = 48.72k
(iv)
Output Impedance Rof = Ro(1+ Av) = 79.25k
Theory:
To construct an amplifier with precise gain we must employ negative feedback
techniques. This makes the gain to be independent of and dependent only on the characteristics
of the feedback network. Usually resistors are used to construct feedback networks. When high
input and output impedance and finite gain are required, Current series feedback is employed.
The circuit diagram
shows a current series amplifier. It can be seen that a current series feed
back amplifier results in, when the emitter bypass capacitor of the common emitter amplifier is
removed.

Effect of Feedback :
Output resistance: increases
Input resistance: increases
Gain: Trans conductance amplifier: decreases
Bandwidth: increases
Distortion: Decreases
Procedure :
1. Connect the circuit as per the circuit diagram.
2. Set Vs = 50mV using signal generator.
3. Keeping the input voltage constant vary the frequency from 10Hz to 1MHz in regular
steps and note down the corresponding output voltage.
4. Plot the Graph: gain (dB) Vs frequency.
5. Calculate the bandwidth from Graph.
6. Remove emitter resistance (RE) i.e. feedback loop and follow the same procedures
(1 to 5).
Post Lab Questions:
1. Mention the applications of a feedback amplifier.
2. Differentiate positive feedback and negative feedback.
3. Give the features of negative feedback.
4. Why Current series amplifier is a Transconductance amplifier?
5. A common emitter circuit without By-pass capacitor is called a negative current
feedback circuit. Justify?
Result :
Thus the Current-Series feedback amplifier was constructed and the observed parameters
are tabulated below:
Amplifier
Gain
Input
Output Impedance
Bandwidth
(dB)
Impedance
(ohms)
(Hz)
(ohms)
Without Feedback
With Feedback

1. What are the different types of feedback amplifier?
2. Why bandwidth is increased for feedback amplifier. Justify.
3. Mention the advantages of feedback amplifier.
4. Give the feedback factor and open loop gain for voltage shunt amplifier.
5. Tell the stability of feedback amplifier.

10
Circuit Diagram
Note: Add one feedback resistor between collector & base terminal of Transistor
Model Graph

11
Ex.No: 1(b) VOLTAGE SHUNT FEEDBACK AMPLIFIER

Aim:
To design and construct the voltage-shunt feedback amplifier and to obtain the following
parameters for with and without feedback (i) Frequency response (ii) Bandwidth (iii) Input and
Output impedance and (iv) Gain .
S.No.
1
2
3
4
5
6
Components/Equipments
Transistor
Resistor
Capacitor
CRO
RPS
Function
Generator
Specifications
BC 107
56k,12k,2.7k,10k,560
0.1F,22F
(0-30 )MHz
(0-30) V
(0 1 )MHz
Quantity
1
1
2,1
1
1
1
Design:
Vcc =12 V , Ic = 2mA , RB = 10k, hfe =1 00 , hie =2k
Vce = Vcc /2 = 12/2 = 6V
VE = Vcc /10 =12/10 =1.2 V
IE Ic = 2mA
RE = VE /IE = 1.cV /2mA = 600
Choose , RE = 560
Vcc = IcRc + Vce +IERE
Rc = (Vcc- Vce- IERE) / Ic
Rc = (12-6-1.2) / 2mA
Rc = 2.4k
Choose , Rc = 2.7k
VBE = VB VE
VB = VBE +VE
VB = 0.7 + 1.2 = 1.9V
VB = Vcc ( R2/(R1+R2)) =1.9V
R2 /(R1+R2) =1.9V / 12V = 0.158
12
RB = 10k = R1R2/(R1+R2) =R1(0.158)

Tabulation :
(i)Without Feedback :
S.No.
Frequency
(Hz)
Vo
(volts)
Vin =
(dB)
Vo
(volts)
Vin =
(dB)
(ii)With Feedback :
S.No.
Frequency
(Hz)

13
R1 =63.157 k
R2 /(R1+R2) = 0.158 => R2 = 11.58k
Choose, R1 =56 k and R2 = 12k
XE = RE/10 =600/10 = 60
CE =1/(2fXE ) = 26.5F ( for f=1kHz)
Choose Coupling capacitors C1 =C2 =0.1F
Without Feedback:
(i)
Gain Av = hfeRi / hie = (100*2.7k) /2k

Av = 135
(ii)
Input Impedance Ri = (R1R2) hie = 10k2k

Ri = 1.66k
(iii)
Output Impedance Ro = Rc =2.7k
With Feedback:
(i)
Gain Avf = Av / (1+ Av) = 135/(1+0.21*135) =4.6

Avf = 4.6
Where feedback factor =RE /Rc =560 / 2.7k = 0.21
(ii)
Input Impedance Rif = Ri(1+ Av)

Ri = 48.72k
(iii)
Output Impedance Rof = Ro(1+ Av) = 79.25k
Theory:
To construct an amplifier with precise gain we must employ negative feedback
techniques. This makes the gain to be independent of and dependent only on the characteristics
of the feedback network. It can be seen that a voltage shunt feed back amplifier results in, when
the feedback resistor is connected between collector and emitter of the common emitter
amplifier. The Voltage shunt feedback amplifier is employed when precise gain and low values
of input and output impedances are required.
Effect of Feedback :
Output resistance - decreases, Input resistance - decreases, Gain: Trans resistance amplifier:
decreases, Bandwidth: increases, Distortion: Decreases
14
Procedure :
2. Set Vs = 50mV using signal generator.
3. Keeping the input voltage constant vary the frequency from 10Hz to 1MHz in regular
steps and note down the corresponding output voltage.
4. Plot the Graph: gain (dB) Vs frequency.
5. Calculate the bandwidth from Graph.
6. Connect feedback resistor Rf between collector and base of the transistor i.e. feedback
loop and follow the same procedures (1 to 5).
Post lab questions:

1. Define Gain and phase margin.
2. Why is negative feedback used in RC coupled amplifier?
3. What are the features of negative feedback?
4. What is Nyquist criterion?
5. A common collector amplifier circuit is an example of which negative feedback
Circuit.
Result :
Thus the Voltage-Shunt feedback amplifier was constructed and the observed parameters
are tabulated below:
Amplifier
Gain
Input
Output Impedance
Bandwidth
(dB)
Impedance
(ohms)
(Hz)
(ohms)
Without Feedback
With Feedback

15

1. What is an oscillator?
2. Give the difference between an amplifier and an oscillator?
3. What are the constituent parts of an oscillator?
4. State and briefly explain Barkhausen criterion for oscillation?
5. What is the frequency of oscillation for RC oscillator?

16
Circuit Diagram
RC Phase Shift Oscillator
Model Graph

17
Ex.No: 2 (a) RC PHASE SHIFT OSCILLATOR

Aim:
To design and construct a RC phase shift oscillator for the given frequency (f0).
S.NO
1
2
3
4
5
6
ITEM
TRANSISTOR
RESISTOR
CAPACITOR
CRO
RPS
FUNCTION
GENERATOR
RANGE
BC 107
Q.TY
1
( 0 30 ) MHz
(0-30) V
(0-1 )MHz
1
1
1
Theory:
In the RC phase shift oscillator, the required phase shift of 180 in the feedback loop from
the output to input is obtained by using R and C components, instead of tank circuit. Here a
common emitter amplifier is used in forward path followed by three sections of RC phase
network in the reverse path with the output of the last section being returned to the input of the
amplifier. The phase shift is given by each RC section =tan1 (1/RC). In practice R-value
is adjusted such that becomes 60. If the value of R and C are chosen such that the given
frequency for the phase shift of each RC section is 60. Therefore at a specific frequency
the total phase shift from base to transistors around circuit and back to base is exactly 360 or
0. Thus the Barkhausen criterion for oscillation is satisfied.
Design:
Vcc=12v, Ic=1mA, =100,RE = 560
Vce=Vcc/2=6V,
Vre=0.1Vcc=1.2V
Vb=Vre+0.7=1.9V,
R1=Vcc/10Ib R2
=12/(10*20A) 10 K =47 K
R2=Vb/10Ib = .9/(10*20A)=9.5K =10 K
Rc=Vcc-Vce-(IeRe/Ic)
=2.4 K =2.2 K
Fo=1/(2R (6+4(Rc/R)))
C=1/2Rc (6+4(Rc/R)))
=1/(6.28*10*10^3*4 (6+4(2.2*10^3/10)))
=0.0015 F
18
Procedure:
1.
2.
3.
The circuit is constructed as per the given circuit diagram.

The supply voltage of +12 volts and ground are given to the constructed circuit.
The output sine wave generated from the circuit is verified in the CRO and the
theoretical frequency is calculated and verified with the practical frequency.
Post lab Questions:

1. Why RC network is connected in feedback?
2. What is the frequency of oscillation of RC network?
3. What are RC oscillators?
4. Justify why RC phase shift oscillator produce sine wave as a output.
5. Write the applications of RC phase shift oscillator.
Result :
Thus a sine wave with required phase shift is produced using transistor phase shift
oscillator. Thus,
Theoretical Oscillation Frequency = ____________
Practical Oscillation Frequency = ____________

19

1. What is the frequency of oscillation for Wein Bridge oscillator?
2. Give the gain of Wein bridge oscillator.
3. What are the types of RC oscillator?
4. Mention the difference between damped oscillations undamped Oscillations?
5. What are the applications of Wein bridge oscillator?

20
Circuit Diagram
Model Graph:

21
Ex.No:2(b) WEIN BRIDGE OSCILLATOR

Aim:
To design and construct the Wein bridge oscillator using BJT and to observe the sinusoidal
output waveform.
S.NO APPARATUS
TYPE & RANGE
1
Transistor
BC 107
2
Resistors
47 k,2.2 k,10 k,1.2 k,560
3
Capacitors
10F,47 F,0.01 F
4
CRO
5
Power Supply
(0-15)V
6
Bread board
-
QUANTITY
1
1,1,2,3,1
2,1,3
1
1
1
Theory:
The Wein bridge oscillator employs a balanced Wien bridge as the feedback network.
Two stages CE amplifier provides 360o phase shift to the signal. So the Wien bridge need not
introduce any phase shift to satisfy Barkausen criterion.
The attenuation of the bridges calculated to be 1/3 at resonant frequency. So the amplifier
stage should provide a gain of exactly 3 to make loop gain unity. Since the gain of two stage
amplifier is the product of individual stages, overall gain becomes very high. But the gain will be
trimmed down to 3 by negative feedback network.
The emitter resistors of both stages are kept un bypassed. This provides a current series
feedback which ensures the stability of operating point and reduction of gain. Frequency of
oscillation is given by,
f = 1/2RC
Design:
Vcc = 12 V , Ic = 2 mA
VRC = 40 % of Vcc = 4.8 V
VRE = 10 % of Vcc = 1.2 V
VCE = 50 % of Vcc = 6 V
Design of Rc :
VRC = Ic x Rc = 4.8 V
Rc = 4.8/2mA = 2.4 k
Use 2.2 k
Design of RE :
VRE = IE x RE = 1.2 V
RE = 1.2/2mA = 600
Use 560
Design of R1 and R2 :
IB = IC/ hFE = 2 mA/ 100 = 20 A.
22
Assume the current through R1 = 10 IB and that through R2 = 9 IB to avoid loading potential
divider by the base current.
VR2 = Voltage across R2 = VBE + VRE = 0.7 + 1.2 = 1.9 V
VR2 = 9 IB x R2
R2 = 1.9/9 x 20 A. = 10.6 k
Use 10 k.
VR1 = Voltage across R1 = Vcc - VR2 = 12 1.9 = 10.1 V
VR1 = 10 IB x R1
R1 = 10.1/10 x 20 A. = 50 k
Use 47 k
Design of Cc:
f = 1/2Cc(R1|| R2|| hFERE)
Substituting , we get Cc = 44 F
Use 47 F.
where f = 1 kHz
Design Of Feedback Network:

The required frequency of oscillation is fc = 1/2RC = 10 kHz
R must be greater than Rc to avoid loading.
Take R = 47 k , then C = 0.01 F
Gain of the amplifier must be 3.
Negative feedback factor is given by RE/( RE + R3).
Then gain of the amplifier must be its reciprocal.
RE/( RE + R3) = 3
R3 = 2 RE = 12 k
Use 4.7 k pot.
Procedure:
1. Set up the amplifier part of the oscillator and ensure that the transistor is operating as an
amplifier.
2. Connect the feedback network and observe the sine wave on CRO and measure its
amplitude and frequency.
3. Observe the output waveform.

23
Review Questions :
1. Give the formula for frequency of oscillations.
2. What is the condition for Wien bridge oscillator to generate oscillations?
3. What is the total phase shift provided by the oscillator?
4. What is the function of lead-lag network in Wein bridge oscillator?
5. Find whether the Wein bridge oscillator is LC or RC oscillator.
Result:
Thus the Wien bridge oscillator was designed and the output waveform was observed.
Frequency(Hz)
f = 1 / 2 RC
Theoretical(Hz)
Practical(Hz)

24

1. What is LC oscillator?
2. Give the difference between RC & LC oscillator.
3. How much amount of feedback obtained by the feedback loop?
4. Define damped Oscillations.
5. What are the feedback components present in LC oscillators?

25
Circuit Diagram
Hartley Oscillator
Model Graph

26
Ex.No: 3 HARTLEY AND COLPITTS OSCILLATOR

Aim :
To design and construct a Hartley and Colpitts oscillator.
S.No. Components/Equipments Specifications
1
Transistor
BC 107
2
Resistor
100k,3.9k,12k,800
3
Capacitor
0.1F
4
Decade Capacitance box
5
Decade Inductance box
6
CRO
(0-30 )MHz
7
RPS
(0-30) V
Quantity
1
Each 1
2
2
2
1
1
Design:
Vcc =10V, IC =1.2mA, RB =15k
VE = Vcc /10 =10V /10 =1V
IE Ic =1.2mA
VE = IERE
RE = VE /IE =1V / 1.2mA
RE = 833.33
Choose ,
RE =800
Vcc = IcRC +VCE + VE
Rc = ( Vcc VCE VE) /Ic = (10 5 1) / 1.2mA
Rc =3.3k
Choose ,
Rc = 3.9k
VBE = VB VE
VB = VBE + VE = 0.7 +1 =1.7 V
VB = (Vcc *R2)/ (R1+R2) =15k
R2/(R1+R2) = 1.7 /10 = 0.17
R1 = 15k / 0.17 = 88.24k
Choose ,
R1 = 100k
R2/(R1+R2) = 0.17
R2 =18k , Choose , R2 =12k , Let C1 =C2 = 0.1F

27
Circuit Diagram
Model Graph

28
THEORY:
If gain A of the amplifier is just sufficient to over come the attenuator of the network. We get sinusoidal oscillations. Mathematically If A is for greater than 1 square wave
results in however, if A is less than 1 no oscillations will occur. The Colpitts and Hartley
Oscillator is a LC oscillator. Generally, LC oscillators are designed to operate in the radio
frequency range above 1MHz however, they can also be designed to produce oscillations in the
low audio frequency range. But for low frequency operation, the size of the inductors to be
used become larger and larger as the frequency becomes smaller and smaller and this puts a limit
on the low frequency range of oscillators employing LC coupling network.
Procedure :
2. For the Hartley oscillator adjust the inductance in the tank circuit to get a sinusoidal signal of
desired frequency.
3. For the Colpitts oscillator adjust the capacitance in the tank circuit to get a sinusoidal signal
of desired frequency
4. Plot the output obtained in the linear graph.
Post Lab Questions:
1. Differentiate Colpitts & Hartley oscillator.
2. Mention the frequency range of LC oscillators.
3. Which type of oscillator is suitable for Radio frequency range applications?
4. Give the types of low frequency and high frequency oscillators.
5. Which oscillator is suitable for RF range applications?
Result:
Thus Hartley & Colpitts oscillator is designed and constructed, and the output sine
wave form is observed. Then practical oscillation frequency is calculated & compared with
theoretical oscillation frequency.
Practical frequency
=
Theoretical frequency

29

1. What is Tuned amplifier?
2. Define Q-factor.
3. Write the expression for resonant frequency.
4. Give the classification of tuned amplifiers.
5. What is loaded Q and unloaded Q?

30
Circuit Diagram
Model Graph:

31
Ex.No: 4 TUNED CLASS C AMPLIFIER

Aim:
To design and construct the class-c power amplifier and to plot its frequency response.
S.No
1
2
3
Item
TRANSISTOR
RESISTOR
CAPACITOR
4
5
6
CRO
RPS
FUNCTION
GENERATOR
Range
BC 107
4.2K, 500, 197K, 2.2K,
0.1f
0.001f, 100f
(0-30) V
-
Quantity
1
1
2
1
1
1
1
Theory:
In a class-c amplifier, the transistor is in the active region for less than half cycle. It
means, conduction takes place for less than one half cycle. This implies that the collector current
of a class-c amplifier is highly non-sinusoidal because current flows in pulses. The load is a
tuned circuit which converts the non-sinusoidal o/p to nearly sinusoidal form. Because of the
flow of collector current less than 1800, the average collector current is much less, if hence losses
are less, so efficiency is very high.
Resonance frequency (fr)=1/2LC.
At resonant frequency, the inductance of parallel resonant circuit is very high and is purely
resistive. When the circuit is tuned to the resonant frequency, the voltage across R 1 is maximum
and sinusoidal. The tuned circuit helps in rejecting the harmonics that are developed in the
transistor due to class-C operation.
The class-c tuned power amplifier consists of an LC tuned circuit in the collector of Q.
R1& R2 provides the necessary biasing for Q. C1& C3 are the i/p and o/p coupling capacitors. The
Q point is kept just above the cut-off line on the dc load line. RL is provided to load the
amplifier.

32
Procedure:
1. Connect the circuit as for circuit diagram
2. Calculate the theoretical resonant frequency
fr=1/2LC.
3. Connect the i/p signal to the i/p of the amplifier.
4. Keep i/p voltage zero initially and adjust frequency to around resonance frequency (fr)
5. Observe the o/p waveform increase the input ac voltage until we get the maximum
distorted o/p.
6. Vary the frequency in required steps surrounding resonant frequency and note down the
corresponding o/p voltages & calculate gain.
7. Plot the graph between gain and frequency.
Post lab Questions:
1.
2.
3.
4.
5.
What is the purpose of the tuned circuit?

Write the advantages of tuned amplifier.
Give the other name for tuned amplifier.
What are the characteristics of an ideal tuned amplifier?
Define the bandwidth of a tuned amplifier.
Observation:
Vin=____(v)
Frequency(Hz)
Vout(v)
Gain(dB)=20 log (V0/Vin)
Result:
Thus single tuned amplifier is designed and constructed for the given operating
frequency and the frequency response is plotted.
33

1. What is linear waveform shaping circuits?
2. Define integrator.
3. Define differentiator.
4. What is wave shaping circuit?
5. What are the components used in wave shaping circuits?

34
Circuit Diagram
Model Graph

35
DIFFERENTIATOR AND INTEGRATOR

Aim :
To construct and verify the output waveforms of differentiator and integrator circuit
Components & Equipments Required
S.No COMPONENTS
RANGE
1
Resistor
10k
2
Capacitor
0.01F
3
AFG
(0-1 )MHz
4
CRO
(0 30 )MHz
5
Bread Board
QUANTITY
1
1
1
1
1
Theory :
The RC linear network used for wave shaping circuit based on input frequency is
divided as High Pass Filter and Low Pass Filter. The High pass filter acts as differentiator when
the time constant is very low. The Low pass filter circuit with a very high time constant acts as
an integrator.
Procedure
1. Connect the components and apparatus as shown in the circuit diagram.
2. For Differentiator set sinusoidal input of 4 volts and 200Hz and verify the output using
CRO. Repeat it with square waveform as an input.
3. For Integrator set sinusoidal input of 4 volts and 5kHz and verify the output using CRO.
Repeat it with square waveform as an input.
4. Plot the input and output waveform for differentiator and integrator in linear graph.

36
Circuit Diagram
Integrator
Model Graph

37
Post lab Questions:

1. How high pass RC circuit is used as a differentiator?
2. How low pass RC circuit is used as an integrator?
3. What should be the input for an integrator circuit to obtain the ramp signal in the output?
4. What will be time constant of an integrator to obtain saw tooth waveform in the output?
5. What is the formula to verify the output of an integrator and a differentiator circuit?
Result :
Thus the integrator and the differentiator circuit operation is verified for the
square and sine wave input.

38

1. What is meant by multivibrator?
2. What is the frequency of oscillation of Astable multivibrator?
3. Differentiate oscillator and multivibrator.
4. Define the function of the RC circuit involved in the astable multivibrator.
5. Give the types of multivibrator.

39
Circuit Diagram
Theoretical Calculation
Time Period T = Ton + Toff = 0.69 R1C1 + 0.69 R2C2

T = 1.38 RC
where R1=R2 =R
and C1 = C2 = C

40
ASTABLE MULTIVIBRATOR
Aim: To construct an astable multivibrator circuit and observe the quasi states of the circuit.
S.No
1
2
COMPONENTS RANGE/SPECIFICATION
Resistor
3.9k
100k
Transistor
BC107
QUANTITY
2
2
2
Capacitor
0.01F
AFG
(0-1)MHz
CRO
(0-30)MHz
6
7
Bread Board
Regulated power
supply
(0 30 V)
1
1
Design :
Vcc =12V , Ic =2.5mA
VCE = Vcc /10 = 12V /10 = 1.2V
Vcc IcRc - VCE =0
12-(2.5*10-3)Rc -1.2 =0
Rc = 4.3k
Time period T =Ton + Toff
Assume, Ton = Toff
T = 2*(0.69RC) =1.38RC
Let C = 0.01F
T = 1.38*(R*0.01F)
R = 100k

41
Model Graph

42
Theory :.
An Astable Multivibrator has two quasi stable states and it keeps on switching between
these two states by itself. No external triggering signal is needed. The Astable multivibrator
cannot remain indefinitely in any one of the two states .The two amplifier stages of an Astable
multivibrator are regenerative across coupled by capacitors. The astable multivibrator may be to
generate a square wave of period, 1.38RC.
Post lab Questions:

1. What do you understand by multivibrator?
2. Write the other name for the Astable multivibrator.
3. Why Monostable multivibrator is called gating circuit?
4. How do you determine the frequency of oscillations?
5. What are the other names of Monostable multivibrator?
Result:
Thus the quasi states of an Astable multivibrator were observed and the
waveforms are plotted.
Theoretical Time period T
Practical Time period T

43
Circuit Diagram

44
MONOSTABLE MULTIVIBRATOR
Aim : To observe the stable state and quasi stable state voltages in monostable multivibrator.

S.No
COMPONENTS
Resistor
RANGE/SPECIFICATION QUANTITY
10k , 100k,
1,1,
800,8k
2 ,1
Capacitor
0.01 F , 1 F
2,1
AFG
(0-1)MHz
CRO
(0-30)MHz
Bread Board
NPN Transistor
BC107
Dual Power supply
(0 30 V)
Design :
Vcc =6V , VBB =-1.5V ,VCE(sat) = 0.3 , VBE = VBE(sat) = 0.7 , hfe =20 , IC(sat) =7mA
Assume Q2 is ON and Q1 is OFF
IC2 = IC(sat) =7mA
IC2 = (Vcc - VCE(sat))/Rc
Rc = (6 - 0.3)/ (7x10-3)
Rc = 814
Choose , Rc = 800
IB(sat) = IC(sat) / hfe = (7x10-3) /20
IB(sat) = 0.35mA
IB1(sat) = IB2(sat) = 0.35mA
IB2 = (Vcc - VCE(sat))/R
R = 106k
Choose, R = 100k
45
Model Graph

46
In Quasi state , Q1 is ON and Q2 is OFF

Given , Pulsewidth T =0.7ms
T =0.69RC
Let C =0.01 F
0.7ms = 0.69R0.01 F
R = 101k
Choose , R = 100k
VC2 = Vcc
I3 = (VC2 VBE(sat)) / R1
I4 = (VBE(sat) VBB) /R2
I4 = IB1(sat) =0.05mA
R2 =(VBE(sat) VBB) / I4 = (0.7-(-1.5))/0.35mA = 6.28k
Choose , R2 = 7.8k
I3 = I4 + IB1(sat)
R1 =(VC2 VBE(sat)) / I3 = (6-0.7) / 0.1mA
R1=7.571k
Choose , R1=10k
Theory
A monostable multivibrator on the other hand compared to astable, bistable has only one stable
state, the other state being quasi stable state. Normally the multivibrator is in stable state and
when an externally triggering pulse is applied, it switches from the stable to the quasi stable
state. It remains in the quasi stable state for a short duration, but automatically reverse switches
back to its original stable state without any triggering pulse. The monostable multivibrator is also
referred as one shot or uni vibrator since only one triggering signal is required to reverse the
original stable state. The duration of quasi stable state is termed as delay time (or) pulse width
(or) gate time.

47
Procedure
2. Verify the stable states of Q1 and Q2
3. Apply the square wave of 4v p-p , 1KHz signal to the base of the transistor Q1.
4. Observe the wave forms at base of each transistor simultaneously.
5. Observe the wave forms at collectors of each transistors simultaneously.
6. Note down the parameters carefully.
7. Note down the time period and compare it with theoretical values.
8. Plot wave forms of Vb1, Vb2, and Vc1 & Vc2 with respect to time
Post lab Questions:
1.
2.
3.
4.
5.
Why does one of the transistor start conducting ahead of other?

What are the operation states of Monostable multivibrator?
Define transition time.
What are the types of triggering?
What type of input is given to Monostable multivibrator?
Result:
Thus the Stable state and quasi stable state voltages in monostable multivibrator were
observed.
Theoretical Pulse width
Practical Pulse width

48

1. What is a linear waveform-shaping circuit?
2. Define clipper.
3. Define clamper.
4. What are the other names of clipper circuit?
5. Define wave shaping circuit.

49
Circuit Diagram:
Positive Peak Clipper
Model Graph
Theoretical Calculations:
Vr = 2v, V=0.6v
When the diode is forward biased Vo =Vr + V = 2v+0.6v = 2.6v
When the diode is reverse biased the Vo=Vi
50
CLIPPER AND CLAMPER

Aim: To construct and study the operation of clipper and clamper circuits.

S.No
QUANTITY
Resistor
4.7k
Diode
IN4001
AFG
(0-1)MHz
CRO
(0-30)MHz
Bread Board
Regulated power
1
(0 30 )V
supply
Theory:
The basic action of a clipper circuit is to remove certain portions of the waveform,
above or below certain levels as per the requirements. Thus the circuits which are used to clip off
unwanted portion of the waveform, without distorting the remaining part of the waveform are
called clipper circuits or Clippers. The half wave rectifier is the best and simplest type of clipper
circuit which clips off the positive/negative portion of the input signal. The clipper circuits are
also called limiters or slicers.
Procedure
Clipper Circuit
2. Set input , sinusoidal signal of 8Vp-p and 1kHz frequency and the reference voltage as 2V
using RPS.
3. Observe the output across the diode using CRO.
4. Plot the input and output signal in a linear graph.
51
Circuit Diagram:
Negative Peak Clipper
Model Graph

52
Theoretical Calculations:
Vr = 2v, V=0.6v
When the diode is forward biased Vo = -(Vr + V) = -(2v+0.6v )= -2.6v
When the diode is reverse biased the Vo=Vi
Procedure
Clamper Circuit
2. Set input, sinusoidal signal of 8Vp-p and 1kHz frequency
3. Observe the output across the load resistance using CRO.
4. Plot the input and output signal in a linear graph.
Post lab Questions :

1. Differentiate clipper and clamper.
2. How does a clamper circuit adds a dc level to the output voltage?
3. Mention the types of clampers.
4. What is biased clipper?
5. What are the classifications of a clipper circuit?

53
Circuit Diagram
Positive Clamper

54
Circuit Diagram
Negative Clamper
Result:
Thus the clipper and clamper circuits are designed and the output waveforms are
observed.

55

1.
2.
3.
4.
5.
Define blocking oscillator.

What type of input is given to blocking oscillator?
What is time base generators?
Mention resolving time.
What is free running blocking oscillator?

56
Circuit Diagram:
Model Graph:

57
EXPT.NO:11
FREE RUNNING BLOCKING OSCILLATORS
Aim:
To construct a free running blocking oscillator and to generate a triggering pulse of the circuit.

S.No
QUANTITY
Resistor
220
Capacitor
0.1F
Transformer
Transistor
NPN
AFG
(0-1)MHz
CRO
(0-30)MHz
Bread Board
Regulated power
1
(0 30 )V
supply
Theory:
The BLOCKING OSCILLATOR is a special type of wave generator used to
produce a narrow pulse, or trigger. Blocking oscillators have many uses, most of which are
concerned with the timing of some other circuit. They can be used as frequency dividers or
counter circuits and for switching other circuits on and off at specific times. In a blocking
oscillator the pulse width (pw), pulse repetition time (prt), and pulse repetition rate (prr) are all
controlled by the size of certain capacitors and resistors and by the operating characteristics of
the transformer. The transformer primary determines the duration and shape of the output.

58
Procedure:
2. Observe the voltage waveform across the collector of transistor
3. Change the time constant by changing the capacitor values to 0.1F and 0.001F and
observe the wave forms.
4. Note down the parameters, amplitude, charging and discharging periods of the
waveforms.
Post lab Questions:
1.
2.
3.
4.
5.
What are the two important elements of Blocking Oscillator?

Define rise time.
Define overshoot.
When do the core saturates?
Define droop or a tilt
Result:
Thus the triggering pulse of free running blocking oscillator was observed.
Pulse width

59

1.
2.
3.
4.
5.
Define Bistable Multivibrator.

What are the different names of Bistable multivibrator?
Distinguish oscillator and multivibrator.
What is self-biased multivibrator?
Write the types of multivibrators.

60
Circuit Diagram
Model Graph

61
BISTABLE MULTIVIBRATOR
Aim : To observe the two stable state voltages in a bistable multivibrator using transistor.
Apparatus Required:
RANGE/SPECIFICATION QUANTITY
S.No
COMPONENTS
Resistor
Capacitor
0.1F
AFG
(0-1)MHz
CRO
(0-30)MHz
Bread Board
NPN Transistor
BC107
Dual Power supply
(0 30 V)
10k , 2.4k, 27k
2,2,2
Design :
Vcc = 5V , VBB = -5V ,hfe(min) = 20 , Ic =2mA , VCE(sat) =0.2V
IC1 = (VCC VCE(sat) ) /Rc
Ic Ic2 = 2mA
Rc =(Vcc - VCE(sat)) / IC2
Rc= 2.4k
I4 = IC2 /10 = 2mA /10
I4 = 0.2mA
I4 = (VB2 +VBB ) / R2
R2 = 0.715 / 0.2mA
R2 = 28.5 k
Choose, R2 = 27 k
IB(min) = Ic /hfe(min) = 2mA /20 = 0.1mA
IB2 = 1.5 *IB2(min) = 0.15mA
62
I3 = I4 +IB2 = 0.2mA +0.15mA =0.35mA

I3 =(Vcc VB2 ) / R1
R1 =9.88k k
Choose,
R1 =10k
Time period
T = 2C(R1 R2)
Let C=0.1 F , T =1.458ms

Procedure
2. Verify the stable states of Q1 and Q2
3. Apply the square wave of 4v p-p , 1KHz signal to the base of the transistor Q1.
4. Observe the wave forms at collectors of each transistors simultaneously.
5. Note down the time period and amplitude of the wave at the collector of the transistors
Q1 and Q2.
6. Plot wave forms of Vc1 and Vc2 with respect to time in a linear graph.
Post lab Questions:

1. What are the states obtained in Bistable multivibrator?
2. What are the different types multivibrator .
3. List the applications of an bistable multivibrator .
4. What is a bistable multivibrator ?
5. What are the other names of a bistable multivibrator ?
Result:
Thus the two Stable state voltages in bistable multivibrator were observed.
Theoretical Time period
Practical Time period

63
PSPICE Tutorial
I. Opening PSpice
Find PSpice on the C-Drive. Open Schematics or you can go to PSpice A_D and then
click on the schematic icon
You will see the window as shown in Figure 1.
Figure 1

64

65

66

67

68

69

70

71

72

73

74

75
Ex.No: 13:TUNED COLLECTOR OSCILLATOR

Aim:
To simulate Tuned Collector Oscillator circuit using PSPICE.
S.No
Components / Software
Personal Computer
PSPICE Software
Theory:
Tuned collector oscillation is a type of transistor LC oscillator where the tuned circuit
(tank) consists of a transformer and a capacitor is connected in the collector circuit of the
transistor. Tuned collector oscillator is of course the simplest and the basic type of LC
oscillators. The tuned circuit connected at the collector circuit behaves like a purely resistive
load at resonance and determines the oscillator frequency.The common applications of tuned
collector oscillator are RF oscillator circuits, mixers, frequency demodulators, signal generators
etc.
Procedure:
1. Open Orcad-> Capture CIS ->File->New-> Project
2. Place->Part , select the required components for the circuit to be designed from the
library.
3. Connect the placed components by using the option Place->wire.
4. Pspice -> New Simulation profile -> name->create
5. Analysis ->Time Domain
6. Enter Run to time and maximum step size value.
7. Pspice-> Run.
8. Plot->Add plot to window.
9. Keep the cursor in the first plot window , Trace-> Add the required Trace

76
Result:
Thus the given tuned collector oscillator circuit was simulated using PSPICE tool and the
output graphs were obtained.

77
Circuit Diagram: (Twin-T Oscillator)
Model Graph:

78
Ex.No: 14:Twin-T Oscillator

Aim:
To simulate Twin T Oscillator circuit using PSPICE
S.No
Personal Computer
PSPICE Software
Theory:
The "Twin-T" oscillator as it uses two "T" RC circuits operated in parallel. One circuit is
an R-C-R "T" which acts as a low-pass filter. The second circuit is a C-R-C "T" which operates
as a high-pass filter. Together, these circuits form a bridge which is tuned at the desired
frequency of oscillation. The signal in the C-R-C branch of the Twin-T filter is advanced, in the
R-C-R - delayed, so they may cancel one another for frequency
if
if it is connected as a negative feedback to an amplifier, and x>2, the amplifier becomes an

oscillator.
Procedure:
library.
79
7. Pspice-> Run.
Result:
Thus the given Twin T oscillator circuit was simulated using PSPICE tool and the output
graphs were obtained.

80
Circuit Diagram
Model Graph:

81
WEIN BRIDGE OSCILLATOR
Ex.No: 15:
Aim:
To simulate Wein Bridge Oscillator circuit using PSPICE

S.No
Personal Computer
PSPICE Software
Theory:
A Wien bridge oscillator is a type of electronic oscillator that generates sine waves. It can
generate a large range of frequencies. The oscillator is based on a bridge circuit originally
developed by Max Wien in 1891 for the measurement of impedances.[1] The bridge comprises
four resistors and two capacitors. The oscillator can also be viewed as a positive gain amplifier
combined with a bandpass filter that provides positive feedback. Automatic gain control,
intentional non-linearity and incidental non-linearity limit the output amplitude in various
implementations of the oscillator.The condition that R1=R2=R and C1=C2=C, the frequency of
oscillation is given by
and the condition of stable oscillation is given by

Procedure:
library.
82
7. Pspice-> Run.
Result:
Thus the given Wein Bridge oscillator circuit was simulated using PSPICE tool and

83
Circuit Diagram:
Model Graph:

84
Ex.No: 16: DOUBLE TUNED AND STAGGER TUNED AMPLIFIER

Aim:
To simulate the Double Tuned and Stagger tuned amplifier using PSPICE
S.No
Personal Computer
PSPICE Software
Theory:
Double-Tuned Amplifier
A double-tuned amplifier is a tuned amplifier with transformer coupling between the
amplifier stages in which the inductances of both the primary and secondarywindings are tuned
separately with a capacitor across each. The scheme results in a wider bandwidth and
steeper skirts than a single tuned circuit would achieve.
There is a critical value of transformer coupling coefficient at which the frequency
response of the amplifier is maximally flat in the passband and the gain is maximum at
the resonant frequency. Designs frequently use a coupling greater than this (over-coupling) in
order to achieve an even wider bandwidth at the expense of a small loss of gain in the centre of
the passband.
Cascading multiple stages of double-tuned amplifiers results in a reduction of the
bandwidth of the overall amplifier. Two stages of double-tuned amplifier have 80% of the
bandwidth of a single stage. An alternative to double tuning that avoids this loss of bandwidth
is staggered tuning. Stagger-tuned amplifiers can be designed to a prescribed bandwidth that is
greater than the bandwidth of any single stage. However, staggered tuning requires more stages
and has lower gain than double tuning.
Stagger Tuned amplifier:
Staggered tuning is a technique used in the design of multi-stage tuned amplifiers
whereby each stage is tuned to a slightly different frequency. In comparison to synchronous
85
tuning (where each stage is tuned identically) it produces a wider bandwidth at the expense of
reduced gain.
Procedure:
library.
7. Pspice-> Run.
Result:
Thus the given Double tuned and stagger tuned amplifier circuit was simulated using
PSPICE tool and output were obtained.

86
Circuit Diagram:
Model Graph:

87
Ex.No: 17: BISTABLE MULTIVIBRATOR

Aim:
To simulate the Bistable multivibrator using PSPICE
S.No
Personal Computer
PSPICE Software
Theory:
The Bistable Multivibrator is another type of two state device similar to the Monostable
Multivibrator we looked at in the previous tutorial but the difference this time is that both states
are stable.
Procedure:
library.
7. Pspice-> Run.
9. Keep the cursor in the first plot window , Trace-> Add the required Trace.

88
Result:
Thus the given Bistable multivibrator circuit was simulated using PSPICE tool and output
were obtained.

89
Circuit Diagram:
Model Graph:

90
Ex.No: 18: SCHMITT TRIGGER

Aim:
To simulate the Schmitt trigger using PSPICE
S.No
Personal Computer
PSPICE Software
Theory:
Schmitt trigger is a comparator circuit with hysteresis implemented by applying positive
feedback to the noninverting input of a comparator or differential amplifier. It is an active circuit
which converts an analog input signal to a digital output signal. The circuit is named a "trigger"
because the output retains its value until the input changes sufficiently to trigger a change. In the
non-inverting configuration, when the input is higher than a chosen threshold, the output is high.
When the input is below a different (lower) chosen threshold the output is low, and when the
input is between the two levels the output retains its value. This dual threshold action is
called hysteresis and implies that the Schmitt trigger possesses memory and can act as a bistable
multivibrator (latch or flip-flop). There is a close relation between the two kinds of circuits: a
Schmitt trigger can be converted into a latch and a latch can be converted into a Schmitt trigger.
Schmitt trigger devices are typically used in signal conditioning applications to remove noise
from signals used in digital circuits, particularly mechanical contact bounce. They are also used
in closed loop negative feedback configurations to implement relaxation oscillators, used
in function generators and switching power supplies.
Procedure:
library.
91

7. Pspice-> Run.
Result:
Thus the given Schmitt trigger circuit was simulated using PSPICE tool and output were
obtained.

92
Circuit Diagram:
Model Graph:

93
Ex.No: 20 MONOSTABLE MULTIVIBRATOR

Aim :
To simulate a monostable multivibrator using PSpice.
S.No
Personal Computer
PSPICE Software
Procedure:
library.
7. Pspice-> Run.
Result:
Thus the given Monostable multivibrator circuit was simulated using PSPICE tool and

94
Circuit Diagram:
Model Graph:
Input and Output of an CMOS Inverter

95
CMOS INVERTER USING PSPICE

Aim : To construct and verify the truth table of CMOS Inverter using PSpice .
Tools Required:
PSpice Simulation tool
Procedure:
library.
7. Pspice-> Run.
Result:
Thus the CMOS Inverter was constructed using PSpice and the truth table was verified.

96
DIFFERENTIAL AMPLIFIER USING PSPICE

Aim : To simulate a differential amplifier in common mode and in difference mode using
PSpice and verify the output waveforms.
Tools Required :
PSpice Simulation tool
Procedure:
library.
7. Pspice-> Run.
Output of Differential amplifier in Differential mode :

97
Output of Differential amplifier in Common mode :

98

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VALLIAMMAI ENGINEERING COLLEGE

SRM NAGAR, KATTANKULATHUR 603 203.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION

DESIGN AND ANALYSIS OF THE FOLLOWING CIRCUITS

SIMULATION USING SPICE (Using Transistor)

DESIGN OF FOLLOWING CIRCUITS

VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN

Prerequisite Lab Questions

VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN

VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN

Ex.No: 1(a) CURRENT SERIES FEEDBACK AMPLIFIER

VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN

Gain Av = hfeRi / hie = (100*2.7k) /2k

Input Impedance Ri = (R1R2) hie = 10k2k

Output Impedance Ro = Rc =2.7k

Gain Avf = Av / (1+ Av) = 135/(1+0.21*135) =4.6

Input Impedance Rif = Ri(1+ Av)

Output Impedance Rof = Ro(1+ Av) = 79.25k

VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN

Prerequisite Lab Questions

VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN

VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN

Ex.No: 1(b) VOLTAGE SHUNT FEEDBACK AMPLIFIER

RB = 10k = R1R2/(R1+R2) =R1(0.158)

VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN

Gain Av = hfeRi / hie = (100*2.7k) /2k

Input Impedance Ri = (R1R2) hie = 10k2k

Output Impedance Ro = Rc =2.7k

Gain Avf = Av / (1+ Av) = 135/(1+0.21*135) =4.6

Input Impedance Rif = Ri(1+ Av)

Output Impedance Rof = Ro(1+ Av) = 79.25k

Post lab questions:

VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN

Prerequisite Lab Questions

VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN

VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN

Ex.No: 2 (a) RC PHASE SHIFT OSCILLATOR

The circuit is constructed as per the given circuit diagram.

Post lab Questions:

VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN

Prerequisite Lab Questions

VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN

VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN

Ex.No:2(b) WEIN BRIDGE OSCILLATOR

Design Of Feedback Network:

VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN

VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN

Prerequisite Lab Questions

VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN

VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN

Ex.No: 3 HARTLEY AND COLPITTS OSCILLATOR

R2 =18k , Choose , R2 =12k , Let C1 =C2 = 0.1F

VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN

VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN

Prerequisite Lab Questions

VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN

VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN

Ex.No: 4 TUNED CLASS C AMPLIFIER

VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN

What is the purpose of the tuned circuit?

Gain(dB)=20 log (V0/Vin)

Prerequisite Lab Questions

VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN