UltrasoundToGo

Giovanni De Micheli
Luca Benini
Jean-Yves Mewly
Joseph Sifakis
Lothar Thiele
Jean-Philippe Thiran

What is needed?
1. A portable, inexpensive, low-power scanner
2. The scanner must be 3D

Acquires volumes; reduces threshold of operators expertise

Only other way to remotely acquire images: robotic arm; complex

ARTIS project by ESA

for space applications

3. Good enough imaging quality for the applications

4. A protocol to tag and remotely visualize the scans

Related products
Professional 3D scanners
expensive, bulky, >500W
Siemens Acuson, Philips Epiq, Samsung WS80

Efforts for mobility are usually 2D (still radiologist)

[] MUs US-304 portable ultrasound imager,
powered by ST [] aiming to [] diagnostics in
remote rural areas of Africa. 14.04.2016

Philips
Visiq

First attempt at miniaturized 3D, but full of limitations

BK Ultrasounds Sonic Window
To locate vessels for dialysis cannulation. Acquires
images 3 cm deep and only computes one cross-section.
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2015/16 UltrasoundToGo Progress

Advanced modeling of the acquisition process (Matlab)
Co-designed new 3D probe (transducer and circuit)
in collaboration with Fraunhofer IBMT, Germany
Realized digital beamforming on a new FPGA platform

Developed toolchains for efficient mapping of ultrasound

beamforming onto parallel hardware architectures
Improved algorithms to use compressive sensing allowing
for a reduction in cabling and analog electronics requirements
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Development of a Matrix Array

Probe is essential to image quality

Collaboration project with Fraunhofer IBMT, DE

Fraunhofer: piezoelectric array
(32x32 = 1024 elements),
analog cabling,
Array close-up
(last week)
custom connector
IIS-ETHZ: miniaturized analog electronics, PCB layout

Final assembly imminent

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Probe Electronics Design

Reduces volume by 2X and cross-section by 3X compared

to previous prototype (30x33 mm handheld)
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Probe and System Design

256-channel I/O

Next steps:

Custom cabling
and connector

1. Connect to4:1
Fraunhofers
analog
DiPhAS,
echoes, process
Sensor
Arrayacquire
Multiplexing
(32x32
1024
amplification
them=offline
onand
our
digital imager
elements)
2. (Pending funding application)
Acquire same machine at EPFL as
bridge for realtime imaging

Fraunhofer imager (DiPhAS)

Analog
front-end

Digital ultrasound
image formation

Offline or
realtime

UltrasoundToGo imager

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Development Board
HDMI port
Will be used for direct
video output (requires
on-chip scan conversion)

Gigabit Ethernet port

Currently used for input
of digitized echoes and
output of images
Kintex Ultrascale FPGA chip
Performs 1024-channel beamforming
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(delay, apodization, sum)

FPGA Beamformer results

32x32=1024-channel in a single XCKU040 chip
Most high-end equipment supports only 256
Configurable volume: 73x73x10cm
64x64x600 = 2.5Mvoxels per frame
One insonification per frame
Beamformer operates at 125 MHz
Approximate power consumption: 4W
Peak throughput: 50 fps
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Future View 2016/17

Concentrates analog processing into the probe to reduce

costs and allow for efficient fully-digital data processing
Enables fully-in-house UltrasoundToGo imager
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3D US deployed on Kalray MPPA-256

3D beamforming per-nappe approach

High level of parallelisaton:
46,664 beamformer instances deployed to
Kalray MPPA-256

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Application Deployment
Offline: 1. Computation of the WCET as a sum of WCCT and delay due to interferences
2. Optimization based on WCET providing real-time guaranties
Online: Run-time optimizations based on actual execution times (AET)
1. Many-core Kalray MPPA-256

4. Unified system model

SMT
solver

Task
C

b(eAC)

Cluster 1

Cluster 2

(eAC)

Partitioning and placement

Task
A

(eAB)

IA

0
0

b(eAB)

TA

(eAB)

Task
B

IB
0

b(eBA)
TB

FA

WCET overapproximation
2. Application

SMT
solver

3. Worst case computation time

(WCCT) in isolation

WCET

Mapping, Scheduling,
buffer allocation
Updating the schedule

Tightening of the WCET by

pruning out interferences from
tasks not overlapping neither in
space nor in time

Run-time optimization

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Offline
Online

Tighter
WCET

Possible 3D US configurations
Two possible configurations:

Probe = 12 x 12 phased array;

Volume depth = 4.5cm
, [-38, 38];
fc = 4 MHz;
fs = 200 MHz

Probe = 64 x 64 phased array;

Volume depth = 4.5cm
, [-38, 38];
fc = 4 MHz;
fs = 12 MHz

A blanket of echo signals that need to be stored on each cluster:

Memory required by one blanket is ~ 1MB
Time running the whole application of the host processor:

~ 30s (1 thread)

~ 13 minutes (1 thread)

Time when Beamforming is running on the Kalray MPPA-256 chip:

~ 14s
~ 0.5s
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Mapping Algorithms to Architecture

Goal: Map application to system architecture towards a
predictable and efficient execution.

How to specify the application?

Neutral w.r.t. hardware or software.
High expressivity (adaptive, mode change)

CAL Actor Language

RVC-CAL designed and standardized
by MPEG group
Used to specify hardware and software

Conversion to Kahn process networks

for anaysis

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Case Study
Adapteva Parallella board:
Zynq dual core ARM A9 CPU and FPGA
Epiphany 16-core coprocessor
Ideal test platform for HW/SW integration

Case study:
2D beamforming
on the
parallella board
Presented at N-T
annual meeting
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Compressed Beamforming Framework

for 2D Ultrasound Imaging
Reducing memory footprint, data rate and cabling
is crucial for portable ultrasound
Compressed beamforming:
Acquire ultrasound echo signals with fewer sensors
Design of new sensing strategies

Reconstruction with compressed-sensing-based algorithms

Classical
acquisition

Compressed
acquisition

Delay-andSum

Compressed
beamforming

High quality
image

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Results on in vivo carotids

Reference image

Proposed image

Reference image

Standard image
reconstruction
algorithm
128 elements
CTR = -31dB

Compressed image
reconstruction
algorithm
32 elements
CTR = -31dB

Standard image
reconstruction
algorithm
32 elements
CTR = -26dB
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Compressed Beamforming Outlook

Compressed sensing
Acquires ultrasound echo signals with fewer sensors
Performs an iterative reconstruction of the high quality
image based on compressed-sensing algorithms

Results:
Significant data rate reduction (~75%)
Significant decrease of the memory footprint (~75%)
Image quality is preserved
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Summary
Developed a front-end US system in collaboration with
Fraunhofer Institute
Designed a full 1024 Channel Beamformer on a FPGA

Power consumption lower than 4W

Developed a tool flow for realizing a beamformer on a
multiprocessor 16x16 core Kalray unit
Designed compressed sensing algorithms for reducing
system size and power while preserving image quality
Interacted with medical doctors at CHUV for advice

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UltrasoundToGo Current Staff

Integrated Systems Laboratory (EPFL-LSI)

Aya Ibrahim, Dr. Federico Angiolini, Prof. Giovanni De Micheli
Rigorous System Design Laboratory (EPFL-RiSD)
Stefanos Skalistis, Dr. Alena Simalatsar, Prof. Joseph Sifakis
Signal Processing Laboratory (EPFL-LTS5)
A. Besson, Dr. R. Carrillo, Dr. M. Arditi, Prof. J.-Ph. Thiran
Integrated Systems Laboratory (ETHZ-IIS)
Pascal Hager, Dr. Andrea Bartolini, Prof. Luca Benini
Computer Engineering and Networks Laboratory (ETHZ-TIK)
Andreas Tretter, Prof. Lothar Thiele
Service de radiodiagnostic et radiologie interventionnelle (CHUV)
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Prof. Jean-Yves Meuwly

Thanks for your attention!

www.nano-tera.ch

Visit us at www.nano-tera.ch

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