Beruflich Dokumente
Kultur Dokumente
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Agenda
Introduction
The DFT Concepts
Mechanical DFT Issues
Circuit DFT Issues
Flying Probe Test Systems
Discussions
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Glossary of Terms
DFT Design for Testability
DFM Design for Manufacture
DFx Design for Excellence = DFT+DFM
SMT Surface Mount Technology
SMD Surface Mount Device
JTAG Joint Test Action Group
TAP Test Access Port
ICT In Circuit Test
FPT Flying Probe Test
MDA Manufacturing Defect Analyzer
PCA Loaded Printed Circuit Assembly
PCB Bare Printed Circuit Board
UUT Unit Under Test
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Design Complexity
Increasing
QFP
TAB
System On Chip
1100+ Pin BGA
uBGA
Fan out issues
900 mm2
20 mm
400 mm2
15 mm
225 mm2
COB
Flip Chip
10 mm
100 mm2
Source: IBM
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Clearance Area
1 to 2 times Radius
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In the case when real FID points are not available most
systems can capture another image and use it as a
locating, but probing and placement accuracy goes down
DFT Seminar Series 2009
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Tall
device
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Ground/VCC Stake
Ground/VCC Clip
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Non-Accessible Vias
Buried Via not accessible to the top or bottom and only
connects mid plane layers to one another.
Tented or Masked Via can belong to all of the above
categories and has a solder resist mask or other coating that
prevents it from allowing electrical contact.
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ICT/MDA will use the leg centers and a crown probe type
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20 mils
24 mils
S
O
L
D
E
R
31 mils
43 mils
0402 DEVICE
20 mils
20 mils
S
O
L
D
E
R
28 mils
31 mils
Probe target
drawing not to scale
DFT Seminar Series 2009
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OK
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DFT Seminar Series 2009
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DFT Recommendations
Ensure that output enable pins are not tied to ground or VCC
directly.
Use pull-up/pull-down resistors that can be driven such that the device when
powered will be tri-stated.
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Clamps
PCBA Carrier
PCBA
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Passive Components:
Resistors (R)
Capacitors (C)
Inductors (L)
Discrete Semiconductor:
Diode
Zener diode (to 100V)
Transistors
FET
Thyristor
Triac
Other Devices:
Bridges
Switches
Relay
Optocoupler
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Vision Inspection
Bypass Capacitors
Mechanical parts
Connector orientation
Sockets
Capacitor orientation
Labels
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TEST TECHNIQUE
PON FP-SS
MDA FP-DS
PON FP-DS
Shorts
NOTES
Nets on one side only not detectable
Opens
Passives
Bypass caps
Vision option on FP
Actives
Markings/Barcode
Switches
Mechanical contact
Connectors
LED colors
IC Opens
Frequency Test
Voltage Test
IC Internal Logic
IC Programming
Using B/S
Boundary Scan
Test Target
Datalog
Test time
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U1
U2
TDI
TDO
INPUT
U3
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