Beruflich Dokumente
Kultur Dokumente
Overview
2012
Founded in 2005
Profitable since 2006
Listed in 2008 on Mainboard Bursa Malaysia
Offices:
R&D: Malaysia, Taiwan
Sales: Taiwan, Singapore, Japan, United States
Shareholders:
Khazanah
Macronix
Core Business:
Turn-key ASIC design and production outsourcing, OEM and ODM
Customer Specific System Product (CSSP). Customer spec. into
chip
Value Proposition
For fabless semiconductor companies, requiring SoCs
targeting video, imaging, wireless and multi-media
applications, Key ASIC uniquely provides:
Business Focus
Video, Imaging, Multi-Media, Wireless
CSSP (ODM for ASIC)
Provide complete design and production outsourcing of SoC/ASIC from
customers specifications
Customize solutions based on existing products or platforms
Communication
PMP/Portable Games
MP3/Digital Audio Players
Digital Imaging/Vide
DVD Player/Recorder
STB/DTV/HDTV
Digital Media Broadcast
ADSL/VDSL
Wireless LAN
VoIP
Mobile
Home Networking
Interfaces
LVDS TX/RX w Controller 10-bit 165MHz
LVDS WUXGA Receiver & Controller
USB2.0 Host/Device/PHY
USB2.0 OTG
Ethernet 10/100PHY
PECL
SSTL-18
HSTL III
PCI-X
P-ATA
CE-ATA
Cardbus
Inline Staggered - CUP I/Os
Interface
DDR/SDR
DAC
ADC
CPU
Audio/Voice Codec
DSP
AFE
CPU
ARM
MIPS
Power PC
ADC/DAC/AFE
6 bit slow ADC
2 Channel 60MHz ADC
2 Channel 60MHz DAC
DC-DC Converter
Voltage Regulator
12 bit 100 MHz ADC
3 Ch 8 Bit 170MHz ADC+AFE
3 Ch 10 Bit 150MHz ADC + AFE
3 Ch 12 Bit 108MHz DAC
3 Ch 10 Bit 115 MSPS DAC
12 Bit 100MHz DAC
10 Bit 200 MHz DAC
10 Bit 200 MHz DAC
6 Bit PGA 46 MHz
Bandgap Reference
Power On Reset
Analog Mux
RTC
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NC Verilog
VCS
RTL Analysis
Leda
Dynamic Sim
NC Verilog
VCS
Logic Synthesis
RTL Compiler
Design Compiler
ETS
Prime-Time (SI)
Floor Planner
SOC Encounter
Astro
AP&R Related
SOC Encounter
Astro, Astro-Talk,
Prime-Rail, MVDD
RC Extractor
SI, Delay Calculator
Star RC-XT
CelticIC, Celtic-NDC (ETS)
Power Analysis
Formal Verification
nLint
XRC
Prime-Time (SI)
Prime-Power
Encounter-Conformal
DFT/MBIST/BSD
DFT Compiler,
MBIST,BSD
Layout Editor
Virtuoso-XL
Conformal-Low Power
Memory
Architecture
Laker
DRC/ERC/LVS Signoff
Calibre
Key ASIC, Inc. Copyright 2012
Proprietary and Confidential
Test Engineering / QA
Manage test H/W & S/W project
Transfer product to test site
Dispose suspected material in test
Implement long term QA program
Manage document control
Address customer issues
Packaging Engineering
Manage design rules
Design & develop packaging
Package outline design, substrate design
Bonding diagram and BOM
Define package/ marking /packing specification
Improve package ,yield, cost and reliability
Dispose suspected materials in assembly
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