JOEL J.

CAMARDA
San Francisco, California 94133 415-290-6374 jcamarda@semiops.com

SENIOR-LEVEL OPERATIONS PROFESSIONAL

~ Recognized Expert in Semiconductor & Electronic Products Manufacturing Operations ~
Visionary and results-focused professional, with a history of driving profitability and growth through confident
leadership of manufacturing operations. Unsurpassed industry expertise and experience, with the ability to transform
business models to boost competitiveness, while utilizing sharp negotiation and technical skills to deliver innovations
and reduce costs. Hard-driving achiever, instrumental in achieving key improvements across all manufacturing and
inventory management indices.
Operations Management Supply Chain Management Production Control Planning Engineering Quality Control
P&L Management Negotiations Turnaround Management Business Process Improvement Project Management
Mergers & Acquisitions Cost Management Product Qualification/Management Global Process Outsourcing
Technical Expertise: Semiconductors, Wafer Fabrication, Integrated Device Manufacturing (IDM), Assembly & Testing

PROFESSIONAL EXPERIENCE
SemiOps, Silicon Valley

May 2014 - Present

Operations, manufacturing management , process and package engineering consultancy. Currently managing multi M $
package assembly-test cost savings projects (investigation, qualification, production ramps).

Amonix Seal Beach & Milpitas, California

2011-May, 2014
SR. DIRECTOR, MANUFACTURING OPERATIONS & PROCESS TECHNOLOGY
Utility scale CPV solar power systems provider reaching $80M revenue. Started in consulting role at request of VC
partner. Hired as Sr. Director. L e d operations efficiency and yield management in captive USA photocell
manufacturing. Established manufacturing process and package design strategy to reduce labor content 50%, reduce
package BOM cost, improve yields and product reliability. Transferred cell package manufacturing to Malaysia, with
potential cost saving of $15 M per year. Selected Asia manufacturing partner, negotiated contract, managed transfer, and
qualification.

GTronix (acquired by National Semiconductor) Fremont, California

2008- 2010
Start-up fabless chip maker specializing in analog, audio noise cancellation processing technology . Initiated revenue
shipments, formalized new product introduction business process, negotiated costs and capacity for revenue ramp.
VICE PRESIDENT OF OPERATIONS
Spearheaded strategic and daily operations team in activities to support optimal productivity and growth. Evaluated
processes to identify improvement opportunities, developing targeted initiatives and introducing cross -organizational
audit protocols to support business expectations. Created detailed business plans and financial models to assess needs
and advance short- and long-term goals.

Played lead role in initial business success by qualifying new products, driving production ramp, and
shipping first revenue. Established volume supply chain for IC packages and modules.
Ensured optimal efficiency and productivity through creation of key business and quality processes/procedures,
as well as preparation to meet ISO requirements.

Sipex/Exar Corporation Fremont, California (Sipex acquired by Exar)

2005-2008
Analog semiconductor products company (interface, power, optics products). Supplier to major LCD TV
manufacturers and DVD player manufacturers.
SR. VICE PRESIDENT OF OPERATIONS
Played lead role on new management team focused on revamping operations, including conversion to fables s model to
achieve profitability.
Directed cross-functional groups including manufacturing, production control, supply chain
management, purchasing, product/test engineering, quality, package engineering, and facilities. Ensured results via
detailed oversight of metrics and driving continuous improvement.

Slashed wafer costs 50% by transferring fab from California to foundries in Taiwan and China; re-qualified
products and customers (CMOS, bipolar, bi-CMOS technologies).
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Joel J. Camarda Page 2

Achieved $2M in annual savings through adjustments to contracted assembly-test activities.

Increased unit output 75% to reach 70M units/quarter, while supporting and qualifying over 30 new
product introductions each year, through detailed planning, ongoing data review, and adoption of key business
enterprise management tools.

Kulicke & Soffa Industries Willow Grove, Pennsylvania

2000-2005

Semiconductor assembly and test equipment, substrates, wafer bumping services.

VICE PRESIDENT, OPERATIONS Test Products Division, Hayward, CA
PRESIDENT X-Lam Substrates Division, Milpitas, CA
PRESIDENT Flip Chip Technology Division, Phoenix, AZ

Generated $M/year cost reductions for Test Products starting up manufacturing in Asia and implementing
new manufacturing designs. Established metrics to standardize costs, cycle times and quality for the
#1 $40M test sockets business.
For X-Lam Substrates, served as President for new business unit startup specializing in state-of-the art, highdensity flip chip BGA substrates. Established product viability and initiated qualification with leading ASIC
companies.
Established profitability for Flip Chip Technology, doubling output to 5K wafers/week, $40M wafer (fab)
bumping business. Created a de facto industry standard by licensing K&S bumping and WLCSP technology to 4 top
assembly foundries and 2 IDMs.

Cypress Semiconductor Corporation San Jose, California

6 years

DIRECTOR, WORLDWIDE ASSEMBLY-TEST MANUFACTURING & PACKAGE ENGINEERING ($500M business)

Managed internal plastic and ceramic package assembly operation.

Reduced labor costs by 75% by transferring USA manufacturing operations to Thailand.

Introduced multiple packaging innovations that enhanced product performance and/or reduced costs.
Awarded patent for top-gate molding technology.

National Semiconductor Corporation Santa Clara, California

10 years

MULTIPLE ENGINEERING AND ENGINEERING MANAGEMENT POSITIONS

Held a variety of roles including wafer fab and assembly-packaging spent 3 years in Manila, Philippines,
expat assignment.

Played key role as Project Manager to construct companys microprocessor wafer fab line.

Recognized as a pioneer in assembly automation execution, including automatic wire bonding and automatic
die attach in multichip game modules, and tape-automated-bonding (TAB).
CAREER NOTE: Additional roles as Vice President, Operations for Silicon Storage Technology, Inc., , and Manager,
Advanced Package Engineering and Sub-System Design for Rockwell Semiconductor Products Division.

EDUCATION
Technology Business Management, Stanford University Executive Institute, Palo Alto, California
Bachelor of Science Aeronautical Engineering, New York University, School of Engineering and Science, NYC

PROFESSIONAL AFFILIATIONS
Microelectronics Packaging and Test Engineering Council (MEPTEC) -Advisory Board
IMAPS SEMI Global Semiconductor Alliance (GSA)
Guest Lecturer, Post-Grad Coursework, Semiconductor Manufacturing- San Jose State University, San Jose, California