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Microcontroller
PIC Microcontroller
PICMicrocontroller(MCU)
Widely used device from Microchip Technology
Sold > 10 billion PIC controllers
Several device families
Many devices per family
Common development environment
Widely available
Large user base
Extensive application notes
Low cost
Free / low cost development tools
Basic architectural features
Pipelined RISC microprocessor core
Accumulator execution model
Data width 8 / 16 / 32 bits
Instruction width 12 / 14 / 16 / 32 bits
Embedded Systems Hadassah College Spring 2012
PIC Microcontroller
PICFamilies
8bitMCU
Data
Width
Family
Architecture
PIC10/PIC12/PIC16
Baseline
MidRange
Instruction
Width
12bits
8bits
PIC18
14bits
16bits
PIC24
16bitMCU
dsPIC30
Integrated
DSP
32bitMCU
16bits
16bits
32bits
32bits
Data width
8 / 16/ 32 bits
Wider integer higher precision arithmetic
Instruction width
12 / 14 / 16 / 32 bits
Wider instruction more complex instructions + higher precision arithmetic
Embedded Systems Hadassah College Spring 2012
PIC Microcontroller
TypicalApplications
Baseline
Replace discrete logic functions
Gates, simple state machines, encoders/decoders, etc.
Disposable electronics
Drug / pregnancy testers, dialysis monitor, etc
Mid-Range
Digital sensors, displays, controllers, telecom equipment
Glucose / blood pressure set
PIC18
Integration with peripherals + networks
USB, Ethernet, MCU-to-MCU, etc
PIC32
General purpose RISC microprocessor + controller
MRI
Embedded Systems Hadassah College Spring 2012
PIC Microcontroller
LearningPICArchitecture
Somegeneralobservations
Variety
Hundreds of PIC devices in 3 families and several sub-families
Updates
Microchip Technology upgrades devices frequently
Familiar devices replaced with new model
Instruction Set Architecture
8 and 16 bit devices share approximately uniform instruction set
PIC32 implements MIPS ISA
Caveats
Course takes general pedagogical approach to PIC as typical MCU
Focus on 8-bit devices Mid-Range + PIC18
PIC Microcontroller
8BitPICMCUs
Datamemory
Organizedas8bitregisters
SomedevicesalsostoredataonEEPROM
16Bto4KB
Programmemory
Addressableunit=instructionword=12/14/16bits
Smallest:2Kword (3KBof12bitinstructions)
Largest:64Kword (128KBof16bitinstructions)
Architecture
PipelinedRISC
33to77instructions
Stack
Stores0(nostack)to31instructionaddresses
Usedforfunctioncalls
I/Odevices
8bitparallelports
Synchronous/asynchronousserialports
Timers+watchdogtimer
A/D+D/Aconverters
Pulsewidthmodulators
PIC Microcontroller
8BitPICOperationModel
ALU sources
Special WORKING register W
Data register or immediate
ALU destination
Data register or W
DataBus
Data
Memory
W
Transfer operations
Data register W
Status
Status register
Flags produced by ALU operations
PIC Microcontroller
Arithmetic
Logic
Unit
(ALU)
PipelineOperation
Instructioncycles(CY)
Instruction
Fetch
Address
Instruction
Execute
Decode
Address
Instruction
Memory
Data
Data
Memory
InstructionCycles
I1
I2
I3
I4
1
fetch
2
execute
fetch
execute
fetch
execute
fetch
execute
Branchinstructionsrequire2instructioncycles
Embedded Systems Hadassah College Spring 2012
PIC Microcontroller
PipelineOperation
Clockcycles(OSC)
Instruction Cycle
4 cycles of external clock (oscillator)
CY = Q1 Q2 Q3 Q4
Instruction fetch
Q1
IR instructionregister
PC programcounter
UpdateProgramPointer
PC PC + 1
Fetch
IR [PC]
DecodeandExecute
Operationdependent
Q2 Q3
Q4
Execution
Q1 Q4
Instruction Cycles
1
2
3
4
5
Q1Q2Q3Q4 Q1Q2Q3Q4 Q1Q2Q3Q4 Q1Q2Q3Q4 Q1Q2Q3Q4
I1
fetch
execute
I2
fetch
execute
I3
fetch
execute
I4
fetch
execute
Embedded Systems Hadassah College Spring 2012
PIC Microcontroller
ClockTypes
RC oscillator
Least expensive
Can be used for non-critical frequency accuracy and stability
Some devices have internal RC oscillator at 4 MHz
Crystal oscillator
Most stable
External clock
Provided by external digital system
Specific modes
LP mode frequencies between 32 kHz and 200 kHz
XT mode frequencies between 100 kHz and 4 MHz
HS mode frequencies between 8 MHz and 20 MHz
Embedded Systems Hadassah College Spring 2012
PIC Microcontroller
10
SleepMode
Low-power mode
Main oscillator stopped
Most MCU functions stopped
Watchdog time continues
Power consumed < 1 mA for some models
Instruction SLEEP
MCU sleep mode
Data register values stable
Pipeline locked
Sleep instruction executes next instruction already fetched
On wake up
Next instruction executes
Recommendation instruction after sleep = NOP
Watchdog timer counter reset
Embedded Systems Hadassah College Spring 2012
PIC Microcontroller
11
WakeUpEvents
Reset
Fetch instruction from address 0
Watchdog timer overflow
Normal execution of instruction following sleep
Interrupt
Interrupt not enabled ignore interrupt
Enabled
Normal execution of instruction following sleep
PC jumps to address 4 in program memory
Finds interrupt routine
PIC Microcontroller
12
WatchdogTimer
WDT oscillator (clock)
Independent from main clock
Continues in low power mode
May be disabled
WDT timeout
Timeout = 18 ms
Non-sleep mode
MCU resets
Sleep mode
MCU wakes up executes instruction following sleep
Reset WDT
CLRWDT resets timeout = 18 ms
Prescaler
Divide time-base by 2k, k = 0, ... , 7
Extend timeout up to 2300 ms
Embedded Systems Hadassah College Spring 2012
PIC Microcontroller
13
SomeTypical8bitPICDeviceFamilies
PIC10F2xx
PIC12F5xx
PIC16F5xx
PIC10F3xx
PIC12F6xx
PIC16F6xx
Instruction
word
12bits
12bits
12bits
14bits
16bits
Instructions
33
33
33
35
83
256 8192
words
2 Kwords
64 Kwords
Program
memory
PIC18F5xx
ROM
Flash
Flash
Flash
Flash
Flash
Datamemory
(bytes)
16 24
25 41
25 134
56 368
256 4K
Interrupts
int/ext
int /ext
Pins
14 40
6 64
18 100
I/Opins
12 32
4 54
16 70
Stack
2levels
2levels
2levels
8levels
31levels
Timers
2 3
2 5
Bulkprice
$0.35
$0.50
14
TypicalBaselineMCUPIC16X5xxFamily
8bitdata
12bitinstruction
General
I/Oports
W+ALU
timer
PIC Microcontroller
15
TypicalMidRangeMCU PIC16F873
8bitdata
14bitinstruction
GeneralI/Oports
ExternalInterrupt
Timers
A/D
UART
CompareCapturePulsewidth (CCP)
SynchronousSerialPort(SSP)
Embedded Systems Hadassah College Spring 2012
PIC Microcontroller
16
TypicalPIC18MCU
8bitdata
16bitinstruction
Timers
A/D
UART
USB
CompareCapturePulsewidth (CCP)
ControllerAreaNetwork(CAN)
Embedded Systems Hadassah College Spring 2012
GeneralI/Oports
ExternalInterrupts
PIC Microcontroller
17
MidRange
PICMCUs
PIC Microcontroller
18
DataMemory/Registers
Register
Addressable location in data memory
8-bit word (byte)
Data address space
9 bit address memory 29 = 512 bytes = 0.5 KB
Memory partitioned into banks
Bank = 27 = 128 = 80h registers (1/8 KB)
7 bit file address
Displacement in bank = 00h 7Fh
00h
PIC Microcontroller
7Fh
00
01
10
11
bank
dataaddress
2bits
7bits
bank
fileaddress
Dr. Martin Land
19
Special/GeneralRegisters
GPR
General Purpose Registers
User program data
SFR
Special Function Registers
Reserved for
Control / configuration
Peripheral access
Indirect addressing
Program counter
Core SFRs
Appear in every bank at
same file address
Typical SFRs
STATUS
Statusword+flags
OPTION
Timeroptions
PCLATH
PCL
Componentsofprogram
counter(PC)
FSR
FileSelectforindirectdata
addressing
INTCON,PIR1,PIE1, Componentsofinterrupt
PIR2,PIE2
handling
PORTA,TRISA,
Accesstoparallelports
TMR0,OPTION,
INTCON,
Timer0
TXREG,TXSTA,
RCREG,RCSTA,
Accesstoserialport
ADRESH,ADRESL,
ADCON0,
AccesstoA/Dconverter
EEADRH,EEDATA,
AccesstoEEPROMand
Flashmemory
PIC Microcontroller
20
DataMemoryMap
Notes
(2,3)Notalllocations
implementedonall
devices
(4)CommonRAM
accessibleinallbanks
(onapplicabledevices)
(5)Notimplementedon
smallerdevices
PIC Microcontroller
21
StatusRegister
CoreSFRaccessibleatfileaddress03h ineverybank
7
Name
IRP
RP1
RP0
T0#
PD#
DC
Writable
R/W
R/W
R/W
RO
RO
R/W
R/W
R/W
Resetvalue
IRP
RP1, RP0
BankSelect
TO#
StateofWDT
PD#
Lowpower
Zeroflag
DC
C
IndirectRegisterPointer
DirectRegisterPointer
TO# 0 onWDToverflow
TO# 1 onpoweronreset,CLRWDT,SLEEP
PD# 0 onSLEEP
PD# 1 onCLRWDTandpoweronreset
Z 1 onALUzero
Z 0 onnonzero
Halfbytecarry DC 1 oncarry(Addition)
DC 0 onborrow(Subtraction)
(bits3,4)
Carryout
C 1 oncarry(Addition)
C 0 onborrow(Subtraction)
PIC Microcontroller
22
AddressingDataMemory
Notation
REG<b>
Bitb inregisterREG
REG<a:b>
A.B
ConcatenationofA andB
(A bitsfollowedbyB bits)
Direct addressing
Program specifies data address
Bank selection
STATUS bits RP1 and RP0
RP1 RP0
7bitsfrominstruction
bank
fileaddress
On reset
RP1 = RP0 = 0 bank 0 selected
Bank switching
Write to STATUS<6:5>
File Address
Literal field in instruction
Embedded Systems Hadassah College Spring 2012
PIC Microcontroller
23
AddressingDataMemory
Indirect addressing
Program writes to Special Function Registers (SFRs)
Address formed from SFRs
IRP
FSR<6:0>
8bitsofFSR
bank
Bank
fileaddress
7
IRP.FSR<7>
STATUS bit IRP (Indirect Register Pointer)
On small devices
1 or 2 banks = 128 or 256 bytes of data memory
8 bit FSR address covers 2 banks
IRP not implemented (read 0 / write = NOP)
Embedded Systems Hadassah College Spring 2012
PIC Microcontroller
24
INDFRegister
INDF
Core SFR accessible at file address 00h in all banks
Virtual pointer not physical register
Tracks contents of FSR
Simplifies pointer arithmetic
Example
In register file,
[05] = 10h
[06] = 0Ah
Load FSR 05
[INDF] = 10h
FSR++
[INDF] = 0Ah
;
;
;
;
PIC Microcontroller
25
InstructionMemorySpace
All8bitMCUs
Instruction address
n bit location address
Page
Location = instruction
2n instructions
Instruction width
12 / 14 / 16 bits
Page
1
Page
Partition of instruction
memory space
2k instructions / page
k bit offset
Page
0
n bitaddress
n k bits
k bits
page
offset
PIC Microcontroller
instruction
instruction
instruction
instruction
instruction
instruction
instruction
instruction
instruction
instruction
instruction
instruction
Memory
Location
11 111
11 000
01 111
01 011
01 010
01 001
01 000
00 111
00 011
00 010
00 001
00 000
page offset
Address
Dr. Martin Land
26
InstructionMemorySpace
Mid-Range instruction memory
14-bit instruction word
n = 13
13 bitPC
2 bits
11 bits
k = 11
page
12
offset
11
10
Address 4h
Interrupt vector pointer to interrupt service routine
Embedded Systems Hadassah College Spring 2012
PIC Microcontroller
27
PCAccess
PC register details
PC low (PCL) = PC<7:0>
Accessible by instruction reads/writes
offset
PCL
PCH
PC
12
11
10
PCLATH
PIC Microcontroller
28
PCUpdates
Reset
PC 0
PCH
PC
Non-branch instruction
PC PC + 1
Branch types
Direct branch
offset
page
12
11
10
PCLATH
10
literal
PC
PCL
6
12
11
10
4
GOTO instruction
PCH<12:11> PCLATH<4:3>
PCLATH
Indirect branch
PCH
PC
Computed GOTO
Write to PCL as register
Copies PCL ALU result
Forces PCH PCLATH<4:0>
PCL ALU<7:0>
12
11
10
PCLATH
PIC Microcontroller
29
Call/Return
Stack
8 level FILO buffer
Holds 13 bit instruction addresses on CALL/RETURN
literal
CALL
STACK
PC
RETURN
10
12
11
10
PCLATH
Function entry
CALL instruction
STACK PC<12:0>
PCL literal<10:0> from instruction
PCH<12:11> PCLATH<4:3>
Function exit
RETURN instruction
PC<12:0> STACK
PCLATH not updated
May be different from PCH after RETURN
Embedded Systems Hadassah College Spring 2012
PIC Microcontroller
30
InstructionFormat
13
8
opcode
13
7
d
10 9
opcode
13
7 6
b
Bit oriented
b = bit position in register
f = 7 bit file address
General literal
k = 8 bit literal (immediate)
CALL / GOTO
k = 11 bit literal (immediate)
11 10
0
f
8 7
opcode
Byte oriented
d = 0 destination = W
d = 1 destination = f
f = 7 bit file address
opcode
13
PIC Microcontroller
31
InstructionSet
Datatransfer
Mnemonic
MOVF f, d
Operation
d f
Comment
Move f to d
Flags
Z
MOVF f, 0
MOVF f, W
W f
d = W
MOVF f, 1
MOVF f, f
MOVF f
f f
d = f
MOVWF f
f W
Move W to f
MOVLW k
W k
Move literal to W
CLRF f
f 0
Clear f
CLRW
W 0
Clear W
Operands
name / address of register
destination
literal
PIC Microcontroller
W , d = 0
destination =
f , d = 1
32
InstructionSet
ArithmeticandLogic 1
Mnemonic
ADDWF f, d
Operation
d f + W
Comment
Add w to f
Flags
C, DC, Z
ADDLW k
W k + W
Add k to W
C, DC, Z
SUBWF f, d
d f W
Sub W from f
C, DC, Z
SUBLW k
W k W
Sub W from k
C, DC, Z
INCF f, d
d f + 1
Inc f to d
DECF f, d
d f 1
Dec f to d
ANDWF f, d
d f and W
And w with f
ANDLW k
W k and W
And k with W
Operands
name / address of register
destination
literal
PIC Microcontroller
W , d = 0
destination =
f , d = 1
33
InstructionSet
ArithmeticandLogic 2
Mnemonic
IORWF f, d
Operation
d f or W
Comment
OR w with f
Flags
Z
IORLW k
W k or W
OR k with W
XORWF f, d
d f xor W
XOR W with f
XORLW k
W k xor W
XOR W with k
RLF f, d
RRF f, d
COMF f, d
d #f (not f)
compliment f
to d
SWAPF f, d
d fL fH
nibble swap
Operands
name / address of register
destination
literal
PIC Microcontroller
(nibble=halfbyte)
W , d = 0
destination =
f , d = 1
Dr. Martin Land
34
InstructionSet
Control
Mnemonic
GOTO a
Operation
branch to address
BTFSC f, b
BTFSS f, b
INCFSZ f, d
DECFSZ f, d
CALL a
RETURN
subroutine return
RETFIE
interrupt return
RETLW k
Operands
name / address of register
11 bit address
destination
bit location
literal
PIC Microcontroller
35
InstructionSet
Other
Mnemonic
Operation
Flags
BCF f, b
f<b> 0
BSF f, b
f<b> 1
no operation
CLRWDT
WDT 0
TO#, PD#
SLEEP
TO#, PD#
NOP
Operands
name / address of register
bit location
PIC Microcontroller
36
SampleProgramFragments
RAMInitialization
CLRF STATUS
; STATUS 0
MOVLW 0x20
; W 1st address in GPR bank 0
MOVWF FSR
; Indirect address register W
Bank0_LP
CLRF INDF0
; address in GPR 0
INCF FSR
; FSR++ (next GPR address)
BTFSS FSR, 7
; skip if (FSR<7> == 1) FSR = 80h
GOTO Bank0_LP
; continue
; ** IF DEVICE HAS BANK1 **
MOVLW 0xA0
; W 1st address in GPR bank 1
MOVWF FSR
; Indirect address register W
Bank1_LP
CLRF INDF0
; address in GPR 0
INCF FSR
; FSR++ (next GPR address)
BTFSS STATUS, C ; skip if (STATUS<0> == 1) FSR = 00h
GOTO Bank1_LP
; continue
Embedded Systems Hadassah College Spring 2012
PIC Microcontroller
37
SampleProgramFragments
Branchtoaddressinnewpage
Prog:
movlw HIGH Prog10
; W Prog10<15:8>
; operator HIGH reads bits <15:8> of pointer
movwf PCLATH
; PCLATH W
goto Prog10
; PC<10:0> Prog10<7:0>
; PC<12:11> PCLATH<4:3>
Prog10:
;
; Prog10 labels some address in program memory
;
PIC Microcontroller
38
SampleProgramFragments
Computedgoto
movlw
movwf
movlw
movwf
HIGH Prog20
PCLATH
LOW Prog20
PCL
;
;
;
;
;
W Prog10<15:8>
PCLATH W
W Prog10<7:0>
PCL Prog10<7:0>
PCH PCLATH<4:0>
Prog20:
;
; Prog10 labels some address in program memory
;
PIC Microcontroller
39
SampleProgramsFragments
ifelsebranch
btfss f,b
goto Action2
Action1:
; instructions for Action1
goto Action3
Action2:
; instructions for Action2
Action3:
; instructions for Action3
PIC Microcontroller
40
SampleProgramsFragments
Staticloop
movlw times
; W times
movwf COUNTER
; COUNTER W (times)
Loop:
;
; loop instructions
;
decfsz COUNTER, f
; COUNTER-; COUNTER = 0 skip next
instruction
goto Loop
; next iteration
End:
;
;
PIC Microcontroller
41
SampleProgramsFragments
Datatableininstructionmemory
; Function call returns
movlw HIGH Table
movwf PCLATH
movf INDEX, W
call Table
;
Table:
addwf PCL, f
retlw
retlw
retlw
retlw
retlw
'A'
'B'
'C'
'D'
'E'
data at Table.INDEX
; W Table<15:8>
; PCLATH W
; W INDEX
; Call to subroutine table
PIC Microcontroller
42
PICMCUandtheOutsideWorld
Oscillator
Generates device clock
Four device clock periods per instruction cycle
Ports
Data I/O pins
Electrical connections to external circuits
Configured to function as
Digital I/O
Analog inputs to A/D converter
OSC
PIC Ports
Controls
Controls
Devicedependent
Power+ground
Interrupt(INT)
Externalclock
Peripheral Modules
Share data pins with general ports
Timer
A/D
Comparator
USART
CCP
PIC Microcontroller
43
ConfigurableOscillatorModes
Quartz crystal time base
Crystal connected between PIC pins OSC1 and OSC2
Vibrates in electric field piezoelectric resonance in voltage
Modes
LP Low Frequency / Low Power Crystal 32 kHz to 200 kHz
XT Crystal/Resonator 100 kHz to 4 MHz
HS High Speed Crystal/Resonator 8 MHz to 20 MHz
PIC Microcontroller
44
Interrupts
Interrupt
Instruction at current PC executes
Instruction at current PC+1 fetched
Stack PC+2
PC interrupt pointer
On return from interrupt PC stack
Interrupt sources
External interrupt pin
Pin RB0 on some PIC devices (separate pin on other devices)
Peripheral modules
General internal interrupt
A/D
Timer
Comparator
USART
CCP
Embedded Systems Hadassah College Spring 2012
PIC Microcontroller
45
InterruptControlRegister
Interrupt Control Register (INTCON)
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF
GlobalInterruptEnable
1=Enablesallunmaskedinterrupts
0=Disablesallinterrupts
PEIE
PeripheralInterruptEnable
1=Enablesallunmaskedperipheralinterrupts
0=Disablesallperipheralinterrupts
T0IE
OverflowInterruptEnable
1=EnablesTMR0overflowinterrupt
0=DisablesTMR0overflowinterrupt
INTE
ExternalInterruptEnable
1=EnablesINTexternalinterrupt
0=DisablesINTexternalinterrupt
RBIE
RBPortChangeInterruptEnable
1=EnablesRBportchangeinterrupt
0=DisablesRBportchangeinterrupt
T0IF
OverflowInterruptFlag
1=TMR0registerhasoverflowed
0=TMR0registerdidnotoverflow
INTF
ExternalInterruptFlag
1=INTexternalinterruptoccurred
0=INTexternalinterruptdidnotoccur
RBIF
RBPortChangeInterruptFlag
1=AtleastoneofRB7:RB4pinschangedstate
0=NoneofRB7:RB4pinshavechangedstate
GIE
PIC Microcontroller
46
PeripheralInterruptEnable(PIE)
Number of PIE registers device dependent
TMR1IE
TMR1Overflow
TMR2IE
TMR2toPR2Match
CCP1IE
CCP1
CCP2IE
CCP2
SSPIE
SynchronousSerialPort
RCIE
USARTReceive
TXIE
USARTTransmit
ADIE
A/DConverter
1=enabledeviceinterrupt
0=disabledeviceinterrupt
ADCIE
SlopeA/DConverterComparatorTrip
OVFIE
SlopeA/DTMROverflow
PSPIE
ParallelSlavePortRead/Write
EEIE
LCDIE
CMIE
EEWriteComplete
LCD
Comparator
PIC Microcontroller
47
PeripheralInterruptRegister(PIR) 1
Number of PIR registers device dependent
TMR1IE
1=TMR1 registeroverflowed
0=TMR1 registerdidnotoverflow
TMR2IE
SameasTMR1IE
CCP1IE
CCP1InterruptFlagbit
CaptureMode
1=TMR1 registercaptureoccurred
0=NoTMR1 registercaptureoccurred
CompareMode
1=ATMR1 registercomparematchoccurred
0=NoTMR1 registercomparematchoccurred
PWMMode
Unusedinthismode
CCP2IE
SameasCCP1IE
SSPIE
1=Transmission/receptioncomplete
0=Waitingtotransmit/receive
RCIE
1=USARTreceivebufferRCREG full
0=USARTreceivebufferisempty
PIC Microcontroller
48
PeripheralInterruptRegister(PIR) 2
Number of PIR registers device dependent
TXIE
1=USARTtransmitbufferTXREGempty
0=USARTtransmitbufferisfull
ADIE
1=A/Dconversioncomplete
0=A/Dconversionnotcomplete
ADCIE
1=A/Dconversioncomplete
0=A/Dconversionnotcomplete
OVFIE
1=SlopeA/DTMRoverflow
0=SlopeA/DTMRdidnotoverflow
PSPIE
1=Readorwriteoperationoccurred
0=Readorwritedidnotoccur
EEIE
LCDIE
CMIE
1=DataEEPROMwriteoperationcomplete
0=DataEEPROMwriteoperationnotcomplete
1=LCDinterruptoccurred
0=LCDinterruptdidnotoccur
1=Comparatorinputchanged
0=Comparatorinputnotchanged
PIC Microcontroller
49
InterruptLatency
On interrupt
1. Current instruction execution completes
2. Current instruction fetch completes
3. PC interrupt pointer
Latency ~ 3 to 4 instruction cycles
PIC Microcontroller
50
InterruptInitialization+Enabling
PIE1_MASK1 EQU B01101010
;
;
CLRF STATUS
CLRF INTCON
CLRF PIR1
BSF STATUS, RP0
MOVLW PIE1_MASK1
MOVWF PIE1
BCF STATUS, RP0
BSF INTCON, GIE
;
;
;
;
;
;
; Interrupt Enable
; Register mask (device
; dependent)
Bank0
Disable interrupts during
configuration
Clear flags
Bank1
set PIE1 via W
; Bank0
; Enable Interrupts
PIC Microcontroller
51
MacrosforRegisterSave/Restore
PUSH_MACRO MACRO
MOVWF W_TEMP
SWAPF STATUS,W
MOVWF STATUS_TEMP
ENDM
;
;
;
;
;
POP_MACRO MACRO
SWAPF STATUS_TEMP,W
MOVWF STATUS
SWAPF W_TEMP,F
SWAPF W_TEMP,W
;
;
;
;
;
;
;
ENDM
PIC Microcontroller
52
TypicalInterruptServiceRoutine(ISR) 1
org ISR_ADDR
PUSH_MACRO
CLRF STATUS
; Bank0
GOTO T1_INT
; go to Timer1 ISR
GOTO AD_INT
; go to A/D ISR
GOTO LCD_INT
; go to LCD ISR
GOTO PORTB_INT
; go to PortB ISR
GOTO INT_ERROR_LP1
; default ISR
PIC Microcontroller
53
TypicalInterruptServiceRoutine(ISR) 2
T1_INT
:
BCF PIR1, TMR1IF
GOTO END_ISR
AD_INT
:
BCF PIR1, ADIF
GOTO END_ISR
LCD_INT
:
BCF PIR1, LCDIF
GOTO END_ISR
PORTB_INT
:
END_ISR
POP_MACRO
RETFIE
Embedded Systems Hadassah College Spring 2012
54
Timers
Watchdog timer (WDT)
Normal program resets timer before timeout (18 ms)
Timeout
Non-sleep mode MCU resets
Sleep mode MCU wakes up executes instruction following sleep
PIC Microcontroller
55
WatchdogTimer(WDT)
Time base
Internal RC oscillator
Timer0 clock source
PIC Microcontroller
56
OPTION_REGSFR(FileAddress081h)
RBPU
INTEDG
T0CS
T0SE
PSA
PS2
PS1
PS0
RBPU
WeakPullupEnable
1=Weakpullupsaredisabled
0=Weakpullupsareenabledbyportlatchvalues
Underline active=0/inactive=1
INTEDG
InterruptEdgeSelect
1=InterruptonrisingedgeofINTpin
0=InterruptonfallingedgeofINTpin
T0CS
TMR0ClockSourceSelect
1=TransitiononT0CKIpin
0=Internalinstructioncycleclock(CLKOUT)
T0SE
TMR0SourceEdgeSelect
1=IncrementonhightolowtransitiononT0CKIpin
0=IncrementonlowtohightransitiononT0CKIpin
PSA
PrescalerAssignment
1=PrescalerisassignedtotheWDT (watchdog)
0=PrescalerisassignedtotheTimer0module
PS2:PS0
PrescalerRateSelect
PS2:PS0
TMR0
WDT
PS2:PS0
TMR0
WDT
000
001
010
011
1:2
1:4
1:8
1:16
1:1
1:2
1:4
1:8
100
101
110
111
1:32
1:64
1:128
1:256
1:16
1:32
1:64
1:128
PIC Microcontroller
57
Timer0
8-bit timer/counter
Readable / writable at TMR0 SFR (File Address 081h)
8-bit software programmable prescaler
Divide input pulse train (slows time scale)
Scale by 1:1 , 1:2, 1:4, ... , 1:128
PIC Microcontroller
58
Timer0Operation
Timer mode
T0CS = 0
TMR0++ on every instruction cycle (without prescaler)
Write to TMR0 register no increment for two instruction cycles
Counter mode
T0CS = 1
TMR0++ on every rising or falling edge of T0CKI (external clock)
Edge determined by T0SE bit
Prescaler
Set by PSA control bits
TMR0 Interrupt
Generated on overflow FFh 00h
Sets bit T0IF (INTCON<2>)
Timer0 interrupt service routine
Clear T0IF
Re-enable interrupt
Embedded Systems Hadassah College Spring 2012
PIC Microcontroller
59
InitializeTimer0withInternalClockSource
CLRF TMR0
CLRF INTCON
; Bank1
MOVLW 0xC3
MOVWF OPTION_REG
; Bank0
T0_OVFL_WAIT
BTFSS INTCON, T0IF
GOTO T0_OVFL_WAIT
; on timer overflow
PIC Microcontroller
60
Timer1
16-bit timer/counter
TMR1 pair TMR1H:TMR1L
Readable and writable 8-bit registers
Modes
Synchronous timer
TMR1++ on every instruction cycle (FOSC / 4)
Asynchronous counter
TMR1++ on rising edge of input pin
Synchronous counter
Input
PIC Microcontroller
Sample
Clock
Sampled
Input
Dr. Martin Land
61
T1CONSFR
T1CKPS1 T1CKPS0 T1OSCEN
7
T1SYNC
TMR1CS
TMR1ON
T1CKPS1
T1CKPS0
Timer1InputClock
PrescaleSelect
11=1:8Prescalevalue
10=1:4Prescalevalue
T1OSCEN
Timer1OscillatorEnable
1=Oscillatormodeenabled
0=Oscillatormodedisabled
T1SYNC
Timer1ExternalClock
InputSynchronization
Select
01=1:2Prescalevalue
00=1:1Prescalevalue
TMR1CS = 1 (CounterMode)
1=AsynchronousCounterMode
0=SynchronousCounterMode
TMR1CS = 0 (TimerMode)
Ignored
TMR1CS
Timer1ClockSource
Select
1=CounterMode(countexternalclock)
0=TimerMode(countinternalclockFOSC /4)
TMR1ON
Timer1On
1=EnablesTimer1
0=StopsTimer1
PIC Microcontroller
62
Timer1Operation
Async
Input
CLKIn/OSCout
CounterMode
Sampling
TimerMode
OscillatorMode T1CKI T1OSI
PIC Microcontroller
63
ReadingTimer1
; All interrupts disabled
MOVF TMR1H, W
; W high byte
MOVWF TMPH
; TMPH W
MOVF TMR1L, W
; W low byte
MOVWF TMPL
; TMPL W
; TMR1L can roll-over between reads of high and low bytes
MOVF TMR1H, W
; W high byte again
SUBWF TMPH, W
; Verify high byte
BTFSC STATUS,Z ; bad read (Z = 0 not equal) re-do
GOTO CONTINUE
; New reading good value.
MOVF TMR1H, W
; W high byte
MOVWF TMPH
; TMPH W
MOVF TMR1L, W
; W low byte
MOVWF TMPL
; TMPL W
; Re-enable interrupts (if required)
CONTINUE
; Continue
Embedded Systems Hadassah College Spring 2012
PIC Microcontroller
64
WritingTimer1
; All interrupts are disabled
CLRF TMR1L
MOVLW HI_BYTE
; W HI_BYTE
MOVWF TMR1H, F
; TMR1H W
MOVLW LO_BYTE
; W LO_BYTE
MOVWF TMR1L, F
; TMR1L W
PIC Microcontroller
65
Timer2
Readable / writable 8-bit timer
Prescaler
Period register PR2
Readable / writable
TMR2 = PR2 reset (TMR2 0)
Postscaler
Counts TMR2 = PR2 resets
Triggers TMR2IF interrupt flag
PIC Microcontroller
66
T2CONSFR
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0
7
TOUTPS3:0
Timer2Output
Postscale Select
0000=1:1Postscale
0001=1:2Postscale
0010=1:3Postscale
0011=1:4Postscale
:
1111=1:16Postscale
TMR2ON
Timer2On
1=Timer2ison
0=Timer2isoff
Timer2Clock
PrescaleSelect
00=Prescaleris1
01=Prescaleris4
1x=Prescaleris16
T2CKPS1:0
PIC Microcontroller
TMR2ON
2
T2CKPS1 T2CKPS0
1
67
Ports
I/O pins
Electrical connections to external circuits
Configurable in SFR ADCON1 as
OSC
PIC Ports
Controls
Digital I/O
Analog inputs to A/D converter
Mid-Range PIC configurations
Minimal Port A (6 pins) + Port B (8 pins)
Maximal Port A (6 pins), Port B (8 pins), ... , Port G (8 pins)
Special Function Registers
Data
PORTA , ... , PORTG
PORTi<x> = data bit on pin x of port i
Direction
TRISA, ... , TRISG
TRISi<x> = 1 pin x of port i is Input
TRISi<x> = 0 pin x of port i is Output
Embedded Systems Hadassah College Spring 2012
PIC Microcontroller
68
PortAccess
Output
Set TRISi<x> = 0
Write data bit to PORTi<x>
Input
Set TRISi<x> = 1
Read data bit from PORTi<x>
Order of operations
Read
Reads levels on physical I/O pins (not data register file)
Write
Implemented as read modify
Causes update of all input data registers from physical I/O pins
Program must read all required inputs before any write
PIC Microcontroller
69
PORTA
5 general purpose I/O pins
RA5 and RA3:RA0
Standard electrical behavior
TTL input levels and CMOS output drivers
Special input
RA4
Schmitt trigger input
Threshold decision converts input to binary (RA4 > threshold)
PIC Microcontroller
70
InitializingPORTA
CLRF STATUS
CLRF PORTA
BSF STATUS, RP0
MOVLW 0xCF
MOVWF TRISA
;
;
;
;
;
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Bank0
Initialize PORTA
Select Bank1
Initialize data directions
CFh = 11001111
= x x Out Out In In In In
PORTA<3:0> = inputs
PORTA<5:4> = outputs
TRISA<7:6> always read 0
PIC Microcontroller
71
PORTB
8 general purpose I/O pins
RB7:RB0
Standard electrical behavior
TTL input levels and CMOS output drivers
Interrupt on change
Input pins RB7:RB4
Inputs compared with previous read of PORTB
OR(compare bits) = 1 RB Port Change Interrupt
Can wake device from SLEEP
Example wake-up on key press
Clear interrupt
Read or write PORTB
Clear flag bit RBIF
Embedded Systems Hadassah College Spring 2012
PIC Microcontroller
72
PortsCtoG
Ports C to E
8 binary I/O pins
Ri7:Ri0, i = C, D, E
Ports F and G
Ri7:Ri0, i = F, G
8 binary inputs
Schmitt trigger on each input
PIC Microcontroller
73
AnalogtoDigital(A/D)ConverterModule
Converts analog input signals
Sample and hold
One of 8 analog inputs (channels)
Conversion to 8-bit binary number
Analog reference voltage
Software selectable
Device supply voltage
Voltage level on VREF pin
PIC Microcontroller
74
ADCON0SFR
ADCS1
ADCS0
CHS2
CHS1
CHS0
GO/DONE
Resv
ADON
00=fOSC/2
01=fOSC/8
10=fOSC/32
11=fRC (internalA/DRCosc)
Analog Channel Select
CHS2:CHS0
000=channel0(AN0)
001=channel1(AN1)
010=channel2(AN2)
011=channel3(AN3)
:
111=channel7(AN7)
GO/DONE
1=inprogress
0=notinprogress
0
Reserved
A/D On
ADON
1=activated
Embedded Systems Hadassah College Spring 2012
0=deactivated
PIC Microcontroller
75
ADCON1SFR
7
PCFG2
PCFG1
PCFG0
PCFG2:PCFG0
AN7
AN6
AN5
AN4
AN3
AN2
AN1
AN0
000
001
VREF
010
011
VREF
100
101
VREF
11x
Portpinconfiguredforanaloginput
PortpinconfiguredfordigitalI/O
AN3=VREF
ConversioncomparestoreferencevoltageVREF=voltageonAN3
AN3=D
ConversioncomparestoreferencevoltageVREF=devicesupplyvoltage
PIC Microcontroller
76
OperationofA/DConverter
Configure A/D module
Analog pins + voltage reference + digital I/O in ADCON1
Select A/D input channel (ADCON0)
Select A/D conversion clock (ADCON0)
Activate A/D module (ADCON0)
Configure A/D interrupt (optional)
Clear ADIF
Set ADIE + GIE
Start conversion
Set GO/DONE bit (ADCON0)
Wait for A/D conversion to complete
Poll GO/DONE until cleared or wait for A/D interrupt
Read result
A/D Result register (ADRES)
Repeat
Embedded Systems Hadassah College Spring 2012
PIC Microcontroller
77
A/DConversion
BSF STATUS, RP0
; Bank1
CLRF ADCON1
; Configure inputs as analog
BSF PIE1, ADIE
; Enable A/D interrupts
BCF STATUS, RP0
; Bank0
MOVLW 0xC1
; C1h = 11000001
MOVWF ADCON0
; Internal RC, A/D active, Channel 0
BCF PIR1, ADIF
; Clear A/D interrupt flag
BSF INTCON, PEIE
; Enable peripheral interrupts
BSF INTCON, GIE
; Enable all interrupts
;
; Wait required sampling time for selected input
;
BSF ADCON0, GO
; ADCON0<2> 1 Start conversion
; On completion ADIF bit 1 and GO/DONE 0
PIC Microcontroller
78
Comparator
Two analog comparators
Inputs shared with I/O pins
Access via CMCON SRF (device-dependent file address)
Operation
Analog input at VIN+ < VIN output = binary 0
Analog input at VIN+ > VIN output = binary 1
CMCON SFR
C2OUT
C1OUT
CIS
CM2
CM1
CM0
C2OUT
C1OUT
Comparator
Outputs
CIS
CM2:CM0
Comparator
InputSwitch
Seetableonfollowingslides
responsetime
Embedded Systems Hadassah College Spring 2012
PIC Microcontroller
79
ComparatorModes 1
PIC Microcontroller
80
ComparatorModes 2
PIC Microcontroller
81
InitializeComparator
FLAG_REG EQU 0x20
CLRF FLAG_REG
CLRF PORTA
ANDLW 0xC0
IORWF FLAG_REG,F
MOVLW 0x03
MOVWF CMCON
BSF STATUS,RP0
MOVLW 0x07
MOVWF TRISA
BCF STATUS,RP0
CALL DELAY 10
MOVF CMCON,F
BCF PIR1,CMIF
BSF STATUS,RP0
BSF PIE1,CMIE
BCF STATUS,RP0
BSF INTCON,PEIE
BSF INTCON,GIE
Embedded Systems Hadassah College Spring 2012
;
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82
USART
Universal Synchronous / Asynchronous Receiver / Transmitter
Serial Communications Interface (SCI)
PC serial port / modem
Transmit
Parallel serial
Data byte as 8 serial bits
Receive
Serial parallel
Assemble 8 bits as data byte
Modes
Asynchronous
Full duplex simultaneous transmit + receive
Synchronous
Half duplex transmit or receive
Master synchronize data to internal clock
Slave synchronize data to external clock
Embedded Systems Hadassah College Spring 2012
PIC Microcontroller
83
USARTTransmitOperation
Data
Byte TXREG framing TSR bit FIFO TX pin
Framing add start bit / parity bit
InterruptonemptyTXREG
TSRfull/emptyPortEnable
TransmitSpeed
Paritybit
PIC Microcontroller
84
USARTReceiveOperation
Data
RX pin bit FIFO RSR RCREG byte
Framing
Identify data between stop bits
Check for parity error
OverrunError
FramingError
ContinuousReceiveEnable
Sample+FIFO
Paritybit
PortEnable
RCREGfull
PIC Microcontroller
85
Capture/Compare/PWM(CCP)Module
SFRs
CCP control register (CPCON)
CCPR High byte / Low byte (CCPRH / CCPRL)
I/O pin
CPP pin (CPPx) device-dependent pin configured in TRIS SFR
Capture Mode
Captures 16-bit value of register TMR1 on CCPx event
Every falling edge / rising edge / 4th rising edge / 16th rising edge
Triggers interrupt
Compare mode
Compare 16-bit (CCPR == TMR1)
Configurable response on match
CCPx 0 / 1
Interrupt with no change on CPPx
Pulse Width Modulation (PWM) mode
Generates duty cycle waveform on CCPx
Embedded Systems Hadassah College Spring 2012
PIC Microcontroller
Period
Dutycycle
86
CCPxCONSFR
7
DCxB1:DCxB0
CCPxM3:CCPxM0
DCxB1
DCxB0
CCPxM3
CCPxM2
CCPxM1
CCPxM0
PWMDutyCycle DCx1:DCx0of10bitPWMdutycycle
bit1andbit0
DCx9:DCx2inCCPRxL
CCPx Mode
Selectbits
PIC Microcontroller
87
CaptureMode
Event
Input pin CCPx divided by prescaler sampled on rising / falling edge
Interruptflag,x=1,2
CCPxR =CCPRxH:CCPRxL,x=1,2
16bitvalueinTimer1
Configuration
CCPcontrolregister,x=1,2
PIC Microcontroller
88
CompareMode
16-bit compare
(CCPRx == TMR1), x = 1, 2
ResetTimer1
Interrupt
16bitpresetvalueinCCPRx
16bitvalueofTimer1
PIC Microcontroller
89
PulseWidthModulation(PWM)mode
Generates duty cycle waveform
Setdutycycle
0 PR2 255
0 DC 1023
Setperiod
PIC Microcontroller
90
DutyCycle
TPWM = 4 P TOSC
TPWM = 4 (PR2 + 1) P TOSC
TON = DC P TOSC
TON = P TOSC
DutyCycle
TON
DC P TOSC
DC
=
=
TPWM 4 (PR2 + 1) P TOSC 4 (PR2 + 1 )
TON
1 DC 4 (PR2 + 1)
TPWM
Controllability
TON
P TOSC
1
=
=
TPWM 4 (PR2 + 1 ) P TOSC 4 (PR2 + 1 )
Resolution
log ( 4 (PR2 + 1 ) P )
TON
DC 4 (PR2 + 1) 2 =
4 (PR2 + 1) P r =
TOSC
log ( 2 )
r
PIC Microcontroller
91
DutyCycleExample
Frequencyanddutycyclefromgivenparameters
fOSC = 20MHz TOSC = ( 20MHz ) = 50ns
-1
P=1
PR2 = 63 TPWM = 4 64 50ns = 12.8s
fPWM = (12.8s ) = 78.125kHz
-1
PIC Microcontroller
92
PWMExample
Choosingparameters
Internal oscillator
fOSC =4MHz TOSC =0.25s
Oscillatorfrequency=4MHz
Produceoutputwith
1kHzfrequency(TPWM =1ms)
10%dutycycle
PWM frequency
PIC Microcontroller
93
PWMExample
Code
Init_pwm:
TON_pwm:
List p = 16F873
include "P16F873.INC"
movlw 0x01
;
movwf T2CON
;
clrf CCP1CON
;
clrf TMR2
;
movlw .25
;
movwf CCPR1L
;
bsf STATUS, RP0
;
movlw .249
;
movwf PR2
bcf PIE1, TMR2IE
;
bcf PIE1, CCP1IE
;
bcf TRISC, 2
;
bcf STATUS, RP0
;
clrf PIR1
;
movlw 0x0C
;
movwf CCP1CON
;
bsf T2CON, TMR2ON
;
return
movwf CCPR1L
;
return
;
end
Stop Timer2
Prescaler 4
Reset module CCP1
Timer2 0
10% duty cycle
DC1B9:DC1B2
Bank 1
Timer2
Disable Timer2 interrupt
Disable CCP1 interrupt
Pin CCP1 = output
Bank 0
Clear interrupt flags
CCP1 in PWM mode
DC1B1:DC1B0 0
Start Timer2
Call to change
Duty cycle
PIC Microcontroller
94
DataEEPROM
Additional long term data memory
Internal EEPROM
Indirect addressing
Not directly mapped in register file space
Access through SFRs
EECON1
Control bits
EECON2
Initiates read / write operation
Virtual register not physically implemented
EEDATA
8-bit data for read / write
EEADR
Access address in EEPROM
8-bit address 256 EEPROM locations
PIC Microcontroller
95
EECON1SFR
7
EEIF
WRERR
WREN
WR
RD
EEIF
WriteOperation
InterruptFlag
1=Writeoperationcompleted
0=Writeoperationnotcomplete/notstarted
WRERR
ErrorFlag
1=Writeoperationprematurelyterminated
0=Writeoperationcompleted
WREN
WriteEnable
1=Allowswritecycles
0=InhibitswritetodataEEPROM
WR
WriteControl
1=Initiateswritecycle
0=WritecycletodataEEPROMiscomplete(clearedbyhardware)
RD
ReadControl
1=Initiatesread
0=DoesnotinitiateanEEPROMread(clearedbyhardware)
PIC Microcontroller
96
EECON2SFR
Not physical register
Read EECON2 0
SFR access to EEPROM write hardware
Data EEPROM write sequence
EEDATA data
EEADR address_for_write
W 55h
EECON2 W
W AAh
; EECON2 55AAh
EECON2 W
; initiate(writecontrolbitset)
EECON1<WR> 1
PIC Microcontroller
97
EEPROMRead/Write/Verify 1
Read
BCF STATUS, RP0
MOVLW CONFIG_ADDR
MOVWF EEADR
BSF STATUS, RP0
BSF EECON1, RD
BCF STATUS, RP0
MOVF EEDATA, W
Write
BSF STATUS, RP0
BCF INTCON, GIE
BSF EECON1, WREN
MOVLW 55h
MOVWF EECON2
MOVLW AAh
MOVWF EECON2
BSF EECON1,WR
BSF INTCON, GIE
Embedded Systems Hadassah College Spring 2012
;
;
;
;
;
;
Bank0
Address in Data EEPROM
Set read address
Set Bank1
Initiate EEPROM Read
Set Bank0
; W EEDATA
;
;
;
;
;
;
;
;
;
Bank1
Disable INTs
Enable write
W 55h
EECON2 W
W AAh
EECON2 W
Set WR bit (initiates write)
Enable INTs
PIC Microcontroller
98
EEPROMRead/Write/Verify 2
Verify
BCF STATUS, RP0
MOVF EEDATA, W
BSF STATUS, RP0
READ
BSF EECON1, RD
BCF STATUS, RP0
SUBWF EEDATA, W
BTFSS STATUS, Z
GOTO WRITE_ERR
; Bank0
; copy write request data to W
; Bank1
; Initiate read
; Bank0
; W write request read
; Skip next if (Z == 1)
; Handle write error
PIC Microcontroller
99
PICConfigurationBits 1
Determines certain device modes
Oscillator mode, WDT reset, copy protection
Sets device state on power-up
Configured during EEPROM programming
Mapped to program memory location 2007h
CodeProtection
11=Codeprotectionoff
10=devicedependent
01=devicedependent
00=memorycodeprotected
DP
DataEEPROMCodeProtection
1=Codeprotectionoff
0=DataEEPROMMemorycodeprotected
BODEN
BrownoutResetEnable
1=BORenabled
0=BORdisabled
PWRTE
PowerupTimerEnable
1=PWRT disabled
0=PWRT enabled
MCLRE
MCLR (masterclear)PinFunction
1=Pinfunction=MCLR
0=Pinfunction=digitalI/O
PIC Microcontroller
100
PICConfigurationBits 2
WDTE
FOSC1:FOSC0
FOSC2:FOSC0
WatchdogTimerEnable
1=WDTenabled
0=WDTdisabled
OscillatorSelection
FordeviceswithnointernalRC
11=RCoscillator
10=HSoscillator
01=XToscillator
00=LPoscillator
OscillatorSelection
FordeviceswithinternalRC
111=EXTRCoscillator,withCLKOUT
110=EXTRCoscillator
101=INTRCoscillator,withCLKOUT
100=INTRCoscillator
011=Reserved
010=HSoscillator
001=XToscillator
000=LPoscillator
PIC Microcontroller
101