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Schematic model generation and model validation
Top-level full-chip verification has become the biggest challenge in bringing mixed-signal chips to
production. Engineers have to generate behavioral models manually and validate their functionality
and consistency against the original design. Cadence Virtuoso mixed-signal behavioral modeling
technology provides the automation, visibility, and ease of use to speed and simplify the model
generation and validation process.
Behavioral Modeling
Challenges
process very transparent and understandable for analog circuit designers and
verification engineers.
Model Simulation
Results
Model
Simulation
Model
Waveforms
Design Simulation
Results
Design
Design
Simulation
Reports
Measured
Results
Waveforms
Model Validation
and Debugging
Pass/Fail
Testbenches
Benefits
Measured
Results
Cadence is transforming the global electronics industry through a vision called EDA360.
With an application-driven approach to design, our software, hardware, IP, and services help
customers realize silicon, SoCs, and complete systems efficiently and profitably. www.cadence.com
2012 Cadence Design Systems, Inc. All rights reserved. Cadence, the Cadence logo, and Virtuoso are registered trademarks of Cadence Design
Systems, Inc. SystemC is a trademark of the Open SystemC Initiative, Inc. in the US and other countries and is used with permission. All others are
properties of their respective holders. 94 12/12 MK/DM?PDF