Beruflich Dokumente
Kultur Dokumente
Model Name :
File Name :
1
Compal Confidential
2
DAX
DAZ14Z00200
Issued Date
Description
PCB 14Z LA-A994P REV0 M/B 4
Security Classification
ZSO50 BayTrail-M
Part Number
2012/12/01
Deciphered Date
2013/07/10
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Cover Page
Document Number
Rev
0.1
LA-A994P
Friday, February 21, 2014
Sheet
E
of
43
204pin DDRIII-SO-DIMM X1
Memory BUS(DDR3) Single Channel
page15
BANK 0, 1, 2
Port 1
LVDS Conn.
page17
Port 0
LVDS Translater
RTS2132R page16
Port 0
HDMI Conn.
USB3.0
page18
VALLEYVIEW-M
VGA
USB2.0
Conn.
page24
SOC
VGA Conn.
page19
Port 2
Port 1
USB3.0
Conn.X1
page24
GPP2
Card Reader
RTS5239
page23
GPP1
MINI Card
(WLAN/BT)
page21
Debug port
Touch Screen
GPP0
page23
Port 2
USB2.0
Conn.
WLAN
BT Combo
page24
page21
page24
page6~13
page23
SPI
page23
Port 1
HD Audio(AZ)
10/100
LAN Controller
RTL8166-CG
Transformer
RJ45
page17
Port 0
Port 0
Card Reader
Conn.
USB
Camera
page25
PCIE
Port 3
USB HUB
FE1.1s(STT)
LPC
SATA III
ODD
Conn.
HDD
Conn.
page22
BIOS (8M)
SATA I
Port1
Audio
ALC3227
page20
page22
ENE
KBC9012
FAN/LED
page26
page28
Int.KBD
Sub-borad
Int. Speaker
Conn. page20
Combo Jacks
3
page20
Touch Pad
page27
page27
USB/B
page24
PWR BTN/B
page28
4
TP BTN/B
Issued Date
Security Classification
page27
2012/12/01
Deciphered Date
2013/07/10
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Block Diagrams
Rev
0.1
LA-A994P
Date:
Sheet
of
43
Voltage Rails
Power Plane
BOARD ID Table
Description
S0
S3
S4/S5
VIN
ON
ON
ON
BATT+
ON
ON
ON
B+
ON
ON
ON
+VSB
ON
ON
ON
+RTCVCC
ON
ON
ON
+1.0VALW
ON
ON
ON
+1.2VALW
ON
ON
ON
+1.8VALW
ON
ON
ON
+3VALW
ON
ON
ON
+5VALW
ON
ON
ON
+1.35V
ON
ON
OFF
+SOC_VCC
ON
OFF
OFF
+SOC_VNN
ON
OFF
OFF
+0.675VS
ON
OFF
OFF
+1.0VS
ON
OFF
OFF
+1.05VS
ON
OFF
OFF
+1.35VS
ON
OFF
OFF
+1.5VS
ON
OFF
OFF
+1.8VS
ON
OFF
OFF
+3VS
ON
OFF
OFF
+5VS
ON
OFF
OFF
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
USOC1
Board ID
DB
SI
PV
MV
PCB Revision
0.1
0.2
0.3
1.0
USOC1
217@
186@
B3 1.86G
B3 2.17G
SA00007E920
SA00007EO10
USOC1
USOC1
CR1@
PR1@
USOC1
USOC1
SA00007EO30
CR3@
SA00007E940
PR3@
SA00007E950
EC SM Bus1 address
Device
Address
Smart Battery
0001 011X b
EC SM Bus2 address
Device
Address
Address
DIMM0
A0
1010 000X
JDIMM1(SPD)
43 Level
4319P6BOL01
Description
SMT MB AA231 V1UE3 HDMI
BOM Structure
Issued Date
Security Classification
2012/12/01
Deciphered Date
2013/07/10
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Notes List
Document Number
Rev
0.1
LA-A994P
Monday, February 24, 2014
Sheet
E
of
43
G3->S0
S0->S3
S3->S0
S0->S5
+3VLP
+3VLP
EC_ON
EC_ON
1.53ms
+3VALW
1.58ms
+3VALW
+5VALW
+5VALW
SPOK
SPOK
7.28ms
+1.0VALW
8.23ms
+1.0VALW
+1.8VALW
+1.8VALW
ON/OFF
ON/OFF
95.38ms
EC_RSMRST#
101ms
EC_RSMRST#
PBTN_OUT#
101ms
PBTN_OUT#
C
ACIN
ACIN
102ms
EC_SLP_S4#
102ms
EC_SLP_S3#
EC_SLP_S4#
EC_SLP_S3#
222ms
SYSON
204ms
SYSON
0.6ms
+1.35V
3.29ms
+1.35V
3.29ms
DDR_PWROK
1.71ms
33.68ms
DDR_PWROK
21ms
22.32ms
36.20ms
VR_ON
VR_ON
2.49ms
2.50ms
8.85ms
+SOC_VCC
2.50ms
+SOC_VCC
11.5ms
+SOC_VNN
2.50ms
10.55ms
+SOC_VNN
9.81ms
0.28ms
279us
VGATE
VGATE
42.56ms
263ms
11.71ms
SUSP#
5.57ms
31.28us
+1.0VS
2.18ms
1.30ms
1.52ms
1.84ms
+1.05VS
1.83ms
8ms
+1.35VS
+1.0VS
1.29ms
1.56ms
+1.05VS
SUSP#
31.12us
2.56ms
8.12ms
2.79ms
10.71ms
+1.5VS
10.71ms
2.11ms
16.63ms
+1.8VS
15.34ms
+3VS
3.77ms
3.77ms
15.31ms
+3VS
+1.5VS
2.08ms
16.59ms
+1.8VS
+1.35VS
2.8ms
4.41ms
4.41ms
20.48ms
+5VS
20.27ms
19.61ms
+0.675VS
+5VS
12.77ms
12.83ms
19.60ms
+0.675VS
49.87ms
49.83ms
148.3ms
KBRST#
144ms
KBRST#
110ms
110ms
11.71ms
MC_CORE_PWROK
PMC_CORE_PWROK
110ms
110ms
11.71ms
DR_CORE_PWROK
DDR_CORE_PWROK
116ms
116ms
8.8ms
584ms
SUSP#
PMC_PLTRST#
PMC_PLTRST#
2.38ms
NOTE:
1. T1 and T2 are recommended time for all the VR rails
unless specified otherwise. The VR ramp up time T2 and
subsequent rail delay T3 are put in place to avoid
inrush current which may be caused by multiple loads
turning on simultaneously or fast charging of VR output
decoupling.
Issued Date
Security Classification
2012/12/01
Deciphered Date
2013/07/10
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size
C
Date:
Power Sequence
Document Number
Rev
0.1
LA-A994P
Sheet
of
43
B+
AC Adapter
+SOC_VNN
Page. 37
Charger PU301
D
+SOC_VCC
PU801
PWM
ISL95833HRTZ
19V
BQ24725ARGRR
Page. 32
CHG_B+
+0.675VS
PU501
PWM
RT8207MZQW
+1.35V
Page. 34
U37
MOSFET
DMN3030LSS
+VBATT
+1.35VS
Page. 28
BATTERY
8V~12V
PU604
Regulator
SY8206DQNC
+1.0VALW
Page. 35
U36
MOSFET
AO4304L
+1.0VS
Page. 28
+3VALW
PU401
Regulator
SY8208BQNC
Page. 33
U35
MOSFET
DMN3030LSS
+3VS
Page. 28
PU601
Regulator
SY8032ABC
+1.05VS
Page. 35
PU701
Regulator
SY8032ABC
+1.2VALW
Page. 36
B
PU703
Regulator
SY8033BDBC
+1.8VALW
Page. 36
U38
MOSFET
DMN3030LSS
PU402
Regulator
SY8208CQNC
+1.8VS
Page. 28
+5VALW
PU702
LDO
APL5930KAI
Page. 33
U33
MOSFET
DMN3030LSS
+1.5VS
Page. 36
+5VS
Page. 28
Issued Date
Security Classification
2012/12/01
Deciphered Date
2013/07/10
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Power Map
Document Number
Rev
0.1
LA-A994P
Friday, February 21, 2014
Sheet
1
of
43
USOC1B
USOC1A
15
15
DDR_A_MA[0..15]
DDR_A_DM[0..7]
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15
K45
H47
L41
H44
H50
G53
H49
D50
G52
E52
K48
E51
F47
J51
B49
B50
DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7
G36
B36
F38
B42
P51
V42
Y50
Y52
15
15
15
DDR_A_RAS#
DDR_A_CAS#
DDR_A_WE#
M45
M44
H51
15
15
15
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
K47
K44
D52
15
DDR_A_CS0#
P44
15
DDR_A_CS2#
P45
15
DDR_A_CKE0
15
DDR_A_CKE2
C47
D48
F44
E46
15
DDR_A_ODT0
T41
15
DDR_A_ODT2
P42
15
15
DDR_A_CLK0
DDR_A_CLK0#
M50
M48
15
15
DDR_A_CLK2
DDR_A_CLK2#
P50
P48
DDR_A_RST#
P41
15
AF44
+DDR_SOC_VREF
100K_0402_5% 1
100K_0402_5% 1
38
9
2 R960
2 R961
DDR_TERMN0
DDR_TERMN1
AD42
AB42
DDR_PWROK
DDR_CORE_PWROK
23.2_0402_1%
29.4_0402_1%
162_0402_1%
1
1
1
AF42
AH42
2 R962
2 R963
2 R964
DDR_RCOMP0
DDR_RCOMP1
DDR_RCOMP2
AD44
AF45
AD45
DRAM0_MA_0
DRAM0_MA_1
DRAM0_MA_2
DRAM0_MA_3
DRAM0_MA_4
DRAM0_MA_5
DRAM0_MA_6
DRAM0_MA_7
DRAM0_MA_8
DRAM0_MA_9
DRAM0_MA_10
DRAM0_MA_11
DRAM0_MA_12
DRAM0_MA_13
DRAM0_MA_14
DRAM0_MA_15
DRAM0_DQ_0
DRAM0_DQ_1
DRAM0_DQ_2
DRAM0_DQ_3
DRAM0_DQ_4
DRAM0_DQ_5
DRAM0_DQ_6
DRAM0_DQ_7
DRAM0_DQ_8
DRAM0_DQ_9
DRAM0_DQ_10
DRAM0_DQ_11
DRAM0_DQ_12
DRAM0_DQ_13
DRAM0_DQ_14
DRAM0_DQ_15
DRAM0_DQ_16
DRAM0_DQ_17
DRAM0_DQ_18
DRAM0_DQ_19
DRAM0_DQ_20
DRAM0_DQ_21
DRAM0_DQ_22
DRAM0_DQ_23
DRAM0_DQ_24
DRAM0_DQ_25
DRAM0_DQ_26
DRAM0_DQ_27
DRAM0_DQ_28
DRAM0_DQ_29
DRAM0_DQ_30
DRAM0_DQ_31
DRAM0_DQ_32
DRAM0_DQ_33
DRAM0_DQ_34
DRAM0_DQ_35
DRAM0_DQ_36
DRAM0_DQ_37
DRAM0_DQ_38
DRAM0_DQ_39
DRAM0_DQ_40
DRAM0_DQ_41
DRAM0_DQ_42
DRAM0_DQ_43
DRAM0_DQ_44
DRAM0_DQ_45
DRAM0_DQ_46
DRAM0_DQ_47
DRAM0_DQ_48
DRAM0_DQ_49
DRAM0_DQ_50
DRAM0_DQ_51
DRAM0_DQ_52
DRAM0_DQ_53
DRAM0_DQ_54
DRAM0_DQ_55
DRAM0_DQ_56
DRAM0_DQ_57
DRAM0_DQ_58
DRAM0_DQ_59
DRAM0_DQ_60
DRAM0_DQ_61
DRAM0_DQ_62
DRAM0_DQ_63
DRAM0_DM_0
DRAM0_DM_1
DRAM0_DM_2
DRAM0_DM_3
DRAM0_DM_4
DRAM0_DM_5
DRAM0_DM_6
DRAM0_DM_7
DRAM0_RAS#
DRAM0_CAS#
DRAM0_WE#
DRAM0_BS_0
DRAM0_BS_1
DRAM0_BS_2
DRAM0_CS_0#
DRAM0_CS_2#
DRAM0_CKE_0
RESERVED_D48
DRAM0_CKE_2
RESERVED_E46
DRAM0_ODT_0
DRAM0_ODT_2
DRAM0_CKP_0
DRAM0_CKN_0
DRAM0_CKP_2
DRAM0_CKN_2
DRAM0_DRAMRST#
DRAM_VREF
0.675V
DRAM0_DQSP_0
DRAM0_DQSN_0
DRAM0_DQSP_1
DRAM0_DQSN_1
DRAM0_DQSP_2
DRAM0_DQSN_2
DRAM0_DQSP_3
DRAM0_DQSN_3
DRAM0_DQSP_4
DRAM0_DQSN_4
DRAM0_DQSP_5
DRAM0_DQSN_5
DRAM0_DQSP_6
DRAM0_DQSN_6
DRAM0_DQSP_7
DRAM0_DQSN_7
ICLK_DRAM_TERMN_AF42
ICLK_DRAM_TERMN_AH42
DRAM_VDD_S4_PWROK
DRAM_CORE_PWROK
DRAM_RCOMP_0
DRAM_RCOMP_1
DRAM_RCOMP_2
RESERVED_AF40
RESERVED_AF41
RESERVED_AD40
RESERVED_AD41
M36
J36
P40
M40
P36
N36
K40
K42
B32
C32
C36
A37
C33
A33
C37
B38
F36
G38
F42
J42
G40
C38
G44
D42
A41
C41
A45
B46
C40
B40
B48
B47
K52
K51
T52
T51
L51
L53
R51
R53
T47
T45
Y40
V41
T48
T50
Y42
AB40
V45
V47
AD48
AD50
V48
V50
AB44
Y45
V52
W51
AC53
AC51
W53
Y51
AD52
AD51
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
J38
K38
C35
B34
D40
F40
B44
C43
N53
M52
T42
T44
Y47
Y48
AB52
AA51
DDR_A_DQS0
DDR_A_DQS#0
DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DQS6
DDR_A_DQS#6
DDR_A_DQS7
DDR_A_DQS#7
DDR_A_D[0..63]
AY45
BB47
AW41
BB44
BB50
BC53
BB49
BF50
BC52
BE52
AY48
BE51
BD47
BA51
BH49
BH50
BD38
BH36
BC36
BH42
AT51
AM42
AK50
AK52
AV45
AV44
BB51
AY47
AY44
BF52
AT44
AT45
BG47
BE46
BD44
BF48
AP41
AT42
AV50
AV48
AT50
AT48
AT41
DRAM1_DM_0
DRAM1_DM_1
DRAM1_DM_2
DRAM1_DM_3
DRAM1_DM_4
DRAM1_DM_5
DRAM1_DM_6
DRAM1_DM_7
DRAM1_RAS#
DRAM1_CAS#
DRAM1_WE#
DRAM1_BS_0
DRAM1_BS_1
DRAM1_BS_2
DRAM1_CS_0#
DRAM1_CS_2#
DRAM1_CKE_0
RESERVED_BE46
DRAM1_CKE_2
RESERVED_BF48
DRAM1_ODT_0
DRAM1_ODT_2
DRAM1_CKP_0
DRAM1_CKN_0
DRAM1_CKP_2
DRAM1_CKN_2
DRAM1_DRAMRST#
15
15
BG38
BC40
BA42
BD42
BC38
BD36
BF42
BC44
BH32
BG32
BG36
BJ37
BG33
BJ33
BG37
BH38
AU36
AT36
AV40
AT40
BA36
AV36
AY42
AY40
BJ41
BG41
BJ45
BH46
BG40
BH40
BH48
BH47
AY52
AY51
AP52
AP51
AW51
AW53
AR51
AR53
AP47
AP45
AK40
AM41
AP48
AP50
AK42
AH40
AM45
AM47
AF48
AF50
AM48
AM50
AH44
AK45
AM52
AL51
AG53
AG51
AL53
AK51
AF52
AF51
BF40
BD40
BG35
BH34
BA38
AY38
BH44
BG43
AU53
AV52
AP42
AP44
AK47
AK48
AH52
AJ51
2 OF 13
FH8065301546401_FCBGA131170
FH8065301546401_FCBGA131170
1
2
C1159
@ESD@
0.01U_0402_16V7K
DRAM1_DQ_0
DRAM1_DQ_1
DRAM1_DQ_2
DRAM1_DQ_3
DRAM1_DQ_4
DRAM1_DQ_5
DRAM1_DQ_6
DRAM1_DQ_7
DRAM1_DQ_8
DRAM1_DQ_9
DRAM1_DQ_10
DRAM1_DQ_11
DRAM1_DQ_12
DRAM1_DQ_13
DRAM1_DQ_14
DRAM1_DQ_15
DRAM1_DQ_16
DRAM1_DQ_17
DRAM1_DQ_18
DRAM1_DQ_19
DRAM1_DQ_20
DRAM1_DQ_21
DRAM1_DQ_22
DRAM1_DQ_23
DRAM1_DQ_24
DRAM1_DQ_25
DRAM1_DQ_26
DRAM1_DQ_27
DRAM1_DQ_28
DRAM1_DQ_29
DRAM1_DQ_30
DRAM1_DQ_31
DRAM1_DQ_32
DRAM1_DQ_33
DRAM1_DQ_34
DRAM1_DQ_35
DRAM1_DQ_36
DRAM1_DQ_37
DRAM1_DQ_38
DRAM1_DQ_39
DRAM1_DQ_40
DRAM1_DQ_41
DRAM1_DQ_42
DRAM1_DQ_43
DRAM1_DQ_44
DRAM1_DQ_45
DRAM1_DQ_46
DRAM1_DQ_47
DRAM1_DQ_48
DRAM1_DQ_49
DRAM1_DQ_50
DRAM1_DQ_51
DRAM1_DQ_52
DRAM1_DQ_53
DRAM1_DQ_54
DRAM1_DQ_55
DRAM1_DQ_56
DRAM1_DQ_57
DRAM1_DQ_58
DRAM1_DQ_59
DRAM1_DQ_60
DRAM1_DQ_61
DRAM1_DQ_62
DRAM1_DQ_63
DRAM1_MA_0
DRAM1_MA_1
DRAM1_MA_2
DRAM1_MA_3
DRAM1_MA_4
DRAM1_MA_5
DRAM1_MA_6
DRAM1_MA_7
DRAM1_MA_8
DRAM1_MA_9
DRAM1_MA_10
DRAM1_MA_11
DRAM1_MA_12
DRAM1_MA_13
DRAM1_MA_14
DRAM1_MA_15
DRAM1_DQSP_0
DRAM1_DQSN_0
DRAM1_DQSP_1
DRAM1_DQSN_1
DRAM1_DQSP_2
DRAM1_DQSN_2
DRAM1_DQSP_3
DRAM1_DQSN_3
DRAM1_DQSP_4
DRAM1_DQSN_4
DRAM1_DQSP_5
DRAM1_DQSN_5
DRAM1_DQSP_6
DRAM1_DQSN_6
DRAM1_DQSP_7
DRAM1_DQSN_7
DDR_A_DQS[0..7]
DDR_A_DQS#[0..7]
1 OF 13
15
+1.35V
+DDR_SOC_VREF
R965
4.7K_0402_1%
2
R966
4.7K_0402_1%
C1132
.1U_0402_16V7K
Issued Date
Security Classification
2013/04/12
Deciphered Date
2014/04/12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Size
C
Date:
Rev
0.1
LA-A994P
Friday, February 21, 2014
Sheet
of
43
@
R970
10K_0402_5%
T186
T187
GPIO_NC12
3.3V
3.3V
VGA_DDCCLK
VGA_DDCDATA
RESERVED_T7
RESERVED_T9
RESERVED_AB13
RESERVED_AB12
RESERVED_Y12
RESERVED_Y13
RESERVED_V10
RESERVED_V9
RESERVED_T12
RESERVED_T10
RESERVED_V14
RESERVED_V13
RESERVED_T14
RESERVED_T13
RESERVED_T6
RESERVED_T4
RESERVED_P14
R971
10K_0402_5%
GPIO_NC13
GPIO_NC14
RESERVED_T2
RESERVED_T3
RESERVED_AB3
RESERVED_AB2
RESERVED_Y3
RESERVED_Y2
RESERVED_W3
RESERVED_W1
RESERVED_V2
RESERVED_V3
RESERVED_R3
RESERVED_R1
RESERVED_AD6
RESERVED_AD4
RESERVED_AB9
RESERVED_AB7
RESERVED_Y4
RESERVED_Y6
RESERVED_V4
RESERVED_V6
GPIO_S0_NC_13
GPIO_S0_NC14
RESERVED_AB14
GPIO_S0_NC_12
RESERVED_C30
VGA_HSYNC
VGA_VSYNC
3 OF 10
GPIO_S0_NC_15
GPIO_S0_NC_16
GPIO_S0_NC_17
GPIO_S0_NC_18
GPIO_S0_NC_19
GPIO_S0_NC_20
GPIO_S0_NC_21
GPIO_S0_NC_22
GPIO_S0_NC_23
GPIO_S0_NC_24
GPIO_S0_NC_25
GPIO_S0_NC_26
5
P
26
2
@
AH14
AH13
AF14
AF13
SH000001G00
2 R973 47NH_LQG15HS47NJ02D_0.2A_5% CRT_R
EMICRT@ 1
BA3CRT_L_R
2 R974 47NH_LQG15HS47NJ02D_0.2A_5% CRT_B
EMICRT@ 1
AY2CRT_L_B
EMICRT@ 1
2 R986 47NH_LQG15HS47NJ02D_0.2A_5% CRT_G
BA1CRT_L_G
AW1 CRT_IREF
R969 1 CRT@ 2 357_0402_1%
AY3
BD2 CRT_HSYNC
BF2 CRT_VSYNC
CRT_HSYNC
CRT_VSYNC
BC1 CRT_DDC_CLK
BC2 CRT_DDC_DATA
CRT_DDC_CLK
19
CRT_DDC_DATA
19
CRT_R
CRT_B
CRT_G
19
19
19
DDI1_ENVDD
Y
A
ENVDD
17
NL17SZ07DFT2G_SC70-5
SA00004BV00
+1.8VS
+1.8VALW
R1045
0_0402_5% @
8
7
6
5
U62
NC
CRT
19
19
CRT@
RP43
150_0804_8P4R_1%
1
2
3
4
1
DDI1_PWM
U64
NC
Y
A
INVT_PWM
16
NL17SZ07DFT2G_SC70-5
SA00004BV00
F34
M32
D28
J28
K34
D34
F32
F28
K28
J34
N32
D32
DDI1_ENBKL
DDI1_ENVDD
DDI1_PWM
RP45
1
2
3
4
8
7
6
5
0504
100K_0804_8P4R_5%
+3VS
RP50
INVT_PWM
ENVDD
ENBKL
FH8065301546401_FCBGA131170
GPIO_S0_NC[13]:
Multiplexed with Hardware
1
R1043
0_0402_5% @
CRT_B
CRT_G
CRT_R
ENBKL
NL17SZ07DFT2G_SC70-5
SA00004BV00
+1.8VS
+1.8VALW
Control by RTS2132R
T7
T9
AB13
AB12
Y12
Y13
V10
V9
T12
T10
V14
V13
T14
T13
T6
T4
P14
R1044
+1.8VS
T2
T3
AB3
AB2
Y3
Y2
W3
W1
V2
V3
R3
R1
AD6
AD4
AB9
AB7
Y4
Y6
V4
V6
A29
C29
AB14
B30
C30
3.3V
3.3V
16
0_0402_5%
VGA_RED
VGA_BLUE
VGA_GREEN
VGA_IREF
VGA_IRTN
Y
A
2 2.2K_0402_5% +1.8VS
N30 DDI1_ENVDD
J30 DDI1_ENBKL
M30 DDI1_PWM
AH3
AH2
NC
RESERVED_AH14
RESERVED_AH13
RESERVED_AF14
RESERVED_AF13
R967 1
VSS_AH3
VSS_AH2
DDI0_RCOMP_P
DDI0_RCOMP_N
RESERVED_AM14
RESERVED_AM13
VSS_AM3
VSS_AM2
EDP_HPD#
P30 DDI1_ENABLE
G30
DDI1_ENBKL
DDI1_VDDEN
DDI1_BKLTEN
DDI1_BKLTCTL
K30
16
16
1.8V
1.8V
1.8V
DDI0_VDDEN
DDI0_BKLTEN
DDI0_BKLTCTL
EDP_AUXP
EDP_AUXN
DDI1_DDCDATA
DDI1_DDCCLK
AK3
AK2
U61
DDI1_HPD
1.8V
1.8V
AK12
AK13
AM14
AM13
AM3
AM2
1.8V
1.8V
1.8V
eDP Panel
R1042
1 R968
2 DDI0_RCOMPP
402_0402_1% DDI0_RCOMPN
1.8V
DDI0_DDCDATA
DDI0_DDCCLK
0_0402_5%
B28
C27
B26
DDI0_HPD
R1041
0_0402_5% @
16
16
C26
C28
EDP_TXP0
EDP_TXN0
HDMI_DDCDATA
HDMI_DDCCLK
DDI1_AUXP
DDI1_AUXN
AG3
AG1
AF3
AF2
AD3
AD2
AC3
AC1
HDMI_HPD#
18
18
1.0V
1.0V
DDI0_AUXP
DDI0_AUXN
DDI1_TXP_0
DDI1_TXN_0
DDI1_TXP_1
DDI1_TXN_1
DDI1_TXP_2
DDI1_TXN_2
DDI1_TXP_3
DDI1_TXN_3
18
D27
1.0V
AL3
AL1
1.0V
HDMI
DDI0_TXP_0
DDI0_TXN_0
DDI0_TXP_1
DDI0_TXN_1
DDI0_TXP_2
DDI0_TXN_2
DDI0_TXP_3
DDI0_TXN_3
R1040
AV3
AV2
AT2
AT3
AR3
AR1
AP3
AP2
HDMI_TX2+
HDMI_TX2HDMI_TX1+
HDMI_TX1HDMI_TX0+
HDMI_TX0HDMI_CLK+
HDMI_CLK-
0_0402_5%
18
18
18
18
18
18
18
18
+1.8VS
+1.8VALW
USOC1C
8
7
6
5
1
2
3
4
0504
Straps Pin:MDSI_DDCDATA
4.7K_0804_8P4R_5%
Security Classification
2013/04/12
Issued Date
Deciphered Date
2014/04/12
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.1
LA-A994P
Date:
Sheet
1
of
43
USOC1D
22
22
ODD
22
22
AU16
AV16
BD10
BF10
SATA_PTX_DRX_P1
SATA_PTX_DRX_N1
AY16
BA16
SATA_PRX_DTX_P1
SATA_PRX_DTX_N1
BB10
BC10
SOC_SCI#
SOC_SCI#
ODD_DA#
BA12
AY14
SATA_LED#_SOC AY12
ODD_DA#
1 R972
2 SATA_RCOMPP
402_0402_1% SATA_RCOMPN
AU18
AT18
AT22
22
ODD_PLUG#
22
ODD_PWR
ODD_PLUG#
AV20
AU22
AV22
AT20
AY24
AU26
AT26
AU20
ODD_PWR
+1.8VS
R955 2
R956 2
R957 2
1 1K_0402_5%
1 10K_0402_5%
1 10K_0402_5%
ODD_DA#
ODD_PLUG#
ODD_PWR
AV26
BA24
AY18
17
TS_GPIO_CPU
TS_GPIO_CPU
BA18
AY20
BD20
BA20
BD18
BC18
AY26
AT28
BD26
AU28
BA26
BC24
AV28
BF22
BD22
BF26
SATA_RXP_0
SATA_RXN_0
PCIE_RXP_0
PCIE_RXN_0
AY7
AY6
AT14
AT13
PCIE_TXP_1
PCIE_TXN_1
SATA_TXP_1
SATA_TXN_1
SATA_RXP_1
SATA_RXN_1
PCIE_RXP_1
PCIE_RXN_1
VSS_BB10
VSS_BC10
PCIE_TXP_2
PCIE_TXN_2
AT7 PCIE_PTX_DRX_P2
AT6 PCIE_PTX_DRX_N2
BB7
BB5
VSS_BB7
VSS_BB5
PCIE_CLKREQ_0# / GPIO_S0_SC_3
PCIE_CLKREQ_1# / GPIO_S0_SC_4
PCIE_CLKREQ_2# / GPIO_S0_SC_5
PCIE_CLKREQ_3# / GPIO_S0_SC_6
SD3_WP / GPIO_S0_SC_7
PCIE_RCOMP_P
PCIE_RCOMP_N
21
21
PCIE_PTX_C_DRX_P2
PCIE_PTX_C_DRX_N2
23
23
2 C1133
2 C1134
PCIE_PRX_DTX_P3
PCIE_PRX_DTX_N3
BG3
BD7
BG5
BE3
BD5
PCIE_CLKREQ_0#
WLAN_CLKREQ#
CR_CLKREQ#
LAN_CLKREQ#
AP14
AP13
PCIE_RCOMPP
PCIE_RCOMPN
Card Reader
23
23
PCIE_PTX_C_DRX_P3
PCIE_PTX_C_DRX_N3
WLAN
23
23
PCIE LAN
23
23
RP51
1
2
3
4
8
7
6
5
10K_0804_8P4R_5%
WLAN_CLKREQ# 21
CR_CLKREQ# 23
LAN_CLKREQ# 23
For EMI
HDA_BITCLK_AUDIO 1
2
C1001
@RF@
22P_0402_50V8J
T214
1 R975
2
402_0402_1%
49.9_0402_1% 1
BF20 HDA_RCOMP
BG22 HDA_RST#
BH20 HDA_SYNC
BJ21 HDA_BIT_CLK
BG20 HDA_SDOUT
BG19 HDA_SDIN0
HDA_SDIN0
BG21
T189
BH18
T190
BG18
T191
BF28
BA30
BD28
BC30
HDA_SYNC
HDA_SDOUT
HDA_BIT_CLK
HDA_RST#
1
2
3
4
GPIO_S0_SC_63:
BIOS/EFI Boot Strap (BBS)
BIOS Boot Selection
0 = LPC
1 = SPI
09/13a
H_PROCHOT#
GPIO_S0_SC_65:
Security Flash Descriptors
0 = Override
1 = Normal Operation
(Internal PU)
26,34,35
R978
10K_0402_5%
R977
10K_0402_5%
GPIO_S0_SC_63
+1.8VS
+1.8VS
Internal PD 2K
HDA_SYNC_AUDIO
20
HDA_SDOUT_AUDIO 20
HDA_BITCLK_AUDIO 20
HDA_RST_AUDIO# 20
20
R979
33.2_0402_1%
1
2
+1.0VS
C24
+1.8VS
8
7
6
5
33_0804_8P4R_5%
GPIO_S0_SC_65
AK9
AK7
PROCHOT#
2 R976
GPIO_S0_SC_63
P34
N34
FH8065301546401_FCBGA131170
GPIO_S0_SC_65
@ESD@
C1002
10P_0402_50V8J
EC programing :
"High"for Flash BIOS
R980
10K_0402_5%
1
2
+1.8VS
LAN_CLKREQ#
WLAN_CLKREQ#
CR_CLKREQ#
PCIE_CLKREQ_0#
RP46
HDA_LPE_RCOMP
HDA_RST# / LPE_I2S0_CLK / GPIO_S0_SC_8
HDA_SYNC / LPE_I2S0_FRM / GPIO_S0_SC_9
HDA_CLK / LPE_I2S0_DATAOUT / GPIO_S0_SC_10
HDA_SDO / LPE_I2S0_DATAIN / GPIO_S0_SC_11
HDA_SDI0 / LPE_I2S1_CLK / GPIO_S0_SC_12
HDA_SDI1 / LPE_I2S1_FRM / GPIO_S0_SC_13
SD3_CLK / GPIO_S0_SC_33 HDA_DOCKRST# / LPE_I2S1_DATAOUT / GPIO_S0_SC_14
HDA_DOCKEN# / LPE_I2S1_DATAIN / GPIO_S0_SC_15
SD3_D0 / GPIO_S0_SC_34
SD3_D1 / GPIO_S0_SC_35
LPE_I2S2_CLK / SATA_DEVSLP_1 / GPIO_S0_SC_62
SD3_D2 / GPIO_S0_SC_36
LPE_I2S2_FRM / GPIO_S0_SC_63
SD3_D3 / GPIO_S0_SC_37
LPE_I2S2_DATAIN / GPIO_S0_SC_64
SD3_CD# / GPIO_S0_SC_38
LPE_I2S2_DATAOUT / GPIO_S0_SC_65
SD3_CMD / GPIO_S0_SC_39
SD3_1P8EN / GPIO_S0_SC_40
SD3_PWREN# / GPIO_S0_SC_41
RESERVED_P34
RESERVED_N34
SD3_RCOMP
RESERVED_AK9
RESERVED_AK7
4 OF 10
.1U_0402_16V7K 1
.1U_0402_16V7K 1
21
21
PCIE_PRX_DTX_P1
PCIE_PRX_DTX_N1
PCIE_PRX_DTX_P2
PCIE_PRX_DTX_N2
AV10
AV9
RESERVED_AV10
RESERVED_AV9
SD2_CLK / GPIO_S0_SC_27
SD2_D0 / GPIO_S0_SC_28
SD2_D1 / GPIO_S0_SC_29
SD2_D2 / GPIO_S0_SC_30
SD2_D3_CD# / GPIO_S0_SC_31
SD2_CMD / GPIO_S0_SC_32
2 CC6
2 CC7
PCIE_PTX_C_DRX_P1
PCIE_PTX_C_DRX_N1
BB4
BB3
RESERVED_BB4
RESERVED_BB3
MMC1_RCOMP
1
1
AP9 PCIE_PRX_DTX_P3
AP7 PCIE_PRX_DTX_N3
MMC1_CLK / GPIO_S0_SC_16
MMC1_CMD / GPIO_S0_SC_25
MMC1_RST# / SATA_DEVSLP_0 / GPIO_S0_SC_26
.1U_0402_16V7K
.1U_0402_16V7K
AP6 PCIE_PTX_DRX_P3
AP4 PCIE_PTX_DRX_N3
PCIE_RXP_3
PCIE_RXN_3
MMC1_D0 / GPIO_S0_SC_17
MMC1_D1 / GPIO_S0_SC_18
MMC1_D2 / GPIO_S0_SC_19
MMC1_D3 / GPIO_S0_SC_20
MMC1_D4 / GPIO_S0_SC_21
MMC1_D5 / GPIO_S0_SC_22
MMC1_D6 / GPIO_S0_SC_23
MMC1_D7 / GPIO_S0_SC_24
2 C1135
2 C1000
AP12 PCIE_PRX_DTX_P2
AP10 PCIE_PRX_DTX_N2
PCIE_TXP_3
PCIE_TXN_3
SATA_RCOMP_P
SATA_RCOMP_N
.1U_0402_16V7K 1
.1U_0402_16V7K 1
AT10 PCIE_PRX_DTX_P1
AT9 PCIE_PRX_DTX_N1
PCIE_RXP_2
PCIE_RXN_2
SATA_GP0 / GPIO_S0_SC_0
SATA_GP1 / SATA_DEVSLP_0 / GPIO_S0_SC_1
SATA_LED# / GPIO_S0_SC_2
AV6 PCIE_PTX_DRX_P1
AV4 PCIE_PTX_DRX_N1
SATA_PRX_DTX_P0
SATA_PRX_DTX_N0
PCIE_TXP_0
PCIE_TXN_0
22
22
SATA_TXP_0
SATA_TXN_0
SATA_PTX_DRX_P0
SATA_PTX_DRX_N0
22
22
HDD
BF6
BG7
2
TXE_DBG
G
Q62
MESS138W-G_SOT323-3
26
SOC_SATALED#
3
S
28
2
G
SATA_LED#_SOC
Issued Date
Security Classification
Q63
MESS138W-G_SOT323-3
2013/04/12
Deciphered Date
2014/04/12
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.1
LA-A994P
Friday, February 21, 2014
Sheet
1
of
43
+3VALW_EC
+3VALW_EC +1.8VALW
+3VALW
EC_SLP_S4#
26,38 26
EC_SLP_S4#
EC_KBRST#
EC_KBRST#
D40
PMC_ACIN
NL17SZ07DFT2G_SC70-5
SA00004BV00
PLT_RST Buffer
SOC_KBRST#
NL17SZ07DFT2G_SC70-5
SA00004BV00
R1036
10K_0402_5%
R983
2.2K_0402_5%
U58
NC
R3
4.7K_0402_5%
R5
4.7K_0402_5%
1
Y
A
+1.8VALW
1
2
+3VALW_EC
R2
4.7K_0402_5%
U57
NC
PMC_SLP_S4#
21,23,26,27
NL17SZ07DFT2G_SC70-5
SA00004BV00
+1.8VALW
3.3V
PLT_RST_BUF#
Y
A
5 1
P
NC
1
1
PMC_PLTRST# 2
R1032
1.8V
C1004
10P_0402_25V8K
R1033
U53
0_0402_5%
0_0402_5%
GND
XTAL_25M_OUT
1
2
C1174
@ESD@
0.01U_0402_16V7K
PLT_RST_BUF#
+3VS
R1038
GND
R1039
C1003
10P_0402_25V8K
0_0402_5%
1
1
0_0402_5%
R981
1M_0402_5%
Y7
25MHZ_10PF_7V25000014
+1.8VS
+1.8VALW
XTAL_25M_IN
ACIN
26,34..36
RB751V40_SC76-2
+3VALW_EC
AM4
AM6
NL17SZ07DFT2G_SC70-5
SA00004BV00
10K_0804_8P4R_5%
PCIE_CLKN_0
PCIE_CLKP_0
PMC_SUSPWRDNACK / GPIO_S5_11
PMC_SUSCLK_0 / GPIO_S5_12
PMC_SLP_S0IX# / GPIO_S5_13
PMC_SLP_S4#
PMC_SLP_S3#
GPIO_S5_14
PMC_ACPRESENT
PMC_WAKE_PCIE_0# / GPIO_S5_15
PMC_BATLOW#
PMC_PWRBTN# / GPIO_S5_16
PMC_RSTBTN#
PMC_PLTRST#
GPIO_S5_17
PMC_SUS_STAT# / GPIO_S5_18
PCIE_CLKN_1
PCIE_CLKP_1
PCIE_CLKN_2
PCIE_CLKP_2
PCIE_CLKN_3
PCIE_CLKP_3
RESERVED_AM9
RESERVED_AM10
D26
G24
F18
F22
D22
J20
D20
F26
K26
J26
BG9
F20
J24
G18
PMC_SUSCLK
PMC_SLP_S4#
PMC_SLP_S3#
GPIO_S5_14
PMC_ACIN
PMC_PCIE_WAKE#
PMC_BATLOW#
PMC_PWRBTN#
PMC_RSTBTN#
+3VALW_EC
2
100K_0402_5%
1
2
C1155
@ESD@
.1U_0402_16V7K
R1083 RS@
0_0402_5%
1
2
GPIO_S5_17
1
R990
XDP_RSTBTN#
PMC_PLTRST#
T205
14
14
1
26
EC_SCI#
EC_SCI#
R8
4.7K_0402_5%
U66
AU32
AT32
5 OF 13
R996
20K_0402_1%
1
2
1
2
R997
20K_0402_1%
SOC_SPI_CS0#
8 SOC_SPI_MISO
7 SOC_SPI_MOSI
6
5
+BIOS_SPI
SPI_CS0#
SPI_MISO
SPI_WP#
5 1
3
EC_SERIRQ
4.7K_0402_5%
CMOS@
CLRP1
SHORT PADS
EC_SERIRQ
2 R9 +1.8VALW
26,27
C1009
18P_0402_50V8J
NL17SZ07DFT2G_SC70-5
SA00004BV00
+3VALW_EC
1
26
SJ10000EC00
+1.8VALW
EC_SMI#
EC_SMI#
R7
4.7K_0402_5%
U65
NC
C1010
18P_0402_50V8J
+RTCBATT
+RTCBATT
20mil
2 0.01U_0402_16V7K
@ESD@
U56
1
2
3
4
SA00006ZV00
CS#
VCC
DO(IO1) HOLD#(IO3)
WP#(IO2)
CLK
GND
DI(IO0)
8
7
6
5
R1000 1
SPI_HOLD#
SPI_CLK
SPI_MOSI
+RTCVCC
2 0_0402_5%
2 .1U_0402_16V7K
JRTC1
CONN@
LOTES_AAA-BAT-054-K01
SP07000H700
Security Classification
Issued Date
2013/04/12
Deciphered Date
2014/04/12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SPI_CLK
1
2
R1002
@EMI@
33_0402_5%
D32
BAV70W-7-F_SOT323-3
2 3.3K_0402_5%
1
2
C1014
@EMI@
10P_0402_50V8J
20mil
1
C1158
SOC_SMI#
NL17SZ07DFT2G_SC70-5
SA00004BV00
+3VLP
+1.8VALW
R998 1 RS@
W25Q64DWSSIG_SO8
4
5
6
DDR_CORE_PWROK
VCCB
EO
B4
32.768KHZ_12.5PF_Q13FC135000040
1
2
Y8
Clear CMOS
RTC_RST
close to RAM door
+BIOS_SPI
C1013
R999 1
R1001 1
R446
1K_0402_5%
1
2
+RTCBATT_R
22_0804_8P4R_5%
22_0402_5%
R1016
SPI_CLK
SOC_SPI_CLK
1 EMI@ 2
A
VCCA
GND
A4
10M_0402_5%
Check Intel
1
1
2
3
RP48
1
2
3
4
1 R994
RTC_TEST#
RTC_RST#
C1012
1U_0402_6.3V6K
SOC_SERIRQ
SOC_LID_OUT#
+3VALW_EC
SPI_CS0#
SPI_MISO
SPI_MOSI
EC_LID_OUT#
EC_LID_OUT#
R4
4.7K_0402_5%
U59
NC
G2129TL1U_SC70-6
SA00007CX00
C1011
1U_0402_6.3V6K
51_0804_8P4R_5%
XDP@
XDP_H_TDI
XDP_H_TMS
XDP_H_TCK
XDP_H_TRST#
SOC_SERIRQ
ILB_RTC_X1
ILB_RTC_X2
XDP_H_PRDY#
5
6
7
8
U67
10
+RTCVCC
4
3
2
1
NL17SZ07DFT2G_SC70-5
SA00004BV00
26
AV32
BA28
AY28
AY30
+1.8VALW
GPIO_RCOMP
SIO_SPI_CS# / GPIO_S0_SC_66
SIO_SPI_MISO / GPIO_S0_SC_67
SIO_SPI_MOSI / GPIO_S0_SC_68
SIO_SPI_CLK / GPIO_S0_SC_69
+3VALW_EC
DDR_CORE_PWROK
GPIO_S5_8
GPIO_S5_9
GPIO_S5_10
+1.8VALW
RP52
R991
100K_0402_5%
1.35V
Y
A
+1.8VALW
FH8065301546401_FCBGA131170
R989 1 XDP@
U55
NC
N26
GPIO_RCOMP
1 R995
2
49.9_0402_1%
PMC_CORE_PWROK
PMC_CORE_PWROK
ACCEL_INT#
14,26
T206
T209
T210
T211
26
ACCEL_INT#
30
C13
A13
C19
XDP_OBSDATA_A0
XDP_OBSDATA_A1
XDP_OBSDATA_A2
XDP_OBSDATA_A3
R987
10K_0402_5%
K24
N24
M20
J18
M18
K18
K20
M22
M24
GPIO_S5_22
GPIO_S5_23
GPIO_S5_24
GPIO_S5_25
GPIO_S5_26
GPIO_S5_27
GPIO_S5_28
GPIO_S5_29
GPIO_S5_30
SOC_LID_OUT#
ACCEL_INT#
SOC_SMI#
+1.8VALW
GPIO_S5_0
GPIO_S5_1 / PMC_WAKE_PCIE_1
GPIO_S5_2 / PMC_WAKE_PCIE_2
GPIO_S5_3 / PMC_WAKE_PCIE_3
GPIO_S5_4
GPIO_S5_5 / PMU_SUSCLK_1
GPIO_S5_6 / PMU_SUSCLK_2
GPIO_S5_7 / PMU_SUSCLK_3
EC_SLP_S3#
NL17SZ07DFT2G_SC70-5
SA00004BV00
R1037
10K_0402_5%
R993
10K_0402_5%
B18
B16
C18
A17
C17
C16
B14
C15
+1.35VS
+3VALW
EC_SLP_S3#
SVID_ALERT#
40
SVID_DATA
40
SVID_CLK
40
SIO_PWM_0 / GPIO_S0_SC_94
SIO_PWM_1 / GPIO_S0_SC_95
2 20_0402_1%
2 16.9_0402_1%
R10
4.7K_0402_5%
PCU_SPI_CS_0#
PCU_SPI_CS_1# / GPIO_S5_21
PCU_SPI_MISO
PCU_SPI_MOSI
PCU_SPI_CLK
R1065 1
R1066 1
SVID_ALERT#
SVID_DATA
SVID_CLK
NC
R1
4.7K_0402_5%
U54
1
PMC_SLP_S3#
R1064
73.2_0402_1%
3.3V
SOC_KBRST#
2
1
+RTCVCC
B24 VR_SVID_ALERT#_SOC
A25 VR_SVID_DATA_SOC
C25
C23
C21
B22
A21
C22
SOC_SPI_MISO
SOC_SPI_MOSI
SOC_SPI_CLK
SOC_SPI_CS0#
T193
1
2
C1008
.1U_0402_16V7K
XDP_H_PRDY#
C9
A9
B8
P22
+3VALW
14
T212
XDP_H_PREQ_BUF#
26
+1.0VS
ILB_RTC_X1
ILB_RTC_X2
ILB_RTC_EXTPAD
RTC_VCC_P22
TAP_TCK
TAP_TRST#
TAP_TMS
TAP_TDI
TAP_TDO
TAP_PRDY#
TAP_PREQ#
RESERVED_AT34
ILB_RTC_X1
ILB_RTC_X2
ILB_RTC_EXTPAD
+3VALW_EC
+3VALW_EC +1.8VALW
XDP_H_TDO
EC_RSMRST#
RTC domain
14
B10 EC_RSMRST#
B7 PMC_CORE_PWROK
1
2
C1007
@ESD@
0.047U_0402_25V7K
SOC_SCI#
NL17SZ07DFT2G_SC70-5
SA00004BV00
R1034
XDP_H_TRST#
PMC_CORE_PWROK
SOC_SCI#
Y
A
0_0402_5%
T197
T198
XDP_H_TMS
XDP_H_TDI
14
D14
G12
F14
F12
G16
D18
F16
AT34
PMC_RSMRST#
PMC_CORE_PWROK
C11 RTC_TEST#
C12 RTC_RST#
+1.8VALW
NC
R1035
XDP_H_TCK
ILB_RTC_TEST#
ILB_RTC_RST#
PMC_PLT_CLK_0 / GPIO_S0_SC_96
PMC_PLT_CLK_1 / GPIO_S0_SC_97
PMC_PLT_CLK_2 / GPIO_S0_SC_98
PMC_PLT_CLK_3 / GPIO_S0_SC_99
PMC_PLT_CLK_4 / GPIO_S0_SC_100
PMC_PLT_CLK_5 / GPIO_S0_SC_101
0_0402_5%
T196
BH7
BH5
BH4
BH8
BH6
BJ9
AM9
AM10
PBTN_OUT#
PBTN_OUT#
CLK_PCIE_LAN#
CLK_PCIE_LAN
26
PMC_PLTRST# 1
2
C1006
@ESD@
.1U_0402_16V7K
PMC_PWRBTN#
CLK_PCIE_CR#
CLK_PCIE_CR
23
23
R6
4.7K_0402_5%
U63
NC
23
23
LAN
Card reader
AK4
AK6
XDP_RSTBTN#
1
2
C1005
@ESD@
.1U_0402_16V7K
CLK_PCIE_WLAN#
CLK_PCIE_WLAN
RESERVED_AD10
RESERVED_AD12
BF34
BD34
BD32
BF32
8
7
6
5
21
21
WLAN
AF9
AF7
SIO_UART2_RXD / GPIO_S0_SC_74
SIO_UART2_TXD / GPIO_S0_SC_75
SIO_UART2_RTS# / GPIO_S0_SC_76
SIO_UART2_CTS# / GPIO_S0_SC_77
1
2
3
4
AF6
AF4
ICLK_ICOMP
ICLK_RCOMP
+1.8VALW
RP47
PMC_PCIE_WAKE#
PMC_BATLOW#
GPIO_S5_14
AD10
AD12
AU34
AV34
BA34
AY34
AD14
AD13
SIO_UART1_RXD / GPIO_S0_SC_70
SIO_UART1_TXD / GPIO_S0_SC_71
SIO_UART1_RTS# / GPIO_S0_SC_72
SIO_UART1_CTS# / GPIO_S0_SC_73
RESERVED_AD9
2 4.02K_0402_1% ICLK_ICOMP
ICLK_RCOMP
2 47.5_0402_1%
R984 1
R985 1
ICLK_OSCIN
ICLK_OSCOUT
AD9
AH12
AH10
XTAL_25M_IN
XTAL_25M_OUT
+1.8VALW
USOC1E
Title
Size
C
Date:
Rev
0.1
LA-A994P
Friday, February 21, 2014
Sheet
of
43
USOC1F
G2
M3
L1
K2
K3
M2
N3
P2
L3
J3
P3
H3
B12
M16
K16
24
24
USB20_P0
USB20_N0
USB20 DB port
24
24
USB20_P1
USB20_N1
HUB
25
25
USB20_P2
USB20_N2
K12
J12
Camera
17
17
USB20_P3
USB20_N3
K10
H10
USB30
1K_0402_1%
1K_0402_1%
J14
G14
2 R1004 ICLK_USB_TERMP
2 R1005 ICLK_USB_TERMN
1
1
D10
F10
GPIO_S5_31
RESERVED_M10
RESERVED_M9
GPIO_S5_32
GPIO_S5_33
GPIO_S5_34
GPIO_S5_35
GPIO_S5_36
GPIO_S5_37
GPIO_S5_38
GPIO_S5_39
RESERVED_P6
RESERVED_P7
RESERVED_M7
USB3_REXT0
RESERVED_P10
RESERVED_P12
RESERVED_M4
RESERVED_M6
GPIO_S5_40
GPIO_S5_41
GPIO_S5_42
GPIO_S5_43
USB3_RXP0
USB3_RXN0
USB3_TXP0
USB3_TXN0
USB_DP0
USB_DN0
C20
B20
M7
M12 USB3_REXT0
P10
P12
2
R1003
1.24K_0402_1%
M4
M6
D4
E3
USB3_RX0_P
USB3_RX0_N
K6
K7
USB3_TX0_P
USB3_TX0_N
24
24
USB3 Port 0
24
24
USB_DP2
USB_DN2
USB_DP3
USB_DN3
RESERVED_H8
RESERVED_H7
ICLK_USB_TERMP
ICLK_USB_TERMN
RESERVED_H4
RESERVED_H5
H8
H7
H4
H5
+1.8VS
C
USB_OC0#
USB_OC1#
USB_OC0#
USB_OC1#
P6
P7
USB_DP1
USB_DN1
24
24
M10
M9
USB_OC_0# / GPIO_S5_19
USB_OC_1# / GPIO_S5_20
R1010 1
@
0_0402_5%
USB_RCOMP
USB_PLL_MON
D6
C7
M13
B4
B5
E2
D2
1
R1012
2 R1013 LPC_RCOMP
49.9_0402_1% 1
ILB_LPC_CLK_0 : Output
Need Check with EC
of
26,27
26,27
26,27
26,27
26,27
26
27
25MHz,
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_CLK_EC
LPC_CLK_TPM
0_0402_5% 1 EMI@
0_0402_5% 1 EMI@
2R1014
2R1015
LPC_CLK_0
LPC_CLK1
SOC_SERIRQ
A7
BF18
BH16
BJ17
BJ13
BG14
BG17
BG15
BH14
BG16
BG13
USB_RCOMPO
USB_RCOMPI
GPIO_S0_SC_55
GPIO_S0_SC_56
GPIO_S0_SC_57 / PCU_UART_TXD
GPIO_S0_SC_58
GPIO_S0_SC_59
GPIO_S0_SC_60
GPIO_S0_SC_61 / PCU_UART_RXD
USB_PLL_MON
USB_HSIC0_DATA
USB_HSIC0_STROBE
ILB_8254_SPKR / GPIO_S0_SC_54
USB_HSIC1_DATA
USB_HSIC1_STROBE
SIO_I2C0_DATA / GPIO_S0_SC_78
SIO_I2C0_CLK / GPIO_S0_SC_79
SIO_I2C1_DATA / GPIO_S0_SC_80
SIO_I2C1_CLK / GPIO_S0_SC_81
LPC_RCOMP / VGA_RCOMP
ILB_LPC_AD_0 / GPIO_S0_SC_42
ILB_LPC_AD_1 / GPIO_S0_SC_43
ILB_LPC_AD_2 / GPIO_S0_SC_44
ILB_LPC_AD_3 / GPIO_S0_SC_45
ILB_LPC_FRAME# / GPIO_S0_SC_46
ILB_LPC_CLK_0 / GPIO_S0_SC_47
ILB_LPC_CLK_1 / GPIO_S0_SC_48
ILB_LPC_CLKRUN# / GPIO_S0_SC_49
ILB_LPC_SERIRQ / GPIO_S0_SC_50
SIO_I2C2_DATA / GPIO_S0_SC_82
SIO_I2C2_CLK / GPIO_S0_SC_83
SIO_I2C3_DATA / GPIO_S0_SC_84
SIO_I2C3_CLK / GPIO_S0_SC_85
SIO_I2C4_DATA / GPIO_S0_SC_86
SIO_I2C4_CLK / GPIO_S0_SC_87
PCU_SMB_DATA
PCU_SMB_CLK
PCU_SMB_ALERT#
BG12
BH10
BG11
GPIO_S0_SC_56
DBG_UART_TXD
T203
DBG_UART_RXD
T204
@
R1011
10K_0402_5%
GPIO_S0_SC_56:
A16 Swap Override
0 = Enable
1 = Disable
Reference EDS Page 216
BH12
SOC_SPKR
SOC_SPKR
20
BH22
BG23
USB_HSIC_RCOMP
LPC_CLK_0
1
2
C1015
@RF@
10P_0402_50V8J
BD12
BC12
BD14
BC14
BF14
BD16
BC16
R1008 1
45.3_0402_1%
2 10K_0402_5% USB_OC0#
2 10K_0402_5% USB_OC1#
R1007 1
R1009 1
@
R1006
10K_0402_5%
+1.8VALW
SIO_I2C5_DATA / GPIO_S0_SC_88
SIO_I2C5_CLK / GPIO_S0_SC_89
PCU_SMB_DATA / GPIO_S0_SC_51
PCU_SMB_CLK / GPIO_S0_SC_52
PCU_SMB_ALERT# / GPIO_S0_SC_53
SIO_I2C6_DATA / GPIO_S0_SC_90
SIO_I2C6_CLK / GPIO_S0_SC_91 / SD3_WP
GPIO_S0_SC_092
GPIO_S0_SC_093
6 OF 13
BG24
BH24
BG25
BJ25
BG26
BH26
BF27
BG27
BH28
BG28
SOC_I2C0_DATA
SOC_I2C0_CLK
BJ29
BG29
NMI_DBG#_CPU
T207
T208
NMI_DBG#_CPU
BH30 GPIO_S0_SC_92
BG30 GPIO_S0_SC_93
T201
T202
26
FH8065301546401_FCBGA131170
+3VS
+1.8VS
+1.8VS
+3VS
4
3
2
1
PCU_SMB_CLK
PCU_SMB_DATA
PCU_SMB_ALERT#
CPU_THERMAL
0.1U_0402_16V4Z
RP49
5
6
7
8
4.7K_0804_8P4R_5%
2
G
CC15
1
2
Q64
MESS138W-G_SOT323-3
PCU_SMB_DATA
@ CT33
.1U_0402_16V7K
1
CC14
2
UC3
1
H_THERMDA
CPU_THERMAL
+3VS
@ RHG1
10K_0402_1%_ERTJ0EG103FA
Q65
MESS138W-G_SOT323-3
2200P_0402_50V7K
1
2 CPU_THERM#
RC96 33K_0402_5%
3
@ Q66
MESS138W-G_SOT323-3
D+
DTHERM#
SCLK
SDATA
ALERT#
GND
8
7
THERMAL_ALERT#
EC_SMB_DA2
2
RC105
1
+3VS
10K_0402_5%
5
A
ADM1032ARMZ-2REEL_MSOP8
PCU_SMB_ALERT#
Issued Date
Security Classification
2013/04/12
Deciphered Date
2014/04/12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
EC_SMB_CK2
Address:0100_1100 EMC1402-1
Address:0100_1101 EMC1402-2
2
G
1
SA00003PU00
VDD
THERMAL_ALERT#
H_THERMDC
2
G
CPU_THERMAL
PCU_SMB_CLK
3
S
EC_SMB_DA2
15,16,26
EC_SMB_CK2
DDR(15,16)
Minicard(21)
EC(24)
15,16,26
26
Title
Size
C
Date:
Rev
0.1
LA-A994P
Friday, February 21, 2014
Sheet
10
of
43
+1.35V
+SOC_VCC
USOC1G
AA27
AA29
AA30
AC27
AC29
AC30
AD27
AD29
AD30
AF27
AF29
AG27
AG29
AG30
P26
P27
U27
U29
V27
V29
V30
Y27
Y29
Y30
TP2_CORE_VCC_S0iX
T194
AA22
DRAM_VDD_S4_AD38
DRAM_VDD_S4_AF38
DRAM_VDD_S4_A48
DRAM_VDD_S4_AK38
DRAM_VDD_S4_AM38
DRAM_VDD_S4_AV41
DRAM_VDD_S4_AV42
DRAM_VDD_S4_BB46
DRAM_VDD_S4_BD49
DRAM_VDD_S4_BD52
DRAM_VDD_S4_BD53
DRAM_VDD_S4_BF44
DRAM_VDD_S4_BG51
DRAM_VDD_S4_BJ48
DRAM_VDD_S4_C51
DRAM_VDD_S4_D44
DRAM_VDD_S4_F49
DRAM_VDD_S4_F52
DRAM_VDD_S4_F53
DRAM_VDD_S4_H46
DRAM_VDD_S4_M41
DRAM_VDD_S4_M42
DRAM_VDD_S4_V38
DRAM_VDD_S4_Y38
CORE_VCC_S0iX_AD27
CORE_VCC_S0iX_AD29
CORE_VCC_S0iX_AD30
CORE_VCC_S0iX_AF27
CORE_VCC_S0iX_AF29
CORE_VCC_S0iX_AG27
CORE_VCC_S0iX_AG29
CORE_VCC_S0iX_AG30
CORE_VCC_S0iX_P26
CORE_VCC_S0iX_P27
CORE_VCC_S0iX_U27
CORE_VCC_S0iX_U29
CORE_VCC_S0iX_V27
CORE_VCC_S0iX_V29
CORE_VCC_S0iX_V30
CORE_VCC_S0iX_Y27
CORE_VCC_S0iX_Y29
CORE_VCC_S0iX_Y30
AD38
AF38
A48
AK38
AM38
AV41
AV42
BB46
BD49
BD52
BD53
BF44
BG51
BJ48
C51
D44
F49
F52
F53
H46
M41
M42
V38
Y38
DRAM_VDD_S4_CLK
RS@ 1 R1017
C1017 1
C1018 1
+SOC_VCC
R1019
100_0402_1%
R1018
100_0402_1%
JUMP_43X118
1250mA
+1.35V_SOC
DRAM_VDD_S4 DG spec
0.1uFX1
1uFX1
2.2uFX4
+1.35V_SOC
C1019 2
C1020 2
C1021 2
C1022 2
C1147 1
C1148 1
1
1
1
1
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
@2 10U_0603_6.3V6M
@2 10U_0603_6.3V6M
TP2_CORE_VCC_S0iX
+1.35VS
BB8
P28
N28
UNCORE_VNN_S3_AM22
UNCORE_VNN_S3_AK32
UNCORE_VNN_S3_AK30
UNCORE_VNN_S3_AK29
UNCORE_VNN_S3_AK27
UNCORE_VNN_S3_AK25
UNCORE_VNN_S3_AK24
UNCORE_VNN_S3_AK22
UNCORE_VNN_S3_AJ24
UNCORE_VNN_S3_AJ22
UNCORE_VNN_S3_AG24
UNCORE_VNN_S3_AG22
UNCORE_VNN_S3_AF24
UNCORE_VNN_S3_AF22
UNCORE_VNN_S3_AD22
UNCORE_VNN_S3_AC24
UNCORE_VNN_S3_AC22
UNCORE_VNN_S3_AA24
UNCORE_VNN_S3_AD24
ICLK_V1P35_S3_F2_AG18
ICLK_V1P35_S3_F1_AJ19
VGA_V1P35_S3_F1_BD1
DRAM_V1P35_S0iX_F1_AD36
UNCORE_V1P35_S0iX_F2_AG32
UNCORE_V1P35_S0iX_F3_V36
UNCORE_V1P35_S0iX_F4_U36
UNCORE_V1P35_S0iX_F5_AA25
AG18
AJ19
BD1
DRAM_V1P35_S0iX_F1 DG spec
1uFX2
VGA_V1P35_S3_F1
2
BLM15AG601SN1D_2P
L49
C1023 1
C1182 1
@
AD36
2 10U_0603_6.3V6M
2 22U_0805_6.3V6M
AG32
V36
U36
AA25
+3VALW
DRAM_V1P0_S0iX DG spec
1uFX2
UNCORE_V1P35_S0iX_F6_AF19
UNCORE_V1P35_S0iX_F1_AG19
UNCORE_VNN_SENSE
CORE_VCC_SENSE_P28 7 OF 13
CORE_VSS_SENSE_N28
C1024 1
C1025 1
C1026 1
C1027 1
C1028 1
C1029 1
C1030 1
C1031 1
C1032 1
C1033 1
AF19
AG19
VCC_GFXSENSE
VCCSENSE
VSSSENSE
420mA
AM22
AK32
AK30
AK29
AK27
AK25
AK24
AK22
AJ24
AJ22
AG24
AG22
AF24
AF22
AD22
AC24
AC22
AA24
AD24
40
40
40
JUMP_43X118
JP4 JP@
2 1U_0402_6.3V6K
2 .1U_0402_16V7K
14A +SOC_VNN
+SOC_VNN
2 0_0402_5%
FH8065301546401_FCBGA131170
CRT@
22U_0805_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
IN
OUT
GND
R1084
8.06K_0402_1%
CRT@ 4
BYP
SHDN
1
B
G916T1UF_SOT23-5
CRT@
C1179
1U_0402_6.3V6K
CRT@
R1085
100K_0402_1%
2
R1020
100_0402_1%
2
2
2
2
2
2
2
2
2
2
U68
VGA_V1P35_S3_F1
CORE_VCC_S0iX_AA27
CORE_VCC_S0iX_AA29
CORE_VCC_S0iX_AA30
CORE_VCC_S0iX_AC27
CORE_VCC_S0iX_AC29
CORE_VCC_S0iX_AC30
JP3 JP@
20mil
12A
26,29,38,39,43
VOUT
SUSP#
CRT@
1
2
R1087
36K_0402_5%
= 1.25 (1 + R1/R2).
CRT@
C1181
.1U_0402_16V7K
Issued Date
Security Classification
2013/04/12
Deciphered Date
2014/04/12
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.1
LA-A994P
Friday, February 21, 2014
Sheet
1
11
of
43
Follow CRBv1.15
USOC1H
325mA
+1.0VALW
UNCORE_V1P0_G3 1uF*4
USB3_V1P0_G3 0.01uF*1
C1034
C1035
C1036
C1037
1
1
1
1
2
2
2
2
C1039
2 0.01U_0402_16V7K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
U22
V22
C5
B6
Y19
C3
UNCORE_V1P0_G3_U22
UNCORE_V1P0_G3_V22
UNCORE_V1P0_G3_C5
UNCORE_V1P0_G3_B6
USB3_V1P0_G3_Y19
USB3_V1P0_G3_C3
2750mA
+1.0VS
DRAM_V1P0_S0iX 1uF*4
C
DDI_V1P0_S0iX 1uF*4
UNCORE_V1P0_S0iX 22uF*3
1uF*2
PCIE_SATA_V1P0_S3 1uF*1
UNCORE_V1P0_S3 1uF*1
PCIE_V1P0_S3 1uF*1
VGA_V1P0_S3 1uF*1
USB_V1P0_S3 0.1uF*1
USB3DEV_V1P0_S3 0.01uF*1
GPIO_V1P0_S3 1uF*1
SVID_V1P0_S3 1uF*1
C1043
C1044
C1046
C1047
1
1
1
1
2
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
1
1
2
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
C1056 1
C1057 1
C1059 1
C1060 1
C1061 1
2
2
2
2
2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
C1062 1
C1064 1
C1066 1
C1068 1
C1069 1
C1070 1
C1071 1
C1072 1
2
2
2
2
2
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
.1U_0402_16V7K
0.01U_0402_16V7K
1U_0402_6.3V6K
1U_0402_6.3V6K
C1048
C1049
C1050
C1052
V32
BJ6
AD35
AF35
AF36
AA36
AJ36
AK35
AK36
Y35
Y36
AK19
AK21
AJ18
AM16
AN29
AN30
V24
Y22
Y24
AF16
AF18
Y18
G1
AK18
AM18
AM21
AN21
AN18
AN19
AF21
AG21
M14
U18
U19
AN25
SVID_V1P0_S3_V32
VGA_V1P0_S3_BJ6
DRAM_V1P0_S0iX_AD35
DRAM_V1P0_S0iX_AF35
DRAM_V1P0_S0iX_AF36
DRAM_V1P0_S0iX_AA36
DRAM_V1P0_S0iX_AJ36
DRAM_V1P0_S0iX_AK35
DRAM_V1P0_S0iX_AK36
DRAM_V1P0_S0iX_Y35
DRAM_V1P0_S0iX_Y36
DDI_V1P0_S0iX_AK19
DDI_V1P0_S0iX_AK21
DDI_V1P0_S0iX_AJ18
DDI_V1P0_S0iX_AM16
VIS_V1P0_S0iX_AN29
VIS_V1P0_S0iX_AN30
VIS_V1P0_S0iX_V24
VIS_V1P0_S0iX_Y22
VIS_V1P0_S0iX_Y24
UNCORE_V1P0_S3_AF16
UNCORE_V1P0_S3_AF18
UNCORE_V1P0_S3_Y18
UNCORE_V1P0_S3_G1
PCIE_V1P0_S3_AK18
PCIE_V1P0_S3_AM18
PCIE_V1P0_S3_AM21
PCIE_V1P0_S3_AN21
PCIE_SATA_V1P0_S3_AN18
SATA_V1P0_S3_AN19
UNCORE_V1P0_S0iX_AF21
UNCORE_V1P0_S0iX_AG21
USB_V1P0_S3_M14
USB_V1P0_S3_U18
USB_V1P0_S3_U19
GPIO_V1P0_S3_AN25
CORE_V1P0_S3_AC32
CORE_V1P0_S3_Y32
CORE_V1P05_S3_AA33
CORE_V1P05_S3_AF33
CORE_V1P05_S3_AG33
CORE_V1P05_S3_AG35
CORE_V1P05_S3_U33
CORE_V1P05_S3_U35
CORE_V1P05_S3_V33
T195
TP_CORE_V1P05_S4
AF30
+1.05VS_SOC
AA33
AF33
AG33
AG35
U33
U35
V33
C1038 1
2 0.47U_0402_6.3V6K
C1040 1
C1041 1
C1042 1
2 1U_0402_6.3V6K
2 1U_0402_6.3V6K
2 1U_0402_6.3V6K
CORE_V1P05_S3 1uF*3
+1.8VALW
UNCORE_V1P8_G3_U24
PCU_V1P8_G3_V25
65mA USB_V1P8_G3_N20
PMU_V1P8_G3_U25
UNCORE_V1P8_G3_AA18
U24
V25
N20
U25
AA18
C1045 1
PMC_V1P8_G3 1uF*1
2 1U_0402_6.3V6K
+1.8VS
10mA
UNCORE_V1P8_S3_AM30
UNCORE_V1P8_S3_AN32
UNCORE_V1P8_S3_U38
AM30
AN32
U38
58mA
HDA_V1P5_S3_AM32
50mA PCU_V3P3_G3_N22
USB_V3P3_G3_N18
USB_V3P3_G3_P18
C1051 1
C1053 1
C1054 1
C1055 1
2
2
2
2
C1058 1
2 1U_0402_6.3V6K
UNCORE_V1P8_S3 1uF*4
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
+1.5VS
AM32
N22 +3VALW_SOC
1
R1022
N18
C1063 1
P18
C1065 1
C1067 1
HDA_LPE_V1P5V1P8_S3 1uF*1
+3VALW
USB_V3P3_G3 0.1uF*1
USB_ULPI_V1P8_S3 1uF*1
PCU_V3P3_G3 1uF*1
33mA
VGA_V3P3_S3_AN24
SD3_V1P8V3P3_S3_AN27
LPC_V1P8V3P3_S3_AM27
AN24 +3VS_SOC
AN27
1
R1023
AM27
1
C1073
1U_0402_6.3V6K
+1.0VALW
USB_HSIC_V1P2_G3 1uF*1
RESERVED_F1
VSS_AD16
VSS_AD18
V18
C1074 1
@
AD16
AD18
VGA_V3P3_S3 1uF*1
35mA
USB_HSIC_V1P2_G3_V18
F1
AC32
Y32
+1.05VS
R1021 RS@
0_0402_5%
1
2
1000mA
Disable HSIC
If the USB HSIC is not used, pin V18 can be connected
to either +V1P2A or +V1P0A.
2 1U_0402_6.3V6K
TP_CORE_V1P05_S4_AF30
8 OF 13
FH8065301546401_FCBGA131170
Issued Date
Security Classification
2013/04/12
Deciphered Date
2014/04/12
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.1
LA-A994P
Friday, February 21, 2014
Sheet
1
12
of
43
USOC1J
USOC1I
A11
A15
A19
A23
A27
A31
A35
A39
A43
A47
AA1
AA16
AA19
AA21
AA3
AA32
AA35
AA38
AA53
AB10
AB4
AB41
AB45
AB47
AB48
AB50
AB51
AB6
AC16
AC18
AC19
AC21
AC25
AC33
AC35
B2
A6
A52
A51
A5
A49
A3
BH53
BH52
BH2
BH1
BG53
E53
U16
AN16
VSS_A11
VSS_A15
VSS_A19
VSS_A23
VSS_A27
VSS_A31
VSS_A35
VSS_A39
VSS_A43
VSS_A47
VSS_AA1
VSS_AA16
VSS_AA19
VSS_AA21
VSS_AA3
VSS_AA32
VSS_AA35
VSS_AA38
VSS_AA53
VSS_AB10
VSS_AB4
VSS_AB41
VSS_AB45
VSS_AB47
VSS_AB48
VSS_AB50
VSS_AB51
VSS_AB6
VSS_AC16
VSS_AC18
VSS_AC19
VSS_AC21
VSS_AC25
VSS_AC33
VSS_AC35
VSS_B2
VSS_A6
VSS_A52
VSS_A51
VSS_A5
VSS_A49
VSS_A3
VSS_BH53
VSS_BH52
VSS_BH2
VSS_BH1
VSS_BG53
VSS_E53
VSS_AC36
VSS_AC38
VSS_AD19
VSS_AD21
VSS_AD25
VSS_AD32
VSS_AD33
VSS_AD47
VSS_AD7
VSS_AE1
VSS_AE11
VSS_AE12
VSS_AE14
VSS_AE3
VSS_AE4
VSS_AE40
VSS_AE42
VSS_AE43
VSS_AE45
VSS_AE46
VSS_AE48
VSS_AE50
VSS_AE51
VSS_AE53
VSS_AE6
VSS_AE8
VSS_AE9
VSS_AF10
VSS_AF12
VSS_AF25
VSS_AF32
VSS_AF47
VSS_AG16
VSS_AG25
9 OF 13VSS_AG36
VSS_B52
VSS_B53
VSS_BE1
VSS_BE53
VSS_BG1
VSS_BJ2
VSS_BJ3
VSS_BJ5
VSS_BJ49
VSS_BJ51
VSS_BJ52
VSS_C1
VSS_C53
VSS_E1
AC36
AC38
AD19
AD21
AD25
AD32
AD33
AD47
AD7
AE1
AE11
AE12
AE14
AE3
AE4
AE40
AE42
AE43
AE45
AE46
AE48
AE50
AE51
AE53
AE6
AE8
AE9
AF10
AF12
AF25
AF32
AF47
AG16
AG25
AG36
B52
B53
BE1
BE53
BG1
BJ2
BJ3
BJ5
BJ49
BJ51
BJ52
C1
C53
E1
AG38
AH4
AH41
AH45
AH7
AH9
AJ1
AJ16
AJ21
AJ25
AJ27
AJ29
AJ3
AJ30
AJ32
AJ33
AJ35
AJ38
AJ53
AK10
AK14
AK16
AK33
AK41
AK44
AM12
AM19
AM24
AM25
AM29
AM33
AM35
AM36
AM40
M28
USOC1L
USOC1K
VSS_AG38
VSS_AH47
VSS_AH4
VSS_AH48
VSS_AH41
VSS_AH50
VSS_AH45
VSS_AH51
VSS_AH7
VSS_AH6
VSS_AH9
VSS_AM44
VSS_AJ1
VSS_AM51
VSS_AJ16
VSS_AM7
VSS_AJ21
VSS_AN1
VSS_AJ25
VSS_AN11
VSS_AJ27
VSS_AN12
VSS_AJ29
VSS_AN14
VSS_AJ3
VSS_AN22
VSS_AJ30
VSS_AN3
VSS_AJ32
VSS_AN33
VSS_AJ33
VSS_AN35
VSS_AJ35
VSS_AN36
VSS_AJ38
VSS_AN38
VSS_AJ53
VSS_AN40
VSS_AK10
VSS_AN42
VSS_AK14
VSS_AN43
VSS_AK16
VSS_AN45
VSS_AK33
VSS_AN46
VSS_AK41
VSS_AN48
VSS_AK44
VSS_AN49
VSS_AM12
VSS_AN5
VSS_AM19
VSS_AN51
VSS_AM24
VSS_AN53
VSS_AM25
VSS_AN6
VSS_AM29
VSS_AN8
VSS_AM33
VSS_AN9
VSS_AM35
VSS_AP40
VSS_AM36
VSS_AT12
VSS_AM40
VSS_AT16
VSS_M28 10 OF 13 VSS_AT19
AH47
AH48
AH50
AH51
AH6
AM44
AM51
AM7
AN1
AN11
AN12
AN14
AN22
AN3
AN33
AN35
AN36
AN38
AN40
AN42
AN43
AN45
AN46
AN48
AN49
AN5
AN51
AN53
AN6
AN8
AN9
AP40
AT12
AT16
AT19
FH8065301546401_FCBGA131170
AT24
AT27
AT30
AT35
AT38
AT4
AT47
AT52
AU1
AU24
AU3
AU30
AU38
AU51
AV12
AV13
AV14
AV18
AV19
AV24
AV27
AV30
AV35
AV38
AV47
AV51
AV7
AW13
AW19
AW27
AW3
AW35
AY10
AY22
AY32
VSS_AT24
VSS_AY36
VSS_AT27
VSS_AY4
VSS_AT30
VSS_AY50
VSS_AT35
VSS_AY9
VSS_AT38
VSS_BA14
VSS_AT4
VSS_BA19
VSS_AT47
VSS_BA22
VSS_AT52
VSS_BA27
VSS_AU1
VSS_BA32
VSS_AU24
VSS_BA35
VSS_AU3
VSS_BA40
VSS_AU30
VSS_BA53
VSS_AU38
VSS_BB19
VSS_AU51
VSS_BB27
VSS_AV12
VSS_BB35
VSS_AV13
VSS_BC20
VSS_AV14
VSS_BC22
VSS_AV18
VSS_BC26
VSS_AV19
VSS_BC28
VSS_AV24
VSS_BC32
VSS_AV27
VSS_BC34
VSS_AV30
VSS_BC42
VSS_AV35
VSS_BD19
VSS_AV38
VSS_BD24
VSS_AV47
VSS_BD27
VSS_AV51
VSS_BD30
VSS_AV7
VSS_BD35
VSS_BE19
VSS_AW13
VSS_BE2
VSS_AW19
VSS_AW27
VSS_BE35
VSS_BE8
VSS_AW3
VSS_AW35
VSS_BF12
VSS_AY10
VSS_BF16
VSS_AY22
VSS_BF24
VSS_AY32 11 OF 13
VSS_BF38
AY36
AY4
AY50
AY9
BA14
BA19
BA22
BA27
BA32
BA35
BA40
BA53
BB19
BB27
BB35
BC20
BC22
BC26
BC28
BC32
BC34
BC42
BD19
BD24
BD27
BD30
BD35
BE19
BE2
BE35
BE8
BF12
BF16
BF24
BF38
BF30
BF36
BF4
BG31
BG34
BG39
BG42
BG45
BG49
BJ11
BJ15
BJ19
BJ23
BJ27
BJ31
BJ35
BJ39
BJ43
BJ47
BJ7
C14
C31
C34
C39
C42
C45
C49
D12
D16
D24
D30
D36
D38
E19
E35
USOC1M
VSS_BF30
VSS_BF36
VSS_BF4
VSS_BG31
VSS_BG34
VSS_BG39
VSS_BG42
VSS_BG45
VSS_BG49
VSS_BJ11
VSS_BJ15
VSS_BJ19
VSS_BJ23
VSS_BJ27
VSS_BJ31
VSS_BJ35
VSS_BJ39
VSS_BJ43
VSS_BJ47
VSS_BJ7
VSS_C14
VSS_C31
VSS_C34
VSS_C39
VSS_C42
VSS_C45
VSS_C49
VSS_D12
VSS_D16
VSS_D24
VSS_D30
VSS_D36
VSS_D38
VSS_E19
VSS_E35 12 OF 13
VSS_E8
VSS_F19
VSS_F2
VSS_F24
VSS_F27
VSS_F30
VSS_F35
VSS_F5
VSS_F7
VSS_G10
VSS_G20
VSS_G22
VSS_G26
VSS_G28
VSS_G32
VSS_G34
VSS_G42
VSS_H19
VSS_H27
VSS_H35
VSS_J1
VSS_J16
VSS_J19
VSS_J22
VSS_J27
VSS_J32
VSS_J35
VSS_J40
VSS_J53
VSS_K14
VSS_K22
VSS_K32
VSS_K36
VSS_K4
VSS_K50
E8
F19
F2
F24
F27
F30
F35
F5
F7
G10
G20
G22
G26
G28
G32
G34
G42
H19
H27
H35
J1
J16
J19
J22
J27
J32
J35
J40
J53
K14
K22
K32
K36
K4
K50
K9
L13
L19
L27
L35
M19
M26
M27
M34
M35
M38
M47
M51
N1
N16
N38
N51
P13
P16
P19
P20
P24
P32
P35
P38
P4
P47
P52
P9
T40
U1
U11
U12
U14
U21
FH8065301546401_FCBGA131170
FH8065301546401_FCBGA131170
VSS_K9
VSS_L13
VSS_L19
VSS_L27
VSS_L35
VSS_M19
VSS_M26
VSS_M27
VSS_M34
VSS_M35
VSS_M38
VSS_M47
VSS_M51
VSS_N1
VSS_N16
VSS_N38
VSS_N51
VSS_P13
VSS_P16
VSS_P19
VSS_P20
VSS_P24
VSS_P32
VSS_P35
VSS_P38
VSS_P4
VSS_P47
VSS_P52
VSS_P9
VSS_T40
VSS_U1
VSS_U11
VSS_U12
VSS_U14
VSS_U21 13 OF 13
VSS_U3
VSS_U30
VSS_U32
VSS_U40
VSS_U42
VSS_U43
VSS_U45
VSS_U46
VSS_U48
VSS_U49
VSS_U5
VSS_U51
VSS_U53
VSS_U6
VSS_U8
VSS_U9
VSS_V12
VSS_V16
VSS_V19
VSS_V21
VSS_V35
VSS_V40
VSS_V44
VSS_V51
VSS_V7
VSS_Y10
VSS_Y14
VSS_Y16
VSS_Y21
VSS_Y25
VSS_Y33
VSS_Y41
VSS_Y44
VSS_Y7
VSS_Y9
U3
U30
U32
U40
U42
U43
U45
U46
U48
U49
U5
U51
U53
U6
U8
U9
V12
V16
V19
V21
V35
V40
V44
V51
V7
Y10
Y14
Y16
Y21
Y25
Y33
Y41
Y44
Y7
Y9
FH8065301546401_FCBGA131170
USB_VSSA_U16
VSSA_AN16
FH8065301546401_FCBGA131170
Issued Date
Security Classification
2013/04/12
Deciphered Date
2014/04/12
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.1
LA-A994P
Friday, February 21, 2014
Sheet
1
13
of
43
+1.8VALW
XDP@
R1024
200_0402_5%
XDP_H_PREQ_BUF#
1
2
@
R1031
1K_0402_5%
1
2
@
R1025
1K_0402_5%
+1.8VS
+1.8VALW
XDP_RSTBTN#
1
2
C1075
XDP@
.1U_0402_16V7K
+1.8VALW
XDP@
R1026 1
2 51_0402_5% XDP_H_TDO
XDP-SFF-26Pin
9
XDP_H_PREQ_BUF#
26,9
EC_RSMRST#
26,9
PMC_CORE_PWROK
XDP_H_PREQ_BUF#
EC_RSMRST#
PMC_CORE_PWROK
PMC_PLTRST#
XDP_RSTBTN#
XDP_H_TDO
XDP_H_TRST#
PMC_PLTRST#
XDP_RSTBTN#
XDP_H_TRST#
1
2
C1170 ESD@
.1U_0402_16V7K
PMC_PLTRST#
1
2
C1167 ESD@
.1U_0402_16V7K
PMC_CORE_PWROK 1
2
C1176 @ESD@
0.047U_0402_25V7K
XDP_H_TDO
XDP_H_TRST#
Issued Date
Security Classification
2013/04/12
Deciphered Date
2014/04/12
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.1
LA-A994P
Friday, February 21, 2014
Sheet
1
14
of
43
+DDR_A_VREF_DQ
DDR_A_DQS#[0..7]
JDIMM1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
6
6
VDD DG spec
0.1uFX4
10uFX2
330uFX2
DDR_A_CLK0
DDR_A_CLK0#
DDR_A_MA10
DDR_A_BS0
6
6
DDR_A_WE#
DDR_A_CAS#
DDR_A_MA13
DDR_A_CS2#
DDR_A_D32
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D35
DDR_A_D40
DDR_A_D41
DDR_A_DM5
DDR_A_D42
DDR_A_D43
+0.675VS
DDR_A_D48
DDR_A_D49
C120 1
2 10U_0603_6.3V6M
C127 1
C129 1
2 1U_0402_6.3V6K
2 1U_0402_6.3V6K
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57
VTT DG spec
1uFX4
10uFX2
DDR_A_DM7
DDR_A_D58
DDR_A_D59
Layout Note:
Place near JDIMM1.203,204
+3VS
RS@
R211
RS@
R213
207
0_0402_5%
0_0402_5%
1
C128
.1U_0402_16V7K
+0.675VS
NC3
NC4
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
DDR_A_D20
DDR_A_D21
+DDR_A_VREF_CA
DDR_A_DM2
DDR_A_D22
DDR_A_D23
2
R1029
4.7K_0402_1%
2
R1030
4.7K_0402_1%
1
C1078
.1U_0402_16V7K
DDR_A_D28
DDR_A_D29
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31
DDR_A_CKE2
+1.35V
DDR_A_MA15
DDR_A_MA14
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
@
DDR_A_CLK2
DDR_A_CLK2#
CD10
10U_0603_6.3V6M
C110
C109
C108
C107
C115
C116
C119
C164
CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF-CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS5#
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS7#
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2
GND2
1
2 @ESD@
C1077
.1U_0402_16V7K
Layout Note:
Place near JDIMM1
6
6
+1.35V
DDR_A_BS1
6
DDR_A_RAS#
6
DDR_A_CS0#
DDR_A_ODT0
6
6
DDR_A_ODT2
+DDR_A_VREF_CA
DDR_A_D36
DDR_A_D37
DDR_A_DM4
DDR_A_D38
DDR_A_D39
CD22
.1U_0402_16V7K
DDR_A_MA12
DDR_A_MA9
CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
TEST
VSS27
DQ32
DQ33
VSS29
DQS4#
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS6#
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDD-SPD
SA1
VTT1
GND1
DDR_A_RST#
DDR_A_D14
DDR_A_D15
C1076
.1U_0402_16V7K
CD9
10U_0603_6.3V6M
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
205
CD21
.1U_0402_16V7K
DDR_A_CKE0
DDR_A_BS2
DDR_A_RST#
+0.675VS
DDR_A_D44
DDR_A_D45
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
2
@
2
@
CD32
1U_0402_6.3V6K
6
6
DDR_A_DM1
CD8
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
CD20
.1U_0402_16V7K
2
2
2
2
DDR_A_D12
DDR_A_D13
CD31
1U_0402_6.3V6K
1
1
1
1
2
R1027
4.7K_0402_1%
1
2
R1028
4.7K_0402_1%
CD7
10U_0603_6.3V6M
C111
C112
C113
C114
DDR_A_D26
DDR_A_D27
+DDR_A_VREF_DQ
CD19
.1U_0402_16V7K
DDR_A_DM3
+1.35V
+1.35V
CD30
1U_0402_6.3V6K
DDR_A_D24
DDR_A_D25
6
6
CD6
10U_0603_6.3V6M
Layout Note:
Place near JDIMM1
DDR_A_D18
DDR_A_D19
DDR_A_D6
DDR_A_D7
CD18
.1U_0402_16V7K
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_DM[0..7]
CD29
1U_0402_6.3V6K
DDR_A_D16
DDR_A_D17
DDR_A_MA[0..15]
CD5
10U_0603_6.3V6M
DDR_A_D10
DDR_A_D11
DDR_A_D[0..63]
DDR_A_DQS#0
DDR_A_DQS0
CD4
10U_0603_6.3V6M
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_DQS[0..7]
DDR_A_D4
DDR_A_D5
CD16
.1U_0402_16V7K
DDR_A_D8
DDR_A_D9
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
CD28
10U_0603_6.3V6M
DDR_A_D2
DDR_A_D3
VSS1
DQ4
DQ5
VSS3
DQS0#
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS3#
DQS3
VSS24
DQ30
DQ31
VSS26
CD3
10U_0603_6.3V6M
DDR_A_DM0
VREF-DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS1#
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS2#
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25
CD15
.1U_0402_16V7K
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
DDR_A_D0
DDR_A_D1
+1.35V
CD17
.1U_0402_16V7K
+1.35V
CD27
10U_0603_6.3V6M
Layout Note:
Place near JDIMM1.203,204
DDR_A_DM6
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
EC_SMB_DA2
EC_SMB_CK2
10,16,26
10,16,26
+0.675VS
Channel A
FOX_AS0A626-U4R6-7H
CONN@
Issued Date
Security Classification
2013/04/12
Deciphered Date
2014/04/12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Size
C
Date:
DDR3L DIMMA
Document Number
Rev
0.1
LA-A994P
Friday, February 21, 2014
Sheet
15
of
43
Close to Pin18
MIIC_SDA
SWR
mount LT7
2132R
Use 0 ohm
mount LT7
<CPU CTRL>
2
1
EDP_CPU_R_LANE_P0
EDP_CPU_R_LANE_N0
5
6
EDP_HPD_TS
2
1
RT8
12K_0402_1%
LVDS@
2
LVDS_CLKP
LVDS_CLKN
TXE1+
TXE1TXE0+
TXE0-
17
17
23
24
LVDS_TXP1
LVDS_TXN1
17
17
25
26
LVDS_TXP0
LVDS_TXN0
17
17
LANE0P
LANE0N
CIICSCL1
CIICSDA1
HPD
GPIO(PWM OUT)
GPIO(Panel_VCC)
GPIO(PWM IN)
GPIO(BL_EN)
LVDS
EDID
ROM
MIICSCL1
MIICDA1
DP_INT_PWM
+DP_ENVDD
INVT_PWM
TS_BKOFF#
29
28
LCD_EDID_CLK
LCD_EDID_DATA
31
30
MIICSCL0
MIICSDA0
DP_REXT
DP_GND
14
15
16
17
+3VS_RT
LCD_EDID_CLK
RT6
1 LVDS@ 2 4.7K_0402_5%
LCD_EDID_DATA
RT7
1 LVDS@ 2 4.7K_0402_5%
<CONN>
<CPU>
DP_INT_PWM
17
+DP_ENVDD
17
INVT_PWM 7
PIN15
MIIC_SCL
MIIC_SDA
2132S
3.3V
2132R
+LCD_VDD *
2132R
1.5~3.3V
2132R@
SA00007A300
RTD2132N-CGT QFN 32P
Close to Pin8
+DP_ENVDD
1 2132R@ 2
RT9
0_0805_5%
2
Close to Pin15
EDP_AUXP
CC102
EDP_AUXN
CC101
EDP_TXP0
CC98
EDP_TXN0
CC97
RT14 1
2132R
+LCDVDD
LVDS@
RT13
220P_0402_50V7K
EDP_CPU_AUX
CC102 SD028000080
eDP@ 0_0402_5%
CC101 SD028000080
eDP@ 0_0402_5%
CC98 SD028000080
eDP@ 0_0402_5%
CC97 SD028000080
eDP@ 0_0402_5%
EDP_CPU_AUX#
EDP_CPU_LANE_P0
EDP_CPU_LANE_N0
RT10
100K_0402_5%
2132R@
CT23
4.7U_0603_6.3V6K
2132R@ 1
LVDS@
2 .1U_0402_16V7K
LVDS@
2 .1U_0402_16V7K
LVDS@
2 .1U_0402_16V7K
LVDS@
2 .1U_0402_16V7K
UT1
LaRout note
EDP_HPD_TS
TL_ENVDD
2132S
Q85B
2N7002KDWH_SOT363-6
PIN16
2132S
33
GND
RT5
4.7K_0402_5%
PIN31
<CONN>
RTD2132S
AUX_P
AUX_N
RT4
4.7K_0402_5%
LVDS@
PIN30
LVDS_R_TXP2
LVDS_R_TXN2
21
22
SWR_LX
SWR_VCCK
VCCK
DP_V12
19
20
RTD2132S-VE-CG_QFN32_5X5
EDP_HPD#
8
4
RT11
100K_0402_5%
RT12
10K_0402_5%
32
1 LVDS@ 2 RT192
0_0402_5%
+1.8VS
C
9
10
EC_SMB_CK2
EC_SMB_DA2
TXE2+
TXE2-
Other
10,15,26
10,15,26
EDP_CPU_R_AUX
EDP_CPU_R_AUX#
Do not support
12
11
27
7
TXEC+
TXEC-
SWR_VDD
PVCC
DP-IN
2132S
40mil
40mil
40mil
40mil
DP_V33
LDO
13
18
RT3
4.7K_0402_5%
LVDS@
MIIC_SCL
80mil
+SWR_V12
40mil
100mil
40mil
Power
LVDS@
1 +DP_V33
LT6 2
FBMA-L11-201209-221LMA30T_0805
LVDS@
1 +SWR_VDD
2
LT5
FBMA-L11-201209-221LMA30T_0805
+SWR_LX
1
2
LT7
@
0_1206_5%
+3VS_RT
RT2
4.7K_0402_5%
UT1 2132S@
<CPU>
+3VS_RT
LVDS@
LVDS@
LVDS@
CT15
1
CT14
CT13
0.1U_0402_16V4Z
+3VS_RT
LVDS@
LVDS@
LVDS@
LVDS@
CT12
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10U_0603_6.3V6M
+SWR_V12
CT11
LVDS@
1
CT10
LVDS@
0.1U_0402_16V4Z
1
CT9
LVDS@
LVDS@
0.1U_0402_16V4Z
1
CT18
LVDS@
1
CT17
CT16
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10U_0603_6.3V6M
22U_0603_6.3V6M
+DP_V33
CT8
Close to Pin3
0.1U_0402_16V4Z
CT7
10U_0603_6.3V6M
LaRout note
ROM onlR mode R PRN 30 RR7R Rull loRR Pin 31 RR7R Rull RiRRR
EP mode
: PIN 30 4.7k pull high, Pin 31 4.7k pull low.
EEPROM
: PIN 30 4.7k pull high, Pin 31 4.7k pull high.
Default mode
Close to Pin7
+SWR_VDD
JUMP_43X79
Close to
Pin27
Close to Pin11
Close to Pin13
LaRout note
LaRout note
Close to LT5
+3VS_RT
80mil
LVDS
GPIO
@ JPHW7
80mil
+3VS
2 0_0402_5%
CT24
@
B
+3VS
1
EC_BKOFF#
BKOFF#
RT15
100K_0402_5%
UT3
EC_TS_BKOFF#
17
<LVDS Panel>
TC7SH08FUF_SSOP5
LVDS@
26
TS_BKOFF#
<EC CTRL>
<RTS2132>
0.1U_0402_16V7K
RT24 1
eDP@ 2 0_0402_5%
<CPU to Translator>
<Translator to Conn>
LVDS@
SD309000080
RP39
LCD_EDID_CLK
LCD_EDID_DATA
LVDS_R_TXP2
LVDS_R_TXN2
EDP_CPU_R_LANE_N0
5 EDP_CPU_R_LANE_P0
6
EDP_CPU_R_AUX
7
EDP_CPU_R_AUX#
8
4
3
2
1
1
2
3
4
SD309000080
LCD_CLK
LCD_DATA
LVDS_TXP2
LVDS_TXN2
LCD_CLK
17
LCD_DATA
17
LVDS_TXP2 17
LVDS_TXN2 17
RP36 eDP@
EDP_CPU_LANE_N0
EDP_CPU_LANE_P0
EDP_CPU_AUX
EDP_CPU_AUX#
5
6
7
8
0_0804_8P4R_5%
0_0804_8P4R_5%
LVDS@
4
3
2
1
SD309000080
8
7
6
5
EDP_AUX
EDP_AUX#
EDP_LANE_N0
EDP_LANE_P0
EDP_LANE_N0
EDP_LANE_P0
EDP_AUX
EDP_AUX#
CC103 1
CC104 1
CC105 1
CC106 1
2
2
2
2
LCD_CLK
eDP@ .1U_0402_16V7K LCD_DATA
eDP@ .1U_0402_16V7K LVDS_TXN2
eDP@ .1U_0402_16V7K LVDS_TXP2
eDP@ .1U_0402_16V7K
0_0804_8P4R_5%
INVT_PWM
EDP_HPD_TS
RT25 1
eDP@ 2 0_0402_5%
RT26 1
eDP@ 2 0_0402_5%
DP_INT_PWM
EDP_HPD
17
Issued Date
Security Classification
2013/3/1
Deciphered Date
2015/3/1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
LVDS Translator-RTD2132R
Size
Document Number
Rev
0.1
LA-A992P
Date:
Sheet
16
of
43
+3VALW
eDP@
UG1
CG1
eDP@
1500P_0402_50V7K
2 0_0201_5%
1
EN
SS
1 eDP@
CG2
APL3512_SOT23-5
4.7U_0603_6.3V6K
0_0805_5%
+LCDVDD
B+
eDP@
eDP@
RTS1
1K_0402_5%
eDP@ CTS2
1
2
+VCC_TOUCH
@EMI@
1 L1
@EMI@ 0_0805_5%
1 L2
W=60mils
INVPWR_B+
eDP@
RTS2
100K_0402_5%
2
CG3
0.1U_0402_16V7K
GND
OUT
IN
W=60mils
eDP@
QTS1
2N7002_SOT23
2
G
TOUCH_ON#
26
@EMI@ C117
680P_0402_50V7K
+3VS
RG1
LVDS Power
C118
68P_0402_50V8J
SM010014520 3000ma
220ohm@100mhz
DCR 0.04
0.047U_0402_16V7K
R172 1
ENVDD
2 0_0402_5%
1
0.1U_0402_16V4Z
1
eDP@
CTS1
eDP@ 2 0_0402_5%
+3VS
RG3
+DP_ENVDD
16
eDP@
QTS2
AO3413L_SOT23-3
Camera
10
USB20_N3
10
USB20_P3
R170
4
1
2 0_0402_5%
WCM-2012-900T_4P
3
SM070003Y00
4
3
USB20_N3_R
USB20_P3_R
1
L12 EMI@
D5
USB20_P3_R
USB20_N3_R
C121 2
1 220P_0402_50V7KINVTPWM
C122 2
1 220P_0402_50V7KDISPOFF#
PESD5V0U2BT_SOT23-3
R171
26
EC_INVT_PWM
R2591
2 0_0402_5%
@ESD@ SCA00000U10
INVTPWM
0_0402_5%
DP_INT_PWM
R258 1
2 0_0402_5%
CONN@
JLVDS1
R163
10K_0402_5%
D3
16
+LCDVDD
D_MIC_L_CLK
D_MIC_L_DATA
16 LVDS_TXP0
16 LVDS_TXN0
PESD5V0U2BT_SOT23-3
@ESD@ SCA00000U10
EC_TS_BKOFF#
EC_TS_BKOFF#1
R166 33_0402_5%
2
16 LVDS_TXP1
16 LVDS_TXN1
DISPOFF#
16
LCD_CLK
LCD_DATA
16 LCD_CLK
16 LCD_DATA
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
20
20
D_MIC_CLK
D_MIC_DATA
D_MIC_CLK
D_MIC_DATA
LA1 EMI@
1
1
LA2
EMI@
FBMA-L10-160808-301LMT_2P
2 D_MIC_L_CLK
2 D_MIC_L_DATA
FBMA-L10-160808-301LMT_2P
16 LVDS_CLKP
16 LVDS_CLKN
USB20_N3_R
USB20_P3_R
R167
10K_0402_5%
16 LVDS_TXP2
16 LVDS_TXN2
8
26
TS_GPIO_CPU
TS_GPIO_EC
TS_GPIO_CPU
TS_GPIO_EC
2 R260
0_0402_5%
2 R261
0_0402_5%
USB20_HUB_P1_R
USB20_HUB_N1_R
DISPOFF#
INVTPWM
TS_GPIO
TS_GPIO
INVPWR_B+
+VCC_TOUCH
Touch Screen
D6
A
USB20_HUB_P1_R
USB20_HUB_N1_R
+3VS
R173
25
USB20_HUB_P1
25
USB20_HUB_N1
2 0_0402_5%
L13 eDP@
SM070003Y00
1
2
D_MIC_L_CLK
D_MIC_L_DATA
USB20_HUB_P1_R
USB20_HUB_N1_R
16
EDP_HPD
G1
G2
G3
G4
G5
G6
41
42
43
44
45
46
STARC_107K40-000001-G2
WCM-2012-900T_4P
R174
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
2 0_0402_5%
PESD5V0U2BT_SOT23-3
@ESD@ SCA00000U10
Issued Date
Security Classification
2013/02/26
2015/07/08
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
LVDS Connector
Document Number
LA-8711P
Sheet
Rev
0.1
17
of
43
<CPU>
HDMI_TX2+
HDMI_TX2-
0.1U_0402_16V7K 1
0.1U_0402_16V7K 1
2
2
CG27
CG28
HDMI_C_TX2+
HDMI_C_TX2-
HDMI_TX1+
HDMI_TX1-
0.1U_0402_16V7K
0.1U_0402_16V7K
1
1
2
2
CG29
CG30
HDMI_C_TX1+
HDMI_C_TX1-
HDMI_TX0+
HDMI_TX0-
0.1U_0402_16V7K
0.1U_0402_16V7K
1
1
2
2
CG31
CG32
HDMI_C_TX0+
HDMI_C_TX0-
HDMI_CLK+
HDMI_CLK-
0.1U_0402_16V7K 1
0.1U_0402_16V7K 1
2
2
CG33
CG34
HDMI_C_CLK+
HDMI_C_CLK-
RG47
HDMI_CLK+
HDMI_CLK-
HDMI_HPD#
DMN66D0LDW -7_SOT363-6
QG1B
HP_DETECT
5V Level
R1072
1
R1073
1
R1074
1
R1075
1
R1076
1
R1077
1
R1078
1
DMN66D0LDW -7_SOT363-6
QG1A
D
1
RG56
CM17 @
220P_0402_50V7K
R1071
CLK
7
7
20K_0402_5%
HDMI_TX0+
HDMI_TX0-
7
7
D0
1M_0402_5%
619_0402_1%
1
2
619_0402_1%
2
619_0402_1%
2
619_0402_1%
2
619_0402_1%
2
619_0402_1%
2
619_0402_1%
2
619_0402_1%
2
HDMI_TX1+
HDMI_TX1-
D1
7
7
HDMI_TX2+
HDMI_TX2-
7
7
D2
+1.8VS
+3VS
+1.8VS
RG59 1
HDMI_R_CK+
3
C
0_0402_5%
HDMI_R_CK-
0_0402_5%
HDMI_R_D0-
HDMI_DDCCLK
HDMI_DDCCLK
1 HDMI_SCLK
Q57
MESS138W -G_SOT323-3
D
RG60 1
HDMI_C_CLK-
SM070003K00
0_0402_5%
EMI@ W CM-2012-900T_0805
1
SM070003K00 LM13
+1.8VS
HDMI_C_TX0-
RG61 1
HDMI_R_D0+
0_0402_5%
HDMI_C_TX1+
RG64 1
4
EMI@ W CM-2012-900T_0805
1
SM070003K00 LM15
HDMI_C_TX1-
RG65
HDMI_DDCDATA
HDMI_DDCDATA
1 HDMI_SDATA
Q58
MESS138W -G_SOT323-3
2
@
4
RG63 1
HDMI_C_TX0+
1
EMI@ LM14
SM070003K00 W CM-2012-900T_0805
4
+HDMI_5V_OUT
HDMI_R_D1+
0_0402_5%
1
1
+1.8VS
RG105
1
2
3
4
0_0402_5%
HDMI_R_D1-
0_0402_5%
HDMI_R_D2+
8
7
6
5
HDMI_SDATA
HDMI_SCLK
HDMI_DDCDATA
HDMI_DDCCLK
45@
ZZZ2
@
B
HDMI_C_TX2+
RG66
4
EMI@ W CM-2012-900T_0805
1
SM070003K00 LM16
HDMI_C_TX2-
RG70 1
2.2K_0804_8P4R_5%
B
HDMI Conn.
HDMI_R_D2-
0_0402_5%
W=40mils
FG1
+HDMI_5V_OUT
SC300002800
HDMI_SDATA
HDMI_SCLK
109 HP_DETECT
9 8 HDMI_SDATA
7 7 HDMI_SCLK
5 5
66
HDMI_R_CK-
1
CM26
3 3
IN
GND
AP2330W-7_SC59-3
CG46
0.1U_0402_16V7K 2
IP4292CZ10-TB
HDMI_R_CK+
HDMI_R_D0-
10P_0402_50V8J
2 2
4 4
10P_0402_50V8J
HDMI_SDATA
HDMI_SCLK
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
+HDMI_5V_OUT
JHDMI1
HP_DETECT
@ESD@ DG1
HP_DETECT
1 1
+5VS
RO0000003HM
OUT
HDMI Logo
CM27
HDMI_R_D0+
HDMI_R_D1HDMI_R_D1+
HDMI_R_D2-
HDMI_R_D2+
HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CKGND
CK_shield GND
CK+
GND
D0GND
D0_shield
D0+
D1D1_shield
D1+
D2D2_shield
D2+
20
21
22
23
CONCR_099AKAC19NBLCNF
CONN@
Security Classification
2011/06/29
Issued Date
Deciphered Date
2011/06/29
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Document Number
Rev
0.1
LA-A992P
Date:
Sheet
1
18
of
43
D43
CRT_HSYNC_2
I/O1
I/O2
CRT_VSYNC_2
REF1 REF2
CRT_DATA
I/O4
+HDMI_5V_OUT
I/O3
CRT_CLK
AZC099-04S_SOT23
@ESD@
1
D44
DAC_C_RED
I/O1
2
DAC_C_GRN
REF1 REF2
I/O2
+HDMI_5V_OUT
I/O4
DAC_C_BLU
I/O3
AZC099-04S_SOT23
@ESD@
+HDMI_5V_OUT
CRT@
U4103
1
OE
Vcc
JCRT1
CRT_HSYNC_2
DAC_C_BLU
+HDMI_5V_OUT
CRT_VSYNC_2
+HDMI_5V_OUT
W=40mils
1
0.1U_0402_16V4Z
C4132
CRT_CLK
CRT_HSYNC
IN A
GND OUT Y
CRT_HSYNC_1
2 33_0603_5% CRT_HSYNC_2
1
R4123
CRT@
M74VHC1GT125DF2G_SC70-5
+HDMI_5V_OUT
CRT@
U4104
1
G
G
16
17
7
T213
CRT_VSYNC
CRT_VSYNC
C-H_13-12201560CP
CONN@
DC060006E00
OE
Vcc
IN A
GND OUT Y
CRT_VSYNC_1
2 33_0603_5% CRT_VSYNC_2
1
R4128
CRT@
M74VHC1GT125DF2G_SC70-5
+HDMI_5V_OUT
+3VS
2
CRT_B
CRT_G
CRT_DDC_CLK
CRT@
4
CRT_DDC_CLK
EMICRT@
2
CRT@
1
CRT@
3
CRT_DATA
QC1A
2N7002KDWH_SOT363-6
CRT_CLK
QC1B
2N7002KDWH_SOT363-6
CT6
CT5
CRT_R
CRT_G
CRT_B
CRT_DDC_DATA
DAC_C_GRN
6.8P_0402_50V8C
6.8P_0402_50V8C
CRT_DDC_DATA
DAC_C_BLU
CT4
6.8P_0402_50V8C
CT3
CT2
6.8P_0402_50V8C
CT1
6.8P_0402_50V8C
6.8P_0402_50V8C
DAC_C_RED
CRT@
EMICRT@
2
LT1 1
SM01000HI00
FBMA-L10-160808-600LMT_2P
EMICRT@
2
LT2 1
SM01000HI00
FBMA-L10-160808-600LMT_2P
EMICRT@
2
LT3 1
SM01000HI00
FBMA-L10-160808-600LMT_2P
4.7K_0402_5%
2
CRT_R
4.7K_0402_5%
1
7
CRT@
R234
2.2K_0402_5%
R4125
CRT@
R233
2.2K_0402_5%
R4124
+3VS
CRT_DATA
DAC_C_GRN
CRT_HSYNC
T215
DAC_C_RED
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
EMICRT@ EMICRT@
4
CRT@
RPC13
1
2
3
4
8
7
6
5
Issued Date
150_0804_8P4R_1%
Security Classification
2013/02/26
Deciphered Date
2015/07/08
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
CRT Connector
Document Number
Rev
0.1
LA-A994P
Friday, February 21, 2014
Sheet
E
19
of
43
+MIC2_VREFO
31
30
29
23
24
16
PC_BEEP
2 10U_0603_6.3V6M
ALDO_CAP
2 2.2U_0402_6.3V6M
ACPVEE
CPVDD
CBN
CBP
34
36
35
37
2 2.2U_0402_6.3V6M
2
3
D_MIC_DATA
D_MIC_CLK
PLUG_IN#
RA10
2 39.2K_0402_1% SENSEA
RA4
RA5
SDATA_OUT
SDATA_IN
LDO3-CAP
BCLK
CPVEE
CPVDD
CBN
CBP
LINE1_L
LINE1_R
SPDIFO/GPIO2
GPIO0/DMIC_DATA
GPIO1/DMIC_CLK
JDREF
VREF
LDO1_CAP
LDO2_CAP
SENSE_A
SENSE_B
AVSS1
AVSS2
DVSS
Thermal Pad
PDB
5
8
Headphone
SDATA_IN
RA7
2 22_0402_5%
6
22
21
48
15
28
27
39
HDA_SDOUT_AUDIO
HDA_SDIN0
8
HDA_BITCLK_AUDIO
QA1
1
JDREF
AVREF
2
RA9
CA16 2
CA18 1
CA19 1
1
2
FBMA-L11160808601LMA10T_2P
600ohms @100MHz 1A
P/N: SM01000BU00
1
2
LA5
SUPPRE_ KC FBMA-10-100505-101T 0402
PCB Footprint = R_0402
GNDA
+5VS
+5VS_PVDD
LA6
25
38
GNDA
4
49
AVREF CA24
GNDA
1 20K_0402_1%
1 .1U_0402_16V7K
2 10U_0603_6.3V6M
2 10U_0603_6.3V6M
+1.5VS
+1.5VS_AVDD
MIC_JD
ALC3227-CG_MQFN48P_6X6
2 100_0402_1% HP_OUTR
2 100_0402_1% HP_OUTL
1
1
2 2.2U_0402_6.3V6M
1
2
FBMA-L11-201209601LMA20T_2P
MUTE_LED
600ohms @100MHz 2A
P/N: SM01000EE00
@
DA8
YSLC05CH_SOT23-3
SCA00002900
MUTE_LED_CTR
GNDA
GNDA
2 2
HPOUT_R
HPOUT_L
+5VS
LA4
CA23
10U_0603_6.3V6M
10K_0402_5%
RA12
PD#
SM010008A00
EMI@ RA131
EMI@ RA141
EMI@ RA151
EMI@ RA161
SM010008A00
2
2
2
2
FBMA-L11160808601LMA10T_2P
FBMA-L11160808601LMA10T_2P
FBMA-L11160808601LMA10T_2P
FBMA-L11160808601LMA10T_2P
wide 40 MIL
CONN@
1
GNDA
HP_OUTR_R
DA6
YSLC05CH_SOT23-3
SCA00000U10
@ESD@
+MIC2_VREFO
Jack detect
Combo Mic = High
Normal HP = Low
HP_OUTL_R
DA4
YSLC05CH_SOT23-3
SCA00002900
ESD@
PC_BEEP
1
2
CA34
.1U_0402_16V7K
RA20
10K_0402_5%
RA17
2.2K_0402_5%
MIC_JD
CA32
10U_0603_6.3V6M
1
2
CA33
.1U_0402_16V7K
SOC_SPKR
10
RA19
47K_0402_5%
1
2
SB Beep
1
2 PC_BEEP_R
CA31
.1U_0402_16V7K
1
EC_BEEP#
5
6
@ESD@ DA2
SCA00002900
L03ESDL5V0CC3-2_SOT23-3
26
EC Beep
B
1
2
3 GND
4 GND
3
@ESD@ DA1
SCA00002900
L03ESDL5V0CC3-2_SOT23-3
PC Beep
SPK_L+_CONN
SPK_R+_CONN
1
2
3
4
E-T_3703-Q04N-11R
SPK_L-_CONN
SPK_R-_CONN
JSPK1
SPK_R-_CONN
SPK_R+_CONN
SPK_L-_CONN
SPK_L+_CONN
@EMI@ C124
220P_0402_50V7K
SPK_RSPK_R+
SPK_LSPK_L+
220P_0402_50V7K
2
1
DA3
CH751H-40PT_SOD323-2
EC_MUTE#
Internal
SPK
<DB>Relace RA13/RA14/RA15/RA16 close to UA1
10K_0402_5%
RA11
@EMI@ C123
220P_0402_50V7K
MMBT3904WH_SOT323-3
SB000008E10
26
Q4B
2N7002KDW_SOT363-6
27
33
32
+5VS_AVDD
RESET#
1K_0402_5%
RA26
HDA_RST_AUDIO#
HPOUT_R
HPOUT_L
CA22
10U_0603_6.3V6M
RA25
2.2K_0402_5%
SYNC
Internal Speaker
CA21
.1U_0402_16V7K
47
+DVDD
SPK_L+
SPK_L-
PCBEEP
CA20
.1U_0402_16V7K
+1.5VS
13
14
42
43
C126
17
17
SPK_OUT_L+
SPK_OUT_L-
SPK_R+
SPK_R-
@EMI@
CA15
MONO_OUT
45
44
CA13
4.7U_0603_6.3V6K
CA11
CA14
SPK_OUT_R+
SPK_OUT_R-
RA2
0_0603_5%
+5VS_PVDD
CA12
.1U_0402_16V7K
CA17
4.7U_0603_6.3V6K
1
2
@
RA6
4.7K_0402_5%
11
LINE2_R
LINE2_L
+5VS_AVDD
+1.5VS_AVDD
41
46
CA10
4.7U_0603_6.3V6K
+3VS
10
HDA_RST_AUDIO#
PVDD1
PVDD2
MIC1_VREFO_L
MIC1_VREFO_R
MIC2_VREFO
26
40
CA9
.1U_0402_16V7K
HDA_SYNC_AUDIO
HDA_RST_AUDIO#
CPVDD
8
8
AVDD1
AVDD2
@EMI@ C125
220P_0402_50V7K
+3VS
12
MIC2_R
MIC2_L
MUTE_LED_CTR
18
17
2 4.7U_0402_6.3V6M INT_MICR_C
2 4.7U_0402_6.3V6M INT_MICL_C
1
1
1
2
LA3
SUPPRE_ KC FBMA-10-100505-101T 0402
PCB Footprint = R_0402
CA1
CA4
+1.5VS
CA8
10U_0603_6.3V6M
2 1K_0402_5%
CA7
.1U_0402_16V7K
+DVDD
+DVDD_IO
CA5
.1U_0402_16V7K
RA3
1
9
CA6
10U_0603_6.3V6M
INT_MIC
DVDD
DVDD_IO
+DVDD_IO
+DVDD
+3VS
MIC1_R
MIC1_L
20
19
UA1
INT_MIC
1
2
RA18
22K_0402_5%
GNDA
2 0_0402_5%
INT_MIC
RA21 1
EMI@
2 BLM15AG601SN1D_2P
SM01000II00
INT_MIC_R
3
6
HP_OUTL
1
2
CA40
@EMI@
.1U_0402_16V7K
RA23 1
EMI@
2 BLM15AG601SN1D_2P
SM01000II00
EMI@
2 BLM15AG601SN1D_2P
SM01000II00
HP_OUTL_R
1
2
4
HP_OUTR_R
PLUG_IN#
@EMI@
@EMI@
Issued Date
1
A
SINGA_2SJ-E960-001F
GNDA
2013/01/04
Deciphered Date
2015/01/04
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
GNDA
5
CONN@
Security Classification
1
2
CA30
EMI@
.1U_0402_16V7K
GNDA
1
2
CA29
EMI@
.1U_0402_16V7K
@EMI@
1
2
CA39
@EMI@
.1U_0402_16V7K
CA37
10P_0402_50V8J
RA24
22K_0402_5%
CA36
10P_0402_50V8J
1
2
CA38
@EMI@
.1U_0402_16V7K
CA35
100P_0402_50V8J
RA22 1
HP_OUTR
Title
AUDIO ALC259-VC2-CG
Size
C
Date:
Document Number
Rev
0.1
LA-A992P
Friday, February 21, 2014
Sheet
20
of
43
+3VS_WLAN
26
0_0201_5%
2
RN13
WLAN_WAKE#
BT_ON_EC
WLAN_CLKREQ#
CLK_PCIE_WLAN#
CLK_PCIE_WLAN
8 PCIE_PRX_DTX_N1
8 PCIE_PRX_DTX_P1
8
8
PCIE_PTX_C_DRX_N1
PCIE_PTX_C_DRX_P1
E51TXD_P80DATA
E51RXD_P80CLK
26 E51TXD_P80DATA
26 E51RXD_P80CLK
+3VS_WLAN
+1.5VS_WLAN
RN3
10K_0402_5%
JMINI1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
GND1
GND2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
WL_OFF#
BT_ON_EC
E51RXD_P80CLK
1 RC160 2
1K_0402_1%
25
25
C
MINI1_LED#
54
26
RN7
4.7K_0402_5%
BELLW_80053-1021
CONN@
BT_ON_EC
23,26,27,9
26
WL_OFF# 26
PLT_RST_BUF#
+3VS_WLAN
USB20_HUB_N3
USB20_HUB_P3
53
R216
100K_0402_1%
+3VS_WLAN
+3VS_WLAN
+1.5VS
+1.5VS_WLAN
RN1
1
@
0_0603_5%
+3VS_WLAN_R
@CN1
@ CN1
4.7U_0603_6.3V6K
+3VS_WLAN
0_0603_5%
1@
CN2
2
4.7U_0603_6.3V6K
CN3
0.1U_0402_16V7K
R271
@
Issued Date
Security Classification
2013/02/26
Deciphered Date
2015/07/08
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
WLAN
Document Number
Rev
0.1
LA-A992P
Friday, February 21, 2014
Sheet
1
21
of
43
JHDD1
+5VS_HDD1
8
8
0_0603_5%
R201 1
+5VS_HDD1
SATA_PTX_DRX_P0
SATA_PTX_DRX_N0
8
8
C150
0.1U_0402_16V7K
C149
10U_0603_6.3V6M
+5VS
D
SATA_PRX_DTX_N0
SATA_PRX_DTX_P0
C155 1
C156 1
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
SATA_PTX_C_DRX_P0
SATA_PTX_C_DRX_N0
C153 1
C154 1
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
SATA_PRX_C_DTX_N0
SATA_PRX_C_DTX_P0
1
2
3
4
5
6
7
GND
A+
AGND
BB+
GND
RS11 1
GND
GND
23
24
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
JHDD_P10
2 0_0402_5%
+5VS_HDD1
VCC3.3
VCC3.3
VCC3.3
GND
GND
GND
VCC5
VCC5
VCC5
GND
RESERVED
GND
VCC12
VCC12
VCC12
SANTA_193202-1
CONN@
+5VALW
2
Q22
1
2
26
WL_PWREN_EC 5
WL_PWREN_EC
6
7
+3VALW
ON1
VBIAS
CT1
GND
ON2
CT2
VIN2
VIN2
VOUT2
VOUT2
2 100P_0402_50V8J
C558 2
1 100P_0402_50V8J
11
10
9
8
+3VS_WLAN_R
15
TPS22966DPUR_SON14_2X3-D
2
B
C571
10U_0603_6.3V6M
GPAD
C555 1
+5VS_ODD
JODD1
8
8
SATA_PTX_DRX_P1
SATA_PTX_DRX_N1
8 SATA_PRX_DTX_N1
8 SATA_PRX_DTX_P1
CS11
CS14
2
2
1 0.01U_0402_16V7K
1 0.01U_0402_16V7K
SATA_PTX_C_DRX_P1
SATA_PTX_C_DRX_N1
CS15
CS18
2
2
1 0.01U_0402_16V7K
1 0.01U_0402_16V7K
SATA_PRX_C_DTX_N1
SATA_PRX_C_DTX_P1
1
2
3
4
5
6
7
8
9
10
11
12
13
ODD_PLUG#
ODD_DA#_M
+3VS
+3VS
2
5
NL17SZ07DFT2G_SC70-5
SA00004BV00
1
2
DP
+5V
+5V
MD
GND
GND
GND1
GND2
14
15
CS17
0.1U_0402_25V6K
ESD@
CONN@
ODD_DA#_M
ODD_DA#
NC
GND
RX+
RXGND
TXTX+
GND
OCTEK_SLS-13HCAB
R954
22K_0402_5%
ODD_DA# 4
U70
8
CS12
10U_0805_10V6K
12
CS13
0.1U_0402_25V6K
ODD_PWR
VOUT1
VOUT1
CS16
1000P_0402_50V7K
ODD_PWR
VIN1
VIN1
14
13
+5VS_ODD
CC73
22U_0805_6.3V6M
C576
10U_0603_6.3V6M
Issued Date
Security Classification
2013/02/26
Deciphered Date
2015/07/08
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
ODD/SATA Conn
Document Number
Rev
0.1
LA-A992P
Friday, February 21, 2014
Sheet
1
22
of
43
LDO mode
JHW1
@ CL29
0.1U_0402_16V7K
8
8
RL6
@
LAN_CLKREQ# 2
PLT_RST_BUF#
8 LAN_CLKREQ#
PLT_RST_BUF#
LAN_CLKREQ#_R
1 0_0201_5%
CLK_PCIE_LAN
CLK_PCIE_LAN#
CLK_PCIE_LAN
CLK_PCIE_LAN#
PCIE_PTX_C_DRX_P3
PCIE_PTX_C_DRX_N3
PCIE_PRX_DTX_P3
CR11 1
PCIE_PRX_DTX_N3
CR13 1
PCIE_PTX_C_DRX_P3
PCIE_PTX_C_DRX_N3
8 PCIE_PRX_DTX_P3
8 PCIE_PRX_DTX_N3
2 0.1U_0402_10V7K
2 0.1U_0402_10V7K
PCIE_PRX_C_DTX_P3
PCIE_PRX_C_DTX_N3
TCT4
TD4+
TD4-
MCT4
MX4+
MX4-
RJ45_TX2RJ45_TX2+
18
17
16
RJ45_RX1RJ45_RX1+
15
14
13
RJ45_TX0RJ45_TX0+
MCT3
MX3+
MX3-
21
20
19
8
7
6
5
2
LANKO_LG-2446S-1
SP050006B10
(SP050003P00) 10/100
(SP050006800) Giga
TSL1
8166@
1
@EMI@
CL4
0.1U_0402_16V7K
AVDD33
AVDD33
RTL8111G
CLKREQB
PERSTB
LED0
LED1/GPO
LED2(LED1)
HSIP
HSIN
HSOP
HSON
31
VDDREG(VDD33)
REGOUT
LANWAKEB
ISOLATEB
REFCLK_P
REFCLK_N
13
14
17
18
1
RL5
+3VS
CKXTAL1
CKXTAL2
RSET
GND
XTLI
+LAN_VDD_3V3
+LAN_VDD_3V3
+LAN_VDD_3V3
11
32
23
24
+VDDREG=40mil
+VDDREG
+LAN_REGOUT
21
20
LANWAKEB
EC_LAN_ISOLATEB#
27
26
25
LED0
LED1/GPO
LED2
28
29
XTLI
XTLO
RL10
@
XTLO
1
RL7
2
1M_0402_5%
RL15
10K_0402_5%
0_0603_5%
EC_PME#
26
CL25
TH2
TH1
TH3
YL1
CL24
33
25MHZ_20PF_FSX3M-25.M20FDO
SJ10000E500
SA00005YT00
UL1
8166@
SCA00000U10
SANTA_130456-291
RJ45_TX2-
PR3-
PR2+
RJ45_TX0+
LANGND
PR3+
RJ45_TX0-
10
9
PR2-
RJ45_RX1+
EMI@
CL3
120P_0402_50V8
GND
GND
PR4+
RJ45_TX2+
JLAN1 CONN@
PR4-
RJ45_RX1-
CL2
SE167100J80
10P_1808_3KV
LANGND
RJ45_TX3+
SA000063500
75_0804_8P4R_1%
SD300002E80
YSLC05CH_SOT23-3
@
CL1
0.01U_0402_16V7K
EC_LAN_ISOLATEB#
2
1K_0402_5%
+LAN_REGOUT=60mil
3
8
30
22
RJ45_TX3-
ESD@
DL1
AVDD10
AVDD10
AVDD10
DVDD10
8166
TCT3
TD3+
TD3-
12
19
RP5
1
2
3
4
10
11
12
MCT2
MX2+
MX2-
RJ45_TX3RJ45_TX3+
LAN_MDIN0
LAN_MDIP0
TCT2
TD2+
TD2-
24
23
22
7
8
9
RL11
2.49K_0402_1%
8161@
MCT1
MX1+
MX1-
15K_0402_5%
MDIP0
MDIN0
MDIP1
MDIN1
MDIP2
MDIN2
MDIP3
MDIN3
SP050005L00 Footprint
TCT1
TD1+
TD1-
1
2
4
5
6
7
9
10
15
16
RSET
LAN_MDIN1
LAN_MDIP1
CL27
@8166@
10P_0402_25V8J
9
9
4
5
6
1
CL26
8166@
10P_0402_25V8J
21,26,27,9
LAN_MDIN2
LAN_MDIP2
RL8
+LAN_VDD_1V0
UL1 8161@
LAN_MDIP0
LAN_MDIN0
LAN_MDIP1
LAN_MDIN1
LAN_MDIP2
LAN_MDIN2
LAN_MDIP3
LAN_MDIN3
1
2
3
1
CL15
@8161@
+LAN_VDD_3V3=40mil
+V_DAC
LAN_MDIN3
LAN_MDIP3
8151/8166 Co-Lay
TSL1
1
CL14
8161@
CL13
CL10
CL9
CL16
0.1U_0402_16V7K
@
CL5
4.7U_0603_6.3V6K
@
CL19
0.1U_0402_16V7K
0.1U_0402_16V7K
4.7U_0603_6.3V6K
@8161@
CL20
4.7U_0603_6.3V6K
+LAN_VDD_3V3
CL12
@
CL11
0.1U_0402_16V7K
CL8
0.1U_0402_16V7K
1U_0402_6.3V6K
110K_0402_5% LAN_PWR_EN_R
1U_0402_6.3V6K
RL29 2
LAN_PWR_EN
1
2
2.2UH +-5% NLC252018T-2R2J-N
CL21
26
0.1U_0402_16V7K
+LAN_REGOUT
APL3512_SOT23-5
1500P_0402_50V7K
+LAN_VDD_1V0
@ LL2
@ CL28
D
SMT
2 0_0603_5%
0.1U_0402_16V7K
EN
SS
20_0201_5% 1
SMT
CL8
GND
RL35 1
LL1 1
OSC
OUT
IN
+LAN_VDD_3V3
LL2
GND
SMT
0.1U_0402_16V7K
SMT
@ UG5
Switcing mode
LL1
CL21
OSC
JUMP_43X79
+3VALW
GND
0.1U_0402_16V7K
4.7U_0603_6.3V6K
CL23
@
1
0.1U_0402_16V7K
PR1-
PR1+
SP050003P00
+3VS_CR
0_0603_5%
short@
1
CR9
4.7U_0402_6.3V6M
+3VS_CR
RTS5239
CR10
2 0.1U_0402_16V7K
Close to Chip
8
8
PCIE_PTX_C_DRX_P2
PCIE_PTX_C_DRX_N2
9 CLK_PCIE_CR
9 CLK_PCIE_CR#
8 PCIE_PRX_DTX_P2
8 PCIE_PRX_DTX_N2
PCIE_PTX_C_DRX_P2
PCIE_PTX_C_DRX_N2
CLK_PCIE_CR
CLK_PCIE_CR#
CL17 1
CL18 1
CR_CLKREQ#
24
23
22
21
19
SD_CD#
+3VS_CR
10K_0402_5%
1
6.2K_0402_1%
RR8
2 RR9
CLKREQ#
PERST#
MS_INS#
SD_CD#
GPIO
SP1
SP2
SP3
SP4
SP5
SP6
SP7
DV33_18
DV12_S
3V3_IN
AV12
CARD_3V3
15
11
SD_D1
SD_D0
SD_CLK
SD_CMD
SD_D3
SD_D2
SD_WP
RR2 1
@
RR4 1
@
RR5 1 EMI@
RR3 1
@
RR6 1
@
RR7 1
@
2
2
2
2
2
2
0_0402_5%
0_0402_5%
33_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
1
CR14
+DVDD12
SD_D1_R 208MHz
SD_D0_R
@ CR12
SD_CLK_R
1
2
SD_CMD_R
SD_D3_R
6.8P_0402_50V8C
SD_D2_R
2
1U_0402_6.3V4Z
Close to Chip
9
7
10
RREF
GND
SD_CMD_R
Close to Conn
CR7
+3VS_CR
+AVDD12
CR8
3
+CR_VDD_3V3
SD_CLK_R
5
6
+CR_VDD_3V3
RREF
CONN@
JREAD1
SD_D3_R
+CR_VDD_3V3
0.1U_0402_16V7K
CR_CLKREQ#
PLT_RST_BUF#
HSIP
HSIN
REFCLKP
REFCLKN
HSOP
HSON
12
13
14
16
17
18
20
4.7U_0603_6.3V6M
2 0.1U_0402_16V7K PCIE_PRX_C_DTX_P2
PCIE_PRX_C_DTX_N2
2 0.1U_0402_16V7K
UR1
1
2
3
4
5
6
RR1
+3VS
SD_D0_R
SD_D1_R
SD_D2_R
SD_CD#
10
SD_WP
11
25
RTS5239-GR_QFN24_4X4
DAT3
CMD
VSS1
VDD
CLK
VSS2
DAT0
DAT1
DAT2
CD
G1
WP
G2
12
13
TAITW_PSDAT0-09GLBS1ZZ4H1
+DVDD12
CR4
CR5
4.7U_0402_6.3V6M
CR6
@
0.1U_0402_16V7K
CR3
0.1U_0402_16V7K
+3VS_CR
4.7U_0603_6.3V6M
CR2
Issued Date
Security Classification
2013/02/26
Deciphered Date
2015/07/08
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Close to Chip
+AVDD12
+AVDD12
0.1U_0402_16V7K
4.7U_0603_6.3V6M
CR1
+DVDD12
Title
LAN 8111G
Size
Document Number
Rev
0.1
LA-A992P
Date:
Sheet
23
of
43
0_0402_5%
2
USB3TXDP0_C_R
WCM-2012-900T_4P
4
3
SM070003K00
4
3
1
1
10
10
1 CS2 USB3_TX0_C_N
2
USB3_TX0_N
0.1U_0402_16V7K
USB3_TX0_N
RS3
1
USB3_RX0_P
0_0402_5%
2
WCM-2012-900T_4P
3
SM070003K00
4
3
1
LM1
1
RS2
2
0_0402_5%
<EC>
10
USB3_RX0_N
10
USB20_P0
2
0_0402_5%
RS7
1
0_0402_5%
2
26
USB_ON#
USB_ON#
USB3RXDN0_C
GND VOUT
VIN VOUT
VIN VOUT
FLG
EN
8
7
6
5
G547I2P81U_MSOP8
@
1
2 RS4
0_0402_5%
RS5 1
0_0402_5%
2 USB_OC0#
USB_OC0#
10
1
USB20_P0_C
USB20_P0_C
3
YSLC05CH_SOT23-3
LM3
1
SM070003Y00
1
2
USB2.0/USB3.0 port 1
+USB_VCCA
WCM-2012-900T_4P
1
2
RS8 @ 0_0402_5%
USB20_N0
1
CS5
@ESD@
DM1 SCA00000U10
2 USB20_N0_C
EMI@
10
CS4
CS3
0.1U_0402_16V7K
EMI@
1
LM2
1
RS6
1
2
3
4
USB3TXDN0_C_R
USB3RXDP0_C
W=100mils
US1
W=100mils
+USB_VCCA
+5VALW
EMI@
CS6
47U_0805_6.3V6M
RS1
1
1 CS1 USB3_TX0_C_P
2
USB3_TX0_P
0.1U_0402_16V7K
USB3_TX0_P
0.1U_0402_16V7K
10
1000P_0402_50V7K
DM2
ESD@
USB3RXDN0_C
1 1
USB20_N0_C
SC300002800
109 USB3RXDN0_C
JUSB1
USB3TXDP0_C_R
USB3RXDP0_C
2 2
9 8 USB3RXDP0_C
USB3TXDN0_C_R
4 4
7 7 USB3TXDN0_C_R
USB3TXDP0_C_R
5 5
6 6 USB3TXDP0_C_R
9
1
8
3
7
2
6
4
5
USB3TXDN0_C_R
USB20_P0_C
USB20_N0_C
USB3RXDP0_C
USB3RXDN0_C
3 3
8
SSTX+
VBUS
SSTXD+
GND
DSSRX+
GND
SSRX-
GND
GND
GND
GND
10
11
12
13
ACON_TARA4-9K1311
CONN@
IP4292CZ10-TB
USB2.0 port x 2
25
RS13
1
@
USB20_HUB_N2
+USB_VCCB
+5VALW
0_0402_5%
2
LM4
1
SM070003Y00
1
2
USB20_N2_C
EMI@
W=100mils
W=100mils
US2
1
2
3
4
GND VOUT
VIN VOUT
VIN VOUT
FLG
EN
8
7
6
5
25
USB20_HUB_P2
10
USB20_N1
G547I2P81U_MSOP8
CS10
0.1U_0402_16V7K
1
2
@RS10
@ RS10
0_0402_5%
RS9 1
0_0402_5%
USB_OC1#
USB20_P2_C
RS15
1
@
USB20_N1_C
0_0402_5%
2
LM5
1
SM070003Y00
1
2
USB20_P2_C
USB20_N2_C
USB20_P1_C
USB20_N1_C
USB_OC1#
10
10
WCM-2012-900T_4P
1
2
@
RS16
0_0402_5%
USB20_P1
2013/02/26
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
E-T_6916K-Q12N-00L
14
12
11 12 G2 13
10 11 G1
9 10
8 9
7 8
6 7
5 6
4 5
3 4
2 3
1 2
1
JUSB2
CONN@
USB20_P1_C
Security Classification
Issued Date
+USB_VCCB
WCM-2012-900T_4P
1
2
@
RS14
0_0402_5%
EMI@
USB_ON#
Rev
0.1
LA-A992P
Friday, February 21, 2014
Sheet
E
24
of
43
+3VS_USBHUB
+5VS_USBHUB
R SRort
500mA
1
1
CU1
10U_0805_10V6M
HUB_OVCJ
1
2
3
4
5
6
21
22
23
24
XTAL_HUB_12M_OUT
XTAL_HUB_12M_IN
1
CU7
2 0.01U_0402_16V7K
C
VSS
VD33F
VDD5
UU1
RU8
10K_0402_5%
2 0_0603_5%
+5VALW
LaRout note
CURR CU5 close to UU1 Rin19
25
20
19
+3VS_USBHUB
OVCJ
TESTJ
XOUT
XIN
DM4
DP4
DRV
LED1
LED2
PWRJ
DP1
DM1
DP2
DM2
DP3
DM3
BUSJ
VBUSM
XRSTJ
DPU
DMU
REXT
FE1.1S-BQFN24B_WQFN24_4X4
12
11
10
9
8
7
18
17
16
15
14
13
100K_0402_5% 1
+VBUSM
100K_0402_5% 1
2 RU1
+3VS_USBHUB
2 RU2
+3VS_USBHUB
17
17
24
24
21
21
ToucR Screen
<USB20 Rort2>
<WLAN>
C
USB20_P2
USB20_N2
RU3
2.7K_0402_1%
XTAL_HUB_12M_OUT
USB20_HUB_P1
USB20_HUB_N1
USB20_HUB_P2
USB20_HUB_N2
USB20_HUB_P3
USB20_HUB_N3
<CPU side>
10
10
CU5
.1U_0402_16V7K
RU7
CU4
.1U_0402_16V7K
300mA
LaRout note
RU3 close to UU1
RU3 Rin2 GND Viax3
XTAL_HUB_12M_IN
YU1
3
4
1
2
10mil
+VBUSM
@ CU3
18P_0402_50V8J
RU6
100K_0402_5%
2
@ CU2
18P_0402_50V8J
2 10K_0402_5%
+USB_VCCB
RU5
2 10K_0402_5%
+5VALW
12MHZ
1 16PF +-20PPM FSX3M 112.000M16FAQ
RU9
CU6
.1U_0402_16V7K
LaRout note
RU5RRU6RCU5 close to UU1 Rin17
Issued Date
2013/02/26
2015/07/08
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Security Classification
USB2.0 Hub
Rev
0.1
LA-A994P
Sheet
25
1
of
43
15"
U44
10
LPC_CLK_EC
1
47K_0402_5%
1
0.1U_0402_25V6
2
R226
2
C186
+3VALW_EC
21,23,27,9
21
27
27
PLT_RST_BUF#
9 EC_SCI#
WLAN_WAKE#
KSI[0..7]
KSO[0..17]
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
21
EC_SLP_S3#
LPC_CLK_EC
12
13
37
20
38
EC_RST#
EC_SCI#
WLAN_WAKE#
55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
77
78
79
80
EC_SLP_S3#
6
14
15
16
17
18
19
25
28
29
30
31
32
34
36
EC_SMI#
MINI1_LED#
9 EC_SMI#
MINI1_LED#
EC_INVT_PWM
FAN_SPEED1
17 EC_INVT_PWM
28 FAN_SPEED1
14,9
1
2
3
4
5
7
8
10
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
30,35,36
30,35,36
10,15,16
10,15,16
NMI_DBG#
EC_KBRST#
EC_SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
E51TXD_P80DATA
E51RXD_P80CLK
GPIO18
AC_LED#
21 E51TXD_P80DATA
21 E51RXD_P80CLK
PMC_CORE_PWROK
34 AC_LED#
GATEA20/GPIO00
KBRST#/GPIO01
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC & MISC
LPC_AD0
EC_SMB_CK1/GPIO44
EC_SMB_DA1/GPIO45
SM
EC_SMB_CK2/GPIO46
EC_SMB_DA2/GPIO47
PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
GPIO0A
GPIO0B
GPIO0C
GPIO0D
EC_INVT_PWM/GPIO11
FAN_SPEED1/GPIO14
EC_PME#/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
PCH_PWROK/GPIO18
SUSP_LED#/GPIO19
NUM_LED#/GPIO1A
AD
CPU1.5V_S3_GATE/GPXIOA00
WOL_EN/GPXIOA01
ME_EN/GPXIOA02
VCIN0_PH/GPXIOD00
GPIO
Bus
GPIO
ENBKL/AD6/GPIO40
PECI_KB930/AD7/GPIO41
FSTCHG/GPIO50
BATT_CHG_LED#/GPIO52
CAPS_LED#/GPIO53
PWR_LED#/GPIO54
BATT_LOW_LED#/GPIO55
SYSON/GPIO56
VR_ON/GPIO57
PM_SLP_S4#/GPIO59
EC_RSMRST#/GPXIOA03
EC_LID_OUT#/GPXIOA04
PROCHOT_IN/GPXIOA05
H_PROCHOT#_EC/GPXIOA06
GPO VCOUT0_PH/GPXIOA07
BKOFF#/GPXIOA08
PBTN_OUT#/GPXIOA09
PCH_APWROK/GPXIOA10
SA_PGOOD/GPXIOA11
GPI
KB9012QF-A3_LQFP128_14X14
Part Number = SA00004OB30
RK18
10K_0402_5%
AGND/AGND
AC_IN/GPXIOD01
EC_ON/GPXIOD02
ON/OFF/GPXIOD03
LID_SW#/GPXIOD04
SUSP#/GPXIOD05
GPXIOD06
PECI_KB9012/GPXIOD07
V18R
EC_BEEP#
TS_GPIO_EC
AC_AND_CHAG
63
64
65
66
75
76
C184
AD_BID0
ADP_I
CPU_THERMAL
ADP_ID
DP_ENBKL
68
70
71
72
LAN_PWR_EN
EN_DFAN1
83
84
85
86
87
88
EC_MUTE#
EC_SLP_S4#
TP_CLK
TP_DATA
97
98
99
109
EC_PME#
WL_PWREN_EC
VGATE
VCIN0_PH
EC_BEEP#
20
TS_GPIO_EC
17
AC_AND_CHAG B/I#35
0.01U_0402_50V7K
SPOK
ADP_I 34,36
CPU_THERMAL
ADP_ID
34
ENBKL 7
B/I#
34,35
ECAGND
EC_ACIN
10
NMI_DBG#_CPU
SI
PV
MV
DB
SI
NA
NA
NA
NA
R229 1
2 0_0402_5%
C188
PV
ACIN
MV
34..36,9
1 100P_0402_50V8J
LAN_PWR_EN
23
EN_DFAN1
28
SPOK
remove or not?
37,42
20mil trace
EC_MUTE# 20
EC_SLP_S4#
38,9
WLAN_OFF_LED#
27
+EC_VCC_VL
TP_CLK 27
TP_DATA 27
USB_ON#
0_0402_5% 1
R222
2
10K_0402_1%
2
EC_PME# 23
WL_PWREN_EC
22
VGATE 40
VCIN0_PH
34
10K_0402_1%
+3VL
1
R228
+5VALW
1
R362
+3VALW
C
+3VALW_EC
TOUCH_ON#
TXE_DBG
WL_OFF#
BAT_CHG_LED
CAP_LOCK#
PWR_LED#
73
74
89
90
91
92
93
95
121
127
SYSON
VR_ON
+1.8V_POK
100
101
102
103
104
105
106
107
108
EC_RSMRST#
EC_LID_OUT#
VCIN1_PH
H_PROCHOT#_EC
MAINPWON
BKOFF#
PBTN_OUT#
BT_ON_EC
USB_ON#
110
112
114
115
116
117
118
EC_ACIN
EC_ON
ON/OFF#
LID_SW#
SUSP#
FAN_SEL
LID_SW#
DP_ENBKL
VR_ON
SYSON
TOUCH_ON#
17
TXE_DBG 8
WL_OFF#
21
BAT_CHG_LED
34
CAP_LOCK#
27
PWR_LED#
28
WLAN_ON_LED#
27
SYSON
29,38
VR_ON 40
+1.8V_POK
42
RP2
8
7
6
5
1
2
3
4
need PU or not?
100K_0804_8P4R_5%
+3VS
EC_SMB_DA2
EC_SMB_CK2
EC_SMB_DA1
EC_SMB_CK1
EC_RSMRST#
9
EC_LID_OUT#
9
VCIN1_PH
34
H_PROCHOT#_EC
34
MAINPWON
37
BKOFF# 16
PBTN_OUT# 9
BT_ON_EC
21
USB_ON#
24
RP3
1
2
3
4
+3VALW_EC
8
7
6
5
2.2K_0804_8P4R_5%
+3VALW_EC
124
EC_ON 37
ON/OFF#
28
Delay
LID_SW#
28
SUSP# 11,29,38,39,43
FAN@
FAN_SEL
+V18R
RK19
10K_0402_5%
SUSP# 10ms
B
RK20
10K_0402_5%
+3VS
NOFAN@
C190
4.7U_0603_6.3V6K
EC_SCI#
EC_SMI#
L11
RP4
1
2
3
4
8
7
6
5
10K_0804_8P4R_5%
10
40
09/13a
R482
0_0402_5%
1RS@
2
VR_HOT#
H_PROCHOT#
34,35,8
E51TXD_P80DATA
R214
56K_0402_1%
SD034560280
Board ID
R214
Project ID
R210
BLM18AG601SN1D_2P
1
N6U@
DB
15" TS
Board ID
NA
100K ohm 160K ohm 240K ohm
R214
Project ID 100k ohm 100k ohm 100k ohm 100k ohm
R210
119
120
126
128
20mil
ECAGND
2
NMI_DBG#
69
+3VALW_EC
SPIDI/GPIO5B
SPIDO/GPIO5C
SPICLK/GPIO58
SPICS#/GPIO5A
AD_BID0
15" 6U
21
23
26
27
GND/GND
GND/GND
GND/GND
GND/GND
GND0
XCLKI/GPIO5D
XCLKO/GPIO5E
EC_MUTE#/GPIO4A
USB_EN#/GPIO4B
CAP_INT#/GPIO4C
EAPD/GPIO4D
TP_CLK/GPIO4E
TP_DATA/GPIO4F
PS2 Interface
11
24
35
94
113
122
123
GPIO0F
BEEP#/GPIO10
GPIO12
ACOFF/GPIO13
DAC_BRIG/GPIO3C
EN_DFAN1/GPIO3D
IREF/GPIO3E
CHGVADJ/GPIO3F
T199
T200
34
SD034560380
560k_0402_1%
BATT_TEMP/AD0/GPIO38
AD1/GPIO39
ADP_I/AD2/GPIO3A
Input
AD3/GPIO3B
AD4/GPIO42
IMON/AD5/GPIO43
DA Output
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49
ECAGND
6U@
R214
PWM Output
CLK_PCI_EC
PCIRST#/GPIO05
EC_RST#
EC_SCII#/GPIO0E
GPIO1D
100K_0402_1%
2
ECAGND
9 EC_KBRST#
27,9 EC_SERIRQ
10,27 LPC_FRAME#
10,27 LPC_AD3
10,27 LPC_AD2
10,27 LPC_AD1
10,27 LPC_AD0
Ra
C181
0.1U_0402_25V6
R210
1
+EC_VCC_VL
2
2
0.1U_0402_25V6
L10
+EC_VCCA
1
2
BLM18AG601SN1D_2P
2
@
@
C179
1000P_0402_50V7K
1
1
MV
0.1U_0402_25V6
1
@
C177
C178
2
2
0.1U_0402_25V6
67
0.1U_0402_25V6
1
1 C176
C180
1000P_0402_50V7K
C175
EC_VDD/AVCC
9
22
33
96
111
125
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD0
EC_VDD/VCC
L9 1
@
0_0805_5%
PV
SI
Board ID
12K ohm 20K ohm 33K ohm 56K ohm
R214
Project ID 100k ohm 100k ohm 100k ohm 100k ohm
R210
+3VALW_EC
+3VL
DB
DK2
CH751H-40PT_SOD323-2
Q85A
2N7002KDWH_SOT363-6
R217 2100K_0402_1%
H_PROCHOT#_EC
+3VALW
TP_CLK
1
R244
1
R245
2
TP_DATA
4.7K_0402_5%
4.7K_0402_5%
A
Issued Date
Security Classification
2011/07/08
Deciphered Date
2015/07/08
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
EC ENE KB9012 A3
Size
C
Date:
Document Number
Rev
0.1
LA-A994P
Monday, February 24, 20141
26
Sheet
of
43
26
+3VS
26
1@
C1079
1
VDD
VDD
VDD
24
19
10
@
U69
10,26
10,26
10,26
10,26
10
10,26
21,23,26,9
26,9
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_CLK_TPM
LPC_FRAME#
PLT_RST_BUF#
EC_SERIRQ
+3VS
1
R1380
26
23
20
17
LPC_FRAME#
PLT_RST_BUF#
SERIRQ
+3VS
LAD0
LAD1
LAD2
LAD3
1@
C1080
LPCPD#
TESTB1/BADD
TEST1
XTALO
XTALI
TPM
SLB 9656 TT 1.2
21
22
16
27
15
7
LCLK
LFRAME#
LRESET#
SERIRQ
CLKRUN#
PP
4
11
18
25
GND
GND
GND
GND
4.7K_0402_5%
GPIO2
GPIO
R1409
0_0402_5%
KSO[0..17]
@
C1082 *
0.1U_0402_16V4Z
BADD
1
2 PLT_RST_BUF#
@
R1412 0_0402_5%
14
13
2
6
T45 PAD
T46 PAD
1
3
12
20
CAP_LOCK# R203 1
MUTE_LED R207 1
WL_WHIT
WL_AMBER
26 CAP_LOCK#
MUTE_LED
CONN@ JKB1
1
2 1
3 2
4 3
5 4
6 5
7 6
8 7
9 8
10 9
11 10
12 11
13 12
14 13
15 14
16 15
17 16
18 17
19 18
20 19
21 20
22 21
23 22
24 23
25 24
26 25
27 26
28 27
29 28
30 29
31 30
G1
32 31
32
G2
KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6
KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15
KSO16
KSO17
KSO17
KSO16
KSO15
KSO14
KSO13
KSO12
KSO11
KSO10
KSO9
KSO8
KSO7
KSO6
KSO5
KSO4
KSO3
KSO2
KSO1
KSO0
+5VS
2 3.3K_0402_5%
2 3.3K_0402_5%
+5VS
33
34
ACES_50690-0320N-P01
NC
NC
NC
28
9
8
Keyboard conn
KSI7
KSI6
KSI5
KSI4
KSI3
KSI2
KSI1
KSI0
VSB
0.1U_0402_16V4Z
1@
C1081
0.1U_0402_16V4Z
0.1U_0402_16V4Z
TPM1.2
KSI[0..7]
KSI0
C193
ESD@
1 100P_0402_50V8J
2
CAP_LOCK#
MUTE_LED
+5VALW
+5VALW
+3VALW
CONN@
JTP1
26
26
@
C134
470P_0402_50V8J
TP_CLK
TP_DATA
1
2
3
4
TP_CLK
TP_DATA
1
2
3
4
GND
GND
ESD@
CC122
100P_0402_50V8J
ESD@
CC123
100P_0402_50V8J
5
6
WL_WHIT
2N7002KDW_SOT363-6
WLAN_ON_LED#
26
2N7002KDW_SOT363-6
2
6
1
Q20B
WLAN_OFF_LED#
Q20A
26
DM5
YSLC05CH_SOT23-3
SCA00000U10
@ESD@
R158
3.3K_0402_5%
R157
3.3K_0402_5%
WL_AMBER
White
HB_A090420-SAHR21
Amber
Issued Date
Security Classification
2013/02/26
Deciphered Date
2015/07/08
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
KB/TP
Document Number
Rev
0.1
LA-A992P
Friday, February 21, 2014
Sheet
27
of
43
+3VL
LID_SW#
LED10
R215
ESD@
CC124
100P_0402_50V8J
ON/OFF#
26
220_0402_5%
2
PWR_LED#
PWR_LED#
100K_0402_5%
@ESD@
remove at SI phase
+3VL
R2744
1
LTW-110DC5-C_WHITE
CS20
0.1U_0402_16V7K
+3VS
2
@
remove at SI phase
White
LED9
C166
0.1U_0402_16V7K
26
26
+3VALW
White
SOC_SATALED#
CONN@
JPWR1
1
2
3
4
LID_SW#
ON/OFF#
LID_SW#
ON/OFF#
remove at SI phase
1
2
3
4
R2743
1
@ESD@ 1
CS19
0.1U_0402_16V7K
1
LTW-110DC5-C_WHITE
5
6
GND
GND
220_0402_5%
2
SOC_SATALED#
HB_A090420-SAHR21
+FAN_POWER
FAN conn
26
+3VS
@
CE22
+FAN_POWER
RE50
10K_0402_5%
+5VS
@ CE25
2.2U_0603_6.3V6K
2
26
@ UE3
1
2 VEN
3 VIN
4 VO
VSET
EN_DFAN1
GND
GND
GND
GND
40milCONN@
2.2U_0603_6.3V6K
40mil
1
2
3
FAN_SPEED1
8
7
6
5
4
5
@
CE24
0.01U_0402_16V7K
JFAN1
1
2
3
GND
GND
ACES_85204-0300N
APE8873M SOP 8P
4
Issued Date
Security Classification
2013/02/26
Deciphered Date
2015/07/08
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
PWRBTN/FAN
Document Number
Rev
0.1
LA-A992P
Friday, March 14, 2014
Sheet
E
28
of
43
+1.35VS_IN
+1.0VALW TO +1.0VS
@JPHW4
@ JPHW4
3
4
SUSP#
5
6
7
ON1
VBIAS
VOUT1
VOUT1
CT1
GND
ON2
CT2
VIN2
VIN2
VOUT2
VOUT2
GPAD
2 2200P_0402_50V8J
CF7
2 3300P_0402_50V7K
11
10
9
8
+1.8VS_IN
20mil
+5VALW
+1.8VALW TO +1.8VS
SUSP
RF2
470_0603_5%
+1.0VS_R
5 SUSP
1.0VS_GATE
1
2
RF3
4.7K_0402_5%
10mil
1
+1.8VS
JUMP_43X79
+3VS_IN
1
2
3
8
7
6
5
@JPHW5
@ JPHW5
15
TPS22966DPUR_SON14_2X3
CF13
1U_0603_10V4Z
CF6
CF12
4.7U_0603_6.3V6K
CF11
10U_0603_6.3V6M
CF10
10U_0603_6.3V6M
CF9
1U_0603_10V4Z
12
CF5
1U_0402_6.3V6K
SUSP#
VIN1
VIN1
+1.0VS
UF1
AO4304L_SO8
CF4
4.7U_0603_6.3V6K
+5VALW
14
13
CF3
10U_0603_6.3V6M
U17
1
2
+1.0VALW
CF2
1U_0603_10V4Z
+1.8VALW
3 1
+1.35V
CF1
4.7U_0603_6.3V6K
JUMP_43X79
+1.35V TO +1.35VS
+1.35VS
CF8
0.1U_0603_25V7K
QF1B
DMN66D0LDW-7_SOT363-6
2
QF1A
DMN66D0LDW-7_SOT363-6
+5VALW
SUSP#
+3VALW
3
4
5
6
7
CT1
VBIAS
GND
ON2
CT2
VIN2
VIN2
VOUT2
VOUT2
12
CF16 1
2 3300P_0402_50V7K
CF17 1
2 3300P_0402_50V7K
100K_0804_8P4R_5%
10
SYSON#
9
8
SUSP
+5VS_IN
15
QF2A
DMN66D0LDW-7_SOT363-6
@ JPHW8
TPS22966DPUR_SON14_2X3
JUMP_43X118
+5VS
@
2
+5VALW TO +5VS
26,38
Issued Date
SYSON 2
SYSON
5 SUSP#
SUSP#
11,26,38,39,43
Deciphered Date
2015/07/08
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
QF2B
DMN66D0LDW-7_SOT363-6
Security Classification
11
CF22
1U_0603_10V4Z
14
13
CF21
10U_0603_6.3V6M
CF20
10U_0603_6.3V6M
CF19
10U_0603_6.3V6M
ON1
GPAD
CF23
1U_0603_10V4Z
CF18
1U_0603_10V4Z
VOUT1
VOUT1
SUSP#_3VS_5VS
VIN1
VIN1
1
2
3
4
+5VALW
U18
1
2
RPF1
8
7
6
5
SUSP
SYSON#
SUSP#
SYSON
+5VALW
RF4
0_0402_5%
CF15
1U_0603_10V4Z
+3VS
JUMP_43X118
CF14
10U_0603_6.3V6M
+3VALW TO +3VS
DC Interface
Document Number
Rev
0.1
Sheet
E
29
of
43
RH4111
+3VL
2 0_0402_5%
ACCELEROMETER
+3V_GSEN
D61
2
ACCEL_INT#_R
ACCEL_INT#
CH751H-40PT_SOD323-2
+3V_GSEN
@UGS1
@ UGS1
1
GS_SMB_CK1
GS_SMB_DA1
R528
1
10K_0402_5%
+3V_GSEN
4
6
7
8
2
3
@R529
0_0402_5%
Vdd_IO
SCL/SPC
SDA/SDI/SDO
SDO/SA0
CS
NC
NC
INT2
INT1
VDD
GND
GND
RES
RES
RES
RES
9
11
14
5
12
10
13
15
16
@ C578
4.7U_0603_6.3V6K
HP3DC2
+3V_GSEN
26,35,36
EC_SMB_CK1
4.7K_0402_5%
R232
@
1
EC_SMB_CK1
4.7K_0402_5%
R231 @
QG2A
@
GS_SMB_CK1
2N7002DWH_SOT363-6
2 0_0402_5%
R221 1
@
@
26,35,36
EC_SMB_DA1
EC_SMB_DA1
GS_SMB_DA1
2N7002DWH_SOT363-6
QG2B
R220 1
FD2
FD1
2 0_0402_5%
H6
H_2P8
HOLEA
HOLEA
HOLEA
FIDUCIAL_C40M80
FD3
FD4
H22
H_2P8
H5
H_2P8
FIDUCIAL_C40M80
H4
H_2P8
FIDUCIAL_C40M80
FIDUCIAL_C40M80
H12
H_2P8
H17
H_2P8
H18
H_2P0
H19
H_2P0X2P5
HOLEA
HOLEA
HOLEA
HOLEA
HOLEA
HOLEA
HOLEA
HOLEA
HOLEA
HOLEA
HOLEA
HOLEA
H2
H_2P8
H13
H_5P0
H1
H_2P8
H11
H_5P0
H14
H_2P8
H10
H_5P0
H8
H_2P8
H9
H_5P0
@
@
HOLEA
Security Classification
Issued Date
2013/02/26
Deciphered Date
2015/07/08
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.1
LA-A992P
Friday, February 21, 2014
Sheet
1
30
of
43
<SMBus Routing>
<USB2.0/3.0 port>
+1.8VS
+3VS
R=4.7K
R=2.2K
BH10
TI level shift
SMBus1
BG12 PCU_SMB_CLK
+1.8VS
CPU
EC_SMB_CK2
EC_SMB_DA2
PCU_SMB_DATA
USB2.0
0
1
2
3
4
5
6
SO-DRMM A
XDP
TRermal sensor
EC
+3VALW_EC
+3VALW
R=2.2K
R=2.2K
2N7002
77 EC_SMB_CK1
SMBus1
78 EC_SMB_DA1
+3VALW_EC
Function
Left port (USB2.0)
Right port-1 (USB2.0/3.0)
Right port-2 (USB2.0
WLAN
Touch screen
Camera
NC
Note
USB2.0x4 Hub
USB2.0x4 Hub
USB2.0x4 Hub
USB2.0x4 Hub
<PCI-E port>
Translator
79
SMBus2
80
+3VS
USB3.0
X
0
X
X
X
X
X
GS_SMB_CK1
GS_SMB_DA1
PCI-E
0
1
2
3
G-sensor
Function
LAN
WLAN
Card reader
NC
Note
<SATA port>
CRarRer
PCI-E
0
1
BATT
Function
HDD
NC
Note
Issued Date
Security Classification
2013/3/1
Deciphered Date
2015/3/1
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Reserve
Document Number
Rev
0.1
LA-A99RP
Date:
Sheet
D
31
of
43
Title
D ate
R equest
O w ner
Page 1
Issue D escription
29
131107
28
131109
24
131109
16
131111
22
131111
18
131111
30
131111
1.Change Power Rail of G sensor from +3VALW to +3VL & unpop QG2
30
131111
1.pop DM5
26
131111
10
16
131111
Solution D escription
R ev.
D
2013/04/12
Issued Date
Security Classification
2014/04/12
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
HW PIR
Rev
0.1
LA-A994P
Sheet
32
of
43
ACDRV
B+
DC IN
ACFET
P34
RBFET
CMSRC
Jumper
+3VALWP
RT8243A
+3VALW
SY8003D
+1.05VSP
Charger
BQ24738
Jumper
+5VALWP
EN
P39
P37
Jumper
+1.35V_VP
RT8207M
BATT
EN
+5VALW
EC_ON
BATDRV
Battery
+1.05VS
SUSP#
P36
Jumper
+1.35V_V
SY8003D
+1.5VSP
RBFET
Jumper
+1.5VS
SUSP#
SYSON
SUSP#
P35
Jumper
+0.675VSP
EN
+0.675VS
P43
EN
P38
APL5930
+SOC_VCC
ISL95833
+1.8VALWP
Jumper
+1.8VALW
SPOK
VR_ON
EN
P42
EN
+SOC_VNN
P40, P41
SY8206D
+1.0VALWP
Jumper
+1.0VALW
SPOK
EN
P42
Security Classification
2013/08/20
Issued Date
Deciphered Date
2016/08/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Document Number
Rev
0.1
LAA994P/LAA995P
Date:
Sheet
1
33
of
43
PL1 EMI@
HCB2012KF-121T50_0805
1
2
ADPIN
VIN
PL2 EMI@
HCB2012KF-121T50_0805
1
2
1
2
ACIN_LED
ADP_ID 26
2
PR8
100K_0402_5%
PC6
1000P_0402_50V7K
1
2
@ PC5
100P_0402_50V8J
PD3
GLZ3.6B_LL34-2
PR7
10K_0402_5%
ESD@ PD2
L30ESD24VC3-2_SOT23-3
1
2
ESD@ PD1
L30ESD24VC3-2_SOT23-3
PR5
2K_0402_5%
1
2Charge_LED
BAT_CHG_LED
26
ACIN_LED
PR3
100K_0402_5%
PR1
10K_0402_5%
ADP_SIGNAL 1
2
@ PR2
0_0402_5%
1
2
AC_LED#
EMI@ PC4
1000P_0402_50V7K
ADP_SIGNAL
EMI@ PC3
100P_0402_50V8J
EMI@ PC2
1000P_0402_50V7K
6
Charge_LED
EMI@ PC1
100P_0402_50V8J
PJP1
ACES_59012-0080N-002
1
2
1
2
26
+5VS
+3VALW _EC
+3VALW
1
2
@ PC15
0.1U_0402_16V7K
2
1
PH1
100K_0402_1%_NCP15W F104F03RC
ECAGND 26
B/I#
26,35
ADP_I
+3VALW
PR26
5.9K_0402_1%
PR20
1.5M_0402_5%
VCIN1_PH 26
@ PR28
10K_0402_1%
PR27
10K_0402_1%
2
PR21
100K_0402_1%
@ PC16
0.1U_0402_16V7K
PD5
CD4148W N-1_1206-2
PR18
10K_0402_1%
H_PROCHOT#_EC 26
5
PC13
100P_0402_50V8J
1
2
8
P
PU1B
LM393DR_SO8
PC12
0.022U_0402_16V7K
1
2
1
2
PR17
47K_0402_1%
PQ2B
L2N7002DW 1T1G_SC88-6
26,36
+5VS
PR12
100K_0402_1%
VCIN0_PH 26
PR11
10K_0402_1%
PC9
100P_0402_50V8J
1
2
PR13
1.5M_0402_5%
PD4
CD4148W N-1_1206-2
PU1A
LM393DR_SO8
2
-
PC8
0.022U_0402_16V7K
1
2
PR25
10K_0402_1%
PR10
47K_0402_1%
PQ2A
L2N7002DW 1T1G_SC88-6
H_PROCHOT#
26,35,8
ACIN
26,35,36,9
Security Classification
2013/08/20
Issued Date
Deciphered Date
2016/08/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
DC Conn
Size
Document Number
Rev
0.1
LAA994P/LAA995P
Date:
Sheet
1
34
of
43
1
PR31
47K_0402_1%
26,34,8
1
PR32
10K_0402_1%
PR4 @
0_0402_5%
1
2
ACIN
H_PROCHOT#
PQ5
LBSS84LT1G_SOT23-3
PC17
0.022U_0402_16V7K
26,34..36,9
PD8
CD4148WN-1_1206-2
1
2
+3VL
@ PJPB2
JUMP_43X118
EMI@ PL3
HCB2012KF-121T50_0805
1
2
BATT++
BATT+
BATT
PR14
@ 470K_0402_5%
1
2
EMI@ PC11
0.01U_0402_25V7K
EMI@ PC10
1000P_0402_50V7K
1
@ PR16
4.7K_0402_5%
PR22
100_0402_5%
1
2
EC_SMB_DA1
26,30,36
EC_SMB_CK1
26,30,36
+3VL
1
PR29
100K_0402_5%
@ PQ3B
L2N7002DW 1T1G_SC88-6
@ PR23
220K_0402_5%
+3VL
B/I#
26,34
@ PQ4A
L2N7002DW 1T1G_SC88-6
@ PR24
220K_0402_5%
5
6
+3VL
PR30
100_0402_5%
1
2
@ PQ3A
L2N7002DW 1T1G_SC88-6
OCTEK_BTJ-08FUAB
6 2
@ PR15
470K_0402_5%
PR19
100_0402_5%
1
2
EC_SMB_DA1-1
EC_SMB_CK1-1
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
GND
GND
@ PJPB1
PQ1 @
SI4483ADY-T1-GE3_SO8
8
1 39.4
7
2
3
6
5
EMI@ PL4
HCB2012KF-121T50_0805
1
2
ESD@ PD7
L30ESD24VC3-2_SOT23-3
PC14
100P_0402_50V8J
@ PQ4B
L2N7002DW 1T1G_SC88-6
ACIN
26,34..36,9
ESD@ PD6
L30ESD24VC3-2_SOT23-3
AC_AND_CHAG
26
Security Classification
2013/08/20
Issued Date
Deciphered Date
2016/08/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
BATT Conn
Size
Document Number
Rev
0.1
LAA994P/LAA995P
Date:
Sheet
1
35
of
43
PQ102
PR101
S 2N7002KW_SOT323-3
PR102
1M_0402_5%
3M_0402_5%
P2
PQ103
SI7716ADN-T1-GE3 1N POWERPAK1212-8
ACPRES
11
SRN_CHG
PC118
0.1U_0603_16V7K
1
2
PC115
10U_0805_25V6K
PC114
10U_0805_25V6K
PD103
RB551V-30_SOD323-2
CSOP1
CSON1
CSON1
BATDRV_CHG
ILIM_CHG
10
ILIM
SCL
SDA
8
1
2
PC119
0.01U_0402_25V7K
1
2
PR115
+3VL
357K_0402_1%
1
2
PR116
100K_0402_1%
7
IOUT_CHG
PR117
422K_0402_1%
VIN
ACDET_CHG
26,34,35,9 ACIN
BATDRV
12
SRN
ACDET
ACDRV
PC116
0.1U_0402_25V6
CSOP1
PR113
0_0603_1%
1
2
SRP_CHG
13
SRP
4
PR112
0_0603_1%
1
2
PR110
0.01_1206_1%
1
4
PC113
0.1U_0402_25V6
DL_CHG
2 CHG
1 SNB_CHG 2
15
14
@EMI@ PR111
4.7_1206_5%
5
PQ106
S TR AON7406L 1N DFN
GND
CMSRC
3
2
1
ACP
@EMI@ PC117
680P_0603_50V8J
3
2
1
PL102
4.7UH_ETQP3W4R7WFN_5.5A_20%
LX_CHG
LODRV
IOUT
ACDRV_CHG
PR114
10K_0402_1%
1
2
1
2
PQ105
AON7408L_DFN8-5
4
BATT
REGN
ACN
PR107
0_0603_1%
1
2
PC112
1U_0603_25V6K
1
2
BQ24738RGRR_QFN20_3P5X3P5
PC107
0.01U_0402_50V7K
DH_CHG
2
REGN_CHG
16
PR106
2.2_0603_5%
1
2
BTST
DH_CHG
BST_CHG
17
LX_CHG
19
PD102
RB751V-40_SOD323-2
18
HIDRV
PAD
PC110
0.047U_0402_25V7K
1
2
PHASE
ACP_CHG
CMSRC_CHG 3
+3VL
PR104
4.12K_0603_1%
1
2 BATDRV1_CHG
1
1
PR105
10_1206_1%
1
21
ACN_CHG
PU101
VCC_CHG
PC108
0.1U_0402_25V6
1
2
1
2
BATDRV_CHG
PD101
BAS40CW_SOT323-3
PC111
1U_0603_25V6K
1
2
PR109
4.12K_0603_1%
1
2
PR108
4.12K_0603_1%
2
3
PC106
0.1U_0402_25V6
ACDRV1_CHG
1
2
3
PC105
10U_0805_25V6K
VIN
PC104
10U_0805_25V6K
PQ104
AON7506
EMI@
PL101
1.2UH_NRS4018T1R2NDGJ_2.6A_30%
1
2
PR103
0.01_1206_1%
4
@EMI@ PC123
2200P_0402_50V7K
20
1
2
1
2
PC101
2200P_0402_50V7K
1
2
3
VCC
1
2
3
PC109
0.1U_0402_25V6
PQ101
AON6414AL 1N DFN
B+
P1
PC102
0.1U_0402_25V6
VIN
@ PR119
0_0402_5%
1
2
EC_SMB_CK1
26,30,35
EC_SMB_DA1
26,30,35
ADP_I
26,34
1
PC121
100P_0402_50V8J
1
2
PR118
66.5K_0402_1%
Max.
1
Typ
17.23V
17.63V
H-->L
L-->H
PC120
0.1U_0402_25V6
Vin Dectector
Min.
@ PC122
0.1U_0402_10V7K
Issued Date
Security Classification
2013/08/20
Deciphered Date
2016/08/31
Title
CHARGER
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.1
LAB151P
Date:
Sheet
36
of
43
PR302
165K_0402_1%
1
2
PR303
56K_0402_1%
1
2
PR305
30K_0402_1%
1
2
PR301
14K_0402_1%
1
2
3/5V_B+
FB_5V
ENTRIP_5V
2
26,42
FB1
BOOT2
BOOT1
UGATE1
PHASE2
UG_5V
17
LX_5V
16
LG_5V
PL302
2.2UH_ETQP3W2R2WFN_8.5A_20%
1
2
@EMI@ PR312
4.7_1206_5%
2
SNUB_5V
PU301
RT8243AZQW_WQFN20_3X3
@ PJ301
JUMP_43X39
1
2
1
2
PQ304
SI7716ADN-T1-GE3 1N POWERPAK1212-8
+3VL
+5VALWP
1
+
PC317
220U 6.3V M B C6 SVPC ESR15
H=5.9mm
+3VLP
PC310
4.7U_0603_10V6K
PQ302
AON7408L_DFN8-5
18
LDO5
LDO3
15
+3VLP
ENM
ENLDO
1
2
LGATE1
PC314
1U_0603_10V6K
1
2
3/5V_B+
PR314
100K_0402_1%
PR313
499K_0402_1%
1
2
14
PQ303
S TR AON7406L 1N DFN
+5VLP
11
12
LGATE2
13
10
VIN
LG_3V
PC313
0.1U_0603_25V7K
PR315
2.2K_0402_1%
1
2
26 EC_ON
@ PR316
0_0402_5%
1
2
@ PJ304
JUMP_43X39
1
2
1
2
+VL
@ PR317
100K_0402_5%
26 MAINPWON
@ PC315
4.7U_0603_6.3V6K
2
3
PHASE1
1
2
3
H=5.9mm
@EMI@ PR311
4.7_1206_5%
PC316
220U 6.3V M B C6 SVPC ESR15
@EMI@ PC311
680P_0603_50V8J
LX_3V
SNUB_3V 2
UGATE2
BST_5V
@EMI@ PC312
680P_0603_50V8J
PL303
4.7UH_ETQP3W4R7WFN_5.5A_20%
1
2
PR310
PC306
2.2_0402_1%
0.1U_0402_10V7K
1
2 BST1_5V 1
2
19
1
2
3
UG_3V
21
20
3
2
1
PAD
BYP1
3
2
1
BST_3V
PGOOD
ENTRIP1
PR309
2.2_0402_1%
1
2
TON
PC305
.1U_0402_10V7K
1
2 BST1_3V
FB2
SPOK
ENTRIP2
PQ301
AON7408L_DFN8-5
+3VALWP
PC304
4.7U_0805_25V6-K
1
2
ENTRIP_3V
TON_35V
PR307
19.1K_0402_1%
1
2
FB_3V
1
PR318
10K_0402_1%
PC307
4.7U_0805_25V6-K
PC303
4.7U_0805_25V6-K
1
2
PR306
20K_0402_1%
1
2
PC308
4.7U_0805_25V6-K
3/5V_B+
+3VALW
EMI@ PL301
HCB2012KF-121T50_0805
1
2
@EMI@ PC318
2200P_0402_50V7K
B+
PR304
143K_0402_1%
1
2
@ PC302
100P_0402_50V8J
1
2
@ PJ302
+3VALWP
+3VALW
JUMP_43X118
@ PJ303
+5VALWP
+5VALW
JUMP_43X118
Issued Date
Security Classification
2013/08/20
Deciphered Date
2016/08/31
Title
3VALW/5VALW
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.1
LAA99RP/LAA995P
Date:
Sheet
37
of
43
+1.35VP
+1.35V
1
2
S3_DDR
FB_DDR
SYSON
PRM9
30K_0402_5%
1
2
11,26,29,39,43
SUSP#
@ PRM11
0_0402_5%
1
2
1
2
1
1
2
+0.675VS
PCM11
0.1U_0402_10V7K
@ PCM12
0.1U_0402_10V7K
+0.675VSP
+1.35VP
JUMP_43X118
@ PJPM1
JUMP_43X39
1
2
1
2
PCM5
10U_0805_6.3V6K
1
FB
S3
S5
8
S5_DDR
PRM5
8.06K_0402_1%
1
2
PCM10
0.033U_0402_16V7K
@ESD@ PDM3
CK0402101V05_0402-2
+1.35VP
+1.35VP
26,29
@ PJPM2
@ PRM7
0_0402_5%
1
2
@ESD@ PDM2
CK0402101V05_0402-2
EC_SLP_S4#
VTTREF_DDRT
PRM8
10K_0402_1%
PRM6
432K +-1% 0402
B+_DDR 1
2
26,9
VDDQ
PRM10
10K_0402_5%
1
2
GND
6 DDR_PWROK
+1.35VP
PCM4
10U_0805_6.3V6K
VTT
VLDOIN
20
19
18
BOOT
UGATE
PHASE
PCM9
1U_0603_10V6K
VTTREF
TON
PCM8
1U_0603_10V6K
VTTGND
VDDP
VDD
VTTSNS
10
PCM7 @EMI@
680P_0603_50V7K
11
17
16
VDD_DDR
1
2
3
+5VALW
PQM2
S TR AON7406L 1N DFN
12
+5VALW
PRM4
5.1_0603_5%
1
2
CS
21
PAD
PUM1
RT8207PGQW W QFN 20P PW M
2
1 SNB_DDR
13
LGATE
PGND
PGOOD
PRM3
13.3K_0402_1%
CS_DDR
1
2
PRM2 @EMI@
4.7_1206_5%
15
14
PCM21
22U_0603_6.3V6M
PCM20
22U_0603_6.3V6M
1
2
PCM19
22U_0603_6.3V6M
1
2
PCM18
22U_0603_6.3V6M
1
2
PCM17
22U_0603_6.3V6M
1
2
1
2
PCM16
22U_0603_6.3V6M
1
2
+1.35VP
DL_DDR
1
2
3
PLM2
1.5UH +-20% PCMC063T-1R5MN 9A
1
2
DH_DDR
LX_DDR
4
PQM1
AON7408L_DFN8-5
BST_DDR
+0.675VSP
5
2.2u to 1.5u(11/12)
PCM3
4.7U_0805_25V6-K
PCM1
10U_0805_25V6K
1
2
PRM1
2.2_0402_1%
1
2
PCM2
0.22U_0402_10V6K
1
2
BST_DDR-1
B+_DDR
EMI@ PLM1
HCB2012KF-121T50_0805
1
2
@EMI@ PCM13
2200P_0402_50V7K
B+
TON_DDR
Security Classification
Issued Date
2013/08/20
Deciphered Date
2016/08/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Size
Document Number
Custom
LA-A521P
Date:
Rev
0.1
Sheet
38
of
43
PUH1
SY8003DFC_DFN8_2X2
PRH1
15K_0402_1%
PCH3
22P_0402_50V8J
PRH5
1M_0402_5%
@
PCH6
0.1U_0402_16V7K
PRH3
20K_0402_1%
2
@EMI@
PRH2
4.7_1206_5%
@PRH4
@ PRH4
0_0402_5%
1
2
PCH5
22U_0603_6.3V6M
8
9
SGND
PGND
EN_1.05V
PCH4
22U_0603_6.3V6M
EN
FB
LX_1.05V
PG
LX
PJPH1
JUMP_43X118
1
2
1
2
PLH2
1UH_NRS4018T1R0NDGJ_3.2A_30%
1
2
PCH2
22U_0603_6.3V6M
SUSP#
FB_1.05V
IN
11,26,29,38,43
1
2
PCH1
22U_0603_6.3V6M
+1.05VS
+1.05VSP
NC
B+_1.05V
PGND
1SNB_1.05V 2
+3VALW
EMI@
PLH1
HCB1608KF-121T30_0603
1
2
@EMI@
PCH7
680P_0402_50V7K
Issued Date
Security Classification
2013/08/20
Deciphered Date
2016/08/31
Title
1.05VS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Document Number
Rev
0.1
LAB151P
Monday, February 24, 2014
Sheet
1
39
of
43
@ PCG1
1000P_0402_50V7K
EMI@PCG15
2200P_0402_50V7K
PQG1
MDV1525URH_PDFN33-8-5
PCG12
0.1U_0603_25V7K
BOOTA_GFX1
2
21
PRG11
2.2_0603_5%
LGA_GFX
4
@EMI@ PRG12
4.7_1206_5%
@PRZ4
@ PRZ4
1.91K_0402_1%
1
2
LG1_CPU
19
PHASE1_CPU
18
UG1_CPU
17
UG1_CPU-1
PCZ4
100U_25V_M
1
2
PRZ15
3.65K_0603_1%
1_0402_5%
PRZ16
VSUM+
VSUM-
PHZ2
10K_0402_1%_ERTJ0EG103FA
PCZ19
.1U_0402_16V7K
1
2
Cn = L/((Rntcnet*Rsum)/(Rntcnet+Rsum))*DCR)
If Cn is correctly selected, when the load current has a
square change, the output voltage also has a square response.
Issued Date
Security Classification
2013/08/20
Deciphered Date
2016/08/31
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size
R&D Document Number
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
+SOC_VCC
3
2
1
PRZ19
2.61K_0402_1%
1
2
PRZ23
1
2
1
11K_0402_1%
1
1
MDU1511 Vds=30V
Rds(on)=2.7~3.3m ohm@Vgs=4.5V
VSUM-
@ PCZ20
330P_0402_50V7K
1
2
PCZ21
0.01UF_0402_25V7K
PCZ16
0.1U_0402_25V6
1
2
1
2
PRZ22
191_0402_1%
14"@ PRZ21
2K_0402_1%
1 1
2
PRZ25
137K_0402_1%
Layout Note
11 VCCSENSE
SVID routing
1. Alert# signal must be routed between
the Clock and Date lines to reduce the cross
talk between them. Signal order arrangement:
mobile order is Clock-Alert-Date.
11 VSSSENSE
2. SVID spacing requirement is 18mils(0.475mm).
3. Maximum total microstrip routing length of
each SVID signal must not exceed 6000mils(152.4mm).
4. The SVID bus must be ground reference, It cannot be
referenced to input (Vbat or 12V) power plans as they can
couple noise into the SVID bus as power states change.
5. Avoid routing under noisy circuit, e.g. switch node ,
Gate driver, B+, Vin, high speed signal.
6. When SVID signal changes Layer, GND return path
may be changed also. We need add GND via for GND
reference.
PCZ15
0.022U 25V K X7R 0402
PCZ17
1000P_0402_50V7K
2
1
2
14"@ PCZ18
6800P_0402_25V7K
2
PRZ24
1.78K_0402_1%
1
2
PQZ2
S TR AON6504 1N DFN
VSUM+
OCP setting=~18A
3
2
1
PCZ10
2
0.1U_0603_25V7K
LG1_CPU
PRZ18
66.5K +-1% 0402
1
2
2@
B+
H=5.9mm
PLZ2
.22UH 20% PCME064T-R22MS0R985 28A
2.2_0603_5%
PRZ13
1
21
1
+
PQZ1
MDV1525URH_PDFN33-8-5
PHASE1_CPU
UG1_CPU
PRZ11
0_0603_1%
1
2
EMI@ PCZ8
2200P_0402_50V7K
PRZ10
NTC_1
PCZ14
120P 50V J NPO 0402
1
2
EMI@ PLZ1
FBMA-L11-322513-151LMA50T_1210
1
2
@EMI@PCZ11
PCZ11
@EMI@
@EMI@PRZ14
PRZ14
@EMI@
680P_0402_50V7K 4.7_1206_5%
1.91K_0402_1%
+3VALW
PCZ7
10U_0805_25V6K
26
PCZ6
10U_0805_25V6K
16
VGATE
MDV1525 Vds=30V
Rds(on)=11.5~14m ohm@Vgs=4.5V
BOOT_CPU
PCZ13
470P_0402_50V7K
1
2
1
2
PRZ20
499_0402_1%
+CPU_B+
BOOT_CPU
PRZ17
PCZ12
680P_0402_50V7K 2K_0402_1%
1
2
1
2
21
20
PCZ5
100U_25V_M
UGATE1
PRZ3
1_0603_5%
22
PRZ9
27.4K_0402_1%
BOOT1
PHASE1
ISEN2
PCZ2
1U_0603_10V6K
1
2
NTC
PCZ1
1U_0603_10V6K
1
2
25
UGATEG
27
28
29
30
31
26
BOOTG
PGOODG
COMPG
FBG
RTNG
33
32
ISUMPG
ISUMNG
LGATE1
23
@PRZ2
@ PRZ2
0_0603_5%
VR_HOT#
24
PRZ12
3.83K_0402_1%
@PCZ9
@ PCZ9
0.1U_0402_16V7K
PHZ1
470K +-5% ERTJ0EV474J 0402
1
1
2
+1.0VS
+5VALW
1
PRZ8
69.8_0402_1%
2
1
PRZ7
69.8_0402_1%
1
PRZ6
499_0402_1%
@ PCZ3
47P_0402_50V8J
VSUMG-
PRG15
@PRZ5
@ PRZ5 0_0402_5%
PWM2
PGOOD
NTC
VDD
SDA
15
VR_HOT#
ALERT#
COMP
14
2 SVID_DATA-2
15_0402_1%
LGATEG
FB
1
PRZ27
PHASEG
VR_ON
13
SVID_DATA
NTCG
RTN
SVID_ALERT#
ISUMN
SVID_DATA
2 SVID_CLK-1
20_0402_1%
12
SVID_ALERT#
1
PRZ26
ISUMP
PAD
2
SVID_CLK
SVID_CLK
10
VR_ON
26
NTCG
@PRZ1
@ PRZ1
0_0402_5%
1
2
11
26
PUZ1
PHG2
470K +-5% ERTJ0EV474J 0402
1
2
ISEN1
1_0402_5%
PRG14
+5VALW
NTCG_1
PRG17
3.83K_0402_1%
1
2
VSUMG+
@EMI@ PCG14
680P_0402_50V7K
MDU1511 Vds=30V
Rds(on)=2.7~3.3m ohm@Vgs=4.5V
PRG16
27.4K_0402_1%
1
2
PRG13
3.65K_0603_1%
2
2
UGA_GFX
LGA_GFX
PQG2
S TR AON6504 1N DFN
BOOTA_GFX
PCG13
1000P 50V K X7R 0402
+SOC_VNN
PLG1
.22UH 20% PCME064T-R22MS0R985 28A
PHASEA_GFX
PHASEA_GFX
OCP setting=~20A
1
2
PRG9
21K_0402_1%
2
PRG6
1.91K_0402_1%
+3VALW
UGA_GFX-1
3
2
1
PRG7
2K_0402_1%
1
2
1.91K_0402_1%
PCG10
0.1U_0402_25V6
1
2
PRG8
11K_0402_1%
PCG11
0.022U 25V K X7R 0402
1
2
VSUMG+
PRG10
2.61K_0402_1%
1 2
2
GFX(GT2): Icc=14A
Loadline: -5.9 m V/A
.1U_0402_16V7K
PCG9
1
2
Design Note
This circuit is for ULC 1+1 7.5W.
CPU: Icc=12A
Loadline: -5.9 m V/A
1
2
1
PRG5
137K_0402_1%
PRG1 @
0_0603_5%
1
2
UGA_GFX
+CPU_B+
VSUMG-
PCG7
470P_0402_50V7K
1
2
1
2
PRG3
499_0402_1%
PCG8
1000P_0402_50V7K
PHG1
10K_0402_1%_ERTJ0EG103FA
PCG6
120P 50V J NPO 0402
1
2
PRG4
210_0402_1%
1
2
1 2
MDV1525 Vds=30V
Rds(on)=11.5~14m ohm@Vgs=4.5V
3
2
1
14"@ PRG2
2K_0402_1%
1
2
PCG5
10U_0805_25V6K
14"@ PCG3
6800P_0402_25V7K
VSSSENSE
PCG2
0.01UF_0402_25V7K
PCG4
10U_0805_25V6K
1
2
Layout Note
Reduce Acoustic Noise
1. The AL bulk capacitor of B+ should be very
close to CPU_CORE MOSFET.
2. Input ceramic caps must place on symmetry
same location on top side and bottom side.
VCC_GFXSENSE
11
Date:
Rev
0.1
LAB151P
Sheet
40
of
43
H=5.9mm
H=5.9mm
+SOC_VCC
+SOC_VNN
PCG25
PCG19
22U_0805_6.3V6M
PCG31
2
PCG32
10U_0603_6.3V6M
1
10U_0603_6.3V6M
PCG18
2
PCG28
2
10U_0603_6.3V6M
1
22U_0805_6.3V6M
1
390U_2.5V_M
PCG23
PCG17
2
PCG27
2
10U_0603_6.3V6M
1
22U_0805_6.3V6M
1
390U_2.5V_M
PCG21
390U_2.5V_M
PCG16
2
22U_0805_6.3V6M
1
PCZ37
22U_0805_6.3V6M
PCG26
2
PCZ36
2
22U_0805_6.3V6M
1
10U_0603_6.3V6M
1
PCZ26
2
PCZ30
2
22U_0805_6.3V6M
1
PCZ40
2
PCZ41
10U_0603_6.3V6M
1
PCZ25
2
22U_0805_6.3V6M
1
PCZ39
2
22U 6.3V M X5R 0603
1
22U_0805_6.3V6M
1
PCZ27
390U_2.5V_M
390U_2.5V_M
PCZ24
2
22U_0805_6.3V6M
1
PCZ38
2
10U_0603_6.3V6M
1
PCZ23
2
22U_0805_6.3V6M
1
1
2
1
PCZ31
2
10U_0603_6.3V6M
1
PCZ29
PCG30
1U_0402_6.3V6K
PCG29
2
2
1
1U_0402_6.3V6K
1
PCZ35
2.2U_0402_6.3V6M
PCZ34
2
2.2U_0402_6.3V6M
1
Security Classification
2013/08/20
Issued Date
Deciphered Date
2016/08/31
Title
PROCESSOR DECOUPLING
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.1
Date:
Sheet
1
41
of
43
SPOK
26,37,42
@PR1001
@ PR1001
0_0402_5%
1
2
@ PC1001
0.22U_0402_10V6K
PR1002
1M_0402_1%
PC1003
0.1U_0603_25V7K
1
2
PL1002
1UH +-20% PCMB063T-1R0MS 12A
1
2
+1R0VALW
+3VALW
1
2
PC1012
22U_0603_6.3V6M
1
2
PC1011
22U_0603_6.3V6M
PR1007
20K_0402_1%
Rdown
+5VALW
1
PJ1801
JUMP_43X79
PC1802
1U_0402_6.3V6K
FB = 0.6V
JUMP_43X118
SY8206DQNC_QFN10_3X3
+3VALW
LDO_3V
LDO
Rup
PC1014
4.7U_0603_6.3V6K
PG
BYP
ILMT
PC1013
4.7U_0603_6.3V6K
FB
3
PJ1001
10 LX_1.0V
PC1010
47U_0805_6.3V6M
PR1004
0_0603_5%
2
LX
BST_1.0V 1
GND
PC1009
47U_0805_6.3V6M
BS
EN
IN
PC1008
330P_0402_50V7K
PR1005
13.7K_0402_1%
10U_0805_25V6K
PC1007
1
2
10U_0805_25V6K
PC1006
1
2
B+_1.0V
PR1006
0_0402_5%
+1R0VALWP
PU1001
@EMI@PC1005
0.1U_0402_25V6
1
2
@EMI@PC1004
2200P_0402_50V7K
1
2
FB_1.8V
PR1802
25.5K_0402_1%
Rup
PC1803
0.01U_0402_25V7K
FB
EN
POK
Vout=0.8V* (1+Rup/Rdown)
+3VS
PR1804
100K_0402_5%
1
2
PJ1802
JUMP_43X79
1
2
1
2
3
4
VOUT
VOUT
8
7
1
@PC1804
@ PC1804
0.1U_0402_16V7K
@PR1803
@ PR1803
20K +-1% 0402
+1.8VALW
EN_1.8VV
VCNTL
VIN
VIN
SPOK
26,37,42
6
5
9
VIN_1.8V
@ PR1801
0_0402_5%
SPOK 1
2
GND
+1.8VALWP
PU1801
APL5930KAI-TRG_SO8
PC1801
4.7U_0603_6.3V6K
26
+1.8V_POK
PR1805
20K_0402_1%
Rdown
PC1805
22U_0603_6.3V6M
B+
@EMI@ PR1003
@EMI@ PC1002
4.7_1206_5%
680P_0603_50V7K
1
2SNB_1.0V 1
2
EMI@ PL1001
HCB2012KF-121T50_0805
1
2
Issued Date
Security Classification
2013/08/20
Deciphered Date
2016/08/31
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
1.8VALW/1.5VS
Document Number
Rev
0.1
LAB151P
Sheet
1
42
of
43
PU1501
SY8003DFC_DFN8_2X2
SUSP#
PC1503
22P_0402_50V8J
1
1
@EMI@
PR1502
4.7_1206_5%
PR1501
30.1K_0402_1%
PR1503
20K_0402_1%
@ PR1504
0_0402_5%
1
2
PC1505
22U_0603_6.3V6M
8
9
EN_1.5V
SGND
PGND
LX_1.5V
PC1504
22U_0603_6.3V6M
FB
EN
LX
PG
+1.5VS
PJ1501
JUMP_43X118
1
2
1
2
PL1502
1UH_NRS4018T1R0NDGJ_3.2A_30%
1
2
IN
+1.5VSP
PR1505
1M_0402_5%
@
PC1506
0.1U_0402_16V7K
1SNB_1.5V
1
2
FB_1.5V
NC
11,26,29,38,39
PGND
B+_1.5V
PC1502
22U_0603_6.3V6M
PC1501
22U_0603_6.3V6M
+3VALW
EMI@
PL1501
HCB1608KF-121T30_0603
1
2
@EMI@
PC1507
680P_0402_50V7K
LAB151P
Security Classification
Issued Date
2013/08/20
Deciphered Date
2016/08/31
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.1
Sheet
1
43
of
43
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