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AN78xx/AN78xxF Series
3-pin positive output voltage regulator (1 A type)
Overview
AN78xx series
Unit: mm
(10.35)
10.00.3
The AN78xx series and the AN78xxF series are 3pin, fixed positive output type monolithic voltage regulators. Stabilized fixed output voltage is obtained from
unstable DC input voltage without using any external
components. 11 types of fixed output voltage are available; 5V, 6V, 7V, 8V, 9V, 10V, 12V, 15V, 18V, 20V, and
24V. They can be used widely in power circuits with current capacity of up to 1A.
4.50.2
1.40.1
1.4 +0.15
0.05
12.50.2
17.00.2
26.10.2
29.00.3
15.40.2
(13.6)
(4.5)
8.70.2
2.90.1
3.70.1
0.8 +0.15
0.05
Features
0.45 +0.2
0.0
2.54 2.54
(2.0) (2.5)
1: Input
2: Common
3: Output
10.50.3
HSIP003-P-0000
AN78xxF series
Unit: mm
(1.73)
13.600.25
4.500.25
8.700.30
17.000.25
3.100.10
2.770.30
4.200.25
3.800.25
10.500.30
5.30
(4.30)
16.700.30
No external components
Output voltage: 5V, 6V, 7V, 8V, 9V, 10V, 12V, 15V, 18V,
20V, 24V
Built-in overcurrent limit circuit
Built-in thermal overload protection circuit
Built-in ASO (area of safe operation) protection circuit
(0.40)
0.800.20 2.000.25
1.400.20
4.500.30
2.54
0.40+0.10
0.05
2.500.25
1: Input
2: Common
3: Output
HSIP003-P-0000A
Block Diagram
Input
Pass Tr
Q1
Current
Source
Current
Limiter
RSC
3
Starter
Voltage
Reference
+
Error Amp.
Output
R2
Thermal
Protection
R1
2
Common
AN78xx/AN78xxF Series
Voltage Regulators
Symbol
Input voltage
Power dissipation
VI
AN78xx series
PD
AN78xxF series
Rating
35 *1
Unit
40 *2
15 *3
10.25 *3
Topr
30 to +80
Storage temperature
Tstg
55 to +150
Symbol
Output voltage
VO
VO
Line regulation
REGIN
Load regulation
REGL
Bias current
Conditions
Tj = 25C
VI = 8 to 20V, IO = 5mA to 1A,
Tj = 0 to 125C, PD *
Min
4.8
Typ
5
4.75
Max
Unit
5.2
5.25
VI = 7.5 to 25 V, Tj = 25C
100
mV
VI = 8 to 12V, Tj = 25C
50
mV
15
100
mV
50
mV
Tj = 25C
mA
IBias(IN)
1.3
mA
IBias(L)
0.5
mA
IBias
Vno
f = 10Hz to 100kHz
RR
VDIF(min)
ZO
IO = 1A, Tj = 25C
f = 1kHz
IO(Short)
VI = 25V, Tj = 25C
IO(Peak)
Tj = 25C
VO/Ta
IO = 5mA, Tj = 0 to 125C
3.9
40
62
V
dB
17
700
mA
0.3
mV/C
Note 1) The specified condition Tj = 25C means that the test should be carried out within so short a test time (within 10ms) that the
characteristic value drift due to the chip junction temperature rise can be ignored.
Note 2) Unless otherwise specified, VI = 10V, IO = 500mA, CI = 0.33F and CO = 0.1F.
* AN78xx series: 15W, AN78xxF series: 10.25W
Voltage Regulators
AN78xx/AN78xxF Series
Symbol
Output voltage
VO
VO
Line regulation
Load regulation
Bias current
REGIN
REGL
IBias
Conditions
Tj = 25C
VI = 9 to 21V, IO = 5mA to 1A,
Tj = 0 to 125C, PD *
Min
5.75
Typ
6
5.7
Max
Unit
6.25
6.3
120
mV
VI = 9 to 13V, Tj = 25C
1.5
60
mV
14
120
mV
60
mV
Tj = 25C
mA
IBias(IN)
1.3
mA
IBias(L)
0.5
mA
Vno
RR
VDIF(min)
ZO
3.9
f = 10Hz to 100kHz
VI = 9 to 19V, IO = 100mA, f = 120Hz
59
IO = 1A, Tj = 25C
f = 1kHz
IO(Short)
VI = 25V, Tj = 25C
IO(Peak)
Tj = 25C
VO/Ta
IO = 5mA, Tj = 0 to 125C
40
dB
2
17
700
mA
0.4
mV/C
Note 1) The specified condition Tj = 25C means that the test should be carried out within so short a test time (within 10ms) that the
characteristic value drift due to the chip junction temperature rise can be ignored.
Note 2) Unless otherwise specified, VI = 11V, IO = 500mA, CI = 0.33F and CO = 0.1F.
* AN78xx series: 15W, AN78xxF series: 10.25W
Symbol
Conditions
Output voltage
VO
VO
Tj = 25C
VI = 10 to 22V, IO = 5mA to 1A,
Tj = 0 to 125C, PD *
Line regulation
Load regulation
Bias current
REGIN
REGL
IBias
Min
6.7
Typ
7
6.6
Max
Unit
7.3
7.4
140
mV
VI = 10 to 15V, Tj = 25C
1.5
70
mV
14
140
mV
70
mV
3.9
mA
IBias(IN)
mA
IBias(L)
0.5
mA
Vno
f = 10Hz to 100kHz
RR
VDIF(min)
ZO
IO = 1A, Tj = 25C
f = 1kHz
IO(Short)
VI = 25V, Tj = 25C
IO(Peak)
Tj = 25C
VO/Ta
IO = 5mA, Tj = 0 to 125C
46
57
V
dB
16
700
mA
0.5
mV/C
Note 1) The specified condition Tj = 25C means that the test should be carried out within so short a test time (within 10ms) that the
characteristic value drift due to the chip junction temperature rise can be ignored.
Note 2) Unless otherwise specified, VI = 12V, IO = 500mA, CI = 0.33F and CO = 0.1F.
* AN78xx series: 15W, AN78xxF series: 10.25W
AN78xx/AN78xxF Series
Voltage Regulators
Symbol
Conditions
Output voltage
VO
VO
Tj = 25C
VI = 11 to 23V, IO = 5mA to 1A,
Tj = 0 to 125C, PD *
Line regulation
Load regulation
Bias current
REGIN
REGL
IBias
Output impedance
ZO
V
mV
mV
12
160
mV
80
mV
3.9
mA
mA
0.5
mA
Tj = 25C
f = 10Hz to 100kHz
VI = 11.5 to 21.5V, IO = 100mA, f = 120Hz
IO(Peak)
Tj = 25C
VO/Ta
IO = 5mA, Tj = 0 to 125C
dB
56
f = 1kHz
VI = 25V, Tj = 25C
52
IO = 1A, Tj = 25C
IO(Short)
8.4
80
RR
160
IBias(L)
VDIF(min)
8.3
7.6
Unit
Max
VI = 11 to 17V, Tj = 25C
IBias(IN)
Vno
7.7
Typ
Min
16
700
mA
0.5
mV/C
Note 1) The specified condition Tj = 25C means that the test should be carried out within so short a test time (within 10ms) that the
characteristic value drift due to the chip junction temperature rise can be ignored.
Note 2) Unless otherwise specified, VI = 14V, IO = 500mA, CI = 0.33F and CO = 0.1F.
* AN78xx series: 15W, AN78xxF series: 10.25W
Conditions
Output voltage
Parameter
VO
VO
Tj = 25C
VI = 12 to 24V, IO = 5mA to 1A,
Tj = 0 to 125C, PD *
Line regulation
REGIN
Load regulation
REGL
Bias current
IBias
IBias(IN)
IBias(L)
8.55
Max
Unit
9.35
9.45
180
mV
90
mV
12
180
mV
90
mV
3.9
mA
mA
0.5
mA
Tj = 25C
VI = 11.5 to 26V, Tj = 25C
IO = 5mA to 1A, Tj = 25C
RR
ZO
f = 10Hz to 100kHz
Output impedance
Typ
Vno
VDIF(min)
8.65
VI = 12 to 18V, Tj = 25C
Min
IO = 1A, Tj = 25C
f = 1kHz
IO(Short)
VI = 26V, Tj = 25C
IO(Peak)
Tj = 25C
VO/Ta
IO = 5mA, Tj = 0 to 125C
57
56
V
dB
16
700
mA
0.5
mV/C
Note 1) The specified condition Tj = 25C means that the test should be carried out within so short a test time (within 10ms) that the
characteristic value drift due to the chip junction temperature rise can be ignored.
Note 2) Unless otherwise specified, VI = 15V, IO = 500mA, CI = 0.33F and CO = 0.1F.
* AN78xx series: 15W, AN78xxF series: 10.25W
Voltage Regulators
AN78xx/AN78xxF Series
Symbol
Conditions
Output voltage
VO
VO
Tj = 25C
VI = 13 to 25V, IO = 5mA to 1A,
Tj = 0 to 125C, PD *
Line regulation
Load regulation
Bias current
REGIN
REGL
IBias
Unit
10.4
10.5
200
mV
100
mV
12
200
mV
100
mV
3.9
mA
mA
0.5
mA
IBias(L)
Vno
f = 10Hz to 100kHz
RR
ZO
Max
2.5
Output impedance
10
9.5
IBias(IN)
VDIF(min)
9.6
Typ
VI = 13 to 19V, Tj = 25C
Min
IO = 1A, Tj = 25C
f = 1kHz
IO(Short)
VI = 27V, Tj = 25C
IO(Peak)
Tj = 25C
VO/Ta
IO = 5mA, Tj = 0 to 125C
63
56
dB
2
16
700
mA
0.6
mV/C
Note 1) The specified condition Tj = 25C means that the test should be carried out within so short a test time (within 10ms) that the
characteristic value drift due to the chip junction temperature rise can be ignored.
Note 2) Unless otherwise specified, VI = 16V, IO = 500mA, CI = 0.33F and CO = 0.1F.
* AN78xx series: 15W, AN78xxF series: 10.25W
Conditions
Output voltage
Parameter
VO
VO
Tj = 25C
VI = 15 to 27V, IO = 5mA to 1A,
Tj = 0 to 125C, PD *
Line regulation
Load regulation
Bias current
REGIN
REGL
IBias
Max
Unit
12.5
12.6
10
240
mV
120
mV
12
240
mV
120
mV
Tj = 25C
mA
mA
0.5
mA
IBias(L)
Vno
f = 10Hz to 100kHz
RR
ZO
12
11.4
VI = 16 to 22V, Tj = 25C
IBias(IN)
VDIF(min)
Typ
Output impedance
11.5
Min
IO = 1A, Tj = 25C
f = 1kHz
IO(Short)
VI = 30V, Tj = 25C
IO(Peak)
Tj = 25C
VO/Ta
IO = 5mA, Tj = 0 to 125C
75
55
V
dB
18
700
mA
0.8
mV/C
Note 1) The specified condition Tj = 25C means that the test should be carried out within so short a test time (within 10ms) that the
characteristic value drift due to the chip junction temperature rise can be ignored.
Note 2) Unless otherwise specified, VI = 19V, IO = 500mA, CI = 0.33F and CO = 0.1F.
* AN78xx series: 15W, AN78xxF series: 10.25W
AN78xx/AN78xxF Series
Voltage Regulators
Symbol
Conditions
Output voltage
VO
VO
Tj = 25C
VI = 18 to 30V, IO = 5mA to 1A,
Tj = 0 to 125C, PD *
Line regulation
Load regulation
Bias current
REGIN
REGL
IBias
11
300
mV
150
mV
12
300
mV
150
mV
Tj = 25C
mA
mA
0.5
mA
VI = 20 to 26V, Tj = 25C
IO = 5mA to 1.5A, Tj = 25C
IBias(L)
Vno
f = 10Hz to 100kHz
RR
ZO
14.25
Output impedance
Unit
15.75
14.4
f = 1kHz
IO(Short)
VI = 30V, Tj = 25C
IO(Peak)
Tj = 25C
VO/Ta
IO = 5mA, Tj = 0 to 125C
90
54
IO = 1A, Tj = 25C
15
Max
IBias(IN)
VDIF(min)
Typ
15.6
Min
dB
2
19
700
mA
mV/C
Note 1) The specified condition Tj = 25C means that the test should be carried out within so short a test time (within 10ms) that the
characteristic value drift due to the chip junction temperature rise can be ignored.
Note 2) Unless otherwise specified, VI = 23V, IO = 500mA, CI = 0.33F and CO = 0.1F.
* AN78xx series: 15W, AN78xxF series: 10.25W
Conditions
Output voltage
Parameter
VO
VO
Tj = 25C
VI = 21 to 33V, IO = 5mA to 1A,
Tj = 0 to 125C, PD *
Line regulation
Load regulation
Bias current
REGIN
REGL
IBias
Max
Unit
18.7
18.9
14
360
mV
180
mV
12
360
mV
180
mV
4.1
mA
mA
0.5
mA
Tj = 25C
VI = 21 to 33V, Tj = 25C
IBias(L)
Vno
f = 10Hz to 100kHz
RR
ZO
18
IBias(IN)
VDIF(min)
Typ
17.1
VI = 24 to 30V, Tj = 25C
Output impedance
17.3
VI = 21 to 33V, Tj = 25C
Min
IO = 1A, Tj = 25C
f = 1kHz
IO(Short)
VI = 35V, Tj = 25C
IO(Peak)
Tj = 25C
VO/Ta
IO = 5mA, Tj = 0 to 125C
110
53
V
dB
16
700
mA
1.1
mV/C
Note 1) The specified condition Tj = 25C means that the test should be carried out within so short a test time (within 10ms) that the
characteristic value drift due to the chip junction temperature rise can be ignored.
Note 2) Unless otherwise specified, VI = 27V, IO = 500mA, CI = 0.33F and CO = 0.1F.
* AN78xx series: 15W, AN78xxF series: 10.25W
Voltage Regulators
AN78xx/AN78xxF Series
Symbol
Conditions
Output voltage
VO
VO
Tj = 25C
VI = 24 to 35V, IO = 5mA to 1A,
Tj = 0 to 125C, PD *
Line regulation
Load regulation
Bias current
REGIN
REGL
IBias
20.8
21
400
mV
200
mV
12
400
mV
200
mV
4.1
mA
mA
0.5
mA
IBias(L)
Vno
f = 10Hz to 100kHz
RR
ZO
19
Unit
15
VI = 23 to 35V, Tj = 25C
Output impedance
20
Max
VI = 23 to 35V, Tj = 25C
IBias(IN)
VDIF(min)
19.2
Typ
VI = 26 to 32V, Tj = 25C
Min
IO = 1A, Tj = 25C
f = 1kHz
IO(Short)
VI = 35V, Tj = 25C
IO(Peak)
Tj = 25C
VO/Ta
IO = 5mA, Tj = 0 to 125C
110
53
dB
2
22
700
mA
1.2
mV/C
Note 1) The specified condition Tj = 25C means that the test should be carried out within so short a test time (within 10ms) that the
characteristic value drift due to the chip junction temperature rise can be ignored.
Note 2) Unless otherwise specified, VI = 29V, IO = 500mA, CI = 0.33F and CO = 0.1F.
* AN78xx series: 15W, AN78xxF series: 10.25W
Conditions
Output voltage
Parameter
VO
VO
Tj = 25C
VI = 28 to 38V, IO = 5mA to 1A,
Tj = 0 to 125C, PD *
Line regulation
Load regulation
Bias current
REGIN
REGL
IBias
Max
Unit
25
25.2
18
480
mV
240
mV
12
480
mV
240
mV
4.1
mA
mA
0.5
mA
Tj = 25C
VI = 27 to 38V, Tj = 25C
IBias(L)
Vno
f = 10Hz to 100kHz
RR
ZO
24
IBias(IN)
VDIF(min)
Typ
22.8
VI = 30 to 36V, Tj = 25C
Output impedance
23
VI = 27 to 38V, Tj = 25C
Min
IO = 1A, Tj = 25C
f = 1kHz
IO(Short)
VI = 38V, Tj = 25C
IO(Peak)
Tj = 25C
VO/Ta
IO = 5mA, Tj = 0 to 125C
170
50
V
dB
28
700
mA
1.4
mV/C
Note 1) The specified condition Tj = 25C means that the test should be carried out within so short a test time (within 10ms) that the
characteristic value drift due to the chip junction temperature rise can be ignored.
Note 2) Unless otherwise specified, VI = 33V, IO = 500mA, CI = 0.33F and CO = 0.1F.
* AN78xx series: 15W, AN78xxF series: 10.25W
AN78xx/AN78xxF Series
Voltage Regulators
14
(2)
12
10
8
(3)
6
4
(1)
10
8
(2)
6
(3)
4
2
(4)
0
40
80
120
160
(4)
160
AN7805
15
10
10
10
Time t (s)
10
120
80
(1)
(2)
(3)
(4)
20
40
AN7805
0
1
1
2
VDIF(min.) Tj
2.4
2.0
IO = 1A
500mA
1.6
200mA
20mA
1.2
0.8
0mA
0.4
0
40
40
80
120
160
12
7
VI = 10V
Tj = 25C
AN7805
14
PD Ta (AN78xx series)
16
5
4
3
2
1
0
10
20
30
Time t (s)
40
50
0.6
1.2
1.8
2.4
Voltage Regulators
AN78xx/AN78xxF Series
Output
1
AN78xx
AN78xxF
CI
CO
Common
Usage Notes
1. Cautions for a basic circuit
CI: When a wiring from a smoothing circuit to a three-pin regulator
is long, it is likely to oscillate in output. A capacitor of 0.1F to
0.47F should be connected near an input pin.
CO: When any sudden change of load current is likely to occur,
connect an electrolytic capacitor of 10F to 100F to improve a
transitional response of output voltage.
Di: Normally unnecessary. But add it in the case that there is a
residual voltage at the output capacitor Co even after switching
off the supply power because a current is likely to flow into an
output pin of the IC and damage the IC.
Di
VI
VO
3
CO
CI
Figure 1
In
Output
Out
2
GND
CO
Figure 2
Q1
VI
IO
1
0.33F
AN78xx
AN78xxF
2
VO
AN78xx
AN78xxF
VO'
R2
VO
0.1F
V '
VO = VO' + IBias + RO R1
2
IBias
R1