Beruflich Dokumente
Kultur Dokumente
Circuitos integrados
NAND2: 7400, 74LS00, 74S00
INV: 74LS04
AND2: 7408, 74LS08, 74S08
NAND4: 74LS20
OR2: 7432, 74LS32, 74S32
D PET FF: 74LS74
JK FF: 7476, 74LS76
XOR: 74LS86
Contador 4 bits: 74LS90, 74LS92, 74LS93
DEC 3:8: 74LS138
MUX 8:1: 74LS151
DEC 4:16: 74LS154
Contador Sincr 4 bits: 74ALS161, 74ALS162, 74ALS163
D FF: 74ALS174, 74ALS175
Contador Up/Down: 74LS190, 74LS191
D FF: 74LS175 (Motorola)
Registros Parallel 4bits: 74LS195
Registros Parallel 8bits: 74LS165
MUX 4:1: 74HC153
Pg.
2
8
13
19
23
28
35
42
48
60
68
75
80
92
101
115
118
128
139
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TIs standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (CRITICAL
APPLICATIONS). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMERS RISK.
In order to minimize risks associated with the customers applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TIs publication of information regarding any third
partys products or services does not constitute TIs approval, warranty or endorsement thereof.
DM74LS04
Hex Inverting Gates
General Description
This device contains six independent gates each of which
performs the logic INVERT function.
Ordering Code:
Order Number
Package Number
Package Description
DM74LS04M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
DM74LS04SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
DM74LS04N
N14A
Devices also available in Tape and Reel. Specify by appending the suffix letter X to the ordering code.
Connection Diagram
Function Table
Y=A
Input
Output
DS006345
www.fairchildsemi.com
August 1986
DM74LS04
Note 1: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The Recommended Operating Conditions table will define the conditions
for actual device operation.
7V
Input Voltage
7V
0C to +70C
65C to +150C
Parameter
Min
Nom
Max
Units
4.75
5.25
VCC
Supply Voltage
VIH
VIL
0.8
IOH
0.4
mA
IOL
mA
TA
70
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
VI
VCC = Min, II = 18 mA
VOH
HIGH Level
Output Voltage
VIL = Max
VOL
LOW Level
Output Voltage
VIH = Min
Typ
Min
(Note 2)
2.7
1.5
V
V
0.35
0.5
0.25
0.4
VCC = Max, VI = 7V
Units
3.4
Max
0.1
V
mA
Input Voltage
IIH
20
IIL
0.36
mA
IOS
100
mA
ICCH
VCC = Max
1.2
2.4
mA
ICCL
VCC = Max
3.6
6.6
mA
20
Switching Characteristics
at VCC = 5V and TA = 25C
RL = 2 k
Symbol
tPLH
tPHL
CL = 15 pF
Parameter
www.fairchildsemi.com
CL = 50 pF
Units
Min
Max
Min
Max
10
15
ns
10
15
ns
DM74LS04
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
Package Number M14A
www.fairchildsemi.com
DM74LS04
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
www.fairchildsemi.com
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
www.fairchildsemi.com
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TIs standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (CRITICAL
APPLICATIONS). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMERS RISK.
In order to minimize risks associated with the customers applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TIs publication of information regarding any third
partys products or services does not constitute TIs approval, warranty or endorsement thereof.
DM74LS20
Dual 4-Input NAND Gate
General Description
This device contains two independent gates each of which
performs the logic NAND function.
Ordering Code:
Order Number
Package Number
Package Description
DM74LS20M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
DM74LS20N
N14A
Devices also available in Tape and Reel. Specify by appending the suffix letter X to the ordering code.
Connection Diagram
Function Table
Y = ABCD
Inputs
Output
DS006355
www.fairchildsemi.com
June 1986
DM74LS20
Note 1: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The Recommended Operating Conditions table will define the conditions
for actual device operation.
7V
Input Voltage
7V
0C to +70C
65C to +150C
Parameter
Min
Nom
Max
4.75
5.25
Units
VCC
Supply Voltage
VIH
VIL
0.8
IOH
0.4
mA
IOL
mA
TA
70
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
VI
VCC = Min, II = 18 mA
VOH
HIGH Level
Output Voltage
VIL = Max
VOL
LOW Level
Output Voltage
VIH = Min
Min
Typ
(Note 2)
2.7
Max
Units
1.5
3.4
0.35
0.5
0.25
0.4
II
VCC = Max, VI = 7V
0.1
IIH
20
IIL
0.36
mA
IOS
100
mA
ICCH
VCC = Max
0.4
0.8
mA
ICCL
VCC = Max
1.2
2.2
mA
20
mA
Switching Characteristics
at VCC = 5V and TA = 25C
RL = 2 k
Symbol
tPLH
CL = 15 pF
Parameter
Propagation Delay Time
LOW-to-HIGH Level Output
tPHL
www.fairchildsemi.com
CL = 50 pF
Units
Min
Max
Min
Max
10
15
ns
10
15
ns
DM74LS20
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
Package Number M14A
www.fairchildsemi.com
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
1A
1B
1Y
2A
2B
2Y
GND
description
These devices contain four independent 2-input
positive-OR gates. They perform the Boolean
functions Y = A B or Y = A + B in positive logic.
12
11
10
VCC
4B
4A
4Y
3B
3A
3Y
1Y
NC
2A
NC
2B
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
4A
NC
4Y
NC
3B
2Y
GND
NC
3Y
3A
OUTPUT
Y
13
FUNCTION TABLE
(each gate)
INPUTS
14
1B
1A
NC
VCC
The
SN54ALS32
and
SN54AS32
are
characterized for operation over the full military
temperature range of 55C to 125C. The
SN74ALS32 and SN74AS32 are characterized for
operation from 0C to 70C.
4B
NC No internal connection
logic symbol
1A
1B
2A
2B
3A
3B
4A
4B
1A
1Y
1B
4
5
2Y
2B
9
10
3Y
3A
3B
12
13
2A
11
4Y
4A
4B
2
4
5
9
10
12
13
11
1Y
2Y
3Y
4Y
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Operating free-air temperature range, TA: SN54ALS32 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55C to 125C
SN74ALS32 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to 70C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65C to 150C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
SN74ALS32
MIN
NOM
MAX
MIN
NOM
MAX
4.5
5.5
4.5
5.5
UNIT
VCC
VIH
Supply voltage
VIL
IOH
0.8
0.8
0.4
0.4
mA
IOL
TA
mA
70
55
125
V
V
SN54ALS32
TYP
MAX
TEST CONDITIONS
VCC = 4.5 V,
VCC = 4.5 V to 5.5 V,
II = 18 mA
IOH = 0.4 mA
VOL
VCC = 4
4.5
5V
IOL = 4 mA
IOL = 8 mA
II
IIH
VCC = 5.5 V,
VCC = 5.5 V,
VI = 7 V
VI = 2.7 V
IIL
IO
VCC = 5.5 V,
VCC = 5.5 V,
VI = 0.4 V
VO = 2.25 V
ICCH
ICCL
VCC = 5.5 V,
VCC = 5.5 V,
VI = 4.5 V
VI = 0
MIN
SN74ALS32
TYP
MAX
MIN
1.5
VCC 2
1.5
VCC 2
0.25
V
V
0.4
0.25
0.4
0.35
0.5
0.1
0.1
mA
20
20
0.1
20
UNIT
112
30
0.1
mA
112
mA
mA
1.9
1.9
2.6
4.9
2.6
4.9
mA
All typical values are at VCC = 5 V, TA = 25C.
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A or B
SN74ALS32
MIN
MAX
MIN
MAX
18
14
16
12
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
UNIT
ns
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Operating free-air temperature range, TA: SN54AS32 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55C to 125C
SN74AS32 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to 70C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65C to 150C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
SN74AS32
MIN
NOM
MAX
MIN
NOM
MAX
4.5
5.5
4.5
5.5
UNIT
VCC
VIH
Supply voltage
VIL
IOH
0.8
0.8
mA
IOL
TA
20
20
mA
70
55
125
V
V
VCC = 4.5 V,
VCC = 4.5 V to 5.5 V,
II = 18 mA
IOH = 2 mA
VOL
II
VCC = 4.5 V,
VCC = 5.5 V,
IOL = 20 mA
VI = 7 V
IIH
IIL
IO
VCC = 5.5 V,
VCC = 5.5 V,
VI = 2.7 V
VI = 0.4 V
VCC = 5.5 V,
VCC = 5.5 V,
VO = 2.25 V
VI = 4.5 V
ICCH
ICCL
SN54AS32
TYP
MAX
TEST CONDITIONS
MIN
SN74AS32
TYP
MAX
MIN
1.2
VCC 2
1.2
VCC 2
0.35
30
0.5
V
V
0.5
0.1
0.1
mA
20
20
0.5
0.5
mA
112
mA
12
mA
112
7.3
UNIT
0.35
30
12
7.3
VCC = 5.5 V,
VI = 0
16.5
26.6
16.5
26.6
mA
All typical values are at VCC = 5 V, TA = 25C.
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
PARAMETER
tPLH
tPHL
FROM
(INPUT)
A or B
TO
(OUTPUT)
MAX
MIN
MAX
7.5
5.8
6.5
5.8
UNIT
ns
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
VCC
S1
RL
R1
Test
Point
From Output
Under Test
CL
(see Note A)
From Output
Under Test
RL
Test
Point
From Output
Under Test
CL
(see Note A)
CL
(see Note A)
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
3.5 V
Timing
Input
Test
Point
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
3.5 V
High-Level
Pulse
1.3 V
R2
1.3 V
1.3 V
0.3 V
0.3 V
tsu
Data
Input
tw
th
3.5 V
1.3 V
3.5 V
Low-Level
Pulse
1.3 V
0.3 V
1.3 V
0.3 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATIONS
3.5 V
Output
Control
(low-level
enabling)
1.3 V
1.3 V
0.3 V
tPZL
Waveform 1
S1 Closed
(see Note B)
tPLZ
[3.5 V
1.3 V
tPHZ
tPZH
Waveform 2
S1 Open
(see Note B)
1.3 V
VOL
0.3 V
VOH
1.3 V
0.3 V
[0 V
3.5 V
1.3 V
Input
1.3 V
0.3 V
tPHL
tPLH
VOH
In-Phase
Output
1.3 V
1.3 V
VOL
tPLH
tPHL
VOH
Out-of-Phase
Output
(see Note C)
1.3 V
1.3 V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
IMPORTANT NOTICE
Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor
product or service without notice, and advises its customers to obtain the latest version of relevant information
to verify, before placing orders, that the information being relied on is current.
TI warrants performance of its semiconductor products and related software to the specifications applicable at
the time of sale in accordance with TIs standard warranty. Testing and other quality control techniques are
utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each
device is not necessarily performed, except those mandated by government requirements.
Certain applications using semiconductor products may involve potential risks of death, personal injury, or
severe property or environmental damage (Critical Applications).
TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED
TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS.
Inclusion of TI products in such applications is understood to be fully at the risk of the customer. Use of TI
products in such applications requires the written approval of an appropriate TI officer. Questions concerning
potential risk applications should be directed to TI through a local SC sales office.
In order to minimize risks associated with the customers applications, adequate design and operating
safeguards should be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance, customer product design, software performance, or
infringement of patents or services described herein. Nor does TI warrant or represent that any license, either
express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property
right of TI covering or relating to any combination, machine, or process in which such semiconductor products
or services might be or are used.
DM74ALS74A
Dual D Positive-Edge-Triggered Flip-Flop
with Preset and Clear
General Description
Features
Switching specifications at 50 pF
Ordering Code:
Order Number
DM74ALS74AM
M14A
DM74ALS74ASJ
M14D
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
DM74ALS74AN
N14A
Devices also available in Tape and Reel. Specify by appending the suffix letter X to the ordering code.
Connection Diagram
Function Table
Inputs
Outputs
PR
CLR
CLK
Q
L
H
H (Note 1)
H (Note 1)
Q0
Q0
L = LOW State
H = HIGH State
X = Don't Care
= Positive Edge Transition
Q0 = Previous Condition of Q
Note 1: This condition is nonstable; it will not persist when preset and clear
inputs return to their inactive (HIGH) level. The output levels in this condition are not guaranteed to meet the VOH specification.
DS006109
www.fairchildsemi.com
September 1986
DM74ALS74A
Logic Diagram
www.fairchildsemi.com
Supply Voltage
7V
Input Voltage
7V
0C to +70C
Note 2: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The Recommended Operating Conditions table will define the conditions
for actual device operation.
65C to +150C
87.0C/W
M Package
117.0C/W
Parameter
Min
Nom
Max
Units
4.5
5.5
VCC
Supply Voltage
VIH
VIL
0.8
V
mA
IOH
0.4
IOL
mA
fCLK
Clock Frequency
34
MHz
tW(CLK)
tW
Pulse Width
Preset & Clear
tSU
0
HIGH
14.5
ns
LOW
14.5
ns
LOW
14.5
ns
Data
15 (Note 3)
PRE or CLR
tH
TA
ns
10 (Note 3)
Inactive
0 (Note 3)
0
ns
70
Note 3: The () arrow indicates the positive edge of the Clock is used for reference.
www.fairchildsemi.com
DM74ALS74A
DM74ALS74A
Electrical Characteristics
over recommended operating free air temperature range. All typical values are measured at VCC = 5V, TA = 25C.
Symbol
Parameter
Conditions
VIK
VCC = 4.5V, II = 18 mA
VOH
HIGH Level
IOH = 0.4 mA
Output Voltage
LOW Level
VCC = 4.5V
Output Voltage
VIH = 2V
VOL
II
IIH
IIL
Min
Typ
Max
Units
1.5
VCC 2
IOL = 8 mA
V
0.35
0.5
Input Current @
VCC = 5.5V,
Clock, D
0.1
VIH = 7V
Preset, Clear
0.2
HIGH Level
VCC = 5.5V,
Clock, D
20
Input Current
VIH = 2.7V
Preset, Clear
40
LOW Level
VCC = 5.5V,
Clock, D
0.2
Input Current
VIL = 0.4V
0.4
IO
ICC
Supply Current
30
2.4
V
mA
A
mA
112
mA
mA
Note 4: ICC is measured with D, CLK and PRESET grounded, then with D, CLK and CLEAR grounded.
Note 5: IIL PRE and CLR pins not guaranteed to meet specifications with both PRE and CLK LOW.
Switching Characteristics
over recommended operating free air temperature range.
Parameter
Conditions
From
To
Min
Max
Units
fMAX
34
tPLH
RL = 500
13
ns
tPHL
CL = 50 pF
15
ns
16
ns
18
ns
tPLH
tPHL
www.fairchildsemi.com
Preset or Clear
Clock
Q or Q
Q or Q
MHz
DM74ALS74A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M14A
www.fairchildsemi.com
DM74ALS74A
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
www.fairchildsemi.com
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
www.fairchildsemi.com
SN5476, SN54LS76A
SN7476, SN74LS76A
DUAL J-K FLIP-FLOPS WITH PRESET AND CLEAR
SDLS121 DECEMBER 1983 REVISED MARCH 1988
SN5476, SN54LS76A
SN7476, SN74LS76A
DUAL J-K FLIP-FLOPS WITH PRESET AND CLEAR
SDLS121 DECEMBER 1983 REVISED MARCH 1988
SN5476, SN54LS76A
SN7476, SN74LS76A
DUAL J-K FLIP-FLOPS WITH PRESET AND CLEAR
SDLS121 DECEMBER 1983 REVISED MARCH 1988
SN5476, SN54LS76A
SN7476, SN74LS76A
DUAL J-K FLIP-FLOPS WITH PRESET AND CLEAR
SDLS121 DECEMBER 1983 REVISED MARCH 1988
SN5476, SN54LS76A
SN7476, SN74LS76A
DUAL J-K FLIP-FLOPS WITH PRESET AND CLEAR
SDLS121 DECEMBER 1983 REVISED MARCH 1988
SN5476, SN54LS76A
SN7476, SN74LS76A
DUAL J-K FLIP-FLOPS WITH PRESET AND CLEAR
SDLS121 DECEMBER 1983 REVISED MARCH 1988
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TIs standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (CRITICAL
APPLICATIONS). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMERS RISK.
In order to minimize risks associated with the customers applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TIs publication of information regarding any third
partys products or services does not constitute TIs approval, warranty or endorsement thereof.
1A
1B
1Y
2A
2B
2Y
GND
description
These devices contain four independent 2-input
exclusive-OR gates. They perform the Boolean
functions Y = A B or Y = AB + AB in positive
logic.
A common application is as a true/complement
element. If one of the inputs is low, the other input
is reproduced in true form at the output. If one of
the inputs is high, the signal on the other input is
reproduced inverted at the output.
OUTPUT
Y
12
11
10
VCC
4B
4A
4Y
3B
3A
3Y
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
4A
NC
4Y
NC
3B
2Y
GND
NC
3Y
3A
13
1B
1A
NC
VCC
4B
1Y
NC
2A
NC
2B
FUNCTION TABLE
(each gate)
INPUTS
14
NC No internal connection
logic symbol
1A
1B
2A
2B
3A
3B
4A
4B
=1
2
4
1Y
2Y
9
8
10
3Y
12
11
13
4Y
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
exclusive-OR logic
An exclusive-OR gate has many applications, some of which can be represented better by alternative logic
symbols.
EXCLUSIVE-OR
=1
These are five equivalent exclusive-OR symbols valid for an ALS86 or AS86A gate in positive logic. Negation
may be shown at any two ports.
LOGIC-IDENTITY ELEMENT
=
EVEN-PARITY ELEMENT
2k
2k + 1
ODD-PARITY ELEMENT
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Operating free-air temperature range, TA: SN54ALS86 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55C to 125C
SN74ALS86 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to 70C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65C to 150C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
SN74ALS86
MIN
NOM
MAX
MIN
NOM
MAX
4.5
5.5
4.5
5.5
UNIT
VCC
VIH
Supply voltage
VIL
IOH
0.7
0.8
0.4
0.4
mA
IOL
TA
mA
70
55
125
V
V
SN54ALS86
TYP
MAX
TEST CONDITIONS
VCC = 4.5 V,
VCC = 4.5 V to 5.5 V,
II = 18 mA
IOH = 0.4 mA
VOL
5V
VCC = 4
4.5
IOL = 4 mA
IOL = 8 mA
II
IIH
VCC = 5.5 V,
VCC = 5.5 V,
VI = 7 V
VI = 2.7 V
IIL
IO
VCC = 5.5 V,
VCC = 5.5 V,
VI = 0.4 V
VO = 2.25 V
MIN
SN74ALS86
TYP
MAX
MIN
1.5
VCC 2
1.5
VCC 2
0.25
0.4
V
V
0.25
0.4
0.35
0.5
0.1
0.1
mA
20
20
0.1
mA
112
mA
0.1
20
UNIT
112
30
ICC
VCC = 5.5 V,
All inputs at 4.5 V
3.9
5.9
3.9
5.9
mA
All typical values are at VCC = 5 V, TA = 25C.
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A or B
(other input low)
tPLH
tPHL
A or B
(other input high)
MAX
MIN
MAX
22
17
14
12
22
17
12
10
UNIT
ns
ns
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Operating free-air temperature range, TA: SN54AS86A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55C to 125C
SN74AS86A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to 70C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65C to 150C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
SN74AS86A
MIN
NOM
MAX
MIN
NOM
MAX
4.5
5.5
4.5
5.5
UNIT
VCC
VIH
Supply voltage
VIL
IOH
0.8
0.8
mA
IOL
TA
20
20
mA
70
55
125
V
V
SN54AS86A
TYP
MAX
TEST CONDITIONS
MIN
VIK
VOH
VCC = 4.5 V,
VCC = 4.5 V to 5.5 V,
II = 18 mA
IOH = 2 mA
VOL
II
VCC = 4.5 V,
VCC = 5.5 V,
IOL = 20 mA
VI = 7 V
IIH
IIL
IO
VCC = 5.5 V,
VCC = 5.5 V,
VI = 2.7 V
VI = 0.4 V
VCC = 5.5 V,
VCC = 5.5 V,
VO = 2.25 V
VI(A) = 4.5 V, VI(B) = 0
ICCH
ICCL
SN74AS86A
TYP
MAX
MIN
1.2
VCC 2
1.2
VCC 2
0.35
30
0.5
V
V
0.5
0.1
0.1
mA
20
20
0.5
0.5
mA
112
mA
18
mA
112
11
UNIT
0.35
30
18
11
VCC = 5.5 V,
VI = 4.5 V
20
38
20
38
mA
All typical values are at VCC = 5 V, TA = 25C.
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A or B
(other input low)
tPLH
tPHL
A or B
(other input high)
MAX
MIN
MAX
8.5
7.5
6.5
6.5
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
UNIT
ns
ns
VCC
S1
RL
R1
Test
Point
From Output
Under Test
CL
(see Note A)
From Output
Under Test
RL
Test
Point
From Output
Under Test
CL
(see Note A)
CL
(see Note A)
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
3.5 V
Timing
Input
Test
Point
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
3.5 V
High-Level
Pulse
1.3 V
R2
1.3 V
1.3 V
0.3 V
0.3 V
tsu
Data
Input
tw
th
3.5 V
1.3 V
3.5 V
Low-Level
Pulse
1.3 V
0.3 V
1.3 V
0.3 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATIONS
3.5 V
Output
Control
(low-level
enabling)
1.3 V
1.3 V
0.3 V
tPZL
Waveform 1
S1 Closed
(see Note B)
tPLZ
[3.5 V
1.3 V
tPHZ
tPZH
Waveform 2
S1 Open
(see Note B)
1.3 V
VOL
0.3 V
VOH
1.3 V
0.3 V
[0 V
3.5 V
1.3 V
Input
1.3 V
0.3 V
tPHL
tPLH
VOH
In-Phase
Output
1.3 V
1.3 V
VOL
tPLH
tPHL
VOH
Out-of-Phase
Output
(see Note C)
1.3 V
1.3 V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
IMPORTANT NOTICE
Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor
product or service without notice, and advises its customers to obtain the latest version of relevant information
to verify, before placing orders, that the information being relied on is current.
TI warrants performance of its semiconductor products and related software to the specifications applicable at
the time of sale in accordance with TIs standard warranty. Testing and other quality control techniques are
utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each
device is not necessarily performed, except those mandated by government requirements.
Certain applications using semiconductor products may involve potential risks of death, personal injury, or
severe property or environmental damage (Critical Applications).
TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED
TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS.
Inclusion of TI products in such applications is understood to be fully at the risk of the customer. Use of TI
products in such applications requires the written approval of an appropriate TI officer. Questions concerning
potential risk applications should be directed to TI through a local SC sales office.
In order to minimize risks associated with the customers applications, adequate design and operating
safeguards should be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance, customer product design, software performance, or
infringement of patents or services described herein. Nor does TI warrant or represent that any license, either
express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property
right of TI covering or relating to any combination, machine, or process in which such semiconductor products
or services might be or are used.
10
11
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TIs standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (CRITICAL
APPLICATIONS). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMERS RISK.
In order to minimize risks associated with the customers applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TIs publication of information regarding any third
partys products or services does not constitute TIs approval, warranty or endorsement thereof.
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TIs standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (CRITICAL
APPLICATIONS). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMERS RISK.
In order to minimize risks associated with the customers applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TIs publication of information regarding any third
partys products or services does not constitute TIs approval, warranty or endorsement thereof.
DM74LS151
1-of-8 Line Data Selector/Multiplexer
General Description
Features
This data selector/multiplexer contains full on-chip decoding to select the desired data source. The DM74LS151
selects one-of-eight data sources. The DM74LS151 has a
strobe input which must be at a low logic level to enable
these devices. A high level at the strobe forces the W output HIGH, and the Y output LOW.
Ordering Code:
Order Number
Package Number
Package Description
DM74LS151M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
DM74LS151SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
DM74LS151N
N16E
Devices also available in Tape and Reel. Specify by appending the suffix letter X to the ordering code.
Connection Diagram
Truth Table
Inputs
Outputs
Select
Strobe
D0
D0
D1
D1
D2
D2
D3
D3
D4
D4
D5
D5
D6
D6
D7
D7
H = HIGH Level
L = LOW Level
X = Don't Care
D0, D1...D7 = the level of the respective D input
DS006392
www.fairchildsemi.com
August 1986
DM74LS151
Logic Diagrams
Address Buffers
www.fairchildsemi.com
Supply Voltage
Note 1: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The Recommended Operating Conditions table will define the conditions
for actual device operation.
7V
Input Voltage
7V
0C to +70C
65C to +150C
Parameter
Min
Nom
Max
4.75
5.25
Units
VCC
Supply Voltage
VIH
VIL
0.8
IOH
0.4
mA
IOL
mA
TA
70
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
VI
VCC = Min, II = 18 mA
VOH
HIGH Level
Output Voltage
VOL
LOW Level
Output Voltage
Min
Typ
(Note 2)
Max
1.5
2.7
3.4
Units
V
V
0.35
0.5
0.25
0.4
II
VCC = Max, VI = 7V
0.1
IIH
20
IIL
0.4
mA
IOS
100
mA
ICC
Supply Current
10
mA
20
6
mA
www.fairchildsemi.com
DM74LS151
DM74LS151
Switching Characteristics
at VCC = 5V and TA = 25C
RL = 2 k
From (Input)
Symbol
Parameter
To (output)
CL = 15 pF
Min
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
www.fairchildsemi.com
Select
(4 Levels) to Y
Select
(4 Levels) to Y
Select
(3 Levels) to W
Select
(3 Levels) to W
Strobe
to Y
Strobe
to Y
Strobe
to W
Strobe
to W
D0 thru D7
to Y
D0 thru D7
to Y
D0 thru D7
to W
D0 thru D7
to W
Max
CL = 50 pF
Min
Units
Max
43
46
ns
30
36
ns
23
25
ns
32
40
ns
42
44
ns
32
40
ns
24
27
ns
30
36
ns
32
35
ns
26
33
ns
21
25
ns
20
27
ns
DM74LS151
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M16A
www.fairchildsemi.com
DM74LS151
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
www.fairchildsemi.com
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
www.fairchildsemi.com
DM74LS154
4-Line to 16-Line Decoder/Demultiplexer
General Description
Features
Each of these 4-line-to-16-line decoders utilizes TTL circuitry to decode four binary-coded inputs into one of sixteen mutually exclusive outputs when both the strobe
inputs, G1 and G2, are LOW. The demultiplexing function
is performed by using the 4 input lines to address the output line, passing data from one of the strobe inputs with the
other strobe input LOW. When either strobe input is HIGH,
all outputs are HIGH. These demultiplexers are ideally
suited for implementing high-performance memory decoders. All inputs are buffered and input clamping diodes are
provided to minimize transmission-line effects and thereby
simplify system design.
23 ns
Strobe
19 ns
Ordering Code:
Order Number
Package Number
Package Description
DM74LS154WM
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74LS154N
N24A
Devices also available in Tape and Reel. Specify by appending the suffix letter X to the ordering code.
Connection Diagram
Logic Diagram
DS006394
www.fairchildsemi.com
August 1986
DM74LS154
Function Table
Inputs
Outputs
G1
G2
10
11
12
13
14
15
H = HIGH Level
L = Low Level
X = Dont Care
www.fairchildsemi.com
Supply Voltage
Note 1: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The Recommended Operating Conditions table will define the conditions
for actual device operation.
7V
Input Voltage
7V
0C to +70C
65C to +150C
Parameter
Min
Nom
Max
4.75
5.25
Units
VCC
Supply Voltage
VIH
VIL
0.8
IOH
0.4
mA
IOL
mA
TA
70
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
VI
VCC = Min, II = 18 mA
VOH
HIGH Level
Output Voltage
VOL
Min
Typ
(Note 2)
Max
1.5
2.7
3.4
Units
V
V
LOW Level
0.25
0.4
Output Voltage
0.35
0.5
0.25
0.4
II
VCC = Max, VI = 7V
0.1
IIH
20
IIL
0.4
mA
IOS
100
mA
ICC
Supply Current
14
mA
20
9
mA
Switching Characteristics
at VCC = 5V and TA = 25C
RL = 2 k
From (Input)
Symbol
Parameter
To (Output)
CL = 15 pF
Min
tPLH
tPHL
tPLH
tPHL
Max
CL = 50 pF
Min
Units
Max
Data to Output
30
35
ns
Data to Output
30
35
ns
Strobe to Output
20
25
ns
Strobe to Output
25
35
ns
www.fairchildsemi.com
DM74LS154
DM74LS154
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M24B
www.fairchildsemi.com
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
www.fairchildsemi.com
tm
Features
Switching specifications at 50pF
Switching specifications guaranteed over full
General Description
These synchronous presettable counters feature an
internal carry look ahead for application in high speed
counting designs. The DM74ALS162B is a four-bit
decade counter, while the DM74ALS161B and
DM74ALS163B are four-bit binary counters. The
DM74ALS161B clears asynchronously, while the
DM74ALS162B and DM74ALS163B clear synchronously. The carry output is decoded to prevent spikes
during normal counting mode of operation. Synchronous
operation is provided by having all flip-flops clocked
simultaneously so that outputs change coincident with
each other when so instructed by count enable inputs
and internal gating. This mode of operation eliminates
the output counting spikes which are normally associated with asynchronous (ripple clock) counters. A
buffered clock input triggers the four flip-flops on the
rising (positive-going) edge of the clock input waveform.
These counters are fully programmable, that is, the outputs may be preset to either level. As presetting is synchronous, setting up a low level at the load input
disables the counter and causes the outputs to agree
with set up data after the next clock pulse regardless of
the levels of enable input. LOW-to-HIGH transitions at
the load input are perfectly acceptable regardless of the
logic levels on the clock or enable inputs.
The DM74ALS161B clear function is asynchronous. A
low level at the clear input sets all four of the flip-flop
outputs LOW regardless of the levels of clock, load or
enable inputs. These two counters are provided with a
clear on power-up feature. The DM74ALS162B and
DM74ALS163B clear function is synchronous; and a low
level at the clear input sets all four of the flip-flop outputs
www.fairchildsemi.com
May 2007
Order
Number
Package
Number
Package Description
DM74ALS161BM
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
DM74ALS162BM
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
DM74ALS162BN
N16E
DM74ALS163BM
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
DM74ALS163BN
N16E
Devices also available in Tape and Reel. Specify by appending the suffix letter X to the ordering number.
Connection Diagram
Clear
Load
Enable T
Enable P
Reset (Clear)
Count (Increment)
No Change (Hold)
No Change (Hold)
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2
Ordering Information
Logic Diagrams
DM74ALS161B
www.fairchildsemi.com
3
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4
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5
Timing Diagrams
DM74ALS162B
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6
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7
Symbol
VCC
Parameter
Rating
Supply Voltage
7V
VI
Input Voltage
7V
TA
TSTG
JA
0C to +70C
65C to +150C
N Package
78.1C/W
M Package
106.8C/W
Symbol
Parameter
VCC
Supply Voltage
VIH
Min.
Nom.
Max.
Units
4.5
5.5
VIL
0.8
IOH
0.4
mA
IOL
mA
40
MHz
fCLK
tSETUP
Clock Frequency
Setup Time
0
Data; A, B, C, D
15(1)
En P, En T
15(1)
Load
15(1)
tW
TA
Hold Time
LOW
15(1)
HIGH
12(1)
Clear Inactive
10
ns
Data; A, B, C, D
0(1)
En P, En T
0(1)
Load
0(1)
0(1)
Clear
Width of Clock or
Clear Pulse
ns
12.5
ns
15
15
70
Note:
1. The symbol () indicates that the rising edge of the clock is used as a reference.
www.fairchildsemi.com
8
Symbol
Parameter
Conditions
Min.
VIK
VOH
VOL
VCC = 4.5V
II
IIH
Typ.
Max.
1.5
IOL = 4mA
0.25
0.4
0.35
0.5
IO
ICC
Supply Current
VCC = 5.5V
V
V
IOL = 8mA
IIL
Units
0.1
mA
20
0.2
mA
112
mA
21
mA
Min. Max.
Units
30
12
Symbol
Parameter
fMAX
tPLH
tPHL
Conditions
VCC = 4.5V to 5.5V,
RL = 500,
CL = 50pF
From
To
40
MHz
Clock
Ripple Carry
20
ns
Clock
Ripple Carry
20
ns
tPLH
Clock
Any Q
15
ns
tPHL
Clock
Any Q
20
ns
tPLH
En T
Ripple Carry
13
ns
tPHL
En T
Ripple Carry
13
ns
tPHL
Clear
Any Q
24
ns
Clear
Ripple Carry
11
23
Symbol
Parameter
fMAX
tPLH
tPHL
tPLH
Conditions
VCC = 4.5V to 5.5V,
RL = 500,
CL = 50pF,
TA = Min. to Max.
From
To
Min. Max.
40
Units
MHz
Clock
Ripple Carry
20
ns
Clock
Ripple Carry
20
ns
Clock
Any Q
15
ns
tPHL
Clock
Any Q
20
ns
tPLH
En T
Ripple Carry
13
ns
tPHL
En T
Ripple Carry
13
ns
www.fairchildsemi.com
9
Electrical Characteristics
Over recommended operating free air temperature range. All typical values are measured at VCC = 5V, TA = 25C.
Physical Dimensions
Dimensions are in millimeters unless otherwise noted.
Figure 1. 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M16A
www.fairchildsemi.com
10
Figure 2. 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N16E
www.fairchildsemi.com
11
The following are registered and unregistered trademarks and service marks Fairchild Semiconductor owns or is authorized to use and
is not intended to be an exhaustive list of all such trademarks
ACEx
Build it Now
CorePLUS
CROSSVOLT
CTL
Current Transfer Logic
EcoSPARK
FACT Quiet Series
FACT
FAST
FastvCore
FPS
FRFET
Global Power ResourceSM
Green FPS
Power-SPM
PowerTrench
Programmable Active Droop
QFET
QS
QT Optoelectronics
Quiet Series
RapidConfigure
SMART START
SPM
STEALTH
SuperFET
SuperSOT-3
SuperSOT-6
SuperSOT-8
SyncFET
The Power Franchise
TinyBoost
TinyBuck
TinyLogic
TINYOPTO
TinyPower
TinyPWM
TinyWire
SerDes
UHC
UniFET
VCX
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS
HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF
THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE
UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF
FAIRCHILDS WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE
PRODUCTS.
2.
Product Status
Definition
Advance Information
Formative or In Design
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
www.fairchildsemi.com
12
TRADEMARKS
DM74ALS174, DM74ALS175
Hex/Quad D-Type Flip-Flops with Clear
tm
Features
General Description
TTL process
Pin and functional compatible with LS family
counterpart
Typical clock frequency maximum is 80MHz
Switching performance guaranteed over full
temperature and VCC supply range
Ordering Information
Ordering
Code
Package
Number
Package Description
DM74ALS174M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
DM74ALS174SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
DM74ALS175M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
DM74ALS175SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
DM74ALS175N
N16E
Devices also available in Tape and Reel. Specify by appending the suffix letter X to the ordering number.
www.fairchildsemi.com
May 2007
Connection Diagrams
DM74ALS174
DM74ALS175
www.fairchildsemi.com
2
Function Table
Inputs
Outputs
Clear
Clock
Q(1)
Q0
Q0
Logic Diagrams
DM74ALS174
DM74ALS175
www.fairchildsemi.com
3
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
VCC
Parameter
Rating
Supply Voltage
7V
VI
Input Voltage
7V
TA
TSTG
JA
0C to +70C
65C to +150C
N Package
77.9C/W
M Package
107.3C/W
Symbol
Parameter
VCC
Supply Voltage
VIH
Min.
Nom.
Max.
Units
4.5
5.5
VIL
0.8
IOH
0.4
mA
IOL
mA
tW
Pulse Width
10
Clear LOW
10
Data Input
10
ns
tSETUP
Setup Time(2)
tHOLD
fCLOCK
Clock Frequency
50
MHz
70
TA
ns
ns
Note:
2. The symbol indicates that the rising edge of the clock is used as reference.
www.fairchildsemi.com
4
Over recommended operating free air temperature range. All typical values are measured at VCC = 5V, TA = 25C.
Symbol
VIK
Parameter
Input Clamp Voltage
Conditions
Min.
Typ.
Max.
Units
1.5
VOH
VOL
II
IIH
VCC 2
VCC 1.6
0.35
0.5
0.1
mA
20
IIL
0.1
mA
IO
112
mA
ICC
Supply Current
VCC = 5.5V,
Clock = 4.5V,
Clear = GND,
D Input = GND
mA
30
DM74ALS174
11
19
DM74ALS175
14
Switching Characteristics
Over recommended operating free air temperature range.
Symbol
Parameter
fMAX
tPLH
tPHL
Conditions
Min.
RL = 500,
CL = 50pF,
VCC = 4.5V to 5.5V
50
Max.
Units
MHz
18
ns
23
ns
tPLH
15
ns
tPHL
17
ns
www.fairchildsemi.com
5
Electrical Characteristics
Physical Dimensions
Dimensions are in millimeters unless otherwise noted.
Figure 1. 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M16A
www.fairchildsemi.com
6
Figure 2. 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
www.fairchildsemi.com
7
Figure 3. 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N16E
www.fairchildsemi.com
8
The following are registered and unregistered trademarks and service marks Fairchild Semiconductor owns or is authorized to use and
is not intended to be an exhaustive list of all such trademarks
ACEx
Build it Now
CorePLUS
CROSSVOLT
CTL
Current Transfer Logic
EcoSPARK
FACT Quiet Series
FACT
FAST
FastvCore
FPS
FRFET
Global Power ResourceSM
Green FPS
Power-SPM
PowerTrench
Programmable Active Droop
QFET
QS
QT Optoelectronics
Quiet Series
RapidConfigure
SMART START
SPM
STEALTH
SuperFET
SuperSOT-3
SuperSOT-6
SuperSOT-8
SyncFET
The Power Franchise
TinyBoost
TinyBuck
TinyLogic
TINYOPTO
TinyPower
TinyPWM
TinyWire
SerDes
UHC
UniFET
VCX
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS
HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF
THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE
UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF
FAIRCHILDS WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE
PRODUCTS.
2.
Product Status
Definition
Advance Information
Formative or In Design
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
www.fairchildsemi.com
9
TRADEMARKS
10
11
12
13
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TIs standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (CRITICAL
APPLICATIONS). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMERS RISK.
In order to minimize risks associated with the customers applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TIs publication of information regarding any third
partys products or services does not constitute TIs approval, warranty or endorsement thereof.
SN54/74LS175
QUAD D FLIP-FLOP
The LSTTL / MSI SN54 / 74LS175 is a high speed Quad D Flip-Flop. The
device is useful for general flip-flop requirements where clock and clear inputs
are common. The information on the D inputs is stored during the LOW to
HIGH clock transition. Both true and complemented outputs of each flip-flop
are provided. A Master Reset input resets all flip-flops, independent of the
Clock or D inputs, when LOW.
The LS175 is fabricated with the Schottky barrier diode process for high
speed and is completely compatible with all Motorola TTL families.
QUAD D FLIP-FLOP
LOW POWER SCHOTTKY
J SUFFIX
CERAMIC
CASE 620-09
Q3
Q3
D3
D2
Q2
Q2
CP
16
15
14
13
12
11
10
16
1
NOTE:
The Flatpak version
has the same pinouts
(Connection Diagram) as
the Dual In-Line Package.
1
MR
2
Q0
3
Q0
4
D0
5
D1
6
Q1
7
Q1
16
1
8
GND
PIN NAMES
LOADING (Note a)
0.5 U.L.
0.5 U.L.
0.5 U.L.
10 U.L.
10 U.L.
Data Inputs
Clock (Active HIGH Going Edge) Input
Master Reset (Active LOW) Input
True Outputs (Note b)
Complemented Outputs (Note b)
0.25 U.L.
0.25 U.L.
0.25 U.L.
5 (2.5) U.L.
5 (2.5) U.L.
ORDERING INFORMATION
SN54LSXXXJ
SN74LSXXXN
SN74LSXXXD
NOTES:
a. 1 TTL Unit Load (U.L.) = 40 A HIGH/1.6 mA LOW.
b. The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)
b. Temperature Ranges.
D2
D1
12
13
D Q
D Q
CP Q
CD
CP Q
CD
CP Q
CD
CP Q
CD
VCC = PIN 16
Q3 Q3
GND = PIN 8
= PIN NUMBERS
11
10
Q2 Q2
12
13
D0
D1
D2
D3
D Q
15
4
D0
5
D Q
14
Ceramic
Plastic
SOIC
LOGIC SYMBOL
LOGIC DIAGRAM
MR CP D3
D SUFFIX
SOIC
CASE 751B-03
16
LOW
HIGH
D0 D3
CP
MR
Q0 Q3
Q0 Q 3
N SUFFIX
PLASTIC
CASE 648-08
Q1Q1
Q0 Q0
CP
MR
Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3
11
VCC = PIN 16
GND = PIN 8
10 14 15
SN54/74LS175
FUNCTIONAL DESCRIPTION
LOW input on the Master Reset (MR) will force all Q outputs
LOW and Q outputs HIGH independent of Clock or Data
inputs.
The LS175 is useful for general logic applications where a
common Master Reset and Clock are acceptable.
TRUTH TABLE
Inputs (t = n, MR = H)
L
H
L
H
H
L
Parameter
Min
Typ
Max
Unit
VCC
Supply Voltage
54
74
4.5
4.75
5.0
5.0
5.5
5.25
TA
54
74
55
0
25
25
125
70
IOH
54, 74
0.4
mA
IOL
54
74
4.0
8.0
mA
Min
P
Parameter
VIH
VIL
VIK
Typ
VOL
IIH
IIL
IOS
ICC
Guaranteed Input
p LOW Voltage
g for
All Inputs
0.8
0.65
1.5
T
Test
C
Conditions
di i
Guaranteed Input HIGH Voltage for
All Inputs
0.7
74
U i
Unit
2.0
54
VOH
Max
54
2.5
3.5
74
2.7
3.5
54, 74
0.25
0.4
IOL = 4.0 mA
74
0.35
0.5
IOL = 8.0 mA
20
0.1
mA
0.4
mA
100
mA
VCC = MAX
18
mA
VCC = MAX
20
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
SN54/74LS175
AC CHARACTERISTICS (TA = 25C)
Limits
S b l
Symbol
P
Parameter
Min
Typ
30
40
Max
U i
Unit
fMAX
tPLH
tPHL
20
20
30
30
ns
tPLH
tPHL
13
16
25
25
ns
Max
U i
Unit
T
Test
C
Conditions
di i
MHz
VCC = 5.0
50V
CL = 15 pF
P
Parameter
Min
Typ
tW
20
ns
ts
20
ns
th
5.0
ns
trec
Recovery Time
25
ns
T
C
di i
Test
Conditions
VCC = 5
5.0
0V
AC WAVEFORMS
1/fmax
CP
1.3 V
1.3 V
ts(H)
D
tw
t
th(H) s(L)
1.3 V
1.3 V
tPLH
1.3 V
tPHL
1.3 V
tW
1.3 V
MR
th(L)
1.3 V
trec
1.3 V
1.3 V
CP
Q
tPHL
1.3 V
tPLH
tPHL
1.3 V
1.3 V
1.3 V
1.3 V
tPLH
1.3 V
DEFINITIONS OF TERMS
SETUP TIME (ts) is defined as the minimum time required
for the correct logic level to be present at the logic input prior to
the clock transition from LOW to HIGH in order to be recognized and transferred to the outputs.
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TIs standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (CRITICAL
APPLICATIONS). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMERS RISK.
In order to minimize risks associated with the customers applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TIs publication of information regarding any third
partys products or services does not constitute TIs approval, warranty or endorsement thereof.
D
D
D
D
Complementary Outputs
Direct Overriding Load (Data) Inputs
Gated Clock Inputs
Parallel-to-Serial Data Conversion
TYPICAL MAXIMUM
CLOCK FREQUENCY
TYPICAL
POWER DISSIPATION
165
26 MHz
210 mW
LS165A
35 MHz
90 mW
TYPE
SH/LD
CLK
E
F
G
H
QH
GND
description
16
15
14
13
12
11
10
VCC
CLK INH
D
C
B
A
SER
QH
CLK
SH/LD
NC
VCC
CLK INH
SN54LS165A . . . FK PACKAGE
(TOP VIEW)
E
F
NC
G
H
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
D
C
NC
B
A
QH
GND
NC
QH
SER
NC No internal connection
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2002, Texas Instruments Incorporated
ORDERING INFORMATION
ORDERABLE
PART NUMBER
PACKAGE
TA
PDIP N
0C to 70C
Tube
SN74LS165AN
Tube
SN74LS165AD
SN74LS165ADR
SN74LS165ANSR
74LS165A
Tube
SN54LS165AJ
SN54LS165AJ
Tube
SNJ54LS165AJ
SNJ54LS165AJ
CFP W
Tube
SNJ54LS165AW
SNJ54LS165AW
LCCC FK
Tube
SNJ54LS165AFK
SNJ54LS165AFK
SOIC D
SOP NS
CDIP J
55C
55C to 125C
TOP-SIDE
MARKING
SN74LS165AN
LS165A
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
FUNCTION TABLE
INTERNAL
OUTPUTS
INPUTS
SH/LD
CLK INH
CLK
SER
PARALLEL
A...H
QA
QB
OUTPUT
QH
a...h
QA0
QB0
QH0
QAn
QGn
QAn
QGn
QA0
QB0
QH0
VCC
VCC
100 NOM
Req
Input
Output
LS165A
EQUIVALENT OF PARALLEL
INPUTS AND SERIAL INPUT
EQUIVALENT OF ALL
OTHER INPUTS
VCC
Req
24 k NOM
Input
Input
Output
B
11
C
12
D
13
E
14
F
3
H
5
15
2
S
C1
1D
R
10
QA
S
C1
1D
R
QB
S
C1
1D
R
QC
S
C1
1D
R
QD
S
C1
1D
R
QE
S
C1
1D
R
S
C1
1D
R
QF
CLK INH
SER
SH/LD
Data
Inputs
Output QH
Output QH
Inhibit
Serial Shift
Load
QG
S
C1
1D
R
9
7
QH
QH
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, VI: SN54165, SN74165 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
SN54LS165A, SN74LS165A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Interemitter voltage (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Package thermal impedance JA (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65C to 150C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. Voltage values, except interemitter voltage, are with respect to network ground terminal.
2. This is the voltage between two emitters of a multiple-emitter transistor. This rating applies for the 165 to the SH/LD input in
conjunction with the CLK INH input.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
SN74165
MIN
NOM
MAX
MIN
NOM
MAX
4.5
5.5
4.75
5.25
UNIT
VCC
IOH
Supply voltage
High-level output current
800
800
mA
IOL
fclock
16
16
mA
20
MHz
tw(clock)
tw(load)
25
25
ns
15
15
ns
tsu
tsu
30
30
ns
10
10
ns
tsu
tsu
20
20
ns
45
45
ns
th
TA
ns
Clock frequency
55
20
125
70
TEST CONDITIONS
PARAMETER
VIH
VIL
VIK
VOH
VOL
MIN
TYP
SN74165
MAX
2
II = 12 mA
VIH = 2 V,
IOH = 800 mA
VCC = MIN,
VIL = 0.8 V,
VIH = 2 V,
IOL = 16 mA
II
VCC = MAX,
VI = 5.5 V
IIH
VCC = MAX
MAX,
4V
VI = 2
2.4
IIL
VCC = MAX
MAX,
VI = 0
0.4
4V
IOS
ICC
Supply current
VCC = MAX
VCC = MAX,
See Note 4
SH/LD
Other inputs
SH/LD
Other inputs
Short-circuit output current
2.4
TYP
MAX
MIN
20
0.8
0.8
1.5
1.5
3.4
0.2
UNIT
2.4
0.4
3.4
0.2
V
0.4
80
80
40
40
3.2
3.2
1.6
1.6
55
42
18
63
42
V
mA
A
mA
55
mA
63
mA
NOTE 4: With the outputs open, CLK INH and CLK at 4.5 V, and a clock pulse applied to SH/LD, ICC is measured first with the parallel inputs
at 4.5 V, then with the parallel inputs grounded.
For conditions shown as MIN or MAX, use the appropriate values specified under recommended operating conditions.
All typical values are at VCC = 5 V, TA = 25C.
Not more than one output should be shorted at a time.
FROM
(INPUT)
TO
(OUTPUT)
TEST CONDITIONS
MIN
TYP
20
26
MAX
UNIT
MHz
LD
Any
CL = 15 pF,
pF RL = 400 W
21
31
27
40
CLK
Any
CL = 15 pF,
pF RL = 400 W
16
24
21
31
QH
CL = 15 pF,
pF RL = 400 W
QH
CL = 15 pF,
pF RL = 400 W
11
17
24
36
18
27
18
27
ns
ns
ns
ns
fmax = maximum clock frequency, tPLH = propagation delay time, low-to-high-level output, tPHL = propagation delay time, high-to-low-level output
VCC
VIH
Supply voltage
VIL
IOH
IOL
fclock
tw(clock)
( l k)
tw(load)
(l d)
tsu
tsu
SN74LS165A
MIN
NOM
MAX
MIN
NOM
MAX
4.5
5.5
4.75
5.25
V
V
0.7
0.8
0.4
0.4
mA
Clock frequency
UNIT
25
mA
25
MHz
Clock high
15
15
Clock low
25
25
Clock high
25
25
Clock low
17
17
30
30
ns
10
10
ns
tsu
tsu
20
20
ns
45
45
ns
th
TA
ns
ns
55
125
ns
70
TEST CONDITIONS
PARAMETER
MIN
TYP
2.5
3.5
SN74LS165A
MAX
MIN
TYP
2.7
3.5
VCC = MIN,
VCC = MIN,
II = 18 mA
VIH = 2 V,
VIL = MAX,
VOL
VCC = MIN
MIN,
VIH = 2 V
V,
II
IIH
VCC = MAX,
VCC = MAX,
VI = 7 V
VI = 2.7 V
0.1
0.1
20
20
IIL
IOS
VCC = MAX,
VCC = MAX
VI = 0.4 V
0.4
0.4
mA
100
mA
IOH = 0.4 mA
IOL = 4 mA
0.25
1.5
UNIT
VIK
VOH
VIL = MAX
1.5
MAX
0.4
IOL = 8 mA
20
100
20
V
V
0.25
0.4
0.35
0.5
V
mA
ICC
VCC = MAX, See Note 4
18
30
18
30
mA
NOTE 4. With the outputs open, CLK INH and CLK at 4.5 V, and a clock pulse applied to SH/LD, ICC is measured first with the parallel inputs
at 4.5 V, then with the parallel inputs grounded.
For conditions shown as MIN or MAX, use the appropriate values specified under recommended operating conditions.
All typical values are at VCC = 5 V, TA = 25C.
Not more than one output should be shorted at a time, and the duration of the short-circuit should not exceed one second.
FROM
(INPUT)
TO
(OUTPUT)
TEST CONDITIONS
MIN
TYP
25
35
MAX
UNIT
MHz
LD
Any
RL = 2 kW, CL = 15 pF
21
35
26
35
CLK
Any
RL = 2 kW, CL = 15 pF
14
25
16
25
QH
RL = 2 kW, CL = 15 pF
13
25
24
30
QH
RL = 2 kW, CL = 15 pF
19
30
17
25
ns
ns
ns
ns
fmax = maximum clock frequency, tPLH = propagation delay time, low-to-high-level output, tPHL = propagation delay time, high-to-low-level output
VCC
RL
(see Note B)
From Output
Under Test
CL
(see Note A)
High-Level
Pulse
1.5 V
S2
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
3V
Timing
Input
1.5 V
1 k
Test
Point
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT
FOR 2-STATE TOTEM-POLE OUTPUTS
S1
(see Note B)
CL
(see Note A)
RL
CL
(see Note A)
RL
From Output
Under Test
VCC
From Output
Under Test
Test
Point
1.5 V
0V
tw
Low-Level
Pulse
1.5 V
tsu
0V
In-Phase
Output
(see Note D)
tPHL
VOH
1.5 V
Out-of-Phase
Output
(see Note D)
1.5 V
3V
1.5 V
Waveform 1
(see Notes C
and D)
tPLZ
VOH
1.5 V
1.5 V
VOL
VOL
Waveform 2
(see Notes C
and D)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
1.5 V
1.5 V
tPZH
tPLH
1.5 V
0V
tPZL
VOL
tPHL
1.5 V
0V
Output
Control
(low-level
enabling)
1.5 V
tPLH
1.5 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3V
1.5 V
3V
Data
Input
1.5 V
VOLTAGE WAVEFORMS
PULSE DURATIONS
Input
th
VOL + 0.5 V
tPHZ
VOH
1.5 V
VOH 0.5 V
1.5 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
VCC
RL
From Output
Under Test
CL
(see Note A)
CL
(see Note A)
High-Level
Pulse
1.3 V
S2
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
3V
Timing
Input
1.3 V
5 k
Test
Point
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT
FOR 2-STATE TOTEM-POLE OUTPUTS
S1
(see Note B)
CL
(see Note A)
RL
(see Note B)
RL
From Output
Under Test
VCC
From Output
Under Test
Test
Point
1.3 V
0V
tw
Low-Level
Pulse
1.3 V
tsu
Data
Input
1.3 V
VOLTAGE WAVEFORMS
PULSE DURATIONS
1.3 V
1.3 V
Output
Control
(low-level
enabling)
0V
tPLH
In-Phase
Output
(see Note D)
1.3 V
0V
3V
1.3 V
1.3 V
0V
tPZL
tPLZ
tPHL
VOH
1.3 V
1.3 V
Waveform 1
(see Notes C
and D)
VOL
tPZH
tPLH
VOH
1.3 V
1.3 V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
1.5 V
1.3 V
VOL
tPHL
Out-of-Phase
Output
(see Note D)
3V
1.3 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3V
Input
th
Waveform 2
(see Notes C
and D)
VOL + 0.5 V
tPHZ
VOH
1.3 V
VOH 0.5 V
1.5 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
10
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TIs terms
and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TIs standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
their products and applications using TI components. To minimize the risks associated with customer products
and applications, customers should provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,
copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process
in which TI products or services are used. Information published by TI regarding thirdparty products or services
does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.
Use of such information may require a license from a third party under the patents or other intellectual property
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Reproduction of information in TI data books or data sheets is permissible only if reproduction is without
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Resale of TI products or services with statements different from or beyond the parameters stated by TI for that
product or service voids all express and any implied warranties for the associated TI product or service and
is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Mailing Address:
Texas Instruments
Post Office Box 655303
Dallas, Texas 75265
SN54HC153, SN74HC153
DUAL 4-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS
SCLS112B DECEMBER 1982 REVISED MAY 1997
D
D
D
D
SN54HC153 . . . J OR W PACKAGE
SN74HC153 . . . D, N, OR PW PACKAGE
(TOP VIEW)
1G
B
1C3
1C2
1C1
1C0
1Y
GND
16
15
14
13
12
11
10
VCC
2G
A
2C3
2C2
2C1
2C0
2Y
description
SN54HC153 . . . FK PACKAGE
(TOP VIEW)
B
1G
NC
VCC
2G
1C3
1C2
NC
1C1
1C0
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
A
2C3
NC
2C2
2C1
1Y
GND
NC
2Y
2C0
NC No internal connection
FUNCTION TABLE
INPUTS
SELECT
DATA
OUTPUT
Y
C0
C1
C2
C3
L
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1997, Texas Instruments Incorporated
SN54HC153, SN74HC153
DUAL 4-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS
SCLS112B DECEMBER 1982 REVISED MAY 1997
logic symbol
A
B
1G
1C0
1C1
1C2
1C3
2G
2C0
2C1
2C2
2C3
14
2
0
1
1
6
5
4
3
EN
G 0
3
MUX
0
7
1
2
3
15
10
9
11
12
13
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, N, PW, and W packages.
1Y
2Y
SN54HC153, SN74HC153
DUAL 4-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS
SCLS112B DECEMBER 1982 REVISED MAY 1997
1C0
14
2
1
TG
TG
1C1
TG
7
1C2
1Y
TG
TG
1C3
2G
2C0
TG
15
10
TG
TG
2C1
11
TG
9
2C2
12
2Y
TG
TG
2C3
13
TG
SN54HC153, SN74HC153
DUAL 4-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS
SCLS112B DECEMBER 1982 REVISED MAY 1997
Supply voltage
VIH
High-level
High l
l iinput
p voltage
l g
VCC = 2 V
VCC = 4.5 V
VCC = 6 V
VCC = 2 V
VIL
Low-level
L
l
l input
i p voltage
l g
VI
VO
Input voltage
Output voltage
tt
Input
I p transition
i i ((rise
i and
d ffall)
ll)) time
i
TA
SN74HC153
MIN
NOM
MAX
MIN
NOM
MAX
1.5
1.5
3.15
3.15
4.2
4.2
0.5
0.5
1.35
1.35
1.8
1.8
VCC
VCC
VCC
VCC
VCC = 2 V
VCC = 4.5 V
1000
1000
500
500
VCC = 6 V
400
400
55
125
40
85
V
V
VCC = 4.5 V
VCC = 6 V
UNIT
V
V
V
ns
C
SN54HC153, SN74HC153
DUAL 4-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS
SCLS112B DECEMBER 1982 REVISED MAY 1997
TEST CONDITIONS
VCC
IOH = 20
A
20 A
VOH
VI = VIH or VIL
IOH = 6 mA
IOH = 7.8 mA
IOL = 20 A
A
VOL
VI = VIH or VIL
IOL = 6 mA
IOL = 7.8 mA
II
ICC
VI = VCC or 0
VI = VCC or 0,
IO = 0
MIN
TA = 25C
TYP
MAX
MIN
MAX
SN74HC153
MIN
2V
1.9
1.998
1.9
1.9
4.5 V
4.4
4.499
4.4
4.4
6V
5.9
5.999
5.9
5.9
4.5 V
3.98
4.3
3.7
3.84
6V
5.48
5.8
5.2
MAX
UNIT
5.34
2V
0.002
0.1
0.1
0.1
4.5 V
0.001
0.1
0.1
0.1
6V
0.001
0.1
0.1
0.1
4.5 V
0.17
0.26
0.4
0.33
6V
0.15
0.26
0.4
0.33
6V
0.1
100
1000
1000
nA
160
80
10
10
10
pF
6V
Ci
SN54HC153
2 V to 6 V
tpd
SN54HC153
SN74HC153
TO
(OUTPUT)
VCC
2V
90
150
225
190
A or B
4.5 V
21
30
45
38
6V
17
26
38
32
Data
(Any C)
tt
TA = 25C
TYP
MAX
FROM
(INPUT)
MIN
MIN
MAX
MIN
MAX
2V
73
126
189
158
4.5 V
17
28
42
35
6V
14
23
35
29
2V
38
95
150
125
4.5 V
11
19
28
24
6V
16
24
20
2V
20
60
90
75
4.5 V
12
18
15
6V
10
15
13
UNIT
ns
ns
SN54HC153, SN74HC153
DUAL 4-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS
SCLS112B DECEMBER 1982 REVISED MAY 1997
PARAMETER
TO
(OUTPUT)
A or B
Data
(Any C)
tpd
tt
VCC
MIN
TA = 25C
TYP
MAX
SN54HC153
MIN
SN74HC153
MAX
MIN
MAX
2V
105
235
355
295
4.5 V
27
47
71
59
6V
21
41
60
51
2V
93
220
335
274
4.5 V
23
44
67
55
6V
19
38
57
48
2V
60
185
280
230
4.5 V
17
37
56
46
6V
14
32
48
40
2V
45
210
315
265
4.5 V
17
42
63
53
6V
13
36
53
45
UNIT
ns
ns
TEST CONDITIONS
No load
TYP
UNIT
40
pF
Test
Point
Input
VCC
50%
50%
0V
CL
(see Note A)
tPLH
In-Phase
Output
LOAD CIRCUIT
50%
10%
tPHL
90%
90%
tr
Input
50%
10%
90%
90%
tr
tPHL
VCC
50%
10% 0 V
Out-of-Phase
Output
90%
tf
VOH
50%
10%
VOL
tf
tPLH
50%
10%
tf
50%
10%
90%
VOH
VOL
tr
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
IMPORTANT NOTICE
Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor
product or service without notice, and advises its customers to obtain the latest version of relevant information
to verify, before placing orders, that the information being relied on is current.
TI warrants performance of its semiconductor products and related software to the specifications applicable at
the time of sale in accordance with TIs standard warranty. Testing and other quality control techniques are
utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each
device is not necessarily performed, except those mandated by government requirements.
Certain applications using semiconductor products may involve potential risks of death, personal injury, or
severe property or environmental damage (Critical Applications).
TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED
TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS.
Inclusion of TI products in such applications is understood to be fully at the risk of the customer. Use of TI
products in such applications requires the written approval of an appropriate TI officer. Questions concerning
potential risk applications should be directed to TI through a local SC sales office.
In order to minimize risks associated with the customers applications, adequate design and operating
safeguards should be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance, customer product design, software performance, or
infringement of patents or services described herein. Nor does TI warrant or represent that any license, either
express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property
right of TI covering or relating to any combination, machine, or process in which such semiconductor products
or services might be or are used.