i hc Quc gia H ni

Trng i hc Cng ngh

Cng ho x hi ch ngha Vit nam

c lp T do Hnh phc

Bi thi ht mn

KIN TRC MY TNH

K51 Cng ngh Thng tin, ln I
Thi gian : 60 pht, khng k thi gian pht .
Tt c cc ti liu c nhn di dng giy u c php s dng, cm trao i ti liu !
Ch phn b thi gian lm bi hp l. Cc ch dn thi gian mi cu ch c tnh gi !
Bi 1.
(1 im, ~5 pht)
Php tnh cui trong ALU 8 bits, s dng hnh thc biu din b 2 cho s nguyn, l
-127-128. Pht biu no l chnh xc trong s nhng pht biu sau v nhng bit trong thanh ghi
trng thi:
a. Overflow bit = 1, Carry Bit = 1, Zero Bit = 0, Sign Bit = 1.
b. Overflow bit = 1, Carry Bit = 0, Zero Bit = 0, Sign Bit = 1.
c. Overflow bit = 1, Carry Bit = 1, Zero Bit = 0, Sign Bit = 1.
d. Overflow bit = 0, Carry Bit = 1, Zero Bit = 0, Sign Bit = 1.
Bi 2.
(1 im, ~5 pht)
Trong mt pipeline gm 4 tng, mi tng thc thi lnh trong t n v thi gian. Thi gian cn thit
thc thi trn vn 4 lnh l ? (b qua ph thuc d liu v r nhnh)
a. 16t
b. 9t
c. 7t
d. 6t
Bi 3.
(2 im, ~10 pht)
Xt b nh DDR3 SDRAM c xung nhp ng h b nh l 200MHz, hy tnh thng lng ti a
m b nh ny c th t c nu mi t nh c dung lng l 32bits ?
Bi 4.
(3 im, ~15 pht)
Gi s hin thi khng gian b nh chnh ca my in ton c ni dung mt phn nh sau :
a ch
Ni dung (hexa)
0x00010000 :
0001 0000 0010 A000
0x00010001 :
0002 0000 0011 00B0
0x00010002 :
0001 0000 0011 00B0
Ti thi im xem xt, thanh ghi PC ca b vi x l mang gi tr (0001 0000)H
a. Hy v biu lung d liu dch chuyn th hin tng tc gia b vi x l v b nh
chnh trong qu trnh thc hin ti lnh k tip ?
b. Xc nh r cc gi tr c th ca cc thanh ghi iu khin c bn trong CPU ?
Bi 5.
(3 im, ~15 pht)
Gi s mt CPU c 2 b pipeline: mt dnh cho cc lnh LOAD/STORE v r nhnh, gi chng
trnh con, gm 3 tng [FI, DI, EI]; mt dnh cho cc lnh x l d liu gm 4 tng [FI, DI, EI,
WO]. Nhng lnh r nhnh v iu kin (unconditional branches) c xc nh ti thi im kt
thc tng DI, trong khi nhng lnh r nhnh c iu kin (conditional branches) ch c xc nh
khi kt thc tng EI.
Cc loi lnh c phn b trung bnh nh sau: 50% lnh l lnh x l d liu, cn li l cc lnh r
nhnh, gi chng trnh con. Trong s cc lnh r nhnh, c n 65% l lnh nhy c iu kin
(trong s c 80% c thi hnh php nhy).
a. Xc nh s chu k (cycles) trung bnh i vi mt lnh (CPI) ca CPU ny nu nh b qua
vn ph thuc d liu v r nhnh gia cc lnh.
b. Trong trng hp ph thuc d liu c b qua, hy tnh CPI nu pipeline s dng phng
php Predict always taken? phng php Predict never taken?
------***------

i hc Quc gia H ni
Trng i hc Cng ngh

Cng ho x hi ch ngha Vit nam

c lp T do Hnh phc

Bi thi ht mn

KIN TRC MY TNH

K51 Cng ngh Thng tin, ln II.
Thi gian : 60 pht, khng k thi gian pht .
Tt c cc ti liu c nhn di dng giy u c php s dng, cm trao i ti liu !
Ch phn b thi gian lm bi hp l. Cc ch dn thi gian mi cu ch c tnh gi !
Bi 1.
(1 im, ~5 pht)
Mt my in ton c b nh 2GB c nh a ch theo t nh 32bits v mt b nh cache c
dung lng 1MB s dng phng thc nh x trc tip. a ch mt t nh s c phn thnh cc
trng nh th no nu kch thc mi block l 16 t nh ?
a. Tag = 9bits, Index = 16bits v Block = 4bits.
b. Tag = 13bits, Index = 12bits v Block = 4bits.
c. Tag = 11bits, Index = 14bits v Block = 4bits.
d. Tag = 18bits, Index = 10bits v Block = 4bits.
Bi 2.
(1 im, ~5 pht)
C th xy dng tp lnh 8 bits trong bao gm 3 lnh c format 2 a ch v 8 lnh c format 1
a ch, mi trng a ch c kch thc 3bits, c khng ?
a. C
b. Tu thuc vo kch thc b nh chnh
c. Khng
Bi 3.
(1 im, ~5 pht)
Gi s thanh ghi PC ca CPU cha a ch A1, v ti a ch ny cha lnh I cn mt ton hng. a
ch ca ton hng ny l A3. truy cp n a ch ny, lnh I cha thm mt phn xc nh a
ch A2. Thanh ghi ch mc (index) ca CPU cha gi tr A4. Hy xc nh mi quan h gia cc a
ch trn nu tp lnh CPU s dng c ch nh a ch dch chuyn da trn thanh ghi ch mc?
Bi 4.
(2 im, ~10 pht)
Gi s my tnh RISC vi cc lnh thc thi qua 2 pha : Fetch v Execute, ngoi tr nhng lnh
load/store cn thm pha Memory (M). Xt on m sau:
1. LOAD A, M1
2. LOAD B, M2
3. ADD C, A, B
4. STORE C, M3
5. BRANCH M4
Trong M1, M2, M2, M4 l a ch cc t nh. Hy v biu thi gian th hin vic thc thi
on m trn trong b pipeline cho ? Xc nh s chu k cn thit thc thi on m trn? Gi
thit mi pha thi hnh cn 1 chu k.
Bi 5.
(2 im, ~10 pht)
Hy so snh cc c trng c bn v tp lnh ca nhng my in ton kiu RISC v kiu CISC?
Bi 6.
(3 im, ~15 pht)
Xt on m lnh vit bng ngn ng C di y, c thi hnh trn computer c b nh cache
dung lng 2MB s dng phng php nh x kt hp v mi block c kch thc 16 bytes.
register int i,j ;
//i, j c lu trong cc thanh ghi
int A[5][50] ;
// int l kiu t nhin ln 32 bits
int B[6][101] ;
for (i=0 ; i<5 ; i++)
for (j=0 ; j<50; j++)
A[i][j] = B[j*2][4]*B[j*2+1][4] ;
Hy tnh s ln tht bi, cache miss, khi on m ny c thi hnh, gi s ban u b nh cache
cha s dng bt k slot no? Gii thch r cc bc tnh ton trong qu trnh nh gi.

Bi thi ht mn K52

KIN TRC MY TNH

Thi gian : 60 pht, khng k thi gian pht . Cm s dng ti liu !
1. Trnh by vn tt vai tr v chc nng chnh ca cc thnh phn chnh trong my tnh
(computer).
2. Chu trnh lnh bao gm nhng trng thi c bn no ? M t lung d liu trong qu trnh din ra
chu trnh ti lnh.
3. Gi s thanh ghi PC cha gi tr a ch A1, v ti a ch ny cha lnh I cn mt ton hng. a
ch ca ton hng ny l A3. truy cp n a ch ny, lnh I cha thm mt phn xc nh a
ch A2. Thanh ghi ch mc (index) ca CPU cha gi tr A4. Hy xc nh mi quan h gia cc a
ch trn nu tp lnh CPU s dng c ch nh a ch sau:
a- gin tip qua b nh?
b- gin tip qua thanh ghi ?
c- dch chuyn da trn thanh ghi ch mc?
d- dch chuyn da trn thanh ghi PC
4. Mt my tnh c tn s xung nhp CPU l 3GHz thi hnh 1 chng trnh bao gm 5 t lnh. S
lnh ny gm 20% lnh r nhnh, 10% lnh lu tr d liu (store), 20% lnh ti lnh/d liu (load),
v 50% lnh s hc+logic (ALU). Ch s trung bnh IPC l 1 i vi lnh r nhnh, 0.5 vi lnh
load, 1 vi lnh store, v 2 vi cc lnh ALU. Hy tnh thi gian thc thi chng trnh ny?
5. Xt on m lnh di y c thi hnh trn mt computer c b nh cache kt hp theo tp 2
block (2-way set associative), bao gm 64 tp (sets)

Vi hai chnh sch ghi writethrough v writeback, chnh sch ghi no mang li hiu nng computer
cao hn i vi on m lnh trn ? Gii thch ngn gn, r rng la chn !

Bi thi ln 2

KIN TRC MY TNH

Thi gian : 90 pht, khng k thi gian pht . Cm s dng ti liu !
1. Trnh by cc chc nng chnh ca my tnh v mi lin h gia chng.
2. Hy xy dng mt thnh phn nh c dung lng 4GB t nhng chp nh c bn tho cc yu
cu sau :
a. Chp nh c dung lng 512MB, c t chc theo m hnh 8K x 8K x 64(bits)
b. Mi t nh c kch thc 64 bits
3. B nh cache kt hp theo tp (set-associative cache) cho php phn a ch b nh t CPU
thnh cc trng nh sau:
16 bits
10 bits
6 bits
Tag
Index
Offset
a. 16 bits u tin ca trng Tag s c s dng nh th no ?
b. Tnh s tp ca b nh cache ny.
c. Liu c th xc nh c ln ca b nh cache ny hay khng ? Gii thch r
cu tr li
4. Tp lnh ca mt CPU vi kin trc s dng hai formats lnh sau :
- Kiu lnh A (store, load (fetch), branches v jumps) :
6 bits
4 bits
32 bits
OpCode
Rs/Rd
Immediate
- Kiu lnh B (ALU Operations):
6 bits
OpCode

4 bits
Rs

4 bits
Rd

a. Tnh s thanh ghi registers c th c ca kin trc ny.

b. Tnh s kt hp Lnh/kiu_nh_a_ch i vi kin trc ny.
c. Nu ch s dng mt format lnh c di c nh i vi tp lnh ca bi ton ny,
di ca format s l bao nhiu bits ?
5. Mt chng trnh test bao gm 5000 lnh, thc thi trong my tnh c CPI cho cc lnh thao tc
vi cc s nguyn l 1 v 4 cho cc lnh thao tc vi cc s thc. Nu CPI trung bnh cho my tnh
ny l 1.9, hy tnh s lnh nguyn trong chng trnh ny.

KIN TRC MY TNH

Thi gian : 90 pht. c s dng ti liu cng, cm trao i! K53
1. Xt my tnh c b nh cache, b nh chnh v a cng (c s dng to b nh o). Thi gian
truy xut trung bnh (c/ghi) i vi b nh cache l 10ns, vi b nh chnh l 100 ns v vi a cng
l 10.000ns. Gi s t l cache hit l 0.8, t l memory hit (xc sut t nh nm trong b nh chnh thay
v phi truy xut a cng) l 0.7. Hy tnh thi gian truy xut trung bnh n mt t nh trong h
thng my tnh ny?
2. Xt b nh chnh gm 64 blocks (c gn nhn t 0 n 63) v b nh cache gm 16 slots (c
gn nhn t 0 n 15). Vi phng php nh x kt hp theo 2 tp (2-way set associativity), nhng
slots no ca cache c th cha block 31 ca b nh chnh?
3. Xt b nh DDR3 SDRAM vi xung nhp ng h b nh l 400MHz. Hy tnh thng lng ti a
vi b nh ny nu mi t nh c dung lng l 32 bits.
4. Sau khi thc thi php tnh 127-128 trong CPU c ALU 8bits, s dng hnh thc biu din b 2 vi s
nguyn, hy xc nh trng thi cc bits sau trong thanh ghi flag: overflow, carry, zero v sign?
5. Xt chui lnh thc thi trong CPU sau:

DIV r2, r5, r8

SUB r9, r2, r7
AND r5, r14, r6
MUL r11, r9, r5
BEQ r10, #0, r12
OR r8, r15, r2

;
;
;
;
;
;

r2 <- r5 / r8
r9 <- r2 - r7
r5 <- r14 & r6
r11 <- r9 * r5
if (r10=0) goto r12
r8 <- r15 | r2

Hy xc nh tt c cc ph thuc d liu trong vic thc thi chui lnh trn vi c ch pipeline gm 3
tng [FI, DI, EX] vi cc lnh r nhnh/load/store v 4 tng vi cc lnh tnh ton ALU [FI, DI, EX,
WO]? V biu thi gian thc thi cc lnh trn sau khi b xung cc lnh NOP khng cn ph
thuc d liu.

KIN TRC MY TNH

Thi gian : 90 pht. Cm s dng ti liu!
1. Xt my tnh s dng mt b vi x l 32bits, rng bus d liu l 64, bus a ch l 32. Xc nh
dung lng b nh vt l ti a m h iu hnh c th khai thc s dng c i vi my tnh ny ?
2. Hy v biu khi phn cp b nh? Thit b lu tr ngoi kiu SSD s dng hnh thc truy cp
no? Nu my tnh c 2 mc cache L1 vi thi gian truy cp l n v thi gian, L2 l n n v; b nh
chnh c thi gian truy cp rt ln; hy chng minh rng thi gian truy cp trung bnh b nh ca
my tnh ny khng vt qu 2 n v th t l hit L1 khng th b hn (1 1/n).
3. Xt h thng c b nh cache gm 4 slots, s dng phng php nh x kt hp, v b nh chnh
c 16 blocks. Ban u cache rng v thi hnh chng trnh cn truy xut n cc blocks c a ch 0, 3,
5, 3, 4, 6, 8, 5, 7. Hy xc nh chin thut thay th (LRU, LFU v FIFO) no l tt nht trong bi ton
ny?
4. Xt chui lnh thc thi trong CPU sau:

LOAD r1, A
LOAD r2, B
SUB r1, r2
BEQ r1, r3
MUL r2, r1
STORE r2, C

; r1 <- r1 r2
; if (r1=0) goto r3
; r2 <- r2 * r1

a. Xc nh chin thut x l d liu ca kin trc CPU ny?

b. Hy xc nh tt c cc ph thuc d liu trong vic thc thi chui lnh trn vi c ch
pipeline gm 3 tng [I, E,D ] vi cc lnh load/store v 2 tng vi cc lnh cn li [I, E]?
c. V biu thi gian thc thi cc lnh trn sau khi b xung cc lnh NOOP khng cn ph
thuc d liu.
5. V v gii thch r biu lung d liu khi ti mt ton hng vo thanh ghi R trong CPU vi
phng php nh a ch gin tip qua b nh chnh?