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AOD472

N-Channel Enhancement Mode Field Effect Transistor


1.4

General Description

Features

The AOD472 uses advanced trench technology and


design to provide excellent RDS(ON) with low gate
charge. This device is suitable for use in PWM, load
switching and general purpose applications.

VDS (V) = 25V


ID = 55A (VGS = 10V)
RDS(ON) <6 m (VGS = 10V)
RDS(ON) <9.5 m (VGS = 4.5V)
193
18
100% UIS Tested
100% Rg Tested

TO-252
D-PAK

Top View
D

Bottom View

Absolute Maximum Ratings TA=25C unless otherwise noted


Symbol
Parameter
VDS
Drain-Source Voltage
VGS
Gate-Source Voltage
Continuous Drain
Current G

TC=25C

Maximum
25

Units
V

20

55

TC=100C

Pulsed Drain Current C


C

Pulsed Forward Diode Current

43

ID
IDM

200

ISM

200

IAR

50

Repetitive avalanche energy L=0.1mH C

EAR

125

Avalanche Current

TC=25C
Power Dissipation

Power Dissipation

TA=25C
Junction and Storage Temperature Range
Thermal Characteristics
Parameter
A
Maximum Junction-to-Ambient
A
Maximum Junction-to-Ambient
B
Maximum Junction-to-Case

Alpha & Omega Semiconductor, Ltd.

2.5

1.6

TJ, TSTG

-55 to 175

Symbol
t 10s
Steady-State
Steady-State

30

PDSM

TA=70C

mJ

60

PD

TC=100C

RJA
RJC

Typ
15
41
2.1

Max
20
50
2.5

Units
C/W
C/W
C/W

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AOD472

Electrical Characteristics (TJ=25C unless otherwise noted)


Symbol

Parameter

STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
IDSS

Zero Gate Voltage Drain Current

Conditions

Min

ID=250uA, VGS=0V

Gate-Body leakage current

VDS=0V, VGS=20V

Gate Threshold Voltage

VDS=VGS, ID=250A

1.2

ID(ON)

On state drain current

VGS=10V, VDS=5V

150

VGS=10V, ID=30A

gFS

Forward Transconductance

VSD

Diode Forward Voltage


IS=1A, VGS=0V
Maximum Body-Diode Continuous Current

TJ=125C

Output Capacitance

Crss

Reverse Transfer Capacitance

Rg

Gate resistance

100

nA

2.5

A
7.5
7.6

VDS=5V, ID=20A

49

VGS=0V, VDS=12.5V, f=1MHz


VGS=0V, VDS=0V, f=1MHz

SWITCHING PARAMETERS
Qg(10V) Total Gate Charge
Qg(4.5V) Total Gate Charge

1.4

VGS=4.5V, ID=20A

DYNAMIC PARAMETERS
Ciss
Input Capacitance
Coss

V
5

VGS(th)

Static Drain-Source On-Resistance

Units

1
TJ=55C

RDS(ON)

Max

25

VDS=20V, VGS=0V

IGSS

IS

Typ

0.74

m
9.5
S
1

50

2050

2460

pF

485

600

pF

280

400

pF

0.86

1.5

41

50

nC

20

25

nC

Qgs

Gate Source Charge

7.3

8.8

nC

QgsVth

Gate Source Charge at Vth

3.4

nC

Qgd

Gate Drain Charge

8.2

11.5

nC

tD(on)

Turn-On DelayTime

tr

Turn-On Rise Time

tD(off)

Turn-Off DelayTime

VGS=10V, VDS=12.5V, ID=20A

7.5

10

ns

VGS=10V, VDS=12.5V,
RL=0.68, RGEN=3

11

22

ns

27

35

ns

tf

Turn-Off Fall Time

16

ns

trr

Body Diode Reverse Recovery Time

IF=20A, dI/dt=100A/s

30

Qrr

Body Diode Reverse Recovery Charge IF=20A, dI/dt=100A/s

19

36
23

ns
nC

A: The value of R JA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25C. The
Power dissipation P DSM is based on R JA and the maximum allowed junction temperature of 150C. The value in any given application depends on
the user's specific board design, and the maximum temperature of 175C may be used if the PCB allows it.
B. The power dissipation P D is based on T J(MAX)=175C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C: Repetitive rating, pulse width limited by junction temperature T J(MAX)=175C.
D. The R JA is the sum of the thermal impedence from junction to case R JC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300 s pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a
maximum junction temperature of T J(MAX)=175C.
G. The maximum current rating is limited by bond-wires.
H. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with T A=25C. The SOA
curve provides a single pulse rating.
*This device is guaranteed green after data code 8X11 (Sep 1 ST 2008).
Rev9: Feb 2010
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.

Alpha & Omega Semiconductor, Ltd.

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AOD472

TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS


200

60
10V
50

6V

3.5V

80

VDS=5V

40

4.5V

120

ID(A)

ID (A)

160

30

125C

25C
1.4

20

494
692

3.0V

40

10

VGS=2.5

0
0

10

193
18

Normalized On-Resistance

1.8

8
VGS=4.5V
6
VGS=10V

VGS(Volts)
Figure 2: Transfer Characteristics

VDS (Volts)
Fig 1: On-Region Characteristics

RDS(ON) (m)

593
830

1.6
VGS=10V, 30A

1.4
1.2

VGS=4.5V, 20A

1
0.8

2
0

10

20

30

40

50

0.6

60

-50

ID (A)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage

59 100 125 150 175


75
142
Temperature (C)

25

50

Figure 4: On-Resistance vs. Junction Temperature

1.0E+02

12

1.0E+01

ID=20A
10

125C

1.0E+00
IS (A)

RDS(ON) (m)

-25

1.0E-01
1.0E-02

125C

25C

1.0E-03

6
25C

1.0E-04
1.0E-05

4
3

10

VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage

Alpha & Omega Semiconductor, Ltd.

0.0

0.2

0.4

0.6

0.8

1.0

1.2

VSD (Volts)
Figure 6: Body-Diode Characteristics

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AOD472

TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS


3000

10

2500

VDS=12.5V
ID=20A

Capacitance (pF)

VGS (Volts)

8
6
4
2

2000
1500

1.4

1000

Coss

494
692

500

0
5

10

15

20
25
30
35
Qg (nC)
Figure 7: Gate-Charge Characteristics

40

1000

100s

10

10
15
20
VDS (Volts)
Figure 8: Capacitance Characteristics

DC

1ms

25

193
18

800

10s

RDS(ON)
limited

Power (W)

100

1000

TJ(Max)=175C, TC=25C

593
830

Crss

0
0

ID (Amps)

Ciss

TJ(Max)=175C
TC=25C

600
400
200

0.1
0.1

10

100

VDS (Volts)

0
0.0001

Figure 9: Maximum Forward Biased


Safe Operating Area (Note F)

59

0.001

0.01 1420.1
1
Pulse Width (s)
Figure 10: Single Pulse Power Rating
Junction-to-Case (Note F)

10

ZJC Normalized Transient


Thermal Resistance

10

D=Ton/T
TJ,PK=TC+PDM.ZJC.RJC
RJC=2.5C/W

In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse

PD

0.1

0.01
0.00001

Ton
Single Pulse

0.0001

0.001

0.01

0.1

10

100

Pulse Width (s)


Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)

Alpha & Omega Semiconductor, Ltd.

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AOD472

TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS

tA =

90
80

60

L ID
BV V DD

Power Dissipation (W)

ID(A), Peak Avalanche Current

100

70
60

TA=25C

50

TA=150C

40
30
20
10
0.000001

50
40
30

1.4

20

494
692

10
0

0.00001

0.0001

0.001

25

Time in avalanche, tA (s)


Figure 12: Single Pulse Avalanche capability

50

75

100

125

150

175

TCASE (C)
Figure 13: Power De-rating (Note B)

193
18

50

60
50

TA=25C

40

40

Power (W)

Current rating ID(A)

593
830

30
20

30
20
10

10
0
0

25

50

75
100
125
150
TCASE (C)
Figure 14: Current De-rating (Note B)

0
0.01

59

142 10
1
100
1000
Pulse Width (s)
Figure 15: Single Pulse Power Rating Junctionto-Ambient (Note H)

175

0.1

ZJA Normalized Transient


Thermal Resistance

10

D=Ton/T
TJ,PK=TA+PDM.ZJA.RJA
RJA=50C/W

In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse

0.1
PD

0.01

Ton

Single Pulse

0.001
0.00001

0.0001

0.001

0.01

0.1

10

100

1000

Pulse Width (s)


Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)

Alpha & Omega Semiconductor, Ltd.

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AOD472

G a te C h a rg e T e s t C ircu it & W a v e fo rm
Vgs
Qg
10 V

VDC

VD C

DUT

Q gs

Vds

Qgd

Vgs
Ig
C h a rg e

Resistive Switching Test Circuit & Waveforms


RL
Vds
Vds

DUT

Vgs

90%

+ Vdd

VDC

Rg

10%

Vgs

Vgs

td(on)

tr

t d(off)

ton

tf
toff

U nc lam p ed In du ctive S w itch ing (U IS ) T e st C ircu it & W a ve fo rm s


L

E A R = 1/2 L IA R

Vds

B VD S S

V ds

Id

+ V dd

V gs

Vgs

VDC

Rg

I AR
Id

DUT
Vgs

Vgs

D io d e R e co ve ry T e st C ircu it & W a ve fo rm s
Q rr = -

V ds +
DUT

Vds -

Isd
Vgs

Id t

V gs

Is d

+
VDC

Ig

Alpha & Omega Semiconductor, Ltd.

IF

t rr

dI/dt
I RM

V dd

V dd

Vds

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