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M L 0 X X 1 8
GENERAL DESCRIPTION
The ML0XX18 is an external modulator driver for 10Gb/s optical communication systems. Output voltage swing, output
voltage offset, and output voltage cross-point are adjustable by controls of current inputs. A D-FF and a selector are
integrated on the chip to implement selectable re-timing/bypass function. Data and clock inputs have high sensitivity of
200mV differential amplitude. Both DC/AC-coupled connections are allowed for the data inputs. Clock input supports
AC-coupled connection. The ML0XX18 is available in a 32-pin Small Lead-frame Package (SLP-type) or in a die form.
FEATURES
Operation for 10Gbps Optical Communication
Vo-pp= 1 3Vpp
Built-in D-FF
Voh= -1.0 0V
CP= 30 - 75%
APPLICATION
SONET OC-192 and SDH STM-64 Transmission systems
10Gb/s Ethernet Modules
10Gb/s Fibre Channel Modules
Min.
-5.46
Ratings
Typ.
-5.2
Max.
-4.94
RL=50
AC-coupled/side
DC-coupled
DC-coupled
AC-coupled/side
Bias
Non-Bias
0.1
-0.45
-1.0
0.1
0
0
0.25
0
0.25
-0.375
-0.625
0.25
Floating
0.35
1
-0.0
-0.55
1
6.0
6.0
0.5
85
V
V
V
V
mA
mA
mA
mA
C
Symbol
Parameter
Test Conditions
VEE
VGNDO
VGNDON
VDATA
VDATA(High)
VDATA(Low)
VCLK
IM
Supply Voltage
Driver Output Termination Voltage
(GNDO/GNDON)
DATA Input Voltage Amplitude
DATA Input Level High
DATA Input Level Low
CLK Input Voltage Amplitude
Output Voltage Modulation Control Current
IOFS
ICRSADJ
TC
MITSUBISHI
ELECTRIC
-1-
Unit
V
03/06/18 rev.1.0
M L 0 X X 1 8
Symbol
Parameter
VEE
Supply Voltage
All Pins
Input Voltage
Output Voltage
Output Current
Output Voltage Modulation Control Current
Output Voltage offset Control Current
Cross-Point Control Current
Junction Temperature
Storage Temperature
VDATA, VCLK
VOUT
IOUT
IM
IOFS
ICRSADJ
TJ
TSTG
Min.
-7.0
VEE
-6
-4
-40
-40
Max.
0.5
0.5
0.5
2.5
100
10
10
3
150
150
Unit
V
V
V
V
mA
mA
mA
mA
C
C
ELECTRICAL CHARACTERISTICS ( Ta = 253C, VEE =-5.2V, fDATA =10.3Gb/s, PRBS 231-1, RL=50)
Symbol
fDATA
fCLK
IEE
VO-PP
(Max.)
VO-PP
(Min.)
VOH
VOL
VOFS
CP
tR
tF
Parameter
Maximum Data Rate
Clock Rate
Power Supply Current
Test Conditions
NRZ
IOFS=floating, IM=6mA,
Retiming mode
Min.
1.0
Ratings
Typ.
10.3
10.3
310
270
Max.
TBD
TBD
Unit
Gb/s
GHz
mA
3.0
Vp-p
1.0
Vp-p
JITPP
Jitter P-P
PM
S11
(Data)
S11
(CLK)
S22
Phase Margin
Data Input Reflection
Coefficient
Clock Input Reflection
Coefficient
Output Reflection Coefficient
-1.0
TBD
270
0
-3.2
30
30
12
12
0
75
V
V
V
%
ps
ps
ps
ps
degrees
50MHz to 10GHz
-10
dB
1GHz to 10GHz
-10
dB
-10
dB
IOFS=floating, VOFS=0V
ORDERING INFORMATION
Part Number
ML0CP18
ML01618
Description
Bare Die
32-pin SLP, 5mm x 5mm
MITSUBISHI
ELECTRIC
-2-
03/06/18 rev.1.0
M L 0 X X 1 8
FUNCTIONAL DESCRIPTION
The ML0XX18 is an external modulator driver integrating a D-FF and output waveform adjustment controls, such as
output swing, offset voltage, and cross point. These functions of the ML0XX18 help customers to realize an excellent
optical waveform on their system.
Figure 1 shows the block diagram of the ML0XX18.
IINBIAS
50
GND
VEE
IOFS
ICRSADJ
Offset
Voltage
Control
50
DATA
GNDO
GNDON
50
DATAN
D-FF
SEL
CLK
Cross
-Point
Control
OUT
OUTN
Modulation
Modulation
Current
Control
CLKN
50
50
50
CSEL
IM
DATA/CLOCK INPUT
Both the data and clock inputs have on-chip 50 terminations. Thanks to the high gain input buffers, the sensitivities of data
and clock inputs are as high as 200mV differential.
For the data input interface, both DC/AC-coupled connections are allowed. In the case of DC couple, keep IINBIAS floating
or connect to VEE in order to disable the internal biasing generator. If interfacing by AC couple, connect IINBIAS to GND, and
external DC blocking capacitors are required for AC couple.
The clock input supports only AC-coupled configuration. External DC blocking capacitors are needed as well.
MITSUBISHI
ELECTRIC
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03/06/18 rev.1.0
M L 0 X X 1 8
DATA OUTPUT
The data output of ML0XX18 has integrated terminations on chip. The positive output OUT and the negative output OUTN
have associated GND PAD named GNDO and GNDON, respectively. GNDO and GNDON are disconnected from other GND
line on chip, and needed to be connected to GND externally.
Give a special attention to impedance design for OUT and OUTN. The impedances of both output terminals need to be the
same regardless of the output to drive an EAM/LD or not. For ML0CP18, design same output bond-wire lengths. This
notification is of importance for proper operation of driver IC.
The output waveforms of ML01618 (SLP) are shown in Figure 2, and those of ML0CP18 (Bare Die) are shown in Figure 3.
Figure 2.
Figure 3.
MITSUBISHI
ELECTRIC
-4-
03/06/18 rev.1.0
M L 0 X X 1 8
BUILT-IN D-FF
The ML0XX18 has an internal D-FF to retime the data by the clock supplied from an external source. To use the D-FF
retiming operation, connect CSEL to GND. On the other hand, by connecting CSEL to VEE, an integrated selector SEL will
bypass the D-FF, and shut down the power supply of the D-FF and the clock input buffer. The power down feature at the
non-retiming operation reduces the power dissipation of the ML0XX18.
0.5
0.5
0.0
0.0
-1.5
Vlow
-0.5
-1.0
-1.5
-2.5
-2.0
-2.5
-3.0
-3.0
-3.5
-2.0
-3.5
Vlow
2.0
4.0
6.0
8.0
Im[mA]
70.0
60.0
50.0
40.0
30.0
20.0
10.0
00.0
-4.0
0.0
100.0
90.0
80.0
CrossPoint[%]
-1.0
Vhigh
High/Low[V]
High/Low[V]
-0.5
Vhigh
0.0
2.0
4.0
6.0
0.0
Ioff[mA]
0.1
0.2
0.3
0.4
0.5
0.6
ICRSADJ[mA]
MITSUBISHI
ELECTRIC
-5-
03/06/18 rev.1.0
M L 0 X X 1 8
GND
CRSADJ
GND
VEE
VEE
GND
IM
IO F S
32
31
30
29
28
27
26
25
GND
DATA
22
OUT
GND
21
GNDO
GND
20
GNDON
DATAN
19
OUTN
GND
18
GND
NC
17
NC
10
11
12
13
14
15
Figure 6.
16
NC
GND
23
C LK N
GND
GND
GND
CSEL
C LK
24
GND
NC
IIN B IA S
MITSUBISHI
ELECTRIC
-6-
03/06/18 rev.1.0
M L 0 X X 1 8
1,600um
32
31
30
29
28
27
26
25
24
23
21
20
19
18
17
16
10
11
12
13
14
22
to be connected to GND. In
other words, when VEE is
supplied with -5.2V, supply
0V to the backside. In the
case of positive power
supply (+5.2V to GND
terminals and 0V to VEE),
supply +5.2V to the
backside. For the detailed
information for the positive
power supply usage, please
contact to your local rep.
15
2,300um
t=75um
Figure 7.
Center
Coordinates
Sizes
PAD
No.
Symbol
Ground
( 105, 1250)
90x90
17
OUTN
DATA
Data Input
Positive
( 105, 1110)
90x90
18
GNDON
GND
Ground
( 105, 950)
90x90
19
GNDO
GND
Ground
( 105, 650)
90x90
20
OUT
Data Input
Negative
( 105, 500)
90x90
21
GND
Ground
( 105, 350)
90x90
22
NC
PAD
No.
Symbol
GND
DATAN
Description
Center
Coordinates
Sizes
Data output
Negative
(2195,500)
90x90
(2195, 650)
90x90
(2195, 950)
90x90
(2195, 1100)
90x90
Ground
(2195, 1250)
90x90
(2155,1495)
90x90
(1955,1495)
90x90
(1755,1495)
90x90
(1555,1495)
90x90
(1355,1495)
90x90
(1155,1495)
90x90
Description
GND
GND
Ground
(700, 105)
90x90
23
CSEL
CLK
Clock Input
Positive
(850, 105)
90x90
24
IOFS
GND
Ground
(1000, 105)
90x90
25
IM
10
GND
(1300, 105)
90x90
26
VEE
No Connection
Re-timing/Non
Re-timing Select Input
Positive Output Offset
Voltage Control Current
Output Swing
Control Current
Supply Voltage
(1450, 105)
90x90
27
VEE
Supply Voltage
11
CLKN
Ground
Clock Input
Negative
12
GND
Ground
(1600, 105)
90x90
28
VEE
Supply Voltage
(955,1495)
90x90
13
NC
No Connection
(1845, 105)
90x90
29
VEE
(755,1495)
90x90
14
NC
No Connection
(1995, 105)
90x90
30
ICRSADJ
Supply Voltage
Cross Point Adjust
Control Current
(555,1495)
90x90
15
NC
No Connection
(2145, 105)
90x90
31
GND
(355,1495)
90x90
16
GND
Ground
(2195, 350)
90x90
32
IINBIAS
(155,1495)
90x90
MITSUBISHI
ELECTRIC
-7-
Ground
Input Bias Level
Control Current
03/06/18 rev.1.0
M L 0 X X 1 8
MITSUBISHI
ELECTRIC
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03/06/18 rev.1.0