Sie sind auf Seite 1von 30



2. 8255 PPI


In performing our assignment, we had to take the help and

guideline of some respected persons, who deserve our
greatest gratitude. The completion of this assignment gives
us much Pleasure. We would like to show our gratitude to
Mr. VISHAL SHARMA, Course Instructor, for giving us a good
consultations. We would also like to expand our deepest
gratitude to all those who have directly and indirectly guided
us in writing this assignment.
In addition, a thank you, who introduced us to the
Methodology of work, and whose passion for the underlying
structures had lasting effect.
Many people, especially our classmates and team members
itself, have made valuable comment suggestions on this
proposal which gave us an inspiration to improve our
assignment. We thank all the people for their help directly
and indirectly to complete our assignment.


TO 8086


8086 is an enhanced version of 8085 that has been

developed by Intel in 1976.
It is a 16 bit Microprocessor. It has a powerful
instruction set and it is capable to providing
multiplication and division operations directly. It has 20
address lines and 16 data lines. So it can access upto 1
MB of memory.
It supports two modes of operation: first is maximum
mode and second is minimum mode. Minimum mode is
applicable for systems that have a single processor and
maximum mode is used for the multiprocessor system.
8086 provides an additional features that it has an
instruction queue capable to store six instruction bytes
from the memory. The next instruction is fetched while
the present instruction is being executed. So it makes
the processor fast.




Data Bus Buffer

This three-state bi-directional 8-bit buffer is used to interface
the 8255 to the system data bus. Data is transmitted or
received by the buffer upon execution of input or output
instructions by the CPU. Control words and status
information are also transferred through the data bus buffer.
Read/Write and Control Logic
The function of this block is to manage all of the internal and
external transfers of both Data and Control or Status words.
It accepts inputs from the CPU Address and Control busses
and in turn, issues commands to both of the Control Groups.
(CS) Chip Select : A "low" on this input pin enables the
communcation between the 8255 and the CPU.
(RD) Read : A "low" on this input pin enables 8255 to send
the data or status information to the CPU on the data bus. In
essence, it allows the CPU to "read from" the 8255.
(WR) Write : A "low" on this input pin enables the CPU to
write data or control words into the 8255.
(A0 and A1) Port Select 0 and Port Select 1 : These input
signals, in conjunction with the RD and WR inputs, control
the selection of one of the three ports or the control word
register. They are normally connected to the least significant
bits of the address bus (A0 and A1).

(RESET) Reset : A "high" on this input initializes the control

register to 9Bh and all ports (A, B, C) are set to the input
Ports A, B, and C :The 8255 contains three 8-bit ports (A, B,
and C). All can be configured to a wide variety of functional
characteristics by the system software but each has its own
special features or "personality" to further enhance the
power and flexibility of the 8255.
Port A One 8-bit data output latch/buffer and one 8-bit data
input latch. Both "pull-up" and "pull-down" bus-hold devices
are present on Port A.
Port B One 8-bit data input/output latch/buffer and one 8-bit
data input buffer.
Port C One 8-bit data output latch/buffer and one 8-bit data
input buffer (no latch for input). This port can be divided into
two 4-bit ports under the mode control. Each 4-bit port
contains a 4-bit latch and it can be used for the control signal
output and status signal inputs in conjunction with ports A
and B.




Dual-tone multi-frequency signaling

1.1 Introduction
Dual-tone multi-frequency signaling (DTMF) is an inband telecommunication signalling system using the voicefrequency
between telephone equipment and other communications
devices and switching centres. DTMF was first developed in
the Bell System in the United States, and became known
under the trademark Touch-Tone for use in push-button
telephones supplied to telephone customers, starting in
1963. DTMF is standardized by ITU-T Recommendation Q.23.
It is also known in the UK as MF4.
The Touch-Tone system using a telephone keypad gradually
replaced the use of rotary dial and has become the industry
standard for landline and mobile service. Other multifrequency systems are used for internal signalling within the
telephone network.

[The keypads on telephones for theAutovon systems used all

16 DTMF signals. The red keys in the fourth column produce
the A, B, C, and D DTMF events.]

1.2 Multifrequency Signalling

Prior to the development of DTMF, telephone numbers were
dialled by users with a loop-disconnect (LD) signaling, more
commonly known as pulse dialling (dial pulse, DP) in the U.S.
Multi-frequency signaling is a group of signaling methods
that use a mixture of two pure tone (pure sine wave) sounds.
Various MF signaling protocols were devised by the Bell
System and CCITT. The earliest of these were for inband signalling between switching centres, where longdistance telephone operators used a 16-digit keypad to input
the next portion of the destination telephone number in
order to contact the next downstreamlong-distance
telephone operator. This semi-automated signaling and
switching proved successful in both speed and cost
effectiveness. Based on this prior success with using MF by
specialists to establish long-distance telephone calls, dualtone multi-frequency signaling was developed for end-user
signaling without the assistance of operators.
The DTMF system uses a set of eight audio frequencies
transmitted in pairs to represent 16 signals, represented by
the ten digits, the letters A to D, and the symbols # and *. As
the signals are audible tones in the voice frequency range,
they can be transmitted through electrical repeaters and
amplifiers, and over radio and microwave links, thus

eliminating the need for intermediate operators on long

longdistance circuits.
Other vendors of compatible telephone equipment called the
Tone feature tone dialling or DTMF,, or used their
other trade names such as Digitone by Northern Electric
any in Canada.

1.3 Keypad

1209 Hz on 697 Hz to make the 1 tone

The DTMF telephone keypad is laid out in a 44 matrix of
push buttons in which each row represents
the low frequency component and each column represents
the high frequency component of the DTMF signal. Pressing a

key sends a combination of the row and column frequencies.

For example, the key 1 produces a superimposition of tones
of 697 and 1209 hertz (Hz). Initial pushbutton designs
employed levers, so that each button activated two contacts.
The tones are decoded by the switching centre to determine
the keys pressed by the user.

DTMF keypad frequencies (with sound clips)

1209 Hz

1336 Hz

1477 Hz

1633 Hz

697 Hz

770 Hz

852 Hz

941 Hz

1.4 Decoding
DTMF was originally decoded by tuned filter banks. By the
end of the 20th century, digital signal processing became
the predominant technology for decoding. DTMF decoding
algorithms often use the Goertzel algorithm to detect

1.5 Other multiple frequency signals

National telephone systems define other tones that
indicate the status of lines, equipment, or the result of
calls. Such call-progress tones are often also composed of
multiple frequencies and are standardized in each country.
The Bell System defines them in the Precise Tone
Plan. However, such signaling systems are not considered
to belong to the DTMF system.

Chapter 2
DTMF (Dual Tone Multi Frequency) decoder
2.1 Introduction
This DTMF (Dual Tone Multi Frequency) decoder circuit
identifies the dial tone from the telephone line
and decodes the key pressed on the remote telephone. Here
for the detection of DTMF signaling, we are using the IC
MT8870DE which is a touch tone decoder IC. It decodes the
input DTMF to 5 digital outputs. The M-8870 DTMF (Dual
Tone Multi Frequency) decoder IC uses a digital counting
technique to determine the frequencies of the limited tones
and to verify that they correspond to standard DTMF

frequencies. The DTMF tone is a form of one way

communication between the dialer and the telephone
exchange. The whole communication consists of
the touch tone initiator and the tone decoder or detector.
The decoded bits can be interfaced to a computer or
microcontroller for further application (For example, Remote
control of home/office electrical appliances using a
telephone network, Cell Phone controlled home appliances,
Mobile phone controlled robot, etc.)

DTMF Decoder Circuit

2.2 Components required

1. DTMF decoder IC (M-8870)
2. Resistors (100k; 70k; 390k)
3. Capacitors (0.1Fx 2)
4. Crystal oscillator (3.579545MHz)

2.3 What is the Need of DTMF Decoding?

In the premature days, our telephone systems were operated
by human operators in a telephone exchange room. The
caller will pick up the phone, giving instruction to the
operator to connect their line to the destination. It is a kind
of manual switching. As more and more people entered in
the telephone technology as useful communication gear,
manual switching becomes a time consuming tedious task.
As technology established, pulse or dial tone technique were
invented for telephone communication switching. It employs
electronics and computers to support switching operations.
DTMF is the ultimate technique used in any of the Mobile,
Telephone communication systems.

The operation of DTMF method are as follows:

Caller generates a dial tone consisting of two

frequencies. It is transmitted via the telephone line
(communication media).
Telephone exchange consists of a DTMF decoder, which
decodes the frequencies in to digital code.
These codes are the address of destination subscriber; it
is read and processed by a computer which connects
caller to the destination subscriber.

2.4 Working of DTMF decoder circuit

DTMF keypads are employed in almost all landline and

mobile handsets. Thus this technology is used in the
telephone switching centres to identify the number
dialled by the caller.
The decoder distinguishes the DTMF tones and produces
the binary sequence equivalent to key pressed in a
DTMF (Dual Tone Multi Frequency) keypad.
The circuit uses M-8870 DTMF decoder IC which
decodes tone generated by the keypad of cell phone.
DTMF signals can be tapped directly from the
microphone pin of cell phone device. Cut the
microphone wire and you will get two wires red and
green. The red wire is the DTMF input to the circuit.
The signals from the microphone wire are processed by
the DTMF decoder IC which generates an equivalent
binary sequence as a parallel output like Q1, Q2, Q3, and

Table showing DTMF Low and High frequency

tones and decoded output

There is an inbuilt Op amp present inside the M-8870

decoder IC. The electrical signals from microphone pin
are fed to inverting input of the Op Amp via a series of
resistance (100k) and capacitance (0.1 F).
The non-inverting input of Op-amp is connected to a
reference voltage (pin4 -VREF). The voltage at VREF pin
is Vcc/2.
Pin 3 (GS) is the output of internal Op Amp, the
feedback signal is given by connecting the output pin
(pin3- GS) to inverting input pin (pin2- IN-) through a
resistor (270k).

The output of Op Amp is passed through a pre filter, low

group and high group filters (filter networks). These
filters contain switched capacitors to divide DTMF tones
into low and high group signals (High group filters
bypass the high frequencies whereas low group filter
pass low frequencies).
Next processing sections inside the IC are frequency
detector and code detector circuits. Filtered frequency
passed through these detectors.
At last the four digit binary code is latched at the output
of M-8870 DTMF decoder IC.

Uses of other pins:

The entire process from frequency detection to latching

of the data, is controlled by steering control circuit
consisting of St/GT, Est pins, resistor (390k) and a
capacitor (0.1F).
5th Pin, INH is an active high pin, inhibits detection of A,
B, C, D tones of character.
6th Pin, PWDN is an (active high), inhibits the working of
oscillator thus stops the working of our circuit.
The 10th pin 10; TOE is the output enable pin which is
active high logic and enables the latching of the data on
the data pins Q0, Q1, Q2, and Q3.
15th Pin StD is the Data valid pin, turn out to be high on
detection of valid DTMF tone or else it remains low.
Pins 7 (OS1) and 8 (OS2) are used to connect crystal
oscillator. An oscillator of frequency 3.579545 MHz is
used here.

Chapter 3
8086 Microprocessor
3.1 Introduction
8086 trainer kit

The 8086 is
a 16-bit microprocessor chip
by Intel between early 1976 and mid-1978, when it was
released. The Intel 8088, released in 1979, was a slightly
modified chip with an external 8-bit data bus (allowing the
use of cheaper and fewer supporting ICsand is notable as the
processor used in the original IBM PC design, including the
widespread version called IBM PC XT.The 8086 gave rise to
the x86 architecture which eventually became Intel's most
successful line of processors

The board is based on Intel 8086 Microprocessor, which

operates at 6.144 MHz using the crystal of 18.432. The board
can operate using the 101/104 PC keyboard supplied along
with the trainer kit and 2 Line by 16-character LCD display or
from the PC (using the Terminal Emulation Software).
Microprocessors Address, Data and Control bus pins are
brought to the 50 pin FRC connector. PS -86A is equipped
with powerful software monitor in two-27C256 EPROM.
The monitor supports Video terminal RS232C interface, local
101keyboard and LCD display. The board has 64KB CMOS
static RAM (type 62256). PS -86A works on +9V DC.

8086 Specifications

8086 Microprocessor operating at 18.432 MHz

16KB powerful software monitor two 27C256 EPROM
Three 16-bit programmable timers from 8253
48 programmable I/O lines from two nos. of 8255
Serial interface using 8251
50 pin FRC connector for system bus expansion
20 pin FRC connector for user interface from 8255
9 pin D type connectors for RS 232 interface
Six different selectable baud rates from 150 to 9600
101 PC type keyboard for entering user address/data
and for commands
Built in line-by-line assemble and disassemble
User friendly software monitor for loading and
executing programs with break point facility.

Pin Diagram

Buses and operation

All internal registers, as well as internal and external data
buses, are 16 bits wide, which firmly established the "16-bit
microprocessor" identity of the 8086. A 20-bit external
address bus provides a 1 MB physical address space (220 =
1,048,576). This address space is addressed by means of
internal memory "segmentation". The data bus
is multiplexed with the address bus in order to fit all of the
control lines into a standard 40-pin dual in-line package. It
provides a 16-bit I/O address bus, supporting 64 KB of
separate I/O space. The maximum linear address space is
limited to 64 KB, simply because internal address/index
registers are only 16 bits wide. Programming over 64 KB
memory boundaries involves adjusting the segment registers

the 80386 architecture introduced wider (32-bit) registers

(the memory management hardware in the 80286 did not
help in this regard, as its registers are still only 16 bits wide).
Some of the control pins, which carry essential signals for all
external operations, have more than one function depending
upon whether the device is operated in min or max mode.
The former mode was intended for small single-processor
systems, while the latter was for medium or large systems
using more than one processor.

Registers and instructions

The 8086 has eight more or less general 16bit registers (including the stack pointer but excluding the
instruction pointer, flag register and segment registers). Four
of them, AX, BX, CX, DX, can also be accessed as twice as
many 8-bit registers (see figure) while the other four, BP, SI,
DI, SP, are 16-bit only.
Due to a compact encoding inspired by 8-bit processors,
most instructions are one-address or two-address
operations, which means that the result is stored in one of
the operands. At most one of the operands can be in
memory, but this memory operand can also be
the destination, while the other operand, the source, can be
either register or immediate. A single memory location can
also often be used as both source and destination which,
among other factors, further contributed to a density
comparable to (and often better than) most eight-bit
machines at the time.

8086 has a 16-bit flags register. Nine of these condition code
flags are active, and indicate the current state of the
processor: Carry flag (CF), Parity flag (PF), Auxiliary carry
flag(AF), Zero flag (ZF), Sign flag (SF), Trap flag (TF), Interrupt
flag (IF), Direction flag (DF), and Overflow flag (OF).

J8 Connector

Interfacing B/w Our Project and 8255

Program Code:
MOV AX,2000

// Initialising Data Sement to 20000

MOV BX,1000

// Initailise Base register to point lookup



// Load AL with control word to configure

Port A of 8255 as I/P and Port B as O/P


// Load DX with Port address of control

word reg of 8255


// Load Control word of 8255


// Clear AL


// Load DX with Port address of Port A of



// Take data from DTMF module


// Convert Data in its 7 seg code by looking

in lookup table


// Load DX with Port address of Port B of



// Give data to 7 segment to display

corresponding number


// Loop back for another data

INT 03

// End

Lookup Table:


7 Segment code to Display


60 H




F2 H


66 H


B6 H




E0 H




F6 H