Electronics 2

Bipolar Junction Transistor Modeling

1.
2.

Two models
DC model
Hybrid model

Model
Is the combination of circuit elements,
property chosen that best approximate the
actual behavior of semiconductor device
under specific operating conduction.
IC

IO
+

Vi

model

Vo
_

Steps in getting the AC equivalent circuit

1.

Step all the DC sources to zero and replace them by a

short circuit equivalent.

2.

Replace all capacitors by a circuits equivalent.

3.

Remove all elements bypassed by the short circuit

equivalent introduced by steps (1) and (2).

4.

Reduce the networks in a more convenient and logical

form.

C
+
E

R1

R2

RC

RS

---

AC source

voice, DVD player, and signal generator.

DC source

It gives life to the resistor and capacitor. etc., to

make sounds.

Transistor
Transistor
Is a two port network.

where:
h1 = hi = input resistance
h12 = hr = reverse transistor voltage ratio
h21 = hf = forward transistor current ratio
h21 = ho = output conductance

Four important parameters

(Zi, Zo, Ao, and Ai)
1.

Input impedance, Zi

For small signal analysis one the input impedance has

been determined the same numerical value can be
used for changing levels of applied signals.
The input impedance of BJT amplifier is purely
resistive in nature and depending in the manner in
which the transistor is employed can vary from a few
ohms to M.
NOTE: an ohmmeter cannot be used to measure the small
signal AC input impedance since the ohmmeter
operates in DC mode.
2.

Output impedance, Zo
Is determined at the output terminals looking back into
the system with the applied signal set to zero.

3.

Voltage gain, Av
One of the most important characteristics of an
amplifier is the signal AC voltage gain as determined
by,
Av = Vo / Vi
AVNL = Vo / Vi RL = (open circuit)
AVNL
No load voltage gain.
Rsense

+
AVNl

Vs

Vin
_

Vo

The load has not been converted to the output

terminals.
For transistor amplifier, the no-load voltage gain is
greater than the loaded voltage gain.

Avs =

Vo
Vi . Vo
=
Vs
Vs Vi

ZiVs
Vi
Zi
;
Vi =
=
Zi+Rs
Vo
Zi+Rs

4.

Depending on the configuration, the magnitude of

the voltage gain for a loaded single stage transitive
amplifier typically ranges from just less than 1 to a few
hundred.
A multi-stage system, however can have a voltage
gain in the thousands.
Current gain, Ai
For BJT amplifier, the current typically ranges from a
level, just less than 1 to a level that may exceed 100.
Ai = Io / Ii

Ii

Io

- Vo
Io
RL
Ai =
=
Ii
Vi
Zi

+
Vi

BJT Amplifier
_

- VoZi
=
ViRL
Zi
Ai = - Av
RL

Example:
Rsense
+
Vs
= 18v

a)
b)
c)
d)

Calculate:
Vi
Zi
AVNL
Avs

Zi

0.65k +

Ii= 10mA
Vin
_

AVNL
Vo=3.6v


a)

Solution:
Vs IiRL Vi = 0
Vi = Vs IiRL
= 18 mV (10A)(0.65k)

c)

AVNL = Vo / Vi
= 3.6 V / 11.5 mV
AVNL = 313.043

Vi = 11.5mV

b)

Zi = Vi / Ii
= 11.5 mV / 10A
Zi = 1.150k

d)

Avs = Vo / Vs
= 7.6 V / 18 mV
Avs = 100

System approach;
Effects of Rs and R2
Zth = Zo = Ro

AVNL = Vo / Vi
Vo = AVNLVi
Ii = Vi / Zi = Vi / Ri
Io = - Vo / RL

Using Voltage Divider

Vo =

Av =

Vo
=
Vi

RL
RL+Ro

)A

RL
RL+Ro

)A

VNLVi

VNL


a)
b)

Example #1: In the Figure, a load impedance has been

applied to the fixed bias transistor amplifier.
Determine Av and Ai using two-port systems.
Determine Av and Ai using the re model and compare
results.
Given:
12V
Rc = Ro
RC
470k
3k
R1
Re = 10.71
C2
AVNL = -280.11
1uF
Zi = 1.07k
1uF
Zo = 3k
0.5k
RE
1k

B= 100

Av =

(
(

RL
RL+Ro

)A

2.2k
3k+2.2k

VNL

) 280.11

Av = -118.508
Zi
Ai = - Av RL

= 118.508
Ai = 57.692

1.071k
2.2k

 Current divider theorem:

RB

Ib =

( R +re )Ii

Ii

Io

Vi
Ib =
re

RL' = RCRL
= 3 k2.2 k
RL' = 1.269 k

BIB
RB

470k

3k

RL

2.2k

 Vo = RL'IB

RL'Vi
re

Av =

Vo
= -RL'
Vi
re

Av =

-1.269k
10.71

Av = -118.5

 Apply current divider theorem:

RC
RC+RL

(
)Ib
3k
Io = ( 3k+2.2k )100Ib
Io =

Io = 57.69Ib
Ib =

470k
470k+1.071k Ii

Ib = 0.9977Ii
Ai = Io / Ii = (57.69)(0.9977)

Ai = 57.56


a)
b)
c)
d)
e)

Example #2: For prefixed bias, Determine:

AVNL, Zi and Zo.
Sketch the two-port model and parameters.
Calculate Av.
Determine Ai.
Calculate using AC analysis.
18V

3.3k
680k

Vo
1.8F

Vi
Ii

= 100

1.8F
Zi

4.7k

 Solution:
a) By DC analysis,
Vcc IBRB VBE = 0
IB =

Vcc - VBE
18V-0.7V
=
RB
680k

IB = 25.44A
IE = (+1)IB
IE = 2.57mA
re = 26mV / IE
re = 10.12

IE = (+1)IB
IE = 2.57mA
re = 26mV / IE
re = 10.12
Zi = RBre
= 680k(100)(10.12)
Zi = 1.01k
Zo = Ro = Rc = 3.3k
AVNL = -RC / re = -326.09
RL
4.7k
Av =
=
A
VNL
RL+Ro
4.7k+3.3k
Ai = -Av Zi / RL = 41.169

b)

RL' = RCRL
= 3.3k4.7k
RL' = 1.939k

Av = -RL' / re
re = 26mV / IE
= 26mV / 2.57mA

Av = -191.60
re = 10.12
Av = -1.939k / 10.12

Ai = Io / Ii
RC
RC+RL

(
)Ib
3.3k
Io = (
3.3k+4.7k )100Ib
Io =

Io = 41.25Ib
680k
680k+1.01k Ii
Ib = 0.9985Ii
Ai = (41.25)(0.9985)

Ib =

Ai = 57.56

Effect of source impedance (Rs)

The effect of an internal resistance on the gain of the
amplifier.
The parameters Zo and AVNL of an two-port system are
unaffected by an internal resistance of a applied source.
Zi Ri
Ii = Is = Vs / Rs+Zi
Avs = Vo / Vs
Ri

( Ri+Rs )VsA
Vo
Ri
Av =
= (
)
A
Vi
Ri+Rs
Vo =

VNL

VNL

Assignment: In figure below, a source with an internal

resistance has been applied to the fixed bias
transistor.
12V

3k

470k
+
Vs

Vi
-

= 100

Zi
Zo

Vo

a)

b)

a)

Determine the voltage gain Avs = Vo / Vs, What % of

the applied signal appears at the input terminals of the
amplifier?
Determine the voltage gain Avs = Vo / Vs using re
model.

Solution:
Vcc IBRB VBE = 0
IB =

Vcc - VBE
RB

IB = 24.043A

12V-0.7V
470k

IE = (+1)IB
IE = (100+1)(24.043A) = 2.438mA
re = 26mV / IE
re = 10.71
Ri = re
= (100)(10.71)
Ri = 1.071k
Zo = Ro = Rc = 3k
AVNL = -3k / 10.71 = -280.11
Av = Vo / Vs =
Av = -190.96

1.071k
RL
(-280.11)
=
RL+Ro AVNL 1.071k+0.5k

RLVs
Vi =
RL+Ro
(1.071k)Vs
=
1.071k+0.5
Vi = 0.6817Vs

68.2% of the available signal reached the amplifier and

31.8% was lost across the internal resistance of the
source.

b)

Vo = -Rc
= -(100Ib)(3k)
Vs
Zi = re and Ib Ii =
Rs+re
Vs
=
Rs+re
Vs

Vo = -100

(1.571k) (3k)

Avs = Vo / Vs

(-100)(3k)

1.571k
Avs = -190.96

Combined effects of Rs and RL

A source of Rs and a losd RL have become applied to a
two-port system for which the parameters Zi, AVNL, and Zo
have been specified.
Assume Zi and Zo are inaffected by Rs and RL.
Ai = -Av Zi / RL

Ri+Rs
Av = Ais = -Avs
RL

Vs
; using Is =
RL +Rs

By Voltage Divider:
Vo =

RL
RL+Ro

Vo
=
Eq. 1: Av =
Vi

Vi =

Eq. 2:

Vi

RiVs
Ri+Rs

Ri
=
Ri+Rs
Vs

)A Vi
Ri
( Ri+Rs )A
VNL

VNL

Avs = Vo / Vs
= (Vo / Vi) (Vi / Vs)
Avs=

RL
Ri
RL+Ro AVNL Ri+Rs

) (

The longer the source resistance and/or smaller the load

resistance, the loss overall gain of the amplifier.


a)
b)
c)

Example: for a single-stage amplifier with RL = 4.7k

and Rs = 0.3k. Determine:
Avs
Av = Vo / Vs
12V
Ai
R1
C1

RS
VS

470k

Rc
3k

C2
10uF

4.7k

10uF
0.3k

RL

B= 100


a)

Solution:
IB =

Vcc - VBE
12V 0.7V
=
RB
470k

IB = 24.043A
IE = (+1)IB
IE = (100+1)(24.043A) = 2.438mA

re = 26mV / IE
re = 10.71

Ri = re
= (100)(10.71)
Ri = 1.071k
Zo = Rc = 3k
AVNL = -3k / 10.71 = -280.112
RL
Ri
RL+Ro AVNL Ri+Rs

( ) ( )
4.7k
1.071k
Avs = (4.7k+3k )(-280.112)(
)
1.071k+0.3k

Avs =

Avs = -133.564

b)

Av = Vo / Vi

-Vo
RL
Vs
Ri+Rs

RL
RL+Ro (AVNL)

Ais = Io / Ii =
( )
4.7k
=
( 4.7k+3k )(-280.112) = -VoRi+Rs
ViR
Av = -170.977
Ais = -Avs Ri+Rs
( R )
=

c)

By KVL:

Vs IsRs IiRi = 0
Vs Is (Rs+Ri) = 0
Is = Vs
RL +Rs

= (133.564)
Ai = 170.977

0.3+1.071
4.7

BJT and JFET frequency response

a=b

Example: b = 10, and x = 2

Solution:
log a = xlogb
log a
=x
log b
logb a = x

, x = logb a

log 100
=x
log 10
log10 100 = 2

 Logarithm taken to the base 10 is common logarithms.

Logarithm taken to the base e are referred as natural
logarithms.
Common logarithms
x = log10 a
Natural logarithm
y = logb a

log10 1 = 0
a
log10
= log10 a log10 b
b
1
log10
= log10 a log10 b
b
log10 ab = log10 a + log10 b

 Example #1: 5 / 2 = 2.5

Solution:
x = (log 5 log 2) log
x = 2.5
Example #2: (4)(3) = 12
Solution:
x = (log 4 + log 3) log
x = 12

Example #3:
(0.6)(30) / 4 = 4.5
Solution:
x = (log 0.6 + log 30
log 4) log
x = 4.5
Example #4:
(0.5)(10)
(20)(5)
Solution:

] = 2.5x10

x = 2[log 0.5 + log

(log 20 + log 5] log
x = 2.5x10

Voltage Divider Bias

22V

RC
R1

470k

10k
C2

C1

10uF
10k

10uF
100

RL

RS
R2

470k

1.5 k
RE

VS

B= 140

2uF

 Solution:
RTH = R1R2
= 39k3.9k
RTH = 3.55k
R2

( R +R )Vcc
3.9k
= (39k+3.9k )(22V)

VTH =

VTH = 2V

DC analysis:
VTH - VBE - IBRTH - IERE=0
VTH - VBE - IBRTH - (+1)IERE=0
VTH - VBE - IB[RTH + (+1)RE]=0

IB =

VTH - VBE
RTH+(+1)RE

2V-0.7V
=
3.55+(141)(1.58)
IB = 24.043A

 IE = (+1)IB
= (140+1)(6.05A)
IE = 0.85mA
re = 26mV / 0.85mA
re = 30.59
Zi = RTHre
= 3.55k(140)(30.59)
Zi = 1.938k
Zo = RL = 10k
- RcRL
Av =
re
- 10k10k
=
30.59
Av = -163.45

Ai = -Av (Zi / RL)

1.938k
= 163.45
10k
Ai = 31.68

Zi
Zi+Rs

( )
1.938
Avs = -163.45(1.938+100)
Avs = AVNL

Avs = -155.430

 Compare using re model.

AVNL = - RL / re
= - 10k / 30.59
= -326.90

RL

Av = AVNL RL+Ro
= -326.90
Av = -163.45

10k
10k+10k

Avs =

(
(

RTH
RTH+Rs
RL
RL+Ro AVNL

)
)

3.55k
= 3.55k+100
10k
10k+10k (-163.45)

) (

Avs = -157.40

Ib

Bre

RTH

Ib

Decibel
The relationship of logarithm to power and
audio levels. The term (bel) was derived from
the surname of Alexander Graham Bell.
G = logP2/P1
GdB = 10log10P2/P1
GdBm = 10log10P2/1mW
GdB = 20logV2/V1
GdB = 20log(I2/ I1)
GdBT = GdB1 + GdB2 + GdB3 + GdB4 + .
GdBn

Ex.
1) Find the magnitude gain corresponding to a decibel gain of 100
Solution:
GdB = 10log10P2/P1
100/10 = 10/10log(P2/P1)
log-1(10 = logP2/P1)

Ans: P2/P1 = 1x1010

2) The input power to a device is 10,000W at a voltage of 1,000V.

The output power is 500W, while the output impedance is 20
a) Find the power gain dB
b) Find the voltage gain in dB
Solution:
a) GdB = 10log10P2/P1
= 10log10(500W/1000W)
GdB = -13.01dB

b) GdB = 20logV2/V1
P= V2/R
GdB = 20log(100/1000)
V2 = PR
GdB = -20
V = (500)(20)
V = 100

3) An amplifier rated at 40W output is connected to a 10

speaker?
a) Calculate the input power required for full power output if
the power gain is 25dB
Solution:
GdB = 10log10P2/P1
25/10 = log(40/P1)
25 = 10log10(40/P1)
P1= 40/(25/10)log-1
Ans: P1=126.49mW

b) Calculate the input voltage for rated output if the amplifier

voltage gain id 40dB
Solution:
P = V2/R
40 = 20log(20/V1) V1= 20/100
V2 = (40)(10)
2 = log(20/V1)
V = (40)(10)
log-1(2 = log20/V1) Ans: V1= 200mV
V = 20
100 = 20/V1

Cascaded Amplifier
20V

RC
RC
R1

15k

2.2k

C1

R1

15k

2.2k

R2

4.7k

1k

C1
10uF

25uF

R2

4.7k

1k

B= 200

RE
RE

1uF

B= 140

1uF

VTH = (R2//(R1+R2))(VCC)
VTH = (4.7K /(4.7K + 15K))(20V)
VTH = 4.77V
RTH = R1//R2
RTH = 4.7K//15K
RTH = 3.58K
IB = (VTH - VB)/RTH (+1)(RE)
IB = (4.77V 0.7V)/3.58K (200+1)(1K)
IB = 19.89mA
IE = (+1)(IB)
re = (26mV)/(IE)
IE = (200+1)(19.89mA)
re = (26mV)/(3.94mA)
IE = 3.94mA
re = 6.5
Zi = RTH// re
Zi = 3.58K//(200)(6.5)
Zi = 953.68

AV1 = (-RC//Zi)/(re)
AV1 = (-2.2K//953.68)/(6.5)
AV1 = -102.334
Vo1 = AV1 Vi
Vo1 = (-102.334)(25V)
*If a 10K resistor is connected
Vo1 = -2.56mV
across the output, what is VL?
AV2 = (-RC/re)
VL = (RL//(RL+RC))(VO)
AV2 = (-2.2K/6.5) VL = (10K //(10K+2.2K))(865.9mV)
AV2 = -338.36
VL = 709.75mV
AVT = (-102.334)(-338.36)
AVT = 34,635
Vo = AVT Vi
Vo = (34,635)(25V)
Vo = 865.9mV

JFET(Junction Field Effect Transistor)

A type of FET that operates with a reverse-biased junction to

control a current in a channel.

gm forward transfer conductance, change in drain current

(ID) for a given change in gate to source voltage (VGS)
with the drain to source voltage constant.
gm = ID/VGS = siemens ()
ID = -IDss(1 VGS/(VGS(off) )2
gmo or gfs = forward transfer admittance
gm = gmo(1 VGS/(VGS(off) )2
gmo = 2(IDSS)/|VGS(off)|

Depletion MOSET(D-MOSFET)

The drain and source are diffused into the substrate material
and then connected by a narrow channel adjacent to the
insulated gate.
Drain
Drain

Sio2

Gate

Psubstrate
Gate channel

Source
Drain

Source

Gate

Gate
substrate

Source
P channel

n-channel operates in the depletion mode when a negative

gate-to-source voltage is applied and in enhancement mode
when a positive gate-to-source voltage is applied.

FET Amplifier: Common Source Modifier

The drain and source are diffused into the substrate material
and then connected by a narrow channel adjacent to the
insulated gate.
RD

C2

C1

RG

Rc
Rs

C2

Vgs

AC equivalent circuit
Rd = RD//RL
Vi = VGS

RG

Rd
Rs

FET equivalent circuit:

Vout = Vds
ID = IDss(1 VGS/(VGS(off) )2
VGS = IDRs
AV = (Vo/Vi) = (Vout/Vgs) = IdRd/(Id/gm)
AV = gmRd

VGS

ID

gm

Vgs
gm

AV = gm(rds//Rd)

Rd

Effect of Source Resistance on Gain:

ID
Vi = Vgs + IdRs
Vo = IdRd
AV = Vo/Vi = Vds/Vgs + IdRs = IdRd/(Vgs + IdRs)
AV = gmVgsRD/(Vgs + gmVgsRs)
AV = gmVgsRD/Vgs(1+ gmRs)
AV = gmRD/(1+ gmRs)
Bypassed Source Resistance on Gain:
Zi = RG
Zo = RD
ID
Rsg
AV = gm(RD//RL)
AV = gmRD
AV = gm(RD//RL)/(1+ gmRs)

gm Vgs

Rd

Rd
Vo
Zo
RG

RL
Rs

Ex.
1)The JFET has a gm = 4ms with an external ac drain resistance
of 1.5K, what is the ideal voltage gain?
Solution:
ID
Vgs
gm= 4ms
ID gm
AV = -gmRD
Rd= 1.5k
AV = -(4ms)(1.5K)
AV = -6
560

2) An FET equivalent circuit is shown. Determine the voltage gain

when the output is taken across RD. Neglect rds
Solution:
AV = gmRD/(1+ gmRs)
AV = (4ms)(1.5K) /(1+(4ms)(560))
AV = -1.852

JFET Self-Bias Configuration

Ex. The fixed-bias configuration has an operating point defined by
Vgs = -2V and Id = 5.625mA with IDSS = 10mA and Vp = -8V. The
network should be redrawn with an applied signal Vi. The value is
provided as 40ms.
20V
20K

a)Determine gm
b)Determine rd
c)Calculate Zi
d)Calculate Zo
e)Determine AV
f)Determine AV

Vo
C2

G
IDss = 10mA
C1

S
1M
Vp = -8V

Vgs

Zo

Solution:
a) gmo = 2(10mA)/|8V| = 2.5ms
gm = (2.5ms)(1 (-2V)/(-8V))
gm = (2.5ms)(1 (0.25V))
gm = 1.875ms
b) rd = 1/(yos)
= 1-/(40s)
rd = 25K
c) Zi = RG =1M
d) Zo = rd//RD
Zo = 25K // 2K
Zo = 1.85K
e) AV = -gm(rd//RD)
AV = -(1.875ms)(25K //2K)
AV = -3.47

f) AV = -gm(RD)
AV = -(1.875ms)(2K)
AV = -3.75

Ex. Calculate the dc bias, voltage gain, input impedance, and

the resulting output voltage for the cascade amplifier.
Calculate the load voltage if a 10K load is connected across
the output.
20V

2.4K

2.4K
D

C2

C2

C1
S

33M
3.3M
680
600
100F

0.05mF

Solution:
Zi = RG =3.3M
Zo = RD = 2.4K

AV = Vo/Vi
Vo = (39.69)(10mV)
Vo = 396.9mV

gmo = 2(10mA)/|4V| = 5ms

gm = (5ms)(1 (-1.9V)/(-4V))
gm = 2.625ms
AV = -(2.625ms)(2.4K)
AV = -6.3
VL = (RL//(RL+RD))(VO)
AVT = (-6.3)(-6.3)
VL = (10K//(10K+ 2.4K
))(396.9mV)
AVT = 39.69
VL = 320mV

Cascode Connection

A cascode connection has one transistor on top or in series

with another.
A common emitter (CE) stage feeding a common base (CB)
stage
Ex. Calculate the voltage gain for the cascode amplifier.
RB= 6.8K

1.8K
Q2

RB2= 5.6K

C2=5F

C2= 5F

C1= 10F

RB3= 4.7K

B1=B2 = 200

Q1

CE 20F

Solution:
VB1 = (RB3/(RB1+RB2+RB3))(VCC)
VB1 = (4.7K/(4.7K+5.6K+6.8K))(18V)
VB1 = 4.95V
VB2 = (RB3+RB2/(RB1+RB2+RB3))(VCC)
VB2 = (4.7K+5.6K/(4.7K+5.6K+6.8K))(18V)
VB2 = 10.84V
IB = (VTH - VB)/RTH (+1)(RE)
IE = (VE1 - VBE)/(RE)
IE = (4.95V 0.7V)/(1.1K)
IE = 3.86mA

re = 26mV/(IE)
re = 26mV/(3.86mA)
re = 6.74
AV1 = -RC/re *no value of RC so re is used
AV1 = re/re = 1
AV2 = RC/re
AV2 = 1.8K /(6.74)
AV2 = 267.29

AVT = (AV1)(AV2)
AVT = -267.29

Darlington Connection
Super Beta Transistor

The composite transistor acts as a single unit with a current

gain that the product of the current gains of the individual
C
transistor.
Q1
D = 12
if 1 = 2 =
B
D = 2
Q2

Ex. What current gain is provided by a Darlington connection

of two identical transistors each having a current gain of
= 200
Solution:
D = 12
D = (200)(200)
D = 40,000

DC Bias of Darlington Circuit

VCC - IBRB - VBE - IBRE =0
VCC - IBRB - VBE - DIBRE =0
IBRB + DIBRE = VCC - VBE
IB(RB + DRE)= VCC - VBE
IB= VCC - VBE /(RB + DRE)

RB

IB

RE
IE

IE = (D+1)(IB)
VE = IERE
VE = VB - VBE
VB = VE + VBE

Ex. Calculate the DC Bias voltage and currents

IB, IC, VE, VE, and VC
IB = (18V 1.6V) /(3.3M) + (8000)(390)
IB = 2.55A
18V
IE = (8000+1)(2.55A)
IE = 20.4mA
33M
BD = 8000
VE = (20.4mA)(390)
VBE - 1.6V
VE = 7.97V
VB = 7.97V + 0.7V
VB = 8.67V
390
VCC = 18V (20.4mA)(0)
IE
VCC = VC
VC = 18V

AC Equivalent Circuit

For a Darlington emitter follower, the AC input signal is applied

to the base of the Darlington transistor through capacitor C1
with the AC output V0 obtained from the emitter through
capacitor C2. The Darlington transistor is placed by an AC
equivalent comprised of an input resistance and an output
source.
V0 = IBRE + DIBRE
RB
V0 = IB(RE + DRE)
V0 = IB(RE(1+ D))
RE
V0 = IBRED
Vi - IBri - V0 = 0
IBri + IBRE + IBDRE = Vi
Vi - V0 = IBri
Vi = Ib(ri + RE + DRE )
IBri = Vi - IB(RE + DRE)

Zi = RB// (ri + RE (1+D))

Zi = RB// (ri + DRE)
AC Current Gain:
Io = DIb Ib = (1+D) = DIb
Io/Ib = D
Ai = Io/Ii = Io/Ib = Ib/Ii
By current divider:
Ib = (RB/(ri + DRE))(Ii)
Ib/Ii = (RB/(ri + DRE))
Ai = D (RB/(ri + DRE))
Ai = DRB/(RB +ri+DRE)
AC Voltage Gain:
Vo/Vi = Ib(RE+DRE))/Ib(ri+RE+DRE) AV =
RE(1+D)/ri+RE(1+D)
AV = (RE+DRE)/(ri+RE+DRE)
AV = DRE/ri+DRE

Ex. Calculate the input impedance if ri = 5K

18V

3.3M

BD = 8000
VBE - 1.6V

IE

390

Zi = 3.3M//(5K+(8000)(390))
Zi = 1.6M
Ai = (8000)(3.3M)/(3.3M+5K+(8000)(390))
Ai = 4,108.95
Calculate AV in the given circuit
AV = (8000)(390)/(5K+(8000)(390))
AV = 0.998 1

Feedback Pair
18V

I2

RC
75

I2

Vi

B1 = 140
Q1

B2 =180

RB
2M
Q2

VCC - ICRC - VEB - IBRB = 0

VCC - (D+ Ib) RC - VEB - IBRB = 0
IB1 = VCC - VEB /(RB+DRC)
IC1 = 1IB1 = IB2
IC2 = 2IB2
IC = IC1 + IC2

Vo = VCC - ICRC
Vi = Vo - VBE

Ex. Calculate the dc bias currents and voltages to provide Vo

at one-half the supply voltage.
Solution:
IB1 = 18V 0.7V /(1M+(140)(180)(75))
IB1 = 4.47A
IB2 = (140)(4.47A)
Vi = 9.55V - 0.7V
IB2 = IC1 = 625.8A
Vi = 8.85V
IC2 = (180)(625.8A)
IC2 = 112.64mA
IC = 625.8A + 112.64mA
IC = 112.69mA
Vo = 18V (112.69mA)(75)
Vo = 9.55V

AC Equivalent:
Vo = (-1Ib1 + 2Ib2) RC
= (-Ib2 + 2Ib2) RC
= Ib1(2 -1) RC
Vo = (2Ib2) RC

AC Output Amplifier:
Vo / Io = Vi - Ibri/ (21Ib1)
Zo = ri/(21)
rb1

C1 B2

Ib1

ri

B2

ri
Ib2
RB

E2
B1 IB1

Ib1ri = Vi - Vo
Ib1ri = Vi - 2(1Ib1) RC
Vi = Ib1ri + 2(1Ib1) RC
Vi = Ib1 (ri + 21RC)
Vi / Ib1 = (ri + 21RC)
Zi = RB//(ri + 21RC)

Vo

B2
Ib2

AC Voltage Gain (AV):

Vo = -ICRC =(-1Ib1 + 2Ib1) RC
Vo = (-1Ib1 + 21Ib1) RC
Vo = Ib1(-1+ 21) RC))
Vo = Ib1(1 (-1+ 2)RC)
Vo = Ib(12RC)
Ib = Vi/(12)RC)
Ib = Vi - Vo/ ri
Vo = Vi Ibri
Vo = Vi - Vori/(12RC)
Vi = Vo + Vori/(12RC)
Vi = Vo (1+ ri/(12RC))

+
Vo
RB

IC
Rc

Vi

B1
Ib1

--

IB/Ii = RB/(RB+ Zi)

Io/Ib1 =12
Ai =12RB/(RB+ Zi)
AV = Vo/Vi =1/(1+ ri/(12RC))
AV =1/(12RC+ ri/(12RC))
AV =12RC/(12RC+ ri)

Ex. Calculate the ac circuit values of Zi, Zo, Ai, and Av. Assume
that ri =3K
Solution:
Zi = (2M)//(140)(180)(75)
Zi = 971.722K

Zo = 3K /(140)(180)
Zo = 119.048x10-3
AV =(140)(180)(75) /(140)(180)(75) + 3K
AV = 998.42x10-3
Ai =(140)(180)(75)/(75 + 971.722K)
Ai =16,959.864

Differential Amplifier Circuit

If an input signal is applied to either input with the other
input connected to ground, the operation is referred to as
single ended.
If two opposite polarity input signals are applied, the
operation is referred to as double ended.
If the same input is applied to both inputs the operation
is called common mode.

 In double-ended operation, two input signals are applied,

the difference of the inputs resulting in outputs from both
collectors due to the difference of the signals applied to
both inputs.
In common mode operation, the common input signals
results in opposite signals at each collector, there signals
canceling so that the resulting output signals is zero.
The main feature of the differential amplifier is the very
large gain when opposite signals are applied to the
inputs as compared to the very small gain resulting from
common inputs.
Common-Mode rejection ratio
Ratio of the difference gain to common gain.

DC bias

Vee Ie Re Ve 0
Ie

Vee Ve
Re

Ve Vb Vbe
Ve 0.7

Calculate Ie & Re

Vee Ve 9V 0.7V
Ie

2.52mA
Re
3.3k
Ie
2.52mA
Vc Vcc Rc 9V
3.9k 4.09V
2
2

Ar ?
I b1 I b 2 I b
ri1 ri2 ri
Vi I b ri I b ri 0
Vi 2 I b ri 0
Vi
Ib
2 ri
I c I b
Vc I c Rc
Vo
Vo

I b Rc
Vi Rc
2 ri

Av Vo

Rc
2 ri

Rc
2 re

Rc
2 re

Calculate the single end output voltage

Ie

Vee Ve 9V 0.7V

193.02 A
Re
43k

I e 193.02 A

96.51A
2
2
26mV
re
259.39
96.51A
47 k
Av
87.25
2269.39
ViAv Vo
Ic

2mV 87.25 Vo
Vo 179.46mV

Low Frequency Response BJT Amplifier

Vcc

Rs

R1

Cs

Rc

system

Vo

Ri
Vs

Cs

Vi

R2

RL
Re

Ce

Vs

Ri
Vs Vi
Vi
Ri Rs

Ri

Vs

Ri Rs jXc

Effect of Cs on Low
frequency Response

1
f lc
2 ( Rs Ri )Cs

Rs

R1R2

VL

Cc

hie = Bre
system

Ro

Vs

Ri R1 // R2 // re
Ri
Vi
Rs Ri jXcs

RL

Vo

Can be establish for capacitive

element and the at which the
output voltage drops to 0.707 of
its maximum value
flc

1
2 Ro Ro Cc

Ro RL // ro

 3dB drop in gain from the mid band level when f=f1 an
Rc network will determine the low frequency cut-off
frequency for a BJT transistor, fm will be
Av= -3dB

Vo
R/R
1
1
1
1
1

1
1
1
fi
Vi
R / R jX c / R 1 jX c
1
1
1 j
1 j
wc
wRc
2fRc
f
R
R
Vo
1
1
Av

Vi
11
2
1
Av 20 log
3dB fi f
2

Av 20 log

1
1

2
2

fi
1

fi
Av 20 log
f
; fi f

fi

20 log 1
f

1
2

fi

Av 10 log 1
f ;

1
fi
12
f

F1/10

F1/4

F1/2

f1

2f1

3f1

-3dB
-9dB
-6dB
-12dB
-15dB
-18dB
-21dB

Actual frequency
response
Frequency Response

Ex. Determine the lower cut off frequency using:

Cs= 10F
Rs= 1K
RL= 2.2K
= 100
Cc= 1F

Vcc

R1

Rc
Vo

Cs

Rs

Vi

R2

RL
Re

Vs

Ce= 20F
R1= 40K
R2= 10K
ro=100

Ce

10 K 20V 4V
R2
Vcc
R2 R1
10 K 40 K

Vth

Rth R2 // R1 10 K // 40 K 3K
Vth VBE
4v 0.7

15.71A
Rth ( 1) RE
8 K (100 1)(2 K

Ib

I e ( 1) I b (100 1)(15.71A) 1.59mA

re

26mV
26mV

16.34
Ie
1.59mA

Z i RTH // re 8 K //(100)(16.34) 1.357 K

flc

1
1

25.67 Hz
2 ( Rc RL )Cc
2 (1K 2.2 K)(1F )

fle

1
1

327 Hz
2 ( Re )C E
2 ( 24.93)(20 F )

fls

1
1

6.74 Hz
2 ( Rs Z i )C s
2 (1K 1.36 K)(10 F )

RC // RL
( 4 K) //( 2.2 K)

90
re
15.76 K
R1
1.32 K

51.21
R1 Rs
1.32 K 1K

AV
AVS

OP-Amps Basics
A very high gain differential amplifier with a very high
input impedance and low output impedance.
1. provide voltage amplitude changes
2. oscillator
3.Filter circuits
4. Instrumental circuits
IN 1

IN 2

Single ended input (Mode)

Results when the input signal is connected to one input
with the other input connected to ground.

Vo

 Differential Mode, two opposite-polarity (out if phase

signals are applied to the inputs. Referred as doubleended).
Vout
Vd

VIN 2

Common Mode Input Voltage Range

Range of input voltages which, when applied to both
input Will not cause clipping or other output distortion.
Input offset voltage
Differential dc voltage required between the inputs to force the
output to zero volts.

Input offset voltage drift

Specifies how much change occurs in the input offset voltage for
each degree change in temperature

Input Bias Current

dc current required by the inputs of the amplifier to properly
operate the first stage
I I
I Bias 1 2
2

 Input impedance (differential input impedance)

Total resistance between the inverting and noninverting inputs
Input offset current
Difference of the input bias currents

I d | I1 I 2 |
Zo = 0

Output Impedance
Vout
Vd

VIN 2

Common mode operation

-Two inputs one equally amplified and since they
result in opposite polarity signals at the output, these
signals cancel and results in 0V output.

 Common mode
rejection(CMRR)
Amplifier the difference
signal while rejecting the
common signal at the two
inputs.

Vo

Differential and Common Mode Operation

Differential inputs difference of two signals

Vd Vi1 Vi 2

 Common Input
Average of the two signals
Vc

1
(Vi1 Vi 2 )
2

Output voltage

Vo AdVd AcVc
CMRR Common Mode Rejection Ratio
CMRR

Ad
Ac

CMRR 20 log10
A V
1 Vc
Vo AdVd 1 c c AdVd 1

A
V
CMRR

Vd
d d

Vc
AdVd 1

CMRR (Vd )

Ad
Ac

Vd = differential voltage
Vc = common voltage
Ad = differential gain
Ac = common gain

Determine the out voltage of an op-amp for input voltages

of Vi1 = 150V, Vi2 = 140V. The amplifier has a
differential gain of Ad = 4000 and CMRR is (a) 100
(b)10^5
Solution:
Vi1 Vi 2 150V 140V
Vc

145V
2
2
Vd Vi1 Vi 2 150V 140V 10V

Vc
145V
(a)Vo AdVd 1

(
4000
)(
10

V
)
1

45.8mV

(100)(10V )
CMRRVd

145V
(b)Vo (4000)(10V ) 1 5
40mV

(10 )(10V )

 Slew Rate
Maximum rate of change of the output voltage in
response to a step input voltage

Vo
SR
t

Ex: Given:
10
9

-9
10

 Negative Feedback
The inverting (-) input effectively makes the feedback
signal 180 out of phase with the input signal.
Vo

negative
feedback

Closed Loop Voltage Gain

Voltage gain of an op-amp with external feedback.

Non-Inverting Amplifier
Op-amp connected in a closed loop configuration.

Vf
Vin

Vf

Vo

Vo
Rl

Ri
Vo

R R

i
f

(Vi V f ) Acl AclVi Acl BVo

Vo Acl BVo AclVi

Vo (1 Acl B ) AclVi

ri

Vo
Acl
Acl
1

Vi
1 Acl B
Acl B
B
B
Vf

Ri
Ri R f

Vo B

Acl

Ri

Ri

or1

Rf
Ri

Determine the gain of the amplifier. The open loop

voltage gain of the op-amp
Vin

Vo

Rf = 100K

ri =4.7K

Acl ( NI ) 1

100 K
22.28
4.7 K

 Voltage Follower
A special case of a non-inverting amplifier where all of
the output voltage is fed back to the inverting (-) in
polarity by a straight connection.

Acl(VF) =1

Inverting Amplifier
Configuration where there is a controlled amount of
change of voltage gain.
Rf

Ii I f
Vo

Ri
Acl(VF) =1

Vin

oV

Vin
V
o
Rin
Rf
Rf
Vo

Vi
Ri
Acl

Rf
Ri

Given the op-amp configuration. Determine the value of Rf

required to produced a closed loop gain of 100.
Rf
Ri
2.2k

R f Acl Ri (100)(2.2K) 220K

Impedance of a non-inverting Amplifier

Input Impedance

Vin

Vo

Rf
Vd

ri

Vi Vd V f Vd BVo

Vo (Vi V f ) Acl

Vi Vd B(Vo Acl )

Vo (Vi Vo B ) Acl

Vi Vd BVd Acl
Vd I i Ri
Vi Vd (1 BAcl ) I i Z i (1 Acl B )
Vi
Z i (1 Acl B)
Ii
Z i ( ) Z i ( ) (1 Acl B)

Vo Vi Acl Vo BAcl
Vo (1 BAcl ) Vi Acl
I o Z o (1 Acl B ) Vi Acl
Zo

Vi Acl
(1 Acl B ) I o

Z o ( NI )

Zo
1 Acl B

 Determine the input and output impedance of the

amplifier. The Op-amp data sheets gives open loop
Zin=2M, Zout=75 and Acl=200,000. find the closed
loop voltage gain.
Vin

Vo

Rf = 220

ri =16K

Basic Op-Amps Circuits

Comparator
To determine when an input voltage exceeds a
certain level. The (-) inverting input is granted to
produce a zero level and that the input signal voltage
is applied to the (+) non-inverted input.
Vin

Acl(VF) =1

Vout
Vout max

Vout
Vout max

Non-Zero level Detection

The level detector can be modified to detect voltages
other than zero by connecting a fixed reference voltage
R2
source to the (-) inverting Input.
Vo
R1 R2

Acl(VF) =1

(b) Voltage divider reference

+

--

Zener
diode acts
reference
voltage

 The Input signal is applied to the comparator circuit

make a sketch of the output showing its proper
relationship to the input signal. Assume the maximum
output levels of the op amp are 12V.
R1

Vout

2K

12V

1K

Vref
5V
Vin

12V
-12V

1.63V

1k
15V 1.630V

8.2k 1k

Summing amplifier
Has two or more inputs, its output voltage is proportional
to the negative of the algebraic sum of its input voltage.
Summing Amplifier with voltage gain.
Vi
Vi
It
R R

2
1
Rf
Vi
Vo
R
Vi R f R1

Rf

R1

i1

Vout
12V

R2
i2

Vi1 Vi 2
Vo R f
R R

2
1

Else if Rf = R1=R2
V
V
Vo R f in1 in 2
R
R f
f
Vo (Vin1 Vin 2 )

Summing amplifier with gain greater

unity
10K

1K
0.2
1k

Vout
12V

0.5

0.2V 0.5V
Vout

10k
1k 1k
Vout 7V

Averaging Amplifier
A summing amplifier can be made to produce
mathematical average of the input voltages. This is done
by setting the ratio Rf/R equal to the reciprocal of the
number of inputs.

Vo

A1 A2
Rf

Rf

R1

Vout
Rs

Rf

R
1

Rf

Rs

R f Vi 2
R1 R3
R2

Rf

Vi1
R2

R f Vi 2
R2

Rf
R2

Vi 2

Vi 2

R f Vi1
R1 R3

Vo