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Quarndon Electronics
Quarndon Electronics Ltd. Slack Lane Derby DE22 3ED tel: 01332 332651 fax: 01332 360922
Contents
3
I2C Switches
I2C Multiplexers
10
part2
11
11
12
12
13
13
14
14
15
16
16
17
18
19
19
20
20
22
22
23
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A/ D and D/ A Converter
RAM
EEPROM
Hardware Monitors
TV Reception
Radio Reception
Audio Processing
Infrared Control
DTMF
LCD display control
Features
8
16
8
8
TSSOP
SO (wide)
SO (narrow)
DIP
Other
Packages
TCP
TEMP
Bare die
2.5
1.8
1.0
100
1
1
1.1
1.5
1.5
1.5
FREQ(kHz)
5V tolerant
Hardware reset
16
2
2
2
2
2
2
2
16
4
2
2
2
1
16
4
16
16
2
2
2
1
4
4
4
4
4
4
Interrupt (Out)
Description
3.3
Addresses
LCD Driver
www.semiconductors.
philips.com/I2C
Pin count
0M4085
PCF2103
PCF2104
PCF2105
PCF2113
PCF2116
PCF2119
PCF8531
PCF8533
PCF8535
PCF8548
PCF8549
PCF8558
PCF8563
PCF8566
PCF8573
PCF8576C
PCF8577C
PCF8578
PCF8579
PCF8583
PCF8593
PCF8811
PCF8813
PCF8814
PCF8820
PCF8831
PCF8832
40 to 85 C
3400
TV Reception
Radio Reception
Audio Processing
Infrared Control
DTMF
LCD display control
LED display control
Clocks/ timers
General Purpose I/ O
Bus Extension/ Control
400
VSO40
LQFP100
P
T
VS040
P
T
LQFP64/VS056
LQFP64
LQFP64/VS056
P
T
P
T
DP
I/O
LCD
A/D
D/A
controller
II
RTC
SCL
SDA
Each device is addressed
individually by software with a
unique address that can be
modified by hardware pins
1010A1A2A3R/W
A0
A1
A2
new
function
Write data
slave address
data
Master
Slave
data
transmitter
receiver
data
receiver
transmitter
slave address
data
S = Start condition
A = Acknowledge
P = Stop condition
# of Outputs
16
PCA9556/57
PCA9556/57
PCF8575
PCA9556/57
PCA9556/57A
16
PCA9555
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PCA9558
-
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Output
Oscillator
I2C Bus
LED
Input
LED
Reset Pin
# of Outputs
PCA9550
PCA9551
16
PCA9552
+5V
+VCC = 15V
1k
+5V
1k
SDA
SI
Tx
Tx
Rx
1/2 P82B96
15V
Note: Schottky
diode or Zener clamps
may be needed to limit
spurious signals on
very long wiring
15V
Rx
1/2 P82B96
+VCC
KEY POINTS
High drive output are used to extend the reach of the I2C bus and
exceed the 400 pF/system limit.
Typical distances - twisted wire (310), Flat Ribbon Cable (1320)
P82B96 has split high drive outputs which allows differential
transmission and Opto-Electrical isolation of the I2C Bus
+5V
RxD
(SDA)
I2C
SDA
TxD
(SDA)
1/2 P82B96
SX
GND
VCC
Ex
VCC
LY
Rx
SY
SY
Tx
N.C.
GND
RY
Ty
P82B96
LX
P82B715
N.C.
+VCC1
I2C
SDA
I2C Switches
I2C Bus
I2C Bus 0
OFF
I2C Bus 1
OFF
Reset
Interrupt Out
Interrupt 0
Interrupt 1
I2C
Controller
KEY POINTS
Switches allow the master to communicate to one
channel or multiple downstream channels at a time but
dont isolate the bus capacitance
Other Applications include: sub-branch isolation and
I2C/SMBus level shifting (1.8, 2.5, 3.3 or 5.0V)
FEATURES
Fan out main I2C/SMBus to multiple channels
Select off or individual downstream channels one at a
time, all at once or in any combination.
I2C/SMBus commands used to select channel
Hardware Reset pin or POR opens all channels
Interrupt logic provides flag to master
SCL1
400
pf
400
pf
400
pf
SCA1
SCA0
Enable
400
pf
PCA9515
SCLO
SCAO
SCL1
SDA1
E1
SCL2
SDA2
GND
15
VCC
E4
14
SDA4
13
SCL4
12
E3
16
PCA9516
SCL0
11
SDA3
10
SCL3
E2
400
pf
400
pf
FEATURES
Bi-directional I2C drivers isolate the I2C bus
capacitance to each segment.
Multi-master capable (e.g., repeater transparent to bus
arbitration and contention protocol) with only one
repeater delay between segments.
Segments can be individually isolated
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KEY POINTS
Accommodate more I2C devices or a longer bus length
(i.e., up to 400 pF/segment)
Voltage Level Translation - 3.3V or 5V voltage
levels allowed on the segment.
Only one hub or repeater is allowed in a I2C system
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Interconnect
Bus
9518
9518
9518
9518
9518
9 10 11 12
13 14 15 16
17 18 19 20
Enables
I2C/SMBus
Similar to the PCA9516 but with four extra open drain signal pins that allow the internal device logic to be
interconnected into an unlimited number of segments with only one repeater delay between any two segments.
The PCA9518, like the PCA9515/16, is transparent to bus arbitration and contention protocols in a multi-master
environment and any master can talk to any other master on any segment.
The enable pins can be used to isolate four of the five segments per device. Place a pull up resistor on the
unisolatable segment and leave it unused if there is a requirement to enable or disable the segment.
PCA9511
Enable
SCLOUT
SCLIN
GND
VCC
SDAOUT
SDAIN
READY
Heart Microprocessor
Terminators
Backplane Trace
Connectors
Allows I/O card insertion into a live backplane without corruption of the data and clock busses.
Control circuitry prevents connected to the card until a stop bit or bus idle occurs on the backplane.
After connection, bi- directional buffering isolates capacitance and allowing 400 pF on either side.
PCA9511 can be used in series and more than one can be used in the same I2C system.
Rise time accelerator allows use of weaker DC pull- up currents while still meeting rise time requirements.
SDA and SCL lines are precharged to 1V, minimising current required to charge chip parasitic capacitance.
Incorporates a digital ENABLE input pin, which forces the part into a low current mode when asserted low.
Open drain READY output pin indicates that the backplane and card sides are connected together.
Analogue Input-Output
VREF
Analog GND
OSC Input switch
Oscillator I/O
Reset
I2C Bus
KEY POINTS
Converts signals from digital to analog and analog to digital
Two programmable thresholds above and below mean
Features
4 channel
Internal oscillator
Hardware Reset pin and Power On Reset (POR)
PCA8591
Voltage range
Resolution
100 kHz
100 kHz
I2C Interface
I2C Bus
Operation
Control
Control
Bus Buffer
Chip Enable
Write Strobe
Read Strobe
Reset
Address Inputs
Interrupt Request
Data (8-bits)
Microcontroller
FEATURES
Provides both master and slave functions.
Controls all the I2C bus specific sequences, protocol, arbitration and timing
Hardware Reset pin and Power On Reset (POR)
KEY POINTS
Serves as an interface between most standard parallel-bus microcontrollers/ microprocessors and the serial I2C bus
Allows the parallel bus system to communicate with the I2C
Voltage range
Clock source
Parallel interface
PCA8584
4.5 - 5.5V
90 kHz
External
Slow
PCA9564
360 kHz
Internal
Fast
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Mux
EEPROM
Non MUX
Output Pin
Hardware
Input Pins
Hardware
Output Pins
# of register bits
# of Muxed output
Non-muxed output
PCA8550
YES
PCA9559
YES
PCA9560
YES
PCA9561
NO
I2C Multiplexers
I2C Bus 0
I2C Bus 1
I2C
Controller
KEY POINTS
Many specialised devices have only one I2C address and
sometimes many are needed in the same system.
Multiplexers allow the master to communicate to one downstream
channel at a time but dont isolate the bus capacitance
Other Applications include sub-bach isolation.
FEATURES
Fan out main I2C/SMBus to multiple channels
Select off or individual downstream channel
I2C/SMBus commands used to select channel
Power On Reset (POR) opens all channels
Interrupt logic provides flag to master for system
monitoring.
Interrupt 0
Interrupt 1
# of Channels
POR Only
PCA9540
PCA9542
PCA9544
p a r t 2
DESCRIPTION
The PCF8563 is a CMOS real-time clock/calendar
optimized for low power consumption. A
programmable clock output, interrupt output and
voltage-low detector are also provided. The built-in
word address register is incremented automatically
after each written or read data byte.
OSCI
OSCO
INT
VSS
Voltage
Detector
VSS
Oscillator
Monitor
FEATURES
Provides year, month, day, weekday, hours, minutes
and seconds based on 32.768 kHz quartz crystal
Century flag
Wide operating supply voltage range: 1.0 to 5.5V
Low back-up current; typical 0.25A at VDD = 3.0V
and Tamb = 25C
400 kHz two-wire I2C-bus interface
(at VDD = 1.8 to 5.5V)
Programmable clock output for
32.768 kHz, 1.24 Hz, 32 Hz 1 Hz
Alarm and timer functions
Integrated oscillator capacitor
Internal power-on reset
Control
logic
POR
I2C-BUS
Interface
SCL
SDA
Address
register
FF
Type number
Package
PCF8563P/F4
DIP 8
PCF8563T/F4
SO 8
PCF8563TS/F4
TSSOP 8
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
control/status 1
control/status 1
second/VL
minutes
hours
days
weekdays
months/century
years
minute alarm
hour alarm
day alarm
weekday alarm
clkout control
timer control
timer
Divider
1:256
or
100 : 128
PCF8583
Oscillator
32.768 kHz
OSCI
OSCO
INT
VSS
PCF8563P
PCF8563T
PCF8563TS
VDD
CLKOUT
SCL
SDA
slave address
1
A0 R/W
FEATURES
Serial output I2C-bus
Alarm register for presetting
a time for alarm or remote
switching functions
On-chip power fail detector
Additional pulse outputs for seconds and minutes
Separate ground pin for the clock allows easy implementation
of battery back-up during supply interruption
1.2V nickel cadmium battery
Crystal oscillator control (32.768 kHz)
Low power consumption
Package
PCF8573P
DIP 16
PCF8573T
SO 16
16 VDD
A1
15 V
SS1
COMP
SDA
SCL
12 TEST
EXTPF
11 FSET
PFIN
10 SEC
VSS2
PCF8573P
PCF8573T
slave address
1
11
Type number
A0
A1
A0 R/W
14 OSC0
13 OSC1
MIN
FEATURES
Clock operating supply voltage
(0 to +70 C): 1.0 V to 6.0 V max. 50A
240 x 8-bit low-voltage RAM
Data retention voltage: 1.0 V to 6 V
Clock function with four year calendar
Universal timer with alarm and overflow indication
24 or 12 hour format
32.768 kHz or 50 Hz time base
Slave address: - READ: A1 or A3
- WRITE: A0 or A2
OSCI
OSCO
PCF8583
Oscillator
32.768 kHz
Divider
1:256
or
100 : 128
Power-on
reset
Control
logic
INT
VSS
VSS
00
01
control/status
hundredth of a second
second
minutes
hours
year/date
weekdays/months
timer
alarm control
07
08
alarm registers
or RAM
A0
0F
I2C-BUS
Interface
SCL
SDA
Address
register
FF
RAM
(240 x 8)
FF
Type number
Package
PCF8583P/F5
DIP 8
PCF8583T/F5
SOL 8
OSCI
OSCO
A0
VSS
PCF8583P
PCF8583T
VDD
INT
SCL
SDA
slave address
1
A0 R/W
OSCI
OSCO
PCF8583
Oscillator
32.768 kHz
Divider
1:256
or
100 : 128
reset
Control
logic
control/status
hundredth of a second
second
minutes
hours
year/date
weekdays/months
timer
alarm control
INT
reset
SCL
I2C-BUS
Interface
SDA
00
01
07
08
alarm registers
or RAM
Address
register
FF
0F
FEATURES
Operating supply voltage: 2.5 to 6.0 V
8 bytes scratchpad RAM (when alarm not used)
Data retention voltage: 1.0 to 6.0 V
Operating current (fscl = 0 Hz, 32 kHz time base,
VDD = 2.0 V): TYP. 1A
Clock function with four year calendar
Universal timer with alarm and overflow indication
24 or 12 hour format
32.768 kHz or 50 Hz time base
Automatic word address incrementing
Slave address: - READ A3
- WRITE A2
Type number
Package
PCF8593P
DIP 8
PCF8593T
SO 8
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OSCI
OSCO
RESET 3
slave address
1
VSS
0
PCF8593P
PCF8593T
VDD
INT
SCL
SDA
R/W
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12
Interrupt logic
INT
LP Filter
A0
4
A1
PCF8574
P0
A2
I C-BUS control
2
Input filter
Shift
Register
Input filter
P2
I/O
Port
P3
P4
P5
10
A2
A1
A0 R/W
A2
A1
P0
PCF8574
PCF8574A
A0 R/W
FEATURES
I2C to parallel port expander
Open-drain interrupt output
Remote I/O port for for the I2C-bus
Operating supply voltage 2.5 to 6V PCF8574
Low standby current consumption of
10A maximum
P1
12 P7
P2
11 P6
10 P5
INT
24
VDD
A1
23
SDA
A2
22
SCL
Part No.
Package
P00
21
A0
PCF8574AP
DIP 16
PCF8574AT
SOL 16
PCF8574P
DIP 16
PCF8574T
SOL 16
PCF8575CTS/F1
SSOP 24
PCF8575CT/F1
SOL 24
DESCRIPTION
The PCF8584 acts as an interface device between standard high-speed
parallel buses and the serial I2C-bus. On the I2C-bus, it can act either as
master or slave. Bidirectional data transfer between the I2C-bus and the
parallel-bus microcontroller is carried out on a byte-wise basis, using either
an interrupt or polled handshake. Interface to either 80XX-type (e.g. 8048,
8051, Z80) or 68000-type buses is possible. Selection of bus type is
automatically performed.
P01
20
P17
P02
19
P16
P03
18
P15
P04
17
P14
P05
16
P13
P06
10
15
P12
P07
11
14
P11
VSS
12
13
P10
ADDRESS BUS
A0
DECODER
ALE
8048/8051
CS
8048/8051
DATA
RD
13
CLK
20
VDD
SDA
19
RESET
SCL
18
R/W
WR
INT
IACK
17
CS
INT
16
RD
A0
15
DB7
DB0
14
DB6
Part No.
PCF8584P
Package
DIP 20
DB1
13
DB5
PCF8884T
SOL 20
PCF8584
DB2
12
DB4
VSS
10
11
DB3
slave address
0
P4
PCF8575C
FEATURES
Parallel-bus to I2C-bus protocol converter
and interface
Compatible with most parallel-bus
microcontrollers
Both master and slaver functions
Automatic detection and adaption to bus
interface type
Programmable interrupt vector
Multi-master capability
I2C-bus monitor mode
Long-distance mode (4-wire)
Operating supply voltage 4.5 to 5.5 V
13 INT
P3
15 SDA
14 SCL
Read pulse
Power-on
reset
A2
VSS
P7
Write pulse
A1
16 VDD
P6
11
VDD
VSS
P1
SCL
SDA
A0
A2
A1
A0 R/W
SLAVE ADDRESS
A2
A1
A1
VDD
WP
PTC
A1
SLAVE ADDRESS
1 A
DATA
n bytes
R/W
no acknowledge
from slave
DATA
n bytes
auto increment word address
Type number
A0 R/W
Format
Max Current
DIP 8
256x8
2.0A
Package
PCF8582C-2P/03
PCF8582C-2T/03
SO 8
256x8
2.0A
PCF8594C-2P/02
DIP 8
512x8
2.5A
PCF8594C-2T/02
SO 8
512x8
2.5A
PCF8598C-2P/02
DIP 8
1024x8
4.0A
PCF8598C-2T/02
SOL 8
1024x8
4.0A
PCF85116-3P/01
DIP 8
2048x8
1.0A
PCF85116-3T/01
SO 8
2048x8
1.0A
VDD
WP
PTC
n.c. 2
VDD
n.c. 1
PTC
n.c. 2
PCF8598C-2
PCF8594C-2
PCF8582C-2
FEATURES
Max standby 10A at 5.5V typical 4A
Operational down to 2.7V
Single on 8 byte write modes
(PCF85116 up to 32 bytes)
Sequential on Random Read
High Reliability by using redundant cells
Internal Write Times
Write Protect
A0
WORD ADDRESS
R/W
slave address
1
0 A
acknowledge
from slave
acknowledge
from slave
acknowledge
from slave
acknowledge
from slave
8 VDD
7
WP
SCL
SDA
PCF85116-3
A2
SCL
A2
SCL
A2
SCL
VSS
SDA
VSS
SDA
VSS
SDA
n.c. 3
VSS
DESCRIPTION
The PCF85700C is ideal for applications requiring
extremely low-current and low-voltage RAM retention,
such as battery or capacitor - backed. See diagram for a
typical multiple PCF8570C application.
SDA
VDD
0
0
0
A0
A1
A2
A0
SCL
A1 2
A2
VDD
8570C
TEST
SDA
VSS
SCL
VDD
VDD
1
A0
0
A1
A2
up to 8 PCF8570C
SCL
PCF8570C
1010
SDA
VSS
TEST
VSS 4
Master
transmitter/
receiver
PCF8570C
1010
TEST
FEATURES
Operating supply voltage 2.5
to 6.0 V
Low data retention voltage;
minimum 1.0 V
Low standby current;
maximum 15 A
Power-saving mode; typical
50 nA
Serial input/output bus
(I2C-bus)
Address by 3 hardware
address pins
Automatic word address
incrementing
SCL
SDA
VDD
1
1
Type number
Package
PCF8570P/F5
DIP 8
PCF8570T/F5
SOL 8
A0
A1
A2
SCL
PCF8570C
1010
TEST
VDD
SDA
VSS
R: pull-up resistor
R
R
R=
tr
CBUS
SDA SCL
slave address
1
A2
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(I2C-bus)
A1
A0 R/W
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14
SCL
SDA
A0
16 VDD
AIN1
15
AIN2
AIN3
13 AGND
A0
12 EXT
A1
11 OSC
A2
10 SCL
VSS
PCF8591
Type number
Package
PCA8591P
DIP 16
PCA8591T
SO16
Dac data
register
ADC data
register
A2
EXT
VDD
VSS
Analogue
multi-plexer
Control logic
Oscillator
OSC
FEATURES
Single power supply
Operating supply voltage 2.5 V to 6 V
Low standby current
Serial input/output via I2C-bus
Address by 3 hardware address pins
Sampling rate given by I2C-bus speed
4 analog inputs programmable as single-ended or
differential inputs
Auto-incremented channel selection
Analog voltage range from VSS to VDD
On-chip track and hold circuit
8-bit successive approximation A/D conversion
Multiplying DAC with one analog
Status
register
A1
AIN0
AIN1
AIN2
AIN3
AIN0
I2C BUS
Interface
Analogue
multi-plexer
+
comparator
-
S/H
Successive approximation
register/logic
VREF
AOUT
DAC
S/H
AGND
AOUT
14 VREF
SDA
slave address
1
15
A2
A1
A0 R/W
FEATURES
Selectable backplane drive configuration: static or 2, 3,or 4 backplane multiplexing
Selectable display bias configuration: static, 1/2 or 1/3
Internal LCD bias generation with voltage-follower buffers
40 segment drives: up to twelve 8-segment numeric characters; up to six 15-segment alphanumeric
characters; or any graphics of up to 160 elements
Versatile blinking modes
Low power consumption
VDD
VDD
Type number
Package
PCF8576CT/F1
PCF8576CH/F1
SDA
Host microprocessor/
microcontroller
VS056
LQFP64
SCL
OSC
12
40 segment drives
8
A0
9
A1
56
S39
55
S38
SYNC
54
S37
CLK
53
S36
VDD
52
S35
OSC
51
S34
A0
50
S33
A1
49
S32
A2
48
S31
SA0
10
47
S30
VSS
11
46
S29
VLCD
12
45
S28
BP0
13
44
S27
BP2
14
43
S26
BP1
15
42
S25
BP3
16
41
S24
S0
17
40
S23
S1
18
39
S22
S2
19
38
S21
S3
20
37
S20
S4
21
36
S19
S5
22
35
S18
S6
23
34
S17
S7
24
33
S16
S8
25
32
S15
S9
26
31
S14
S10
27
30
S13
S11
28
29
S12
VS056
LCD panel
PCF8576CT
3
7
1
2
VLCD
SDA
SCL
10
A2
(up to 160
elements)
4 backplanes
11
VSS
SA0
VSS
slave address
0
A0 R/W
FEATURES
Direct/duplex drive modes with up to 32/64 LCD-segment drive capability per device
Auto-incremented loading across device subaddress boundaries
Operating supply voltage: 2.5 to 6 V
Low power consumption
Type number
Package
Single-pin built-in oscillator
PCF8577CP
DIP40
Display memory switching in direct drive mode
Power-on reset blanks display
PCF8577CT
VSO40
1
39
SCL
40
Input
filters
I2C - Bus
controller
SDA
Backplane
and
segment
driver
32
33
34
36
35
37
VDD
Power on reset
PCF8577C
Control register
and comparator
S1
A2/BP2
SDA
S31
39
SCL
S30
38
VSS
S29
37
A0/OSC
S28
36
A1
S27
35
VDD
S26
34
A2/BP2
S25
33
BP1
S24
32
S1
S23
10
31
S2
S22
11
30
S3
S21
12
29
S4
S20
13
28
S5
S19
14
27
S6
S18
15
26
S7
S17
16
25
S8
S16
17
24
S9
S15
18
23
S10
S14
19
22
S11
S13
20
21
S12
PCF8577C
A1
A0/OSC
slave address
0
40
BP1
38
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S32
Oscillator and
divider
VSS
S32
R/W
website www.quarndon.co.uk
16
n
rows
V DD
V DD
V3
HOST
MICROCONTROLLER
VSS
VSS / V DD
SA0
SDA
VSS
SA0
A1
PCF8579
A2
A3
R5
48 R22/C22
R4
47 n.c.
R3
46 R23/C23
R2
45 R24/C24
R1
44 R25/C25
R0
43 R26/C26
SDA
42 R27/C27
SCL
41 R28/C28
SYNC
PCF8578
LQFP64
SDA
56
R0
SDA
56
SCL
55 R1
SCL
55 C1
SYNC
54
R2
SYNC
54
C2
CLK
53
R3
CLK
53
C3
V SS
52
R4
V SS
52
C4
TEST
51
R5
TEST
51
C5
SA0
50
R6
SA0
50
C6
OSC
49
R7
A3
49
C7
V DD
48
R8/C8
A2
48
C8
V 2 10
47
R9/C9
A1 10
47
C9
V 3 11
46
R10/C10
A0 11
46
C10
V 4 12
45 R11/C11
V DD 12
45 C11
V 5 13
44 R12/C12
n.c. 13
44 C12
V LCD 14
43 R13/C13
V 3 14
n.c. 15
42 R14/C14
V 4 15
42 C14
n.c. 16
41 R15/C15
V LCD 16
41 C15
C39 17
40 R16/C16
C39 17
40 C16
C38 18
39 R17/C17
C38 18
39 C17
C37
19
38 R18/C18
C37
19
38 C18
C36
20
37 R19/C19
C36
20
37 C19
C35
21
36 R20/C20
C35
21
36 C20
C34
22
35 R21/C21
C34
22
35 C21
C33
23
34 R22/C22
C33
23
34 C22
C32
24
33 R23/C23
C32
24
33 C23
R31/C31
25
32 R24/C24
C31
25
32 C24
R30/C30
26
31 R25/C25
C30
26
31 C25
R29/C29
27
30 R26/C26
C29
27
30 C26
R28/C28
28
29 R27/C27
C28
28
40 R29/C29
CLK 10
39 R30/C30
VSS 11
38 R31/C31
TEST 12
37 C32
SA0 13
36 n.c.
n.c. 14
35 C33
n.c. 15
34 C34
OSC 16
17
C0
C36 32
C37 31
C38 30
C39 29
n.c. 28
n.c. 27
n.c. 26
49 C21
50 C20
51 C19
52 C18
53 C17
54 C16
PCF8578
55 C15
56 C14
VLCD 25
V5 24
57 C13
V4 23
58 C12
59 C11
V3 22
V2 21
60 C10
61 C9
VDD 20
n.c. 19
62 C8
64 C6
n.c. 18
n.c. 17
33 C35
MBH588
C5 1
48 C22
C4 2
47 C23
C3 3
46 C24
C2 4
45 C25
C1 5
44 C26
C0 6
43 C27
SDA 7
42 C28
LQFP64
SCL 8
41 C29
PCF8579
SYNC 9
40 C30
CLK 10
39 C31
VSS 11
38 C32
TEST 12
37 C33
SA0 13
36 C34
C37 32
C38 31
33 C36
C39 30
A2 16
n.c. 29
34 n.c.
n.c. 28
35 C35
n.c. 27
A3 14
n.c. 15
MBH590
A0 R/W
43 C13
PCF8579
slave address
1
V3
VSS / V DD
MSA839
subaddress 1
VSS / V DD
49 R21/C21
R OSC
50 R20/C20
51 R19/C19
52 R18/C18
53 R17/C17
54 R16/C16
55 R15/C15
56 R14/C14
57 R13/C13
58 R12/C12
59 R11/C11
60 R10/C10
61 R9/C9
62 R8/C8
63 R7
64 R6
th
n.c. 26
LQFP64
VSS
A0
OSC
VLCD
VSS
n.c. 25
PCF8579H
VLCD
VLCD
VLCD 24
VS056
V DD
R1
A1 17
PCF8579T
V DD
VLCD
V5
V4 23
LQFP64
PCF8578
R2
SDA
V3 22
PCF8578H
V4
n.c. 21
VS056
R3
SCL
VDD 20
PCF8578T
R2
n.c. 19
Package
40
columns
V
2
agewidth
Type number
40 n
columns
R1
63 C7
FEATURES
Stand-alone or may be used
with up 32 PCF857s (40960
dots possible)
40 driver outputs, configurable
as 32/8, 24/16, 16/24 or 8/32
row/columns
Selectable multiplex rates;
1 : 8, 1 : 16, 1 : 24 or 1 : 32
Provides display
synchronisation for PCF8579
On-chip oscillator, requires
only 1 external resistor
Power-on reset black display
LCD DISPLAY
A0 18
DESCRIPTION
The PCF8578 is a low power
CMOS LCD row/column driver,
designed to drive dot matrix
graphic displays at multiplex
rates of 1 : 8, 1 : 16, 1 : 24 or 1 :
32. The device has 40 outputs,
of which 24 are programmable,
configurable as 32 /8 , 24 /16 ,
16 /24 or 8 /32 rows/columns.
The PCF8578 can function as a
stand-alone LCD controller/driver
for use in small systems, or for
larger systems can be used in
conjunction with up to 32
PCF8579s for which it has been
optimized. Together these two
devices form a general purpose
LCD dot matrix driver chip set,
capable of driving displays of up
to 40960 dots.
29 C27
MSA918
FEATURES
Single-chip LCD controller/driver
Selectable backplane drive configuration: static or 2, 3,or 4 back
plane multiplexing
Selectable display bias configuration: static, 1/2 or 1/3
Internal LCD bias generation with voltage-follower buffers
24 segment drives: up to twelve 8-segment numeric characters; uo
to six 15-segment alphanumeric characters; or any graphics of up to
96 elements
Versatile blinking modes
2.5 to 6V power supply range
Low power consumption
May be cascaded for large LCD applications
(up to 1536 segments possible)
Type number
Package
PCF8566P
DIP 40
PCF8566T
SO 40
slave address
0
A0 R/W
S32
40
S23
SCL
39
S22
SYNC
38
CLK
37
S20
VDD
36
S19
PCF8566
S21
OSC
35
A0
34
S17
A1
33
S16
A2
32
S15
SA0
10
31
S14
VSS
11
30
S13
VLCD
12
29
S12
BP0
13
28
S11
BP2
14
27
S10
BP1
15
26
S9
BP3
16
25
S8
S0
17
24
S7
S1
18
23
S6
S2
19
22
S5
S3
20
21
S4
S18
14
15
BACKPLANE
OUTPUTS
S0 to S23
16
17 to 40
DISPLAY SEGMENT OUTPUTS
LCD
VOLTAGE
SELECTOR
R
VLCD
CLK
SYNC
12
LCD BIAS
GENERATOR
SHIFT REGISTER
PCF8566
4
3
DISPLAY LATCH
TIMING
INPUT
BANK
SELECTOR
BLINKER
DISPLAY
RAM
24 4 BITS
OUTPUT
BANK
SELECTOR
DISPLAY
CONTROLLER
OSC
VSS
SCL
SDA
OSCILLATOR
POWERON
RESET
DATA
POINTER
COMMAND
DECODER
11
2
1
INPUT
FILTERS
SUBADDRESS
COUNTER
I2 C-BUS
CONTROLLER
10
SA0
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A0
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8
A1
9
A2
18
82B715
82B715
VCC
LDA
1/2
SDA
VCC
I2C
DEVICE
LONG
CABLE
LCL
1/2
SCL
STANDARD
I2C
INTERFACE
SDA
1/2
BUFFERED
INTERFACE
SCL
1/2
STANDARD
I2C
INTERFACE
BUFFERED
INTERFACE
VCC
82B715
8 VCC
N.C. 1
SDA
BUFFER
SCL
LDA
BUFFER
LY
SY
N.C.
LX
SX
GND
82B715
LCL
GND
FEATURES
Dual, bi-directional, unity voltage gain buffet
I2C bus compatible
Logic signal levels may include both supply and ground
X10 impedance transformation
Wide supply voltage range
Type number
Package
P82B715N
DIP 40
P82B715D
SO 40
Part No.
Package
SAA1064
DIP 24
SAA1064T
SOL 24
slave address
0
19
A1
A0 R/W
T0, T1
TWO 16-BIT
TIMER/EVENT
COUNTERS
XTAL2
PROGRAM
MEMORY
8k x 8 ROM
CPU
AVSS
ADC0-7 SDA
AVREF
+
AVDD
DATA
MEMORY
256 x 8 RAM
STADC
SCL
1
DUAL
PWM
SERIAL
I2C PORT
ADC
EA
ALE
80C51 CORE
EXCLUDING
ROM/RAM
PSEN
3
WR
3
RD
16
AD0-7
SERIAL
UART
PORT
A8-15
P5.7/ADC7
CMSR0-CMSR5
CMT0, CMT1
P5.6/ADC6
T3
WATCHDOG
TIMER
RT2
P5.5/ADC5
1
T2
P5.4/ADC4
COMPARATOR
OUTPUT
SELECTION
P5.3/ADC3
T2
16-BIT
COMPARATORS
wITH
REGISTERS
P5.2/ADC2
CT0I-CT3I
16
P5.0/ADC0
P4
STADC
P5
PWM0
RxD
PWM1
TxD
EW
P3
P4.0/CMSR0
P2
P4.1/CMSR1
P1
V DD
3
P0
T2
16-BIT
TIMER/
EVENT
COUNTERS
FOUR
16-BIT
CAPTURE
LATCHES
8-BIT
PORT
P5.1/ADC1
PARALLEL I/O
PORTS AND
EXTERNAL BUS
68
67
66
65
64
63
62
RST
EW
AVDD
61
P4.3/CMSR3 10
60 AVSS
P4.4/CMSR4
11
59 AVREF+
P4.5/CMSR5 12
58 AVREF
P4.6/CMT0 13
57 P0.0/AD0
P4.7/CMT1 14
56 P0.1/AD1
RST 15
55 P0.2/AD2
P1.0/CT0I 16
54 P0.3/AD3
P1.1/CT1I 17
53 P0.4/AD4
P1.2/CT2I 18
52 P0.5/AD5
P1.3/CT3I 19
51 P0.6/AD6
P1.4/T2 20
50 P0.7/AD7
P1.5/RT2 21
49 EA
P1.6/SCL 22
48
P1.7/SDA 23
47 PSEN
P3.0/RxD 24
46
P3.1/TxD 25
45 P2.6/A14
ALE
P2.7/A15
44 P2.5/A13
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36
37
38
39
40
41
42
43
P2.4/A12
35
P2.3/A11
34
P2.2/A10
33
P2.1/A09
32
P2.0/A08
31
VSS
30
NC*
29
VSS
28
XTAL1
27
NC*
P3.2/INT0 26
XTAL2
PLCC-68
PWM1
VSS
XTAL1
NC*
P80C552 IBA108
P3.7/RD
PLCC-68
PWM0
VDD
P3.6/WR
P80C552 EBA108
INT1
P3.5/T1
Package
INT0
P3.4/T0
Part No.
T1
P4.2/CMSR2
FEATURES
Direct/duplex drive modes with
up to 32/64
LCD-segment drive capability
per device
Operating supply voltage: 2.5
to 6 V
Low power consumption
I2C-bus interface
Optimized pinning for single
plane wiring
Single-pin built-in oscillator
Auto-incremented loading
across device
subaddress boundaries
Display memory switching in
direct drive mode
May be used as I2C-bus output
expander
System expansion up to 256
segments
Power-on reset blanks display
T0
P3.3/INT1
DESCRIPTION
The PCF8577C is a single chip,
silicon gate CMOS circuit, It is
designed to drive liquid crystal
displays with up to 32 segments
directly, or 64 segments in a
duplex configuration.
The two-line I2C-bus interface
substantially reduces wiring
overheads in remote display
applications. I2C-bus traffic is
minimised in multiple IC
applications by automatic
address incrementing, hardware
subaddressing and display
memory switching (direct drive
mode). To allow partial VDD
shutdown the ESD protection
system of the SCL and SDA pins
does not use as diode
connected to VDD.
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20
DESCRIPTION
The 87C524 and P87C528 are CMOS
single-chip 8-bit microcontrollers.
80C51 instruction set
- P87C524 - 16k x 8 EPROM
- 512 x 8 RAM
- P87C528 - 324 x 8 EPROM
- Memory addressing capability
64k ROM and 64k RAM
- Three 16-bit counter/timer
- Full duplex UART
Power control modes:
- Idle mode
- Power-down mode
- Warm start from power-down
Two speed ranges at VCC = 5V 10%
Part No.
Package
P87C524EBPN
DIP-40
P87C528EBLKA
PLCC-44
P87C528EBPN
DIP-44
P87C528LKA
PLCC-44
COUNTERS
T0
XTAL2 XTAL1
RAM
PROGRAM
MEMORY
(32K x 8
EPROM)
OSCILLATOR
AND
TIMING
T2
RST
T2EX
AUXRAM
DATA
MEMORY
(256 x 8)
DATA
MEMORY
(256 x 8)
TWO 16-BIT
TIMER/EVENT
COUNTERS
16-BIT TIMER/
EVENT COUNTER
WATCHDOG
TIMER
CPU
INTERNAL
INTERRUPTS
INT0 INT1
64K-BYTE BUS
EXPANSION
CONTROL
PROGRAMMABLE I/O
CONTROL
PARALLEL PORTS,
ADDRESS/DATA BUS
AND I/O PINS
EXTERNAL
INTERRUPTS
SERIAL IN
SERIAL OUT
BIT-LEVEL
I2C
INTERFACE
SDA
SCL
SHARED WITH
PORT 3
40 VDD
T2/P1.0 1
7
39
17
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
T2EX/P1.1 2
39 P0.0/AD0
P1.2 3
38 P0.1/AD1
P1.3 4
37 P0.2/AD2
P1.4 5
36 P0.3/AD3
P1.5 6
35 P0.4/AD4
SCL/P1.6 7
34 P0.5/AD5
SDA/P1.7 8
33 P0.6/AD6
RST 9
32 P0.7/AD7
29
18
PROGRAMMABLE
SERIAL PORT
FULL DUPLEX UART
SYNCHRONOUS SHIFT
40
LCC
21
T1
Function
NC*
P1.0/T2
P1.1/T2EX
P1.2
P1.3
P1.4
P1.5
P1.6/SCL
P1.7/SDA
RST
P3.0/RxD
NC*
P3.1/TxD
P3.2/INT0
P3.3/INT1
P3.4/T0
P3.5/T1
P3.6/WR
P3.7/RD
XTAL2
XTAL1
VSS
28
Pin
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
Function
NC*
P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15
PSEN
ALE
NC*
EA
P0.7/AD7
P0.6/AD6
P0.5/AD5
P0.4/AD4
P0.3/AD3
P0.2/AD2
P0.1/AD1
P0.0/AD0
VDD
RxD/P3.0 10
TxD/P3.1 11
DUAL
IN-LINE
PACKAGE
31 EA
30 ALE
INT0/P3.2 12
29 PSEN
INT1/P3.3 13
28 P2.7/A15
T0/P3.4 14
27 P2.6/A14
T1/P3.5 15
26 P2.5/A13
WR/P3.6 16
25 P2.4/A12
RD/P3.7 17
24 P2.3/A11
XTAL2 18
23 P2.2/A10
XTAL1 19
22 P2.1/A9
VSS 20
21 P2.0/A8
RST
PORT 0
XTAL1
XTAL2
EA
PSEN
PORT 1
PORT 3
ALTERNATE
FUNCTIONS
ALE
SCL
SDA
PORT 2
RxD
TxD
INT0
INT1
T0
T1
WR
RD
Part No.
Package
P87C652-4N40
DIP-40
ADDRESS BUS
FEATURES
80C51 central processing unit
256 y 8 RAM, expandable externally
to 64k bytes
Two standard 16-bit timer/counters
Four 8-bit I/O ports
I2C-bus serial I/O port with byte oriented master
and slave functions
Full-duplex UART facilities
ADDRESS AND
DATA BUS
VDDVSS
P80C652EBA/04 PLCC-44
P87C654-4A44
PLCC-44
P87C654-4N40
DIP-44
P1.0 1
40 V
DD
P1.1 2
39 P0.0/AD0
P1.2 3
38 P0.1/AD1
P1.3 4
37 P0.2/AD2
P1.4 5
36 P0.3/AD3
P1.5 6
35 P0.4/AD4
SCL/P1.6 7
34 P0.5/AD5
33 P0.6/AD6
SDA/P1.7 8
PLASTIC
DUAL
IN-LINE
PACKAGE
RST 9
RxD/P3.0 10
32 P0.7/AD7
31 EA
TxD/P3.1 11
30 ALE
INT0/P3.2 12
29 PSEN
INT1/P3.3 13
28 P2.7/A15
T0/P3.4 14
27 P2.6/A14
T1/P3.5 15
26 P2.5/A13
WR/P3.6 16
25 P2.4/A12
RD/P3.7 17
24 P2.3/A11
XTAL2 18
23 P2.2/A10
XTAL1 19
22 P2.1/A9
VSS 20
21 P2.0/A8
DESCRIPTION
2K program memory
64 bytes RAM
5V 10% operation
16-bit auto reloadable
counter/timer
Wide oscillato
frequency range
Low power
consumption
- Idle mode
- Power-down mode
LED drive outputs
On-chip oscillator
VCC
INT0 INT1
1
1
VSS
PWM out
XTAL1
XTAL2
TIMER 0 &
TIMER 1*
(87C749*)
0 ASEL
CPU
DATA
Memory
64 x 8
RAM
Program
memory 2K
EPROM
0 0E-PGM
3
A0-A10
1
D0-D7
I2C
Serial
Port
Parallel
I/O Ports
Used for
programming only
P0.0-P0.4
P0.0-P0.4
SDA SCL
0
0
P3.0-P3.7
Part No.
Package
P87C751-4F24
DIL-25
P87C751-4DB
SSOP-44
P87C751-4N24
DIP-44
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24
VCC
23
P3.5/A5
22
P3.6/A6
P3.4/A4
P3.3/A3
P3.2/A10
P3.1/A1/A9
P3.0/A0/A8
P0.2/VPP
*P0.1/OE-PGM/SDA
*P0.0/ASEL/SCL
Ceramic,
plastic
dual
and
shrink
small
outline
package
21
P3.7/A7
20
P1.7/T0/D7
19
P1.6/INT1/D6
18
P1.5/INT0/D5
17
P1.4/D4
RST
16
P1.3/D3
X2
10
15
P1.2/D2
X1
11
14
P1.1/D1
VSS
12
13
P1.0/D0
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22
DESCRIPTION
The Philips P87C752 offers many of the
advantages of the 80C51 architecture in
a small package and at low cost.
PORT 0
DRIVERS
VCC
I2C
CONTROL
PWM
VSS
RAM ADDR
REGISTER
PORT 0
LATCH
RAM
B
REGISTER
PORT 2
LATCH
STACK
POINTER
ACC
PROGRAM
ADDRESS
REGISTER
TMP1
TMP2
ALU
PSW
FEATURES
Inter-integrated Circuit (I2C)
serial bus interface
Small package sizes
28-pin DIP, PLCC 02SSOP
Wide oscillator frequency range
Low power consumption:
Normal operation: less than 11mA
@ 5 V, 12 MHz
5-channel 8-bit A/D converter
8-bit PWM output/timer
ROM/
EPROM
PCON
I2CFG I2STA
I2DAT
I2CON
TCON
BUFFER
IE
TH0
TL0
RTH
RTL
INTERRUPT, SERIAL
PORT AND TIMER BLOCKS
PC
INCREMENTER
INSTRUCTION
REGISTER
PROGRAM
COUNTER
TIMING
AND
CONTROL
RST
DPTR
PORT 1
LATCH
PORT 3
LATCH
PORT 1
DRIVERS
PORT 3
DRIVERS
P1.0P1.7
P3.0P3.7
PD
OSCILLATOR
ADC
X1
X2
AVSS AVCC
SU00319
Part No.
Package
P87C752-1A28
PLCC-28
P87C752-4N28
DIP-24
P87C752-4DB
SSOP-24
26
11
19
12
23
Function
P3.4/A4
P3.3/A3
P3.2/A2/A10
P3.1/A1/A9
P3.0/A0/A8
P0.2/VPP
P0.1/SDA/OE-PGM
P0.0/SCL/ASEL
RST
X2
X1
VSS
P1.0/ADC0/D0
P1.1/ADC1/D1
28 VCC
P3.3/A3 2
27 P3.5/A5
P3.2/A2/A10 3
26 P3.6/A6
P3.1/A1/A9 4
25 P3.7/A7
25
PLASTIC
LEADED
CHIP
CARRIER
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
P3.4/A4 1
P3.0/A0/A8 5
18
Pin
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Function
P1.2/ADC2/D2
P1.3/ADC3/D3
P1.4/ADC4/D4
AVSS
AVCC
P1.5/INT0/D5
P1.6/INT1/D6
P1.7/T0/D7
P0.3
P0.4/PWM OUT
P3.7/A7
P3.6/A6
P3.5/A5
VCC
P0.2/VPP
P0.1/SDA/OEPGM
P0.0/SCL/ASEL
RST
PLASTIC
DUAL
IN-LINE
PACKAGE
AND
SHRINK
SMALL
OUTLINE
PACKAGE
24 P0.4/PWM OUT
23 P0.3
22 P1.7/T0/D7
21 P1.6/INT1/D6
20 P1.5/INT0/D5
X2 10
19 AVCC
X1 11
18 AVSS
VSS 12
17 P1.4/ADC4/D4
P1.0/ADC0/D0 13
16 P1.3/ADC3/D3
P1.1/ADC1/D1 14
15 P1.2/ADC2/D2
email sales@quarndon.co.uk
website www.quarndon.co.uk
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