EC21003 Lecture Notes 2009oct29

EC21003 Introduction to Electronics Notes: Working Document - Last updated 29 Oct 2009
TABLE OF CONTENT
SECTION 1. Bipolar Junction Transistor.............................................................................................................................. 3
1.1. Device Operation: An Introduction ................................................................................................................................... 3
1.2. BJT Amplifier .................................................................................................................................................................... 4
1.2.1. Common-Emitter (CE) Amplifier................................................................................................................................. 4
1.2.1.1. DC Operating Point ............................................................................................................................................... 13
1.2.1.2. AC Analysis........................................................................................................................................................... 19
1.2.1.3. AC Analysis: small signal circuit parameters........................................................................................................ 25
1.2.1.4. Maximum Output Signal Swing ............................................................................................................................ 30
1.2.2. Common-Emitter (CE) Amplifier with ac-coupled input and output ........................................................................ 33
1.2.2.1. AC Coupling of Input and Output for vin and vout .................................................................................................. 33
1.2.2.3. AC analysis (ac coupled vin and vout) ..................................................................................................................... 38
1.2.2.4. AC Analysis: small signal circuit parameters: (ac coupled vin)............................................................................. 40
1.2.2.5. Effect of Base-width modulation or Early effect .................................................................................................. 44
1.2.2.6. AC analysis with Base-width modulation effect ................................................................................................... 46
1.2.2.7. AC Analysis (using transconductance): small signal circuit parameters with base-width modulation ................ 48
1.2.3. Common-Emitter (CE) Amplifier: Various schemes of Base-bias ............................................................................ 52
1.2.3.1. Base-voltage biasing using single base-resistor and independent voltage-source ................................................ 53
1.2.3.2. Base-voltage biasing using voltage-divider bias ................................................................................................... 55
1.2.4. Common-Emitter (CE) Amplifier using Emitter Resistor.......................................................................................... 55
1.2.4.2. AC Analysis: small signal circuit parameters with base-width modulation ......................................................... 58
1.2.4.3. AC Analysis : Alternative approach using transconductance, gm ......................................................................... 62
1.2.5. BJT Amplifier having load-resistor and source-resistor in the circuit ....................................................................... 65
Page 1 of 107
1.2.5.2. AC Analysis: small signal circuit parameters with base-width modulation ......................................................... 68
SECTION 2. Metal Oxide Semiconductor Field Effect Transistor ................................................................................... 75
2.1. Device Operation: An Introduction ................................................................................................................................. 75
2.1.1. Device structure: ......................................................................................................................................................... 75
2.1.1.1. Metal Oxide Semiconductor (MOS) Capacitor ............................................................................................... 75
2.1.1.2. Drain / Source Region and Contacts...................................................................................................................... 75
2.1.1.3. Device structure as a whole ................................................................................................................................... 75
2.1.2. Device electrical operation ......................................................................................................................................... 77
2.1.2.1. MOS Transistor in cut-off ..................................................................................................................................... 77
2.1.2.2. MOS Transistor turned-on and in non-saturation.................................................................................................. 78
2.1.2.3. MOS Transistor turned-on and in saturation ......................................................................................................... 81
2.2. MOSFET Amplifier ......................................................................................................................................................... 87
2.2.1. Common-Source (CS) Amplifier................................................................................................................................ 87
2.2.2. DC operating point...................................................................................................................................................... 91
2.2.3. AC analysis ................................................................................................................................................................. 93
2.2.3.1. Circuit transconductance, gm ................................................................................................................................. 96
2.2.3.2. Drain-to-source small-signal resistance, ro or rds ................................................................................................... 99
2.2.3.3. small-signal parameters: voltage gain and input/output impedance ................................................................... 103
Page 2 of 107
SECTION 1. BIPOLAR JUNCTION TRANSISTOR
1.1. Device Operation: An Introduction
Note: To be inserted.
Page 3 of 107
1.2. BJT Amplifier
1.2.1. Common-Emitter (CE) Amplifier
Case 1: Fixed Base-bias

vin inserted in series with the DC base-bias
Page 4 of 107
Figure 1-1. BJT Circuit using n-p-n transistor
Page 5 of 107
Figure 1-2. BJT Circuit diagram
Page 6 of 107
Figure 1-3. DC value and small-signal value of voltage and current
Base-current = IB + ib
Collector-current = IC + ic
Base-Emitter Voltage = VBE + vbe
Collector-Emitter Voltage = VCE + vce
DC-Bias values: IB, IC, VBE, VCE

o Static or no variation in time
Page 7 of 107
small-signal or ac values: ib, ic, vbe, vce

o fluctuation value
o at a frequency f (we can describe it in terms of frequency response)
Results from forward-active operation (neglecting reverse-saturation current):

o
iC I S e v BE
VT
I S vBE
i
o B e
VT
I S vBE VT
i
o E e

o
iE = iC + iB iC, where iB << iC in forward-active region

o iB = I B + ib
o iC = I C + ic
o iE = I E + ie
Page 8 of 107
Large-signal I-V behaviour (neglecting reverse-saturation current):
Figure 1-4. Large-signal behaviour small-signal (fluctuation of v and i) behaviour superimposed on the static (DC
operating point) behaviour
Page 9 of 107
Finding the small-signal current-voltage relationship:

o Introduce a small change in the parameters in I-V equation.
o Use small-change small-signal value. E.g. I = i and V = v
o linearizing the circuit around the DC current and DC voltage value
(a) Method 1: use differential of the large-signal current-voltage equations
(b) Method 2: Use (I + i) and (V + v) in the large-signal current-voltage equations, and
apply approximation i << I and v << V
Method 1: use differential of the large-signal current-voltage equations

o Base-current/voltage:
I S e vBE
I
v BE
I
C v BE B v BE
VT
VT
VT
i B
v BE VT vbe
IB
ib
i B
VT
r = small-signal fwd-bias resistance
IB
VT
o Collector current/voltage:
Page 10 of 107
iC I S e vBE
I
i
iC
C g m c , transconductance in CE configuration
v BE VT
vbe
VT
v BE I C
v BE
VT
VT
o Small-signal voltage / current relationship:
iC I C
iB I B
i E
i E
IC I B
I
I
v BE C v BE B v BE
VT
VT
VT
i E
IC
I
v BE B v BE
VT
VT
I S e vBE
VT
ic iC
ib iB
I
v BE
I
C v BE E v BE
VT
VT
VT
ie ic i b
Summary:
v
VT
r be
IB
ib
small-signal fwd-bias resistance
Page 11 of 107
Device-transconductance in CE configuration
IC
i
gm c
VT
vbe
Small-signal collector-current and base-current
ic i b , ie ic i b
DC-Bias / Static Current-Voltage

(DC Operating Point / Quiescent Point / Q-Point)
IB
(B)
(C)
small-signal current-voltage
(B)
IC
(C)
VBE (ON)
(E)
(E)
VBE(ON) >= V[cut-in]
In piecewise-linear
model of BE fwd-bias
junction
IE
fwd-bias diffusionresistance of BE
junction
Figure 1-5. small-signal (fluctuation of v and i) behaviour superimposed on the static (DC operating point) behaviour
Page 12 of 107
1.2.1.1. DC Operating Point
Figure 1-6. DC Analysis of the circuit in Figure 1-2: replace all the time-dependent voltage / current sources with
their respective average value (= 0V and = 0A, by definition of small-signal average values)
Page 13 of 107
Figure 1-7. DC equivalent circuit of the circuit in Figure 1-2

2. DC input current at Base:
o IB = (VBB VBE(ON)) / RB
where, VBE(ON) 0.7V in case of BJT forward-active region of operation, having its BE junction in forward-bias
condition
Page 14 of 107
o Note: if VBB < VBE(ON), IB = 0
BE junction is not turned ON
BJT is still in CUT-OFF mode (minority carrier injection into Base region from Emitter 0)
3. DC controlled current at Collector:
o IC = IB
o Note: assuming BJT in forward-active region of operation (which has to be verified from the VCE voltage)
4. DC voltage across the Collector and Emitter set by the DC load-line:
o VCE = VCC - IC RC
o Note: verify if BJT is indeed in forward-active region of operation by checking VCE > VCE,SAT
where VCE,SAT 0.2V
The IB, IC, VCE, VBE values at the DC operating point are also designated as IBQ, ICQ, VCEQ, VBEQ (i.e. the IB, IC, VCE, VBE
values at Quiescent-point or Q-point)
Note:
I S vBE
i
Comparison between VBE(ON) 0.7V (piecewise-linear for BE junction) vs. the large-signal model B e

o Base-current in piecewise-linear (used for hand calculation of bias I-V values), IB1 = (VBB 0.7) / RB
Page 15 of 107
VT
S
o Base-current from iB e

vBE
VT
, IB0 = [VBB VT ln( IB0 / IS) ] / RB
where, IB0 needs to be solved by iteration (since, no closed-form solution of the above transcendental equation is
available)
o Example: IS = 10-15 A, = 100
For IB ~ 1 uA, 10 uA, 100 uA VBE(ON) ~ 0.66 V, 0.72 V, 0.78 V (0.78V will take BJT near saturation)
Page 16 of 107
Figure 1-8. DC equivalent ckt and small-signal equivalent ckt of B-E fwd-bias junction
Page 17 of 107
Figure 1-9. DC operating point
Page 18 of 107
1.2.1.2. AC Analysis
RC
(C)
VCC
(B)
RB
(E)
VBB
Page 19 of 107
Figure 1-10. Visualizing small-signal operation for the circuit in Figure 1-2: Replace all the static or DC voltage /
current values calculated from DC-analysis with 0V and 0A (i.e. not contributing in voltage / current fluctuation in
small-signal, by definition) and then include all time-dependent small-signal voltage / current sources
small-signal current-voltage in BJT
(B)
(C)
(E)
Figure 1-11. small-signal equivalent circuit using and alternative representation using transconductance gm
Page 20 of 107
Figure 1-12. small-signal current and voltage around the DC operating point
Page 21 of 107
Figure 1-13. small-signal analysis at the DC operating point for the circuit in Figure 1-2
Small-signal analysis:
o Objective is to find out i-v relationship at the DC operating point, after forcing the assumption i,v values are small
changes around the DC bias values, so that the small-signal i,v values can be superimposed on DC I-V values (
linearizing the circuit around the DC operating point or DC bias point)
Page 22 of 107
o Note: What if i, v values are large?
In forward-active region of operation, the small-signal assumption may still be used to predict the first-order /
primary behaviour of current-voltage in the circuit. ( used in designing circuit using hand calculation)
However, there will be higher-order effects affecting the i, v values ( the effects are included in circuit simulation
to predict the accurate current voltage values)
Figure 1-14. small-signal analysis (alternative diagram) at the DC operating point for the circuit in Figure 1-2
Page 23 of 107
1. small-signal (ac) input current at Base:

o ib = vin / ( RB + r ), where r= VT / IBQ
2. Corresponding small-signal (ac) controlled current between Collector and Emitter:
o ib
Note: assuming BJT in forward-active region of operation
3. small-signal (ac) collector current from / to the external resistor:
o ic = ib
4. small-signal (ac) voltage developed across the external resistor set by the AC load-line:
o vout = ic RC
Note:
o AC load-line vs. DC load-line:
They are identical unless, we are bypassing any of the DC-biasing resistor using shunt-capacitor across the resistor
in small-signal operation (at a frequency away from f = 0 Hz).
[See more later on using an Emittor-resistor (RE) and bypassing it using an Emitter capacitor (CE) for ac operation ]
Page 24 of 107
Figure 1-15. ac load-line is different from DC load-line if using shunt bypass cap. across any bias resistor
1.2.1.3. AC Analysis: small signal circuit parameters
Small signal voltage gain, Av = vout / vin

o From Figure 1-13, vout = vce = ic RC = ib RC = RC [ vin / ( RB + r ) ]
Av = vout / vin = RC / ( RB + r )
Small signal current gain, Ai = iout / iin

o From Figure 1-13, iin = ib, ic = ib and iout = ic (Note: the direction of iout used in the figure)
Ai = iout / iin =
Page 25 of 107
Interpretation of Av: Rewriting the equation of Av using multiple parts

Av = [ r / ( RB + r ) ] . [ 1 / r ] . [ ] . [ RC . (-1)]
[vbe / vin]
[ib / vbe]
[ic / ib] [vout / ic]
where,
[ part 1 ] : fraction of vin getting applied across BE junction as the small-signal vbe
[ part 1 ] x [ part 2 ]: current injected into Base as the small-signal ib
[ part 1 ] x [ part 2 x [ part 3 ]: corresponding controlled current appearing at the Collector of BJT as the smallsignal ic
[ part 1 ] x [ part 2 x [ part 3 ] x [ part 4]: the voltage drop developed across RC as the small-signal vout, (-1
denoting the reversal of vout phase w.r.t. vin phase)
Av as RC
Interpretation of Ai: Rewriting the equation of Ai using multiple parts

Ai = [ 1 ] . [ ] . [ -1]
[ ib / iin ]
[ic / ib]
[iout / ic]
where,
[ part 1 ] : fraction of iin getting injected into Base
Page 26 of 107
[ part 1 ] x [ part 2 ]: corresponding controlled current appearing at the Collector of BJT as the small-signal ic
[ part 1 ] x [ part 2 ] x [ part 3 ]: fraction of ic delivered to the external resistors. (-1 representing the direction of
iout opposite to that of ic)
Small signal input resistance, Rin = vin / iin , having the load-resistor (not the circuit biasing resistors), if any, removed
o From Figure 1-21, the circuit does not include any load-resistor
o Rib = vbe / ib = r
o Rin = vx / ix = RB + Rib = RB + r
Page 27 of 107
Figure 1-16. small-signal resistance looked from input for Figure 1-2
Page 28 of 107
Figure 1-17. small-signal resistance looked from output for Figure 1-2
Small signal output resistance, Rout having the vin shorted

o vin = 0 (shorted) i1 = 0 i2 = 0
o Roc =
o Rout = vx / ix = Roc | | RC = RC
Page 29 of 107
1.2.1.4. Maximum Output Signal Swing
IC
IC = VCC / RC
(VCEQ, ICQ)
IB = IBQ
VCC
VCE
Max. o/p signal Vpeak for the

given o/p operating point
Figure 1-18. output signal-swing (Vpeak) with signal clipped at VCC
Page 30 of 107
VCE,SAT ~ 0.2 V
Figure 1-19. output signal-swing (Vpeak) with signal distorted and clipped at VCE(sat)
Page 31 of 107
Figure 1-20. output signal-swing (Vpeak) without distortion / clipping
Page 32 of 107
o Max. o/p signal swing = smaller of ( (VCC - VCE) and (VCE - VCE, SAT) ) [Vpeak]
=> 2 x smaller of ( (VCC - VCE) and (VCE - VCE, SAT) ) [Vp-p]
1.2.2. Common-Emitter (CE) Amplifier with ac-coupled input and output
1.2.2.1. AC Coupling of Input and Output for vin and vout
AC coupling of input:
o In Figure 1-2, the input signal source vin has two floating nodes and it is connected in series
o Alternative connection is to connect vin through an ac coupling capacitor as shown in Figure 1-21
o Often the input is available having single-ended, where one-end is signal and the other end goes to GND reference
of the entire circuit.
o Second, if there is a DC component in the input signal (real-life signal generator), the DC value must be isolated
from the DC-voltage of Base-bias
o Drawback of using ac coupling capacitor:
at near-DC frequency, entire vin is not going to be transferred to the input of the gain-device (BJT) There will
be a lower cutoff frequency > 0 Hz
AC coupling of output:
o In Figure 1-2, the output signal is VC + vout a DC component is (== VC) is embedded with the signal
E.g. if we are using a 12 V power-supply (VCC = 12 V), for maximum possible signal swing, VC 0.5 VCC = 6V
Page 33 of 107
o In order to isolate the DC component output voltage (also referred to as output common-mode voltage, VOCM) of an
amplifier output from the DC-bias voltage of the subsequent amplifier (or any other circuit), vout is taken through an
ac coupling capacitor as shown in Figure 1-21
Page 34 of 107
Figure 1-21. BJT Circuit with ac coupling of input and output
Page 35 of 107
Figure 1-22. BJT Circuit diagram illustrating the need for ac coupling of input and output
Page 36 of 107
Figure 1-23. BJT Circuit diagram: DC Operating Point

Page 37 of 107
o IB = (VBB VBE(ON)) / RB
condition
o IC = IB
o VCE = VCC - IC RC
where VCE,SAT 0.2V
4. Max. o/p signal-swing possible without distortion / clipping
o Max. o/p signal swing = smaller of ( (VCC - VCE) and (VCE - VCE, SAT) ) [ Vpeak ]
=> 2 x smaller of ( (VCC - VCE) and (VCE - VCE, SAT) ) [ Vp-p ]
1.2.2.3. AC analysis (ac coupled vin and vout)

Page 38 of 107

o ib = vin / r , where r= VT / IBQ
Page 39 of 107
o ib
o ic = ib
o vout = ic RC
1.2.2.4. AC Analysis: small signal circuit parameters: (ac coupled vin)

o From Figure 1-21, vout = vce = ic RC = ib RC = RC [ vin / r ]
Av = vout / vin = RC / r

o From Figure 1-21, ib = iin RB / (RB + r), ic = ib and iout = ic (Note: the direction of iout used in the figure)
Ai = iout / iin = . RB / (RB + r)
Interpretation of Av: Rewriting the equation of Av using multiple parts

Av = [ 1 / r ] . [ ] . [ RC . (-1)]
Page 40 of 107
[ib / vin]
[ic / ib] [vout / ic]
where,
[ part 1 ] : current injected into Base as the small-signal ib when vin getting applied across BE junction
[ part 1 ] x [ part 2]: corresponding controlled current appearing at the Collector of BJT as the small-signal ic
[ part 1 ] x [ part 2 ] x [ part 3 ] : the voltage drop developed across RC as the small-signal vout, (-1 denoting the
reversal of vout phase w.r.t. vin phase)
Av as RC
Interpretation of Ai: Rewriting the equation of Ai using multiple parts

Ai = [ RB / (RB + r) ] . [ ] . [ -1]
[ ib / iin ]
[ic / ib]
[iout / ic]
where,
[ part 1 ] : fraction of iin getting injected into Base
[ part 1 ] x [ part 2 ]: corresponding controlled current appearing at the Collector of BJT as the small-signal ic
[ part 1 ] x [ part 2 ] x [ part 3 ]: fraction of ic delivered to the external resistors. (-1 representing that the
direction of iout is taken opposite to that of ic)
Page 41 of 107
o Rib = vbe / ib = r
o Rin = RB | | Rib = RB || r
Page 42 of 107
Small signal output resistance, Rout = vout / iout , having the vin shorted
o vin = 0 (shorted) ib = 0 ic = 0
o Roc =
o Rout = vx / ix = Roc | | RC = RC
Page 43 of 107
1.2.2.5. Effect of Base-width modulation or Early effect
Page 44 of 107
Figure 1-27. Base-width modulation effect: movement of the bias-point on VCE and the controlled current source
becoming non-ideal with a finite resistance across it
Base-width modulation effect:

o Collector bias point in forward-active region:
Forward-active region collector current (large-signal):
iC I S e v BE
VT
1 VCE
VA
Collector bias current has a linear dependency on VCE

However, the dependency of collector bias current has exponential dependency on VBE
For hand-calculation of bias-point, we may still use:
iC I S e v BE
VT
o Finite output impedance of the controlled current-source between Collector and Emitter:
Forward-active region collector current (large-signal):
iC I S e v BE
Collector bias current has a linear dependency on VCE
iC I S e v BE
ro
VT
VCE I C
VCE
VA
VA
VCE V A
iC
IC
Page 45 of 107
VT
1 VCE
VA
For VA typically > 50 V, < 250 V and Collector current ~ 1 mA, ro ~ 50 100 kOhm (large compared to
external bias resistor RC)
Note: we would like to have ro as large as possible w.r.t. the external resistors connected to the collector
1.2.2.6. AC analysis with Base-width modulation effect

o ib = vin / r , where r= VT / IBQ
o ib
o ic = ib ro / (ro + RC)
o vout = ic RC = ib RC ro / (ro + RC)
Page 46 of 107
In short:

o Av = [ib / vin] .
[ic / ib]
o Av = [ 1 / r ] . [ . ro / (ro + RC)]
[vout / ic]
[ RC . (-1)]
Page 47 of 107
o Av = [ro / (ro + RC)] ( RC / r)
For ro >> RC Av ( RC / r )

o Ai = [ ib / iin ]
[ic / ib]
[iout / ic]
o Ai = [ RB / (RB + r) ] . [ . ro / (ro + RC) ] . [ -1]

For ro >> RC Ai [ RB / (RB + r) ]
o Rib = r
o Roc = ro
o Rout = Roc | | RC = ro | | RC
For ro >> RC Rout RC
1.2.2.7. AC Analysis (using transconductance): small signal circuit parameters with base-width modulation
Page 48 of 107
Figure 1-29. Alternative small-signal analysis (using transconductance, gm) for the circuit in Figure 1-21

o Av = [vbe / vin] .
o Av = 1
[ic / vbe]
. gm [ ro / (ro + RC)]
. [vout / ic]
[ RC . (-1)]
Page 49 of 107
o Av = gm [ro / (ro + RC)] ( RC ), where gm = IC / VT
Notice that gm = IB / VT = / r It leads to the previous Av expression using
For ro >> RC Av gm RC

o Ai = [vbe / iin ]
[ic / vbe]
[iout / ic]
= [ RB || r ] . [ gm . ro / (ro + RC) ] . [ -1]

Notice that using, gm = IB / VT = / r
Ai = (RB . r(RB + r / r ro / (ro + RC) ) . (-1) It leads to the previous Ai expression using
For ro >> RC Ai [ RB || r ] . gm
o Rib = r
o Roc = ro
Page 50 of 107
o Rout = Roc | | RC = ro | | RC
Note: for ro >> RC, Rout RC
Page 51 of 107
o vin = 0 (shorted) i1 = 0 i2 = 0
o Roc = r0
o Rout = Roc | | RC = r0 | | RC
1.2.3. Common-Emitter (CE) Amplifier: Various schemes of Base-bias
Page 52 of 107
1.2.3.1. Base-voltage biasing using single base-resistor and independent voltage-source
Figure 1-32. BJT CE amplifier: Base-biasing using fixed-bias and single base-resistor
Page 53 of 107
Figure 1-33. BJT CE amplifier: Base-biasing using fixed-bias and single base-resistor Special case VBB VCC (No
independent voltage-source required for VBB)
Page 54 of 107
1.2.3.2. Base-voltage biasing using voltage-divider bias
Figure 1-34. BJT CE amplifier: Base-biasing using voltage-divider network and supply-voltage
1.2.4. Common-Emitter (CE) Amplifier using Emitter Resistor
Page 55 of 107
Figure 1-35. BJT CE amplifier using Emitter resistor

Page 56 of 107
o IB = (VBB VBE(ON)) / (RB + (1 + ) RE)
condition
o IC = IB
o VCE = VCC - IC RC
where VCE,SAT 0.2V
o Max. o/p signal swing = smaller of { (VCC (VCE + V(RE)) ) and (VCE - VCE, SAT + V(RE)) } [ Vpeak ]
=> 2 x smaller of{ (VCC (VCE + V(RE)) ) and (VCE - VCE, SAT + V(RE)) } [ Vp-p ]
For RE << RC, it is the RC which decides the AC o/p signal head-room (max Vpeak before clipping / distortion)
Page 57 of 107
1.2.4.2. AC Analysis: small signal circuit parameters with base-width modulation

o Av = [ib / vin]
[ic / ib]
[vout / ic]
Page 58 of 107
o Av = [ 1 / (r + (+ 1) RE) ] . [ . ro / (ro + RC + RE)]
[ RC . (-1)]
Note: in the expression [ro / (ro + RC + RE)], we are taking the ib flow through RE is << ic flow through RE
o Av = [ ro / (ro + RC + RE) ] ( RC / (r + (+ 1) RE))
For ro >> RC, RE Av ( RC / (r + (+ 1) RE))

o Ai = [ ib / iin ]
[ic / ib] .
[iout / ic]
o Ai = [ RB / (RB + (r + (+ 1) RE)] . [ . ro / (ro + RC + RE) ] . [ -1]

For ro >> RC, RE Ai [ RB / (RB + r + (+ 1) RE)] .
o Rib r(+ 1) RE, taking ic ib
Otherwise Rib rRE + RE . ro / (ro + RC + RE)]
o Rin = RB | | Rib
Small signal output resistance, Rout after having the vin shorted
Page 59 of 107
vin = 0 (shorted)
Page 60 of 107
To compute Roc (small-signal impedance, when looked into collector or BJT), apply a small-signal voltage, vx
and estimate the corresponding small-signal current, ix
Current flow through r, i1 (say) = ix . [ RE / (RE + r) ] . (-1)
where, the factor (-1) for the direction of the current i1 is opposite to ix
(4) Voltage drop across Emitter resistor
= ix . ( RE || r )
Voltage drop across Collector - Emitter
= ( ix - i 1 ) r o
= ix r o - i1 r o
= ix ro + ix . [ RE / (RE + r) ] ro
Or, if using transconductance (gm) notation, Voltage drop across Collector - Emitter
= ix ro - gm [ix . (RE || r)] . ro
(5) ROC = vx / ix = RE || r + ro + ( . [ RE / (RE + r) ] ) ro
Or, if using transconductance (gm) notation,
ROC = vx / ix = RE || r + ro + [ gm . (RE || r )] ro
Note: ROC is
= the regular series resistance (= (RE || r ) + ro ) in the Collector-to-GND path
Page 61 of 107
+ another additional resistance term ( which is [ . RE / (RE + r) ] ro = [ gm . (RE || r )] ro ), because the current
i1 or [ gm . (RE || r )] opposes the flow of current sourced by vx

o Finally, output impedance Rout = ROC || RC
Note: ROC > ro
So, for ro >> RC, Rout RC
1.2.4.3. AC Analysis : Alternative approach using transconductance, gm
Page 62 of 107

o Av = [vbe / vin]
[ic / vbe]
. [vout / ic]
o Av = [ r / (r + ( + 1) RE )] . [ gm . ro / (ro + RC + RE)] . [ RC . (-1)]

= [ r / (r + ( + 1) RE) ] gm [ro / (ro + RC + RE)] ( RC ), where gm = IC / VT
Page 63 of 107
Notice that gm = IB / VT = / r It leads to the previous Av expression using
for ro >> RC, Av [ r / (r + ( + 1) RE) ] . gm RC

o Ai = [vbe / iin ]
[ic / vbe]
[iout / ic]
o Ai = [ RB || r ] . [ gm . ro / (ro + RC) ] . [ -1]

Notice that using, gm = IB / VT = / r
Ai = (RB . r(RB + r / r ro / (ro + RC) ) . (-1) It leads to the previous Ai expression using
for ro >> RC, Ai [ RB || r ] . gm
o Rib r + ( + 1) RE, taking ic ib
Otherwise Rib rRE + RE . ro / (ro + RC + RE)]
o Rin = RB | | Rib
o Roc = RE || r + ro + [ gm . (RE || r )] ro
Note: ROC is
Page 64 of 107
= the regular series resistance (= (RE || r ) + ro ) in the Collector-to-GND path
+ another additional resistance term ( = [ gm . (RE || r )] ro ), because the current [ gm . (RE || r )] opposes the flow
of current sourced by vx
o Rout = Roc | | RC
Note: ROC > ro
So, for ro >> RC, Rout RC
1.2.5. BJT Amplifier having load-resistor and source-resistor in the circuit
Page 65 of 107
VCC
RC
R1
vout
CC
RL
RS
CB
vin
R2
RE
Figure 1-39. BJT CE amplifier using non-zero source resistor and finite load resistor
Page 66 of 107
Figure 1-40. BJT CE amplifier using non-zero source resistor and finite load resistor (Figure 1-39)
Page 67 of 107
o IB = (VBB VBE(ON)) / (RB + (1 + ) RE)
condition
o IC = IB
o VCE = VCC - IC RC
where VCE,SAT 0.2V
o Max. o/p signal swing = smaller of { (VCC (VCE + V(RE)) ) and (VCE - VCE, SAT + V(RE)) } [ Vpeak ]
=> 2 x smaller of{ (VCC (VCE + V(RE)) ) and (VCE - VCE, SAT + V(RE)) } [ Vp-p ]
1.2.5.2. AC Analysis: small signal circuit parameters with base-width modulation
Page 68 of 107

o Av = [ib / vin]
[ic / ib]
[vout / ic]
Page 69 of 107
o Av = [ (RB || Rib) / (RS + RB || Rib ) ] (1 / Rib ) . [ . ro / (ro + RC || RL + RE)] . [ RC || RL . (-1)]
where Rib = (r + (+ 1) RE)
Note: in the expression [ro / (ro + RC || RL + RE)], we are taking the ib flow through RE is << ic flow through RE
o Av = [ (RB || Rib) / (RS + RB || Rib ) ] [ ro / (ro + RC || RL + RE) ] (RC || RL / Rib)
For ro >> RC, RE Av [ (RB || Rib) / (RS + RB || Rib ) ] (RC || RL / Rib)

o Ai = [ ib / iin ]
[ic / ib] .
[iout / ic]
o Ai = [ RB / (RB + Rib) ] . [ . ro / (ro + RC || RL + RE) ] . [ RC / (RC + RL) . ( -1) ]

For ro >> RC, RE Ai [ RB / (RB + Rib) ] . . [ RC / (RC + RL) ]
o Rib r(+ 1) RE, taking ic ib
o Rin = RS + RB | | Rib = RS + RB || (r(+ 1) RE)
Page 70 of 107
Figure 1-42. small-signal resistance looked from output into Collector for Figure 1-39
Small signal output resistance, Rout after having the vin shorted
vin = 0 (shorted)
Page 71 of 107
To compute Roc (small-signal impedance, when looked into collector or BJT), apply a small-signal voltage, vx
and estimate the corresponding small-signal current, ix
Current flow through r, i1 (say) = ix . [ RE / (RE + (r + RS || RB) ) ] . (-1)
where, the factor (-1) for the direction of the current i1 is opposite to ix
(4) Voltage drop across Emitter resistor
= ix . ( RE || (r + RS || RB))
Voltage drop across Collector - Emitter
= ( ix - i 1 ) r o
= ix r o - i1 r o
= ix ro + ix . [ RE / (RE + (r + RS || RB)) ] ro
Or, if using transconductance (gm) notation, Voltage drop across Collector - Emitter
= ix ro + gm [ix . (RE || (r + RS || RB))] . ro
(5) ROC = vx / ix = RE || (r + RS || RB) + ro + ( . [ RE / (RE + (r + RS || RB)) ] ) ro
Or, if using transconductance (gm) notation,
ROC = vx / ix = RE || (r + RS || RB) + ro + [ gm . (RE || (r + RS || RB))] ro
Note: ROC is
= the regular series resistance (= (RE || (r + RS || RB)) + ro ) in the Collector-to-GND path
Page 72 of 107
+ another additional resistance term ( which is [ . RE / (RE + (r + RS || RB)) ] ro = [ gm . (RE || (r + RS || RB) )]
ro ), because the current i1 or [ gm . (RE || (r + RS || RB))] opposes the flow of current sourced by vx
o Finally, output impedance Rout = ROC || RC || RL
Note: ROC > ro
So, for ro >> RC, Rout RC || RL
Page 73 of 107
Page 74 of 107
SECTION 2. METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR
2.1. Device Operation: An Introduction
2.1.1. Device structure:
2.1.1.1. Metal Oxide Semiconductor (MOS) Capacitor
// Remark: need to insert:
// MOS cap gate-induced charge accumulation
// Enhancement vs. depletion
2.1.1.2. Drain / Source Region and Contacts
// Gate/Source contact
2.1.1.3. Device structure as a whole
Page 75 of 107
Figure 2-1. A cross-section of a MOSFET Device: (1) Poly-Si Gate, (2) Gate-oxide / Thin-oxide (thin-ox) underneath
of which a conducting channel is formed, (3) and (4) Heavily doped Drain and Source regions, (5) Lightly doped
Page 76 of 107
Bulk/Substrate, (6) Thick-oxide / Field-oxide (FOX) for isolation from any other adjacent MOS devices.
Metal contacts for Drain and Source are not shown
2.1.2. Device electrical operation
2.1.2.1. MOS Transistor in cut-off
Cut-off: ID = 0 for VGS < VTn
Page 77 of 107
Figure 2-2. NMOSFET in cut-off mode (VGS < VTn)

2.1.2.2. MOS Transistor turned-on and in non-saturation
Two conditions necessary to establish a current flow:

o VGS > VTn Excess charge underneath the gate-oxide (i.e. inversion layer charge formation)
Page 78 of 107
o VDS > 0 Creation of an electric field across the mobile-charge (inversion) layer
A drift current caused by the electron movement through the channel

o Channel acting like a nonlinear resistor
Page 79 of 107
Figure 2-3. NMOSFET is turned ON or conducting channel formed (VGS > VTn): Now if VDS = 0 V ID = 0
Figure 2-4. NMOSFET is turned ON or conducting channel formed (VGS > VTn): Now if VDS > 0 V ID > 0
Square-law model:
Page 80 of 107
o Channel acting like a nonlinear resistor
o ID = (n COX) (W/L) [(VGS VTn) VDS/2]) VDS
o Process transconductance, kn = n COX [in A/V2]
given for a device fabrication technology
o Device aspect-ratio = W/L
Geometry of the device may be changed while designing the circuit (Design-parameter)
o Device-transconductance = kn (W/L) [in A/V2]
Device-transconductance is usually denoted by n or Kn for NMOS device
2.1.2.3. MOS Transistor turned-on and in saturation
Page 81 of 107
Figure 2-5. NMOSFET is turned ON or conducting channel formed (VGS > VTn): VDS = VGS - VTn Onset of the
saturation through pinching off at the Drain-end of the channel
Page 82 of 107
Figure 2-6. NMOSFET ID vs. VDS behaviour (VGS > VTn) ignoring the channel length modulation
Page 83 of 107
Figure 2-7. NMOSFET ID vs. VDS behaviour (VGS > VTn) ignoring the channel length modulation for various VGS
Page 84 of 107
Figure 2-8. NMOSFET is turned ON or conducting channel formed (VGS > VTn):
Effect of channel length modulation when VDS > VGS - VTn
Page 85 of 107
Figure 2-9. NMOSFET ID vs. VDS behaviour (VGS > VTn) considering the channel length modulation for various VGS
Page 86 of 107
Device Electrical Operation Summary:
For VGS < VTn : ID = 0
For VGS > VTn :

o when VDS < VDS,SAT : ID = (n COX) (W/L) / 2 [2(VGS VTn) VDS]) VDS
or, when VDS < VDS,SAT : ID = (Kn/2) [2(VGS VTn) VDS]) VDS, where n or Kn = n COX (W/L)
o when VDS >= VDS,SAT : ID = (n COX) (W/L) / 2 (VGS VTn)2 ignoring channel length modulation
or, when VDS >= VDS,SAT : ID = (Kn/2) (VGS VTn)2
where the device-transconductance, n or Kn = n COX (W/L)
o Or, when VDS >= VDS,SAT : ID = (n COX) (W/L) / 2 (VGS VTn)2 (1 + VDS / VA)
or, when VDS >= VDS,SAT : ID = (Kn/2) (VGS VTn)2(1 + VDS / VA),
where the device-transconductance, n or Kn = n COX (W/L)
VA = Early voltage (analogy from BJT Early voltage) because of channel-length modulation effect
channel-length modulation effect is described the channel-length modulation parameter = 1 / VA
2.2. MOSFET Amplifier

2.2.1. Common-Source (CS) Amplifier
Page 87 of 107
Figure 2-10. NMOS biased using a gate voltage (for amplifier operation) and resistor loading at Drain
Page 88 of 107
Figure 2-11. NMOS common-source amplifier with small-signal vin at the gate
Page 89 of 107
Figure 2-12. Circuit representation of Figure 2-11
Page 90 of 107
2.2.2. DC operating point
Figure 2-13. DC Analysis of the circuit in Figure 2-11: replace all the time-dependent voltage / current sources with
their respective average value (= 0V and = 0A, by definition of small-signal average values)
Page 91 of 107
Figure 2-14. DC equivalent circuit of the circuit in Figure 2-11

1. DC voltage across Gate and Source:
o Current into Gate = 0 VGS = VGG
Page 92 of 107
o Note: if VGS < VT
No conducting channel is formed in NMOSFET ID = 0 and NMOSFET is still in CUT-OFF
2. DC controlled current at Drain:
o Either ID (n COX) (W/L) / 2 (VGS VTn)2
(if in saturation), ignoring channel length modulation for finding the DC bias current
o Or ID = (n COX) (W/L) / 2 [2(VGS VTn) VDS]) VDS
(if in non-saturation)
o Note: whether the NMOS is in saturation region of operation or non-saturation region, it has to be verified from the
VDS voltage
3. DC voltage across the Drain and Source set by the DC load-line:
o VDS = VDD ID RD
o Note: verify if the NMOS is in saturation or non-saturation region of operation by checking VDS > VDS,SAT or VDS <
VDS,SAT , where VDS,SAT = VGS - VTn
The ID, VDS values at the DC operating point are also designated as IDQ, VDSQ (i.e. the ID, VDS values at Quiescent-point
or Q-point)
2.2.3. AC analysis
Page 93 of 107
Page 94 of 107
Figure 2-15. Visualizing small-signal operation for the circuit in Figure 2-11: Replace all the static or DC voltage /
current values calculated from DC-analysis with 0V and 0A (i.e. not contributing in voltage / current fluctuation in
small-signal, by definition) and then include all time-dependent small-signal voltage / current sources
Figure 2-16. small-signal current and voltage around the DC operating point
Page 95 of 107
2.2.3.1. Circuit transconductance, gm
Transconductane gm in Common-Source mode:
For VGS < VTn (cut-off): ID = 0 gm = 0
For VGS > VTn :

o when VDS < VDS,SAT :
ID = (n COX) (W/L) / 2 [2(VGS VTn) VDS]) VDS
ID = (n COX) (W/L) VDS VGS, for a given VDS
gm (= ID / VGS for a given VDS) = (n COX) (W/L) VDS = Kn VDS, where n or Kn = n COX (W/L)
o when VDS >= VDS,SAT :
ID (n COX) (W/L) / 2 (VGS VTn)2 ignoring channel length modulation
ID = (n COX) (W/L) (VGS VTn) VGS
gm (= ID / VGS for a given VDS) = (n COX) (W/L) (VGS VTn)
To express gm in terms of drain current, use (VGS VTn) = sqrt( 2 ID / [ (n COX) (W/L) ] ):
gm = (n COX) (W/L) * sqrt( 2 ID / [ (n COX) (W/L) ] )
gm = sqrt( 2 (n COX) (W/L) ID )
Therefore,
gm = Kn (VGS VTn) expressed in terms of gate-source bias-voltage
Page 96 of 107
= sqrt(2 Kn ID) expressed in terms of drain bias-current
where n or Kn = n COX (W/L)
Figure 2-17. Circuit-transconductance gm for a given VGS biasing over a range of VDS biasing
Page 97 of 107
Page 98 of 107
Figure 2-18. Circuit-transconductance gm for two VGS values over a range of VDS biasing
2.2.3.2. Drain-to-source small-signal resistance, ro or rds
For VGS < VTn (cut-off): ID = 0 ro (or rds) =
For VGS > VTn :

o when VDS < VDS,SAT :
ID = (n COX) (W/L) / 2 [2(VGS VTn) VDS]) VDS, for a given VGS
ID = (n COX) (W/L) (VGS VTn) VDS (n COX) (W/L) VDS VDS
ro (= VDS / ID for a given VGS) = [ (n COX) (W/L) ( (VGS VTn) VDS) ]-1
= [ Kn (VGS VTn VDS) ] -1, where n or Kn = n COX (W/L)
Note: as VDS (VGS VTn), ro .

However, ro will be limited by the channel length modulation at the onset of saturation within the MOS device
Note: as VDS 0, ro [ (n COX) (W/L) ( (VGS VTn) ]-1

ro approaching a fixed value (little dependence on VDS compared to the dependence of VGS) and behaves almost
like a linear resistor (e.g. passive R)
deep triode / ohmic region of operation
Page 99 of 107
Figure 2-19. drain-source resistance for small VDS values (almost constant slope in ID vs. VDS curve)
ID (n COX) (W/L) / 2 (VGS VTn)2 ignoring channel length modulation
ID = 0, for a given VGS
Page 100 of 107
ro (or rds) =
However, ro will be limited by the channel length modulation
ID = (n COX) (W/L) / 2 (VGS VTn)2 (1 + VDS / VA) Taking channel-length modulation into account
ID = (n COX) (W/L) (VGS VTn)2 VDS / VA, for a given VGS
ID (ID / VA) VDS
o VDS / ID for a given VGS = ro = VA / ID = 1 / ( ID), where = 1 / VA
Page 101 of 107
rds or ro
[ohm]
( Ignoring channel-length modulation )
(saturation for VGS2)

(saturation for VGS1)
VA / ID1
VA / ID2
[ Kn (VGS VT) ] -1
VDS [V]
VTn
VDS,SAT1
VGS1
VDS,SAT2 VGS2 (VGS2 > VGS1)

Effect of using a relatively higher VGS bias: Drain bias-current ID is increased
In the controlled current-source region (NMOS saturation region), rds is lowered.
It leads to a larger fraction of small-signal current (which is controlled by the applied small-signal vgs by a factor
of gm ) lost / dissipated within the MOS device (instead of transferring that current fully to a load outside).
Page 102 of 107
Figure 2-20. drain-source resistance for two different VGS values over a range of VDS biasing
2.2.3.3. small-signal parameters: voltage gain and input/output impedance
Small-signal analysis (at the DC operating point)

=0
(4)
(3)
(G)
(D)
(2)
(1)
RD
= VA / ID
RG
(S)
Page 103 of 107
1. input small-signal (ac) vgs
o vgs = vin
Note: if there was a non-zero source-resistor, vgs = vin . RS / ( RS + RG)
From DC biasing stand-point, RG does not matter, for maximizing the transfer of ac-coupled signal to the MOS
device Gate input, RG should be > 0 and large compared to RS
2. Corresponding small-signal (ac) controlled current between Drain and Source:
o gmvgs
3. small-signal (ac) drain current from / to the external resistor:
o id = gmvgs . [ ro / (ro + RD) ]
o vout = id RD

o Av = [vgs / vin] .
o Av = 1
[id / vgs]
. [vout / id]
. gm [ ro / (ro + RD)] . [ RD . (-1)]
o Av = gm [ro / (ro + RD)] ( RD ), where gm = sqrt(2 (n COX) (W/L) ID) = sqrt(2 Kn ID)
For ro >> RD Av gm RD
Page 104 of 107
o Small signal input resistance, Rin = vin / iin
Since ig = 0, Rig =
o Rin = RG | | Rig = RG
Page 105 of 107
o vin = 0 (shorted) vgs = 0 id = 0
o Rod = ro
o Rout = Rod | | RD = ro | | RD
Note: for ro >> RD, Rout RD
Page 106 of 107
// Source-degeneration resistor effect
// Voltage and current biasing using active-device
// active-device load
// Output-to input feedback-resistor biasing
// Source-coupled pair or diff-amp
Page 107 of 107

EC21003 Lecture Notes 2009oct29

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EC21003 Introduction to Electronics Notes: Working Document - Last updated 29 Oct 2009

Case 1: Fixed Base-bias

Figure 1-1. BJT Circuit using n-p-n transistor

Figure 1-2. BJT Circuit diagram

Figure 1-3. DC value and small-signal value of voltage and current

Base-Emitter Voltage = VBE + vbe

Collector-Emitter Voltage = VCE + vce

DC-Bias values: IB, IC, VBE, VCE

small-signal or ac values: ib, ic, vbe, vce

Results from forward-active operation (neglecting reverse-saturation current):

iE = iC + iB iC, where iB << iC in forward-active region

Large-signal I-V behaviour (neglecting reverse-saturation current):

Finding the small-signal current-voltage relationship:

Method 1: use differential of the large-signal current-voltage equations

o Small-signal voltage / current relationship:

small-signal fwd-bias resistance

Small-signal collector-current and base-current

DC-Bias / Static Current-Voltage

Figure 1-7. DC equivalent circuit of the circuit in Figure 1-2

, IB0 = [VBB VT ln( IB0 / IS) ] / RB

Figure 1-9. DC operating point

1. small-signal (ac) input current at Base:

Small signal voltage gain, Av = vout / vin

Small signal current gain, Ai = iout / iin

Interpretation of Av: Rewriting the equation of Av using multiple parts

[ic / ib] [vout / ic]

Interpretation of Ai: Rewriting the equation of Ai using multiple parts

Small signal output resistance, Rout having the vin shorted

Max. o/p signal Vpeak for the

Figure 1-18. output signal-swing (Vpeak) with signal clipped at VCC

Figure 1-20. output signal-swing (Vpeak) without distortion / clipping

Figure 1-21. BJT Circuit with ac coupling of input and output

Figure 1-23. BJT Circuit diagram: DC Operating Point

1.2.2.3. AC analysis (ac coupled vin and vout)

5. small-signal (ac) input current at Base:

1.2.2.4. AC Analysis: small signal circuit parameters: (ac coupled vin)

Small signal voltage gain, Av = vout / vin

Small signal current gain, Ai = iout / iin

Interpretation of Av: Rewriting the equation of Av using multiple parts

[ic / ib] [vout / ic]

Interpretation of Ai: Rewriting the equation of Ai using multiple parts

Base-width modulation effect:

Forward-active region collector current (large-signal):

Collector bias current has a linear dependency on VCE

For hand-calculation of bias-point, we may still use:

Forward-active region collector current (large-signal):

Collector bias current has a linear dependency on VCE

1.2.2.6. AC analysis with Base-width modulation effect

Small signal voltage gain, Av = vout / vin

Small signal current gain, Ai = iout / iin

o Ai = [ RB / (RB + r) ] . [ . ro / (ro + RC) ] . [ -1]

Small signal voltage gain, Av = vout / vin

Small signal current gain, Ai = iout / iin

= [ RB || r ] . [ gm . ro / (ro + RC) ] . [ -1]

Figure 1-35. BJT CE amplifier using Emitter resistor

Small signal voltage gain, Av = vout / vin

Small signal current gain, Ai = iout / iin

o Ai = [ RB / (RB + (r + (+ 1) RE)] . [ . ro / (ro + RC + RE) ] . [ -1]

i1 or [ gm . (RE || r )] opposes the flow of current sourced by vx

Small signal voltage gain, Av = vout / vin

o Av = [ r / (r + ( + 1) RE )] . [ gm . ro / (ro + RC + RE)] . [ RC . (-1)]

Small signal current gain, Ai = iout / iin

o Ai = [ RB || r ] . [ gm . ro / (ro + RC) ] . [ -1]