FPGA DESIGN

Problem Statement
To design a Calculator using Verilog/VHDL and show its outputs on
640X480 VGA display. Inputs should be taken from ps2 keyboard.
Compulsory Task:

Addition/Subtraction
Multiplication/Division
Modulus Function
VGA (640x480)interfacing
PS/2 keyboard interfacing
**Use of basic mathematical operators like *, /, % are
prohibited; Use of these operators will lead to disqualification.
Use of +, - are only allowed.

VGA (Video Graphic Array) refers specifically to the display

hardware first introduced with the IBM PS/2 line of computers in
1987, but through its widespread adoption has also come to mean
either an Analog computer display standard, the 15-pin-D-sub
miniature VGA connector or the 640x480 resolution itself.
The 640x480 16-color and 320x200 256-color models had fully redefinable palettes, with each entry selectable from within an 18bit(262,144-color) RGB table. It has maximum of 800 horizontal
pixels, maximum 600 lines, and refresh rates at up to 70Hz.

RULES AND REGULATIONS:1. There can be a maximum of 3 members in the same team. The
members of the team need not be from the same institution. All
members should be current students of a recognized educational
institution. All teams and their members should register
themselves failing which, their participation in the final rounds
will not be considered.
2. The competition will consist of two rounds.
3. The first round, the preliminaries, will consist of the
submission of an abstract that details the approach adopted by
the team towards solving the problem and any progress made
already. The abstract should clearly outline the following
details:
o

Team details (members and their institutions, contact

details including phone numbers and email addresses of
each member and team name).

Brief introduction to the problem statement (to test your

understanding of what is required).

Your approach towards solving the problem, including

design decisions as well as technical details.

Work already completed (in which case a snapshot of

current code is required).

Any other comments.

4. The final round of the competition will consist primarily of a

presentation by the team, involving the following:
o

Design decisions and implementation details.

A test run on the reference software simulator and on the

kit.

A viva round.

Any other specific request made by the judges.

5. Any kind of plagiary will lead to disqualification from event.

JUDGING CRITERIA:
Judging will be done by faculty members of Electronics &
Communication Engineering Department.
The teams will be awarded points on the following aspects by
the judges:
o Design decisions and implementation.
o Area used (no. of LUTs)..
o Presentation and viva.
o Additional points.
NOTE:

Participants are encouraged to add some extra features like

floating point calculation, attractive background, themes etc.
Note that though the extra features will contain a significant
portion of the marks, but they would be taken into consideration
only when the participant team has fully implemented the
compulsory tasks.
The participants are encouraged to add as many extra features as
they want.
CONTACTS:Prateek Gupta
+91-7800464699
prateekgupta2100@gmail.com
Saurabh Thakur
+91-9634242627
mail2saurabh93@gmail.com
Arshad Ali
+91-9457688396
ali.arshadmnnit@gmail.com
Ankur Gupta
+91-8765622680
ankurgptgupta@gmail.com
Bhavya Dwivedi
bhavya.dwivedi.mnnit@gmail.com