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5

Project code: 91.4FP01.001


PCB P/N
: 48.4FP02.0SB
REVISION
: 09243-SB

JV71-TR Block Diagram


DDR2

PCB STACKUP

667/800MHz

AMD Caspian CPU


S1G3 (35W)

667/800 MHz
16,17

DDR2
667/800 MHz
16,17

G792
34

IN

OUT

INPUTS

HDMI

VDDR3

21

DCBATOUT
1D2V_S0(4A)

SYSTEM DC/DC

LVDS, CRT I/F

LAN

INTEGRATED GRAHPICS

TXFM

Giga LAN
BCM5784

RJ45

27

26

48
OUTPUTS

DCBATOUT

1D8V_S3(11A)

RT9025

27

49

5V_S5

RT9161

30

Line In

Codec

A-Link
4X4

AZALIA

3D3V_S0

PCIex1

Mini Card
Kedron

ALC888S

30

a/b/g/n

G957

33

28

South Bridge

30

BIOS

ETHERNET (10/100/1000Mb)

OP AMP

ATA 66/100

Line Out
(SPDIF)

WPC773

36

INPUTS

CHG_PWR
DCBATOUT

LPC I/F

Touch
Pad 37

PCI/PCI BRIDGE
11,12,13,14,15

SATA

MODEM
MDC Card
31

USB

Mini USB
Blue Tooth 24

HDD SATA
22

CardReader
Realtek
RTS5159
32
USB
4 Port

ODD SATA

Finger
Printer 31

23

18V
5V

Daughter Board
Finger Printer Board
08650

100mA

CPU DC/DC
ISL6265HR 45
INPUTS OUTPUTS
VCC_CORE_S0_0

MS/MS Pro/xD
/MMC/SD

0~1.55V

32

DCBATOUT

Daughter Board
Mini sensor Board
08696

18A

VCC_CORE_S0_1
0~1.55V

18A

VDDNB
0~1.55V

18A

25
UMA

Camera

Daughter Board
USB Board
08649

Daughter Board
LED Board
08651

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

BLOCK DIAGRAM
Size

A3
Date:
5

6.0A

UP+5V

INT.
KB 35

5 in 1

50

OUTPUTS

ACPI 1.1

30

MAX8731

DEBUG
CONN.36

35

1D2V_S5
(400mA)

CHARGER

LPC

MXIC
MX25L1605

KBC
Winbond

High Definition Audio

MAX978929

49

3D3V_S5

USB 2.0/1.1 ports

INT.SPKR

RJ11

49
1D5V_S0
(1A)

G9161

LPC BUS

AMD SB710

49
2D5V_S0
(200mA)

3D3V_S0

MIC In

30

1D1V_M92

8,9,10

INT MIC

INPUTS

RT8209B

53,54,55,56,57,58,59

AMD RS880M
CPU I/F

1D1V_S0(7.5A)

BOTTOM

57,58

M92XT

North Bridge

47
OUTPUTS

TPS51124

GND

16X

ICS9LPRS480BKLFT 71.09480.A03
RTM880N-796-VB-GRT 71.00880.A03

SYSTEM DC/DC

19

CLK GEN. 3

3D3V_S5(6A)

LCD

16X16

5V_S5(6A)
DCBATOUT

20

4,5,6,7

46
OUTPUTS

RT8205A
INPUTS

VCC

CRT

638-Pin uFCPGA638

667/800MHz

SYSTEM DC/DC

TOP

Document Number

JV71-TR

Monday, July 06, 2009

Rev

SB
Sheet
1

of

61

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

USB/PCIE Routing
Size

A3
Date:
5

Document Number

JV71-TR

Monday, July 06, 2009

Rev

SA
Sheet
1

of

61

3D3V_S0

3D3V_CLK_VDD

3D3V_S0

DY
3000mA.80ohm

3D3V_S0

Due to PLL issue on current clock chip, the SBlink clock


need to come from SRC clocks for RS740 and RS780.
Future clock chip revision will fix this.

C506
SC1U10V2KX-1GP

C511

1
2

3D3V_48MPW R_S0

2
2R3J-GP

SC4D7U6D3V3KX-GP

C504
SCD1U10V2KX-4GP

C492
SCD1U10V2KX-4GP

DY

C462
SCD1U10V2KX-4GP

C476
SCD1U10V2KX-4GP

C453
SCD1U10V2KX-4GP

C467
SCD1U10V2KX-4GP

DY C502
SCD1U10V2KX-4GP

C501
SC10U6D3V3MX-GP

C500
SC10U6D3V3MX-GP

R221

1 R215
2
0R0603-PAD

Clock chip has internal serial terminations


for differencial pairs, external resistors are
reserved for debug purpose.

1 R197
2
0R0603-PAD
1D1V_CLK_VDDIO

C508
SC27P50V2JN-2-GP

U20

VDDCPU
VDDCPU_IO

16
17
11

VDDSRC
VDDSRC_IO
VDDSRC_IO

35
34

VDDSB_SRC
VDDSB_SRC_IO

40
4
55
56
63

VDDSATA
VDD
VDDHTT
VDDREF
VDD48

51

PD#

11 CLK_PCIE_SB
11 CLK_PCIE_SB#
26 CLK_PCIE_LAN
26 CLK_PCIE_LAN#

LAN

9 CLK_NB_GPPSB
9 CLK_NB_GPPSB#

NB A-Link

2009/04/21 Pad to R By John


R209

DY
CLK_SRC0T_LPRS

2
0R2J-2-GP
2 R353
1
DY
1KR2F-3-GP

53 CLK_27M_SSIN
53 CLK_27M_M92

37
36
32
31

R352
1K2R2F-1-GP

54
53

9 CLK_NBHT_CLK
9 CLK_NBHT_CLK#

DY

CL=20pF0.2pF

ATIG0T_LPRS
ATIG0C_LPRS
ATIG1T_LPRS
ATIG1C_LPRS

30
29
28
27

CLKREQ0#
CLKREQ1#
CLKREQ2#
CLKREQ3#
CLKREQ4#

23
45
44
39
38

CPUKG0T_LPRS
CPUKG0C_LPRS
SRC0T_LPRS
SRC0C_LPRS
48MHZ_0
SRC1T_LPRS
SRC1C_LPRS
SRC2T_LPRS
REF0/SEL_HTT66
SRC2C_LPRS
REF1/SEL_SATA
SRC3T_LPRS
REF2/SEL_27
SRC3C_LPRS
SRC4T_LPRS
SRC4C_LPRS
SRC6T/SATAT_LPRS
GNDSATA
SRC6C/SATAC_LPRS
GNDATIG
SRC7T_LPRS/27MHZ_SS
GND
SRC7C_LPRS/27MHZ_NS
GNDHTT
GNDREF
GNDCPU
SB_SRC0T_LPRS
GND48
SB_SRC0C_LPRS
SB_SRC1T_LPRS
GNDSRC
SB_SRC1C_LPRS
GNDSRC

50
49

CLK_SRC0C_LPRS

2
3

CLK_SMBCLK 1 R214
CLK_SMBDAT 1 R213

HTT0T_LPRS/66M
HTT0C_LPRS/66M

C509

2
2

SMBC0_SB 12,16,17
SMBD0_SB 12,16,17

CLK_PCIE_PEG 52
CLK_PCIE_PEG# 52
CLK_NB_GFX 9
CLK_NB_GFX# 9
CLKREQ0#
CLKREQ2#
CLKREQ4#

CLK_48

59
58
57

REF0
REF1
REF2

TP153 TPAD14-GP
LAN_CLKREQ# 26
TP159 TPAD14-GP
W LAN_CLKREQ# 33
TP157 TPAD14-GP
CPU_CLK
CPU_CLK#

64

CLKREQ# Internal
pull Low
6
6

RN65

1
2

4
3

CLK48_USB 12
CLK48_5158E 32

SRN10J-7-GP
EC50

DY
43
24
7
52
60
46
1
10
18

GNDSB_SRC

33

GND

65

SC33P50V2JN-3GP

0R0402-PAD
0R0402-PAD

DY

EC49
SC22P50V2JN-4GP

33 CLK_PCIE_MINI1
33 CLK_PCIE_MINI1#

MINI1

X5

SC22P50V2JN-4GP

22
21
20
19
15
14
13
12
9
8
42
41
6
5

GEN_XTAL_IN
GEN_XTAL_OUT

1
2

VDD_REF
3D3V_48MPW R_S0

SMBCLK
SMBDAT

61
62

48
47

X1
X2

VDDATIG
VDDATIG_IO

26
25

XTAL-14D31818MHZ-5-GP

82.30005.B11
2ND = 82.30005.951

1D1V_CLK_VDDIO

PD#

SB A-Link

1
1

SCD1U10V2KX-4GP

1 R238
2
0R0603-PAD
C505
SC1U10V2KX-1GP

10MR2J-L-GP

3D3V_CLK_VDD

3D3V_CLK_VDD

DY

C495

C464
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C472

C461

C454

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C460

C459

R218

for TR

For SB710

3D3V_S0

3D3V_S5

3D3V_S0

2
33R2F-3-GP

CLK_SB_14M 11

PD#
RN70

R234

8
7
6
5

1
2
3
4

DY

75R2F-2-GP
RUNPW ROK_D

RUNPW ROK_D

DY

R228
10KR2J-3-GP

REF0
REF1
REF2

DY

R223
10KR2J-3-GP

DY

R224
10KR2J-3-GP

27MHz non-spreading singled clock on pin 5


and 27MHz spread clock on pin 6

0*

100MHz differential spreading SRC clock


REF0

SEL_SATA
REF1
SEL_HTT66
REF0

14M SE (3.3V)
NC

14M SE (1.8V)
NC

14M SE (1.1V)
vref

GFX_REFCLK

100M DIFF

100M DIFF

100M DIFF(IN/OUT)*

GPP_REFCLK

NC

100M DIFF

NC or 100M DIFF OUTPUT

GPPSB_REFCLK

100M DIFF

100M DIFF

100M DIFF

* RS780 can be used as clock buffer to output two PCIE referecence clocks
By deault, chip will configured as input mode, BIOS can program it to output mode.

100MHz non-spreading differential SATA clock

0*

100MHz differential spreading SRC clock

2
2

66MHz 3.3V single ended HTT clock

0*

100MHz differential HTT clock

DY

R225
10KR2J-3-GP

SEL_27
REF2

REFCLK_N

41

DY

100M DIFF
100M DIFF

W LAN_CLKREQ#

SRN10KJ-6-GP

R230
10KR2J-3-GP

100M DIFF
100M DIFF

REFCLK_P

R229
REF1

CPU_CLK(200MHz)

R232
150R2F-1-GP
1

CLK_NB_14M 9

1
R235
75R2F-2-GP

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

OSC_14M_NB
RS780M 1.1V 158R/90.9R

Title

CLKGEN_ICS9LPRS480
Size

Document Number

A3
Date:
5

RS780

NC

HT_REFCLKN

2ND = 71.00880.A03

DY

RX780

HT_REFCLKP

ICS9LPRS480BKLFT-GP

71.09480.A03

R231
10KR2J-3-GP

RS740
66M SE(SINGLE END)

NB HT

NB CLOCK INPUT TABLE


NB CLOCKS

Rev

SB

JV71-TR
Monday, July 06, 2009

Sheet
1

of

61

1D2V_S0

DY
2

DY

1.5Amp

C177
SC180P50V2JN-1GP

SC180P50V2JN-1GP

DY

C174

C703
SCD22U6D3V2KX-1GP

C707
SCD22U6D3V2KX-1GP

DY
2

C706
SC4D7U6D3V3MX-2GP

C704
SC4D7U6D3V3MX-2GP

SC4D7U6D3V3MX-2GP

Place close to socket


C705

ACPU1A

D1
D2
D3
D4

VLDT_A0
VLDT_A1
VLDT_A2
VLDT_A3

HT LINK

8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8

HT_NB_CPU_CAD_H0
HT_NB_CPU_CAD_L0
HT_NB_CPU_CAD_H1
HT_NB_CPU_CAD_L1
HT_NB_CPU_CAD_H2
HT_NB_CPU_CAD_L2
HT_NB_CPU_CAD_H3
HT_NB_CPU_CAD_L3
HT_NB_CPU_CAD_H4
HT_NB_CPU_CAD_L4
HT_NB_CPU_CAD_H5
HT_NB_CPU_CAD_L5
HT_NB_CPU_CAD_H6
HT_NB_CPU_CAD_L6
HT_NB_CPU_CAD_H7
HT_NB_CPU_CAD_L7
HT_NB_CPU_CAD_H8
HT_NB_CPU_CAD_L8
HT_NB_CPU_CAD_H9
HT_NB_CPU_CAD_L9
HT_NB_CPU_CAD_H10
HT_NB_CPU_CAD_L10
HT_NB_CPU_CAD_H11
HT_NB_CPU_CAD_L11
HT_NB_CPU_CAD_H12
HT_NB_CPU_CAD_L12
HT_NB_CPU_CAD_H13
HT_NB_CPU_CAD_L13
HT_NB_CPU_CAD_H14
HT_NB_CPU_CAD_L14
HT_NB_CPU_CAD_H15
HT_NB_CPU_CAD_L15

E3
E2
E1
F1
G3
G2
G1
H1
J1
K1
L3
L2
L1
M1
N3
N2
E5
F5
F3
F4
G5
H5
H3
H4
K3
K4
L5
M5
M3
M4
N5
P5

L0_CADIN_H0
L0_CADIN_L0
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H15
L0_CADIN_L15

8
8
8
8

HT_NB_CPU_CLK_H0
HT_NB_CPU_CLK_L0
HT_NB_CPU_CLK_H1
HT_NB_CPU_CLK_L1

J3
J2
J5
K5

L0_CLKIN_H0
L0_CLKIN_L0
L0_CLKIN_H1
L0_CLKIN_L1

HT_NB_CPU_CTL_H0
HT_NB_CPU_CTL_L0
HT_NB_CPU_CTL_H1
HT_NB_CPU_CTL_L1

N1
P1
P3
P4

8
8
8
8

L0_CTLIN_H0
L0_CTLIN_L0
L0_CTLIN_H1
L0_CTLIN_L1

VLDT_B0
VLDT_B1
VLDT_B2
VLDT_B3

AE2
AE3
AE4
AE5

L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15

AD1
AC1
AC2
AC3
AB1
AA1
AA2
AA3
W2
W3
V1
U1
U2
U3
T1
R1
AD4
AD3
AD5
AC5
AB4
AB3
AB5
AA5
Y5
W5
V4
V3
V5
U5
T4
T3

HT_CPU_NB_CAD_H0
HT_CPU_NB_CAD_L0
HT_CPU_NB_CAD_H1
HT_CPU_NB_CAD_L1
HT_CPU_NB_CAD_H2
HT_CPU_NB_CAD_L2
HT_CPU_NB_CAD_H3
HT_CPU_NB_CAD_L3
HT_CPU_NB_CAD_H4
HT_CPU_NB_CAD_L4
HT_CPU_NB_CAD_H5
HT_CPU_NB_CAD_L5
HT_CPU_NB_CAD_H6
HT_CPU_NB_CAD_L6
HT_CPU_NB_CAD_H7
HT_CPU_NB_CAD_L7
HT_CPU_NB_CAD_H8
HT_CPU_NB_CAD_L8
HT_CPU_NB_CAD_H9
HT_CPU_NB_CAD_L9
HT_CPU_NB_CAD_H10
HT_CPU_NB_CAD_L10
HT_CPU_NB_CAD_H11
HT_CPU_NB_CAD_L11
HT_CPU_NB_CAD_H12
HT_CPU_NB_CAD_L12
HT_CPU_NB_CAD_H13
HT_CPU_NB_CAD_L13
HT_CPU_NB_CAD_H14
HT_CPU_NB_CAD_L14
HT_CPU_NB_CAD_H15
HT_CPU_NB_CAD_L15

L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1

Y1
W1
Y4
Y3

HT_CPU_NB_CLK_H0 8
HT_CPU_NB_CLK_L0 8
HT_CPU_NB_CLK_H1 8
HT_CPU_NB_CLK_L1 8

L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1

R2
R3
T5
R5

HT_CPU_NB_CTL_H0
HT_CPU_NB_CTL_L0
HT_CPU_NB_CTL_H1
HT_CPU_NB_CTL_L1

8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8

8
8
8
8
8
8
8
8
8
8
8
8

8
8
8
8

SKT-CPU638P-GP-U2

62.10055.111

SKT-BGA638H176

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

CPU_HT_LINK I/F_(1/4)
Size

Document Number

A3
Date:
5

Rev

SA

JV71-TR
Monday, July 06, 2009

Sheet
1

of

61

ACPU1C
MEM:DATA

Place near to CPU


1

DY
2

1
2

1
2

1
2

1
2

1
2

C252
SC180P50V2JN-1GP

C251
SC180P50V2JN-1GP

C256
DY
SC180P50V2JN-1GP

0D9V_S3

C250
SC180P50V2JN-1GP

DY

C255
SC180P50V2JN-1GP

180P x 6
C249
SC180P50V2JN-1GP

DY

C254
SCD22U6D3V2KX-1GP

C258
SCD22U6D3V2KX-1GP

0.22u X 2
C263
SC4D7U6D3V3MX-2GP

DY

C737
SC4D7U6D3V3MX-2GP

SC4D7U6D3V3MX-2GP

SC4D7U6D3V3MX-2GP

DY

C736

C262

4.7u x 4

750 mA

CLOSE TO CPU
1D8V_S3

ACPU1B

MA0_ODT0
MA0_ODT1
MA1_ODT0
MA1_ODT1

16,18 MEM_MA0_CS#0
16,18 MEM_MA0_CS#1

T20
U19
U20
V20

MA0_CS_L0
MA0_CS_L1
MA1_CS_L0
MA1_CS_L1

16,18 MEM_MA_CKE0
16,18 MEM_MA_CKE1

J22
J20

MA_CKE0
MA_CKE1

MEMVREF

W17

1
2

TP106TPAD14-GP

MEM_RSVD_M2 1

TP112

RSVD_M2

B18

MB0_ODT0
MB0_ODT1
MB1_ODT0

W26
W23
Y26

MEM_MB0_ODT0 17,18
MEM_MB0_ODT1 17,18

MB0_CS_L0
MB0_CS_L1
MB1_CS_L0

V26
W25
U22

MEM_MB0_CS#0 17,18
MEM_MB0_CS#1 17,18

MB_CKE0
MB_CKE1

J25
H26

MEM_MB_CKE0 17,18
MEM_MB_CKE1 17,18

MEM_MB_CLK0_P
MEM_MB_CLK0_N
MEM_MB_CLK1_P
MEM_MB_CLK1_N

MEM_MA_CLK0_P
MEM_MA_CLK0_N
MEM_MA_CLK1_P
MEM_MA_CLK1_N

MA_CLK_H5
MA_CLK_L5
MA_CLK_H1
MA_CLK_L1
MA_CLK_H7
MA_CLK_L7
MA_CLK_H4
MA_CLK_L4

MB_CLK_H5
MB_CLK_L5
MB_CLK_H1
MB_CLK_L1
MB_CLK_H7
MB_CLK_L7
MB_CLK_H4
MB_CLK_L4

P22
R22
A17
A18
AF18
AF17
R26
R25

MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15

N21
M20
N22
M19
M22
L20
M24
L21
L19
K22
R21
L22
K20
V24
K24
K19

MA_ADD0
MA_ADD1
MA_ADD2
MA_ADD3
MA_ADD4
MA_ADD5
MA_ADD6
MA_ADD7
MA_ADD8
MA_ADD9
MA_ADD10
MA_ADD11
MA_ADD12
MA_ADD13
MA_ADD14
MA_ADD15

MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8
MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15

P24
N24
P26
N23
N26
L23
N25
L24
M26
K26
T26
L26
L25
W24
J23
J24

MEM_MB_ADD0 17,18
MEM_MB_ADD1 17,18
MEM_MB_ADD2 17,18
MEM_MB_ADD3 17,18
MEM_MB_ADD4 17,18
MEM_MB_ADD5 17,18
MEM_MB_ADD6 17,18
MEM_MB_ADD7 17,18
MEM_MB_ADD8 17,18
MEM_MB_ADD9 17,18
MEM_MB_ADD10 17,18
MEM_MB_ADD11 17,18
MEM_MB_ADD12 17,18
MEM_MB_ADD13 17,18
MEM_MB_ADD14 17,18
MEM_MB_ADD15 17,18

16,18 MEM_MA_BANK0
16,18 MEM_MA_BANK1
16,18 MEM_MA_BANK2

R20
R23
J21

MA_BANK0
MA_BANK1
MA_BANK2

MB_BANK0
MB_BANK1
MB_BANK2

R24
U26
J26

MEM_MB_BANK0 17,18
MEM_MB_BANK1 17,18
MEM_MB_BANK2 17,18

16,18 MEM_MA_RAS#
16,18 MEM_MA_CAS#
16,18 MEM_MA_W E#

R19
T22
T24

MA_RAS_L
MA_CAS_L
MA_WE_L

MB_RAS_L
MB_CAS_L
MB_WE_L

U25
U24
U23

MEM_MB_RAS# 17,18
MEM_MB_CAS# 17,18
MEM_MB_W E# 17,18

16,18
16,18
16,18
16,18
16,18
16,18
16,18
16,18
16,18
16,18
16,18
16,18
16,18
16,18
16,18
16,18

RN48

1
2

N19
N20
E16
F16
Y16
AA16
P19
P20

16
16
16
16

VREF_DDR_CLAW

C391

C388
SCD1U10V2KX-4GP

T19
V22
U21
V19

Y10 VTT_SENSE

SC1KP50V2KX-1GP

RSVD_M1

VTT_SENSE

4
3

SRN1KJ-7-GP

MEM_RSVD_M1

MEMZP
MEMZN

C397
SCD1U10V2KX-4GP

AF10
AE10
H16

16,18 MEM_MA0_ODT0
16,18 MEM_MA0_ODT1

MEMZP
MEMZN

MEM:CMD/CTRL/CLK VTT5
VTT6
VTT7
VTT8
VTT9

1D8V_S3

VTT1
VTT2
VTT3
VTT4

W10
AC10
AB10
AA10
A10

R381
39D2R2F-L-GP
1
2
1
2
R383
39D2R2F-L-GPTP111

D10
C10
B10
AD10

17
17
17
17

16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16

MEM_MA_DATA0
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA32
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
MEM_MA_DATA63

G12
F12
H14
G14
H11
H12
C13
E13
H15
E15
E17
H17
E14
F14
C17
G17
G18
C19
D22
E20
E18
F18
B22
C23
F20
F22
H24
J19
E21
E22
H20
H22
Y24
AB24
AB22
AA21
W22
W21
Y22
AA22
Y20
AA20
AA18
AB18
AB21
AD21
AD19
Y18
AD17
W16
W14
Y14
Y17
AB17
AB15
AD15
AB13
AD13
Y12
W11
AB14
AA14
AB12
AA12

MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63

16
16
16
16
16
16
16
16

MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7

E12
C15
E19
F24
AC24
Y19
AB16
Y13

MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7

16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16

MEM_MA_DQS0_P
MEM_MA_DQS0_N
MEM_MA_DQS1_P
MEM_MA_DQS1_N
MEM_MA_DQS2_P
MEM_MA_DQS2_N
MEM_MA_DQS3_P
MEM_MA_DQS3_N
MEM_MA_DQS4_P
MEM_MA_DQS4_N
MEM_MA_DQS5_P
MEM_MA_DQS5_N
MEM_MA_DQS6_P
MEM_MA_DQS6_N
MEM_MA_DQS7_P
MEM_MA_DQS7_N

G13
H13
G16
G15
C22
C21
G22
G21
AD23
AC23
AB19
AB20
Y15
W15
W12
W13

MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7

MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63

C11
A11
A14
B14
G11
E11
D12
A13
A15
A16
A19
A20
C14
D14
C18
D18
D20
A21
D24
C25
B20
C20
B24
C24
E23
E24
G25
G26
C26
D26
G23
G24
AA24
AA23
AD24
AE24
AA26
AA25
AD26
AE25
AC22
AD22
AE20
AF20
AF24
AF23
AC20
AD20
AD18
AE18
AC14
AD14
AF19
AC18
AF16
AF15
AF13
AC12
AB11
Y11
AE14
AF14
AF11
AD11

MEM_MB_DATA0 17
MEM_MB_DATA1 17
MEM_MB_DATA2 17
MEM_MB_DATA3 17
MEM_MB_DATA4 17
MEM_MB_DATA5 17
MEM_MB_DATA6 17
MEM_MB_DATA7 17
MEM_MB_DATA8 17
MEM_MB_DATA9 17
MEM_MB_DATA10 17
MEM_MB_DATA11 17
MEM_MB_DATA12 17
MEM_MB_DATA13 17
MEM_MB_DATA14 17
MEM_MB_DATA15 17
MEM_MB_DATA16 17
MEM_MB_DATA17 17
MEM_MB_DATA18 17
MEM_MB_DATA19 17
MEM_MB_DATA20 17
MEM_MB_DATA21 17
MEM_MB_DATA22 17
MEM_MB_DATA23 17
MEM_MB_DATA24 17
MEM_MB_DATA25 17
MEM_MB_DATA26 17
MEM_MB_DATA27 17
MEM_MB_DATA28 17
MEM_MB_DATA29 17
MEM_MB_DATA30 17
MEM_MB_DATA31 17
MEM_MB_DATA32 17
MEM_MB_DATA33 17
MEM_MB_DATA34 17
MEM_MB_DATA35 17
MEM_MB_DATA36 17
MEM_MB_DATA37 17
MEM_MB_DATA38 17
MEM_MB_DATA39 17
MEM_MB_DATA40 17
MEM_MB_DATA41 17
MEM_MB_DATA42 17
MEM_MB_DATA43 17
MEM_MB_DATA44 17
MEM_MB_DATA45 17
MEM_MB_DATA46 17
MEM_MB_DATA47 17
MEM_MB_DATA48 17
MEM_MB_DATA49 17
MEM_MB_DATA50 17
MEM_MB_DATA51 17
MEM_MB_DATA52 17
MEM_MB_DATA53 17
MEM_MB_DATA54 17
MEM_MB_DATA55 17
MEM_MB_DATA56 17
MEM_MB_DATA57 17
MEM_MB_DATA58 17
MEM_MB_DATA59 17
MEM_MB_DATA60 17
MEM_MB_DATA61 17
MEM_MB_DATA62 17
MEM_MB_DATA63 17

MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7

A12
B16
A22
E25
AB26
AE22
AC16
AD12

MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7

MB_DQS_H0
MB_DQS_L0
MB_DQS_H1
MB_DQS_L1
MB_DQS_H2
MB_DQS_L2
MB_DQS_H3
MB_DQS_L3
MB_DQS_H4
MB_DQS_L4
MB_DQS_H5
MB_DQS_L5
MB_DQS_H6
MB_DQS_L6
MB_DQS_H7
MB_DQS_L7

C12
B12
D16
C16
A24
A23
F26
E26
AC25
AC26
AF21
AF22
AE16
AD16
AF12
AE12

MEM_MB_DQS0_P
MEM_MB_DQS0_N
MEM_MB_DQS1_P
MEM_MB_DQS1_N
MEM_MB_DQS2_P
MEM_MB_DQS2_N
MEM_MB_DQS3_P
MEM_MB_DQS3_N
MEM_MB_DQS4_P
MEM_MB_DQS4_N
MEM_MB_DQS5_P
MEM_MB_DQS5_N
MEM_MB_DQS6_P
MEM_MB_DQS6_N
MEM_MB_DQS7_P
MEM_MB_DQS7_N

17
17
17
17
17
17
17
17

17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17

SKT-CPU638P-GP-U2
SKT-CPU638P-GP-U2

62.10055.111

62.10055.111

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

CPU_DDR_(2/4)
Size

Document Number

A3
Date:
5

Rev

SA

JV71-TR
Monday, July 06, 2009

Sheet
1

of

61

The Processor has


reached a preset
maximum operating
temperature. 100
I=Active HTC
O=FAN

8
7
6
5

1D8V_S0

2D5V_S0

1
C7341
C732
LDT_RST#_CPU
HDT_RST#

CPU_SIC

For HDT DBG

1
2
R74
0R0402-PAD

1D2V_S0

1D8V_S3

1 R616
2CPU_TEST25_H
510R2J-1-GP
1 R617
2CPU_TEST25_L
510R2J-1-GP

DY

TPAD14-GP
TPAD14-GP
TPAD14-GP

2CPU_TEST25_H
510R2J-1-GP

TP105
TP103

R615
TP104
TP97
TP94

1
1

TP95
TP187

CPU_TEST9

VDD1_FB_H
VDD1_FB_L

VDDNB_FB_H
VDDNB_FB_L

H6
G6

LDT_PW ROK_G

DY
LDT_PW ROK

DY

DBREQ_L
TDO

A3
A5
B3
B5
C1

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5

CPU_VDDIO_SUS_FB_H
CPU_VDDIO_SUS_FB_L

8
7
6
5
1
1

TP99
TP100

CPU_VDDNB_RUN_FB_H
CPU_VDDNB_RUN_FB_L

44
44

LAYOUT: Route FBCLKOUT_H/L


differentially impedance 80

E10 CPU_DBREQ#
AE9 CPU_TDO

CPU_TEST28_H 1
CPU_TEST28_L 1

TP92
TP98

TEST17
TEST16
TEST15
TEST14

D7
E7
F7
C7

CPU_TEST17
CPU_TEST16
CPU_TEST15
CPU_TEST14

TP89
TP90
TP91
TP88

TEST7
TEST10

C3
K8

CPU_TEST10

TEST8

C4

TEST29_H
TEST29_L

C9
C8

1
1
1
1

1D2V_S0

DY
R610
300R2J-4-GP

CPU_TEST29H
CPU_TEST29L

1
1

TP101
TP102
B

RSVD10
RSVD9
RSVD8
RSVD7
RSVD6

H18
H19
AA7
D5
C5

HDT Connectors

SKT-CPU638P-GP-U2

HDT1

62.10055.111

DY
CPU_DBREQ#
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST#
CPU_TDO

C205
SCD1U16V2ZY-2GP

Near CPU PIN


LDT_PW ROK

C723
SCD1U16V2ZY-2GP

B
THERMTRIP#

CPU_TEST22

R611
300R2J-4-GP

DY

1
2
1D8V_SUS_Q2

Q24
E
C
MMBT3904-4-GP

CPU_TEST19

R612
300R2J-4-GP

0R0402-PAD

CPU_TEST18

R613
300R2J-4-GP

DY

1D8V_S3

DY
1

R376
2K2R2J-2-GP

LDT_PW ROK

1 R375

CPU_PW RGD_SVID_REG

DY

4
6
8
10
12
14
16
18
20
22
24
26

SMC-CONN26A-FP

UMA

RSMRST# 34,35

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

CPU exceeds to 125


Title
Size

CPU_Control&Debug_(3/4)
Document Number

A3
Date:
4

3
5
7
9
11
13
15
17
19
21
23

HDT_RST#

84.T3904.C11
2ND = 84.03904.L06

PROCHOT#_SB 11

H_THERMDC
34
H_THERMDA
34
2
C213SC3300P50V2KX-1GP

J7
H8

TEST21
TEST20
TEST24
TEST22
TEST12
TEST27
TEST9
TEST6

1 R67
2
0R0402-PAD

TEST28_H
TEST28_L

TEST25_H
TEST25_L

C2
AA6

THERMTRIP#
PROCHOT#
CPU_MEMHOT#

B 2

1
2
3
4

R81

84.T3904.C11
2ND = 84.03904.L06

W9
Y9

E9
E8

44
44

internal pull high 300 ohm

VDDIO_FB_H
VDDIO_FB_L

1CPU_TEST25_H
1CPU_TEST25_L

AB8
AF7
AE7
AE8
AC8
AF8

AF6
AC7
AA8

VDD0_FB_H
VDD0_FB_L

TEST18
TEST19

CPU_SVC
CPU_SVD

CPU_DBREQ#

THERMTRIP_L
PROCHOT_L
MEMHOT_L

W7
W8

TEST23

CPU_TEST21
CPU_TEST20
CPU_TEST24
CPU_TEST22
CPU_TEST12
CPU_TEST27

A6
A4

THERMDC
THERMDA

H10
G9

R366
300R2J-4-GP

DY

RN84
SRN300J-1-GP

M11
W18

HT_REF0
HT_REF1

CPU_TEST18
CPU_TEST19

1 R77
2
0R0402-PAD

RN42
SRN300J-1-GP

Q8
C
E
MMBT3904-4-GP

SIC
SID
ALERT_L

AD7

DY 2K2R2J-2-GP

44 CPU_PW RGD_SVID_REG

8
7
6
5

1D8V_S3

DY

AF4
AF5
AE6

CPU_TEST23

CPU_TEST21
CPU_TEST20
1

SVC
SVD

RESET_L
PWROK
LDTSTOP_L
LDTREQ_L

DBRDY
TMS
TCK
TRST_L
TDI

RN87
SRN1KJ-7-GP

KEY1
KEY2

B7
A7
F10
C6

G10
AA9
AC9
AD9
AF9

1
2CPU_TEST25_L
510R2J-1-GP

R101
10KR2J-3-GP

CLKIN_H
CLKIN_L

R104 10R0402-PAD
2CPU_VDD1_RUN_FB_H_RY6
R105 10R0402-PAD
2CPU_VDD1_RUN_FB_L_R
AB6

TP93

3D3V_S0

A9
A8

44 CPU_VDD1_RUN_FB_H
44 CPU_VDD1_RUN_FB_L

R614

VDDA1
VDDA2

44 CPU_VDD0_RUN_FB_H
44 CPU_VDD0_RUN_FB_L

CPU_DBRDY
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI

ACPU1D

F8
F9

1
2
3
4

1 CPU_SIC
1 CPU_SID
1CPU_ALERT#

TP186
TP185
TP87

3
4

LDT_PW ROK
LDT_STP#_CPU
CPU_LDT_REQ#_CPU

1D8V_S3

for TR

CLKCPU_IN
CLKCPU#_IN

1D8V_S3

CPU_HTREF0 R6
1
2
R84 1
2 44D2R2F-GP CPU_HTREF1 P6
R83
44D2R2F-GP
R110 10R0402-PAD
2CPU_VDD0_RUN_FB_H_RF6
R108 10R0402-PAD
2CPU_VDD0_RUN_FB_L_R E6

DY
C

1
2
R386
169R2F-GP
2
2SC3900P50V2KX-2GP
SC3900P50V2KX-2GP

1D8V_S3

2
1

R364
390R2J-1-GP

CPU_CLK
CPU_CLK#

1
2

Cloce To CPU
3
3

DY

1D8V_S3

DY

C264

2
1

for TR

DY

SCD22U16V3ZY-GP

DY

C227 C752
SC10U10V5ZY-1GP

9 ALLOW _LDTSTOP

C745

SC3900P50V2KX-2GP

11 CPU_LDT_STOP#

C739

SC10U6D3V3MX-GP

11,51 CPU_PW RGD

2D5V_VDDA_S0

1 R401
2
0R0603-PAD

SC4D7U6D3V3MX-2GP

1 R78
2
LDT_RST#_CPU 9
0R0402-PAD
LDT_PW ROK
1 R86
2
0R0402-PAD
1 R79
2
LDT_STP#_CPU 9
0R0402-PAD
CPU_LDT_REQ#_CPU
1
2
R72
0R2J-2-GP

11,51 CPU_LDT_RST#

LYAOUT:ROUTE VDDA TRACE APPROX.


50mils WIDE(USE 2X25 mil TRACES TO
EXIT BALL FIELD) AND 500 mils LONG.

IF 0 ohm IS NOT GOOD ENOUGH, TRY 68.00082.491

1
2
3
4
D

C196
SC100P50V2JN-3GP

1DY

RN40
SRN300J-1-GP

Rev

SA

JV71-TR
Monday, July 06, 2009

Sheet
1

of

61

1
2

1
2

1
2

1
2

2
1

1
2

2
1
2

2
1

62.10055.111

DY

DY
SC4D7U6D3V3KX-GP

DY
SC4D7U6D3V3KX-GP

DY
SC4D7U6D3V3KX-GP

DY

SC4D7U6D3V3MX-2GP

DY

SCD22U6D3V2KX-1GP

DY

SCD22U6D3V2KX-1GP

SC10U6D3V5KX-1GP

C351 C362 C385 C379 C375 C365 C358 C361 C347 C363 C378

DY

DY

SC10U6D3V5KX-1GP

SCD22U6D3V2KX-1GP

SCD22U6D3V2KX-1GP

SC180P50V2JN-1GP

SC180P50V2JN-1GP

SC10U6D3V3MX-GP

DY

DY

SC10U6D3V3MX-GP

C398 C381 C356 C372 C349

3A for VDDIO
1D8V_S3
Place near to CPU

SCD22U6D3V2KX-1GP

SKT-CPU638P-GP-U2
C392

SC10U6D3V3MX-GP

Bottom Side Decoupling

DY

SCD22U6D3V2KX-1GP

3A for VDDIO
1D8V_S3

DY

SCD01U50V2KX-1GP

VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12

Y25
V25
V23
V21
V18
U17
T25
T23
T21
T18
R17
P25
P23
P21
P18

C193 C154 C308 C280 C253 C293 C312

SCD01U50V2KX-1GP

H25
J17
K18
K21
K23
K25
L17
M18
M21
M23
M25
N17

DY

VDDIO27
VDDIO26
VDDIO25
VDDIO24
VDDIO23
VDDIO22
VDDIO21
VDDIO20
VDDIO19
VDDIO18
VDDIO17
VDDIO16
VDDIO15
VDDIO14
VDDIO13

Bottom Side Decoupling

SC180P50V2JN-1GP

SC10U6D3V5KX-1GP

SC10U6D3V3MX-GP

VDDNB_1
VDDNB_2
VDDNB_3
VDDNB_4
VDDNB_5

P8
P10
R4
R7
R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
U15
V6
V8
V10
V12
V14
W4
Y2
AC4
AD2

SC10U6D3V5KX-1GP

C808

K16
M16
P16
T16
V16

VCC_CORE_S0_1

VDD1_1
VDD1_2
VDD1_3
VDD1_4
VDD1_5
VDD1_6
VDD1_7
VDD1_8
VDD1_9
VDD1_10
VDD1_11
VDD1_12
VDD1_13
VDD1_14
VDD1_15
VDD1_16
VDD1_17
VDD1_18
VDD1_19
VDD1_20
VDD1_21
VDD1_22
VDD1_23
VDD1_24
VDD1_25
VDD1_26

SCD22U6D3V2KX-1GP

C324

VDD0_1
VDD0_2
VDD0_3
VDD0_4
VDD0_5
VDD0_6
VDD0_7
VDD0_8
VDD0_9
VDD0_10
VDD0_11
VDD0_12
VDD0_13
VDD0_14
VDD0_15
VDD0_16
VDD0_17
VDD0_18
VDD0_19
VDD0_20
VDD0_21
VDD0_22
VDD0_23

SCD01U50V2KX-1GP

SC180P50V2JN-1GP

SCD01U50V2KX-1GP

SCD22U6D3V2KX-1GP

3A for VDDNB

add 0.1U
C316

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
VDDNB

DY

G4
H2
J9
J11
J13
J15
K6
K10
K12
K14
L4
L7
L9
L11
L13
L15
M2
M6
M8
M10
N7
N9
N11

SC180P50V2JN-1GP

DY

C286C295 C206 C244 C315


SC10U6D3V3MX-GP

C239 C281

SC10U6D3V3MX-GP

ACPU1E

Bottom Side Decoupling

SC10U6D3V3MX-GP

J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
AC6
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6

36A for VDD0&VDD1

VCC_CORE_S0_0

VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65

ACPU1F

AA4
AA11
AA13
AA15
AA17
AA19
AB2
AB7
AB9
AB23
AB25
AC11
AC13
AC15
AC17
AC19
AC21
AD6
AD8
AD25
AE11
AE13
AE15
AE17
AE19
AE21
AE23
B4
B6
B8
B9
B11
B13
B15
B17
B19
B21
B23
B25
D6
D8
D9
D11
D13
D15
D17
D19
D21
D23
D25
E4
F2
F11
F13
F15
F17
F19
F21
F23
F25
H7
H9
H21
H23
J4

SKT-CPU638P-GP-U2

62.10055.111

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

CPU_Power_(4/4)
Document Number

Rev

SA

JV71-TR
Monday, July 06, 2009

Sheet
1

of

61

ANB1A

HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
HT_TXCAD7N

D24
D25
E24
E25
F24
F25
F23
F22
H23
H22
J25
J24
K24
K25
K23
K22

HT_NB_CPU_CAD_H0
HT_NB_CPU_CAD_L0
HT_NB_CPU_CAD_H1
HT_NB_CPU_CAD_L1
HT_NB_CPU_CAD_H2
HT_NB_CPU_CAD_L2
HT_NB_CPU_CAD_H3
HT_NB_CPU_CAD_L3
HT_NB_CPU_CAD_H4
HT_NB_CPU_CAD_L4
HT_NB_CPU_CAD_H5
HT_NB_CPU_CAD_L5
HT_NB_CPU_CAD_H6
HT_NB_CPU_CAD_L6
HT_NB_CPU_CAD_H7
HT_NB_CPU_CAD_L7

4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4

HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N

F21
G21
G20
H21
J20
J21
J18
K17
L19
J19
M19
L18
M21
P21
P18
M18

HT_NB_CPU_CAD_H8
HT_NB_CPU_CAD_L8
HT_NB_CPU_CAD_H9
HT_NB_CPU_CAD_L9
HT_NB_CPU_CAD_H10
HT_NB_CPU_CAD_L10
HT_NB_CPU_CAD_H11
HT_NB_CPU_CAD_L11
HT_NB_CPU_CAD_H12
HT_NB_CPU_CAD_L12
HT_NB_CPU_CAD_H13
HT_NB_CPU_CAD_L13
HT_NB_CPU_CAD_H14
HT_NB_CPU_CAD_L14
HT_NB_CPU_CAD_H15
HT_NB_CPU_CAD_L15

4
4
4
4

HT_TXCLK0P
HT_TXCLK0N
HT_TXCLK1P
HT_TXCLK1N

H24
H25
L21
L20

HT_NB_CPU_CLK_H0 4
HT_NB_CPU_CLK_L0 4
HT_NB_CPU_CLK_H1 4
HT_NB_CPU_CLK_L1 4

HT_RXCTL0P
HT_RXCTL0N
HT_RXCTL1P
HT_RXCTL1N

HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N

M24
M25
P19
R18

HT_NB_CPU_CTL_H0
HT_NB_CPU_CTL_L0
HT_NB_CPU_CTL_H1
HT_NB_CPU_CTL_L1

HT_RXCALP
HT_RXCALN

HT_TXCALP
HT_TXCALN

B24
B25

GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N

A5
B5
A4
B4
C3
B2
D1
D2
E2
E1
F4
F3
F1
F2
H4
H3
H1
H2
J2
J1
K4
K3
K1
K2
M4
M3
M1
M2
N2
N1
P1
P2

GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N

AC1
AC2
AB4
AB3
AA2
AA1
Y1
Y2
Y4
Y3
V1
V2

SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N

AD7
AE7
AE6
AD6
AB6
AC6
AD5
AE5

PCE_CALRP
PCE_CALRN

AC8
AB8

HT_CPU_NB_CAD_H0
HT_CPU_NB_CAD_L0
HT_CPU_NB_CAD_H1
HT_CPU_NB_CAD_L1
HT_CPU_NB_CAD_H2
HT_CPU_NB_CAD_L2
HT_CPU_NB_CAD_H3
HT_CPU_NB_CAD_L3
HT_CPU_NB_CAD_H4
HT_CPU_NB_CAD_L4
HT_CPU_NB_CAD_H5
HT_CPU_NB_CAD_L5
HT_CPU_NB_CAD_H6
HT_CPU_NB_CAD_L6
HT_CPU_NB_CAD_H7
HT_CPU_NB_CAD_L7

4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4

HT_CPU_NB_CAD_H8
HT_CPU_NB_CAD_L8
HT_CPU_NB_CAD_H9
HT_CPU_NB_CAD_L9
HT_CPU_NB_CAD_H10
HT_CPU_NB_CAD_L10
HT_CPU_NB_CAD_H11
HT_CPU_NB_CAD_L11
HT_CPU_NB_CAD_H12
HT_CPU_NB_CAD_L12
HT_CPU_NB_CAD_H13
HT_CPU_NB_CAD_L13
HT_CPU_NB_CAD_H14
HT_CPU_NB_CAD_L14
HT_CPU_NB_CAD_H15
HT_CPU_NB_CAD_L15

AC24
AC25
AB25
AB24
AA24
AA25
Y22
Y23
W21
W20
V21
V20
U20
U21
U19
U18

HT_RXCAD8P
HT_RXCAD8N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD15P
HT_RXCAD15N

4
4
4
4

HT_CPU_NB_CLK_H0
HT_CPU_NB_CLK_L0
HT_CPU_NB_CLK_H1
HT_CPU_NB_CLK_L1

T22
T23
AB23
AA22

HT_RXCLK0P
HT_RXCLK0N
HT_RXCLK1P
HT_RXCLK1N

4
4
4
4

HT_CPU_NB_CTL_H0
HT_CPU_NB_CTL_L0
HT_CPU_NB_CTL_H1
HT_CPU_NB_CTL_L1

M22
M23
R21
R20
C23
A24

2 R344
301R2F-GP

HT_RXCALP
HT_RXCALN

Place < 100mils from pin C23 and A24

HT_RXCAD0P
HT_RXCAD0N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD7P
HT_RXCAD7N

PART 1 OF 6

HYPER TRANSPORT CPU I/F

Y25
Y24
V22
V23
V25
V24
U24
U25
T25
T24
P22
P23
P25
P24
N24
N25

4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4

HT_TXCALP
HT_TXCALN

4
4
4
4

4
4
4
4
4
4
4
4
4
4
4
4

RS780 SYMBOL
C

Placement: close RS780


2 R343
301R2F-GP

Place < 100mils from pin B25 and B24

RS780M-GP-U2

Placement: close RS780


ANB1B

52 PEG_RXP[15..0]

26
26
33
33

LAN
MINICARD1

TPAD14-GP
TPAD14-GP

A-LINK

11
11
11
11
11
11
11
11

D4
C4
A3
B3
C2
C1
E5
F5
G5
G6
H5
H6
J6
J5
J7
J8
L5
L6
M8
L8
P7
M7
P5
M5
R8
P8
R6
R5
P4
P3
T4
T3

GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N

GPP_RX5P
GPP_RX5N

AE3
AD4
AE2
AD3
AD1
AD2
V5
W6
U5
U6
U8
U7

GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
GPP_RX4P
GPP_RX4N
GPP_RX5P
GPP_RX5N

AA8
Y8
AA7
Y7
AA5
AA6
W5
Y5

SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N

PCIE_RXP1
PCIE_RXN1
PCIE_RXP2
PCIE_RXN2

TP21
TP20

ALINK_NBRX_SBTX_P0
ALINK_NBRX_SBTX_N0
ALINK_NBRX_SBTX_P1
ALINK_NBRX_SBTX_N1
ALINK_NBRX_SBTX_P2
ALINK_NBRX_SBTX_N2
ALINK_NBRX_SBTX_P3
ALINK_NBRX_SBTX_N3

PART 2 OF 6

PCIE I/F GFX

52 PEG_RXN[15..0]

PEG_RXP0
PEG_RXN0
PEG_RXP1
PEG_RXN1
PEG_RXP2
PEG_RXN2
PEG_RXP3
PEG_RXN3
PEG_RXP4
PEG_RXN4
PEG_RXP5
PEG_RXN5
PEG_RXP6
PEG_RXN6
PEG_RXP7
PEG_RXN7
PEG_RXP8
PEG_RXN8
PEG_RXP9
PEG_RXN9
PEG_RXP10
PEG_RXN10
PEG_RXP11
PEG_RXN11
PEG_RXP12
PEG_RXN12
PEG_RXP13
PEG_RXN13
PEG_RXP14
PEG_RXN14
PEG_RXP15
PEG_RXN15

PCIE I/F GPP

PCIE I/F SB

RS780M-GP-U2

GTXP0
GTXN0
GTXP1
GTXN1
GTXP2
GTXN2
GTXP3
GTXN3
GTXP4
GTXN4
GTXP5
GTXN5
GTXP6
GTXN6
GTXP7
GTXN7
GTXP8
GTXN8
GTXP9
GTXN9
GTXP10
GTXN10
GTXP11
GTXN11
GTXP12
GTXN12
GTXP13
GTXN13
GTXP14
GTXN14
GTXP15
GTXN15

DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

TXP0
TXN0
TXP1
TXN1

2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2

C617
C616
C592
C593
C614
C615
C591
C590
C613
C612
C589
C588
C611
C610
C587
C586
C609
C608
C585
C584
C607
C606
C583
C582
C605
C604
C581
C580
C602
C603
C579
C578

C621
C622
C597
C596

1
1
1
1

SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP

2
2
2
2

SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP

GPP_TX5P
GPP_TX5N

TP16
TP17

ALINK_NBTX_SBRX_P0
ALINK_NBTX_SBRX_N0
ALINK_NBTX_SBRX_P1
ALINK_NBTX_SBRX_N1
ALINK_NBTX_SBRX_P2
ALINK_NBTX_SBRX_N2
ALINK_NBTX_SBRX_P3
ALINK_NBTX_SBRX_N3
PCE_PCAL
PCE_NCAL

C642
C640
C632
C637
C627
C629
C624
C625

1
R315 1
R16

1
1
1
1
1
1
1
1

PEG_TXP0
PEG_TXN0
PEG_TXP1
PEG_TXN1
PEG_TXP2
PEG_TXN2
PEG_TXP3
PEG_TXN3
PEG_TXP4
PEG_TXN4
PEG_TXP5
PEG_TXN5
PEG_TXP6
PEG_TXN6
PEG_TXP7
PEG_TXN7
PEG_TXP8
PEG_TXN8
PEG_TXP9
PEG_TXN9
PEG_TXP10
PEG_TXN10
PEG_TXP11
PEG_TXN11
PEG_TXP12
PEG_TXN12
PEG_TXP13
PEG_TXN13
PEG_TXP14
PEG_TXN14
PEG_TXP15
PEG_TXN15

2
2
2
2
2
2
2
2

RS780M Display Port Support(muxed on GFX)


DP0 GFX_TX0,TX1,TX2,TX3,AUX0,HPD0
DP1 GFX_TX4,TX5,TX6,TX7,AUX1,HPD1
GTXP0
GTXN0
GTXP1
GTXN1
GTXP2
GTXN2
GTXP3
GTXN3

for TR

PCIE_TXP1
PCIE_TXN1
PCIE_TXP2
PCIE_TXN2

UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA

ALINK_NBTX_C_SBRX_P0
ALINK_NBTX_C_SBRX_N0
ALINK_NBTX_C_SBRX_P1
ALINK_NBTX_C_SBRX_N1
ALINK_NBTX_C_SBRX_P2
ALINK_NBTX_C_SBRX_N2
ALINK_NBTX_C_SBRX_P3
ALINK_NBTX_C_SBRX_N3

11
11
11
11
11
11
11
11

2
2
2
2
2
2
2
2

SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP

HDMI_DATA2+ 21
HDMI_DATA2- 21
HDMI_DATA1+ 21
HDMI_DATA1- 21
HDMI_DATA0+ 21
HDMI_DATA0- 21
HDMI_CLK+ 21
HDMI_CLK- 21

UMA

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3

Wistron Corporation

1D1V_S0

Place < 100mils from pin AC8 and AB8


3

1
1
1
1
1
1
1
1

LAN
MINICARD1

26
26
33
33

Date:
5

C30
C29
C27
C26
C25
C22
C21
C19

TPAD14-GP
TPAD14-GP

SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP

2
2 1K27R2F-L-GP
2KR2F-3-GP

PEG_TXP[15..0] 52
PEG_TXN[15..0] 52

ATi-RS880M_HT LINK&PCIe(1/3)
Document Number

Rev

SA

JV71-TR
Monday, July 06, 2009

Sheet
1

of

61

2
2
1D8V_S0

68.00119.111

SUS_STAT#

C89
SCD1U10V2KX-4GP

Selects Loading of STRAPS From EEPROM


the loading of EEPROM straps and use Hardware Default Values
*10 :: Bypass
I2C Master can load strap values from EEPROM if connected,
or use default values if not connected

220ohm 200mA

ANB1C

20

for TR

GMCH_BLUE

RED
REDb
GREEN
GREENb
BLUE
BLUEb

A11
B11
F8
E8

DAC_HSYNC
DAC_VSYNC
DAC_SCL
DAC_SDA

220ohm 200mA
C644
SC1U10V2KX-1GP

RN11

1
2

ENABLE External CLK GEN

4
3

SYSRESET#
POWERGOOD
LDTSTOP#
ALLOW_LDTSTOP

3 CLK_NBHT_CLK
3 CLK_NBHT_CLK#

C25
C24

HT_REFCLKP
HT_REFCLKN

CLK_NB_14M

E11
F11

REFCLK_P/OSCIN
REFCLK_N

3 CLK_NB_GFX
3 CLK_NB_GFX#
TP180
TP181

TPAD14-GP
TPAD14-GP
21 GMCH_HDMI_CLK
21 GMCH_HDMI_DATA

T2
T1

GFX_REFCLKP
GFX_REFCLKN

CLK_NBGPP_CLK
CLK_NBGPP_CLK#

U1
U2

GPP_REFCLKP
GPP_REFCLKN

DDC_DATA0/AUX0N
DDC_CLK0/AUX0P
GMCH_HDMI_CLK
GMCH_HDMI_DATA

C42

STRP_DATA

DY SCD1U10V2KX-4GP

V4
V3

GPPSB_REFCLKP
GPPSB_REFCLKN

B9
A9
B8
A8
B7
A7

I2C_CLK
I2C_DATA
DDC_CLK0/AUX0P
DDC_DATA0/AUX0N
DDC_CLK1/AUX1P
DDC_DATA1/AUX1N

VCC_NB

*1

B10

STRP_DATA
RESERVED

RS780_AUX_CAL

1.1V 1.0V

19
19
19
19
19
19

TXCLK_LP
TXCLK_LN
TXCLK_UP
TXCLK_UN

B16
A16
D16
D17

GMCH_TXACLK+
GMCH_TXACLKGMCH_TXBCLK+
GMCH_TXBCLK-

VDDLTP18
VSSLTP18

A13
B13

19
19
19
19

1D8V_S0

VDDLT18_1
VDDLT18_2
VDDLT33_1
VDDLT33_2

A15
B15
A14
B14

VSSLT1
VSSLT2
VSSLT3
VSSLT4
VSSLT5
VSSLT6
VSSLT7

C14
D15
C16
C18
C20
E20
C22

LVDS_DIGON
LVDS_BLON
LVDS_ENA_BL

1D8V_S0_VDDLP18
C649
SC1U10V2KX-1GP

1
2
SBK160808T-221Y-N-GP

68.00119.111

DY

1D8V_S0_VDDLT18
C652

C648
SCD1U10V2KX-4GP
L35
1
2
PBY201209T-221Y-N-GP

68.00206.121
DY C653
SCD1U10V2KX-4GP

E9
GMCH_BL_ON
F7
G12 LVDS_ENA_BL

GMCH_LCDVDD_ON
GMCH_BL_ON 35
TP26 TPAD14-GP

19

RN10

1
2
3
4

TMDS_HPD
HPD

D9
D10

NB_DVI_HPD

SUS_STAT#

D12

SUS_STAT#

THERMALDIODE_P
THERMALDIODE_N

AE8
AD8

MIS.
DDC_DATA0/AUX0N
DDC_CLK0/AUX0P

8
7
6
5

UMA

TESTMODE

HDMI_DETECT# 21
TP24 TPAD14-GP

2
R29
RS780_DXP3_1
RS780_DXN3_1

C8

1
10KR2J-3-GP

3D3V_S0
TP23
TP22

TPAD14-GP
TPAD14-GP

D13 TESTMODE_NB

AUX_CAL

R347
1K8R2F-GP

STRP_DATA

GMCH_TXBOUT0+
GMCH_TXBOUT0GMCH_TXBOUT1+
GMCH_TXBOUT1GMCH_TXBOUT2+
GMCH_TXBOUT2-

SRN4K7J-10-GP

G11

GPIO MODE

1
2

TP188
TP239

VDDA18HTPLL

CLK_NB_GFX
CLK_NB_GFX#

3 CLK_NB_GPPSB
3 CLK_NB_GPPSB#
19 CLK_DDC_EDID
19 DAT_DDC_EDID

C41
SC1U10V2KX-1GP

NB_REFCLK_N

B18
A18
A17
B17
D20
D21
D18
D19

1
2

D8
A10
C10
C12

C97
SCD1U10V2KX-4GP

VDDA18PCIEPLL

SBK160808T-221Y-N-GP

SYSREST#
NB_PW RGD
NB_LDT_STOP#
NB_ALLOW _LDTSTOP

TPAD14-GP
TPAD14-GP

68.00119.111
2

VDDA18PCIEPLL1
VDDA18PCIEPLL2

SCD1U10V2KX-4GP
11 NB_ALLOW _LDTSTOP

1D1V_S0

L1

220ohm 200mA

D7
E7

12,41 NB_PW RGD

SRN1KJ-7-GP

C86 DY
SC1U10V2KX-1GP

H17

DY

C77

C82
SC47U6D3V5MX-1-GP

DY

C78
SC1U10V2KX-1GP

SBK160808T-221Y-N-GP

2009/05/26 SB Change

VDDA18HTPLL

220ohm 200mA

1D8V_S0

2R3J-GP

L5

PLLVDD
PLLVDD18
PLLVSS

VDDA18PCIEPLL

DY

68.00119.111

DAC_RSET

A12
D14
B12

VDDA18HTPLL

TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N

SC4D7U6D3V3MX-2GP

ST100U6D3VBML1GP

1D8V_S0

G14

L4

220ohm 200mA
TC1

C643
SCD1U10V2KX-4GP

1D8V_S0

for TR
80.10715.L04
2ND = 77.C1071.081
3RD = 77.21071.09L

1D8V_S0_PLVDD18

68.00119.111

DY

R33 2DAC_RSET
1
715R2F-GP

1D1V_S0_PLLVDD

PLL PWR
LVTM

SBK160808T-221Y-N-GP

19
19
19
19
19
19

L34

CLOCKs PM

L33

1D1V_S0

6 ALLOW _LDTSTOP

R14 2
NB_LDT_STOP#
1
0R0402-PAD
R24
1
2 NB_ALLOW _LDTSTOP
0R2J-2-GP

6 LDT_STP#_CPU

20 GMCH_HSYNC
20 GMCH_VSYNC
20 GMCH_DDCCLK
20 GMCH_DDCDATA

R609
1KR2F-3-GP

2009/04/22 R609 Change to 1K By John


2

GMCH_TXAOUT0+
GMCH_TXAOUT0GMCH_TXAOUT1+
GMCH_TXAOUT1GMCH_TXAOUT2+
GMCH_TXAOUT2-

20 GMCH_GREEN
1D8V_S0

G18
G17
E18
F18
E19
F19

A22
B22
A21
B21
B20
A20
A19
B19

GMCH_RED

C_Pr
Y
COMP_Pb

TXOUT_L0P
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N

20

E17
F17
F15

PART 3 OF 6

1D8V_S0_AVDDQ

77.C1071.081

AVDD1
AVDD2
AVDDDI
AVSSDI
AVDDQ
AVSSQ

DY

F12
E12
F14
G15
H15
H14

1
2

R38
140R2F-GP

150R2F-1-GP

150R2F-1-GP

GMCH_RED
R37

C99
SCD1U10V2KX-4GP

GMCH_GREEN

ST100U6D3VBM-5GP

GMCH_BLUE

R36

TC2

2
R43
SBK160808T-221Y-N-GP
C80
SC1U10V2KX-1GP

Close to NB ball

0 : Enable

1D8V_S0

:Disable

1D8V_S0_AVDDDI

GMCH_VSYNC
GMCH_HSYNC

R41 2
1
0R0603-PAD
C88
SC1U10V2KX-1GP

C37
SC220P50V2KX-3GP

*1

CRT/TVOUT

SYSREST#

2
0R2J-2-GP

*1

R562
3K3R2J-3-GP

RS780: Enables Side port memory ( RS780 use HSYNC#)

DY

Enables the Test Debug Bus using GPIO.(PIN: RS780M--> VSYNC#)


:Disable
0 : Enable

1
1

1
2

R563
3K3R2J-3-GP

0R2J-2-GP

1
R17

11,26,35 PLT_RST1#

C71
SC1U10V2KX-1GP

68.00119.111

STRAP_DEBUG_BUS_GPIO_ENABLEb

3D3V_S0_AVDD
C70
DYSCD1U10V2KX-4GP

6 LDT_RST#_CPU

3D3V_S0

220ohm 200mA

R21
1

L3

1
2
SBK160808T-221Y-N-GP

3D3V_S0

NB_PW RGD

Reserve for DY
EC962
EMI
SC1KP50V2KX-1GP
0408

R294
150R2F-1-GP

RS780 SYMBOL

RS780M-GP-U2

3D3V_S0

R19

UMA

DY 2K2R2J-2-GP

RN64
STRP_DATA

35,53 BLON_IN
19,53 BRIGHTNESS_AMD

1
2

4
3

Wistron Corporation

LVDS_ENA_BL
GMCH_BL_ON

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

SRN0J-10-GP-U

for TR

Title

UMA

Size
A3
Date:
5

ATi-RS880M_LVDS&CRT_(2/3)

Document Number

Rev

SA

JV71-TR
Monday, July 06, 2009

Sheet
1

of

61

ANB1F

1
2

C46

C85

C76

DY

C79

DY

C60

1
2

C90

1
2

1
2

C74

DY

1 R316
2
0R0603-PAD

3D3V_S0

C66
SCD1U10V2KX-4GP

1 R30
2
0R0603-PAD
1

+3.3V_RUN_VDD33

DY

VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27

L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11

VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34

PART 6/6

VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10

A2
B1
D3
D5
E4
G1
G2
G4
H7
J4
R7
L1
L2
L4
L7
M6
N4
P6
R1
R2
R4
V7
U4
V8
V6
W1
W2
W4
W7
W8
Y6
AA4
AB5
AB1
AB7
AC3
AC4
AE1
AE4
AB2

AE14
D11
G8
E14
E15
J15
J12
K14
M11
L15

RS780M-GP-U2

C65
SCD1U10V2KX-4GP

AE10
AA11
Y11
AD10
AB10
AC10

2
2

1
2

VDD_MEM

1
2

2
1
2

1
2
1

1
1
2

POWER

1
2

1
2

1
2
1
2

C36

SC10U6D3V3MX-GP

C52

DY

SC10U6D3V3MX-GP

1D1V_S0

SCD1U10V2KX-4GP

VDD33_1
VDD33_2

+NB_VCORE

RS780M: 1V ~ 1.1V, check PWR team

K12
J14
U16
J11
K15
M12
L14
L11
M13
M15
N12
N14
P11
P13
P14
R12
R15
T11
T15
U12
T14
J16

H11
H12

SC4D7U6D3V3MX-2GP

Per check list (Rev 0.02)

RS780M-GP-U2

SC1U10V2KX-1GP

DY

C651

VDD18_1
VDD18_2
VDD18_MEM1
VDD18_MEM2

C40

10A per ANT Rev1.1, Page3

SCD1U10V2KX-4GP

F9
G9
AE11
AD11

+1.8V_RUN_VDD18_MEM

VDD_MEM1
VDD_MEM2
VDD_MEM3
VDD_MEM4
VDD_MEM5
VDD_MEM6

C68

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY

1103

C55

DY

SC1U10V2KX-1GP

C47

C49

SCD1U10V2KX-4GP

C61

SCD1U10V2KX-4GP

SC1U10V2KX-1GP

1 R320
2
0R0603-PAD

DY

C83

DY

SC1U10V2KX-1GP

C57

VDDA18PCIE_1
VDDA18PCIE_2
VDDA18PCIE_3
VDDA18PCIE_4
VDDA18PCIE_5
VDDA18PCIE_6
VDDA18PCIE_7
VDDA18PCIE_8
VDDA18PCIE_9
VDDA18PCIE_10
VDDA18PCIE_11
VDDA18PCIE_12
VDDA18PCIE_13
VDDA18PCIE_14
VDDA18PCIE_15

VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22

300mil Width

A6
B6
C6
D6
E6
F6
G7
H8
J9
K9
M9
L9
P9
R9
T9
V9
U9

SCD1U10V2KX-4GP

J10
P10
K10
M10
L10
W9
H9
T10
R10
Y9
AA9
AB9
AD9
AE9
U10

VDDHTTX_1
VDDHTTX_2
VDDHTTX_3
VDDHTTX_4
VDDHTTX_5
VDDHTTX_6
VDDHTTX_7
VDDHTTX_8
VDDHTTX_9
VDDHTTX_10
VDDHTTX_11
VDDHTTX_12
VDDHTTX_13

VDDPCIE_1
VDDPCIE_2
VDDPCIE_3
VDDPCIE_4
VDDPCIE_5
VDDPCIE_6
VDDPCIE_7
VDDPCIE_8
VDDPCIE_9
VDDPCIE_10
VDDPCIE_11
VDDPCIE_12
VDDPCIE_13
VDDPCIE_14
VDDPCIE_15
VDDPCIE_16
VDDPCIE_17

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C53

VDDHTRX_1
VDDHTRX_2
VDDHTRX_3
VDDHTRX_4
VDDHTRX_5
VDDHTRX_6
VDDHTRX_7

AE25
AD24
AC23
AB22
AA21
Y20
W19
V18
U17
T17
R17
P17
M17

C101

DY

H18
G19
F20
E21
D22
B23
A23

PART 5/6

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY

+1.8V_RUN_VDDA18PCIE
SCD1U10V2KX-4GP

C59

C62
SCD1U10V2KX-4GP

DY

SC4D7U6D3V3MX-2GP

1D8V_S0

DY

80mil Width
C63

SC4D7U6D3V3KX-GP

220 ohm @ 100MHz,2A

SCD1U10V2KX-4GP

1
2
PBY201209T-221Y-N-GP

C111

SCD1U10V2KX-4GP

L2

C673

DY

+1.2V_RUN_VDDHTTX
C104
C95
SCD1U10V2KX-4GP

1D8V_S0
C

SC4D7U6D3V3MX-2GP

220 ohm @ 100MHz,2A

SCD1U10V2KX-4GP

SC4D7U6D3V3MX-2GP

1D2V_S0

+1.1V_RUN_VDDHTRX
C674
C106
C102

C677

VDDHT_1
VDDHT_2
VDDHT_3
VDDHT_4
VDDHT_5
VDDHT_6
VDDHT_7

SCD1U10V2KX-4GP

1
2
PBY201209T-221Y-N-GP

220 ohm @ 100MHz,2A

J17
K16
L16
M16
P16
R16
T16

SCD1U10V2KX-4GP

0.45A per ANT Rev1.1, Page3

L40

L38
1
2
PBY201209T-221Y-N-GP

DY

1D1V_S0

ANB1E
SCD1U10V2KX-4GP

1D1V_S0

DY

+1.1V_RUN_VDDHT
C659
C94
SCD1U10V2KX-4GP

C91

SCD1U10V2KX-4GP

SC4D7U6D3V3MX-2GP

220 ohm @ 100MHz,2A

C655

L36
1
2
PBY201209T-221Y-N-GP

A25
D23
E22
G22
G24
G25
H19
J22
L17
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25

GROUND

0.6A per ANT Rev1.1, Page3

1D1V_S0

RS780 SYMBOL

ANB1D
B

MEM_A0
MEM_A1
MEM_A2
MEM_A3
MEM_A4
MEM_A5
MEM_A6
MEM_A7
MEM_A8
MEM_A9
MEM_A10
MEM_A11
MEM_A12
MEM_A13

AD16
AE17
AD17

MEM_BA0
MEM_BA1
MEM_BA2

W12
Y12
AD18
AB13
AB18
V14

MEM_RAS#
MEM_CAS#
MEM_WE#
MEM_CS#
MEM_CKE
MEM_ODT

V15
W14

MEM_CKP
MEM_CKN

AE12
AD12

SBD_MEM/DVO_I/F

PAR 4 OF 6
AB12
AE16
V11
AE15
AA12
AB16
AB14
AD14
AD13
AD15
AC16
AE13
AC14
Y14

MEM_DQ0/DVO_VSYNC
MEM_DQ1/DVO_HSYNC
MEM_DQ2/DVO_DE
MEM_DQ3/DVO_D0
MEM_DQ4
MEM_DQ5/DVO_D1
MEM_DQ6/DVO_D2
MEM_DQ7/DVO_D4
MEM_DQ8/DVO_D3
MEM_DQ9/DVO_D5
MEM_DQ10/DVO_D6
MEM_DQ11/DVO_D7
MEM_DQ12
MEM_DQ13/DVO_D9
MEM_DQ14/DVO_D10
MEM_DQ15/DVO_D11

AA18
AA20
AA19
Y19
V17
AA17
AA15
Y15
AC20
AD19
AE22
AC18
AB20
AD22
AC22
AD21

MEM_DQS0P/DVO_IDCKP
MEM_DQS0N/DVO_IDCKN
MEM_DQS1P
MEM_DQS1N

Y17
W18
AD20
AE21

MEM_DM0
MEM_DM1/DVO_D8

W17
AE19

IOPLLVDD18
IOPLLVDD

AE23
AE24

IOPLLVSS

AD23

MEM_VREF

AE18

MEM_COMPP
MEM_COMPN

MEM_COMP_P and MEM_COMP_N trace


width >=10mils and 10mils spacing from
other Signals in X,Y,Z directions
1D8V_S0

1 R339
2
0R0402-PAD

+1.8V_IOPLLVDD18

1D1V_S0

1 R341
2
0R0402-PAD

+1.1V_IOPLLVDD
UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

RS780M-GP-U2
Title

ATi-RS880M_Side Port&PWR&GND(3/3)

Size
A3
Date:
5

Document Number

Rev

SA

JV71-TR
Monday, July 06, 2009

Sheet
1

10

of

61

for TR

For SB710
1
R162

DY

2
10MR2J-L-GP

2
1
C424 SC15P50V2JN-2-GP

CLK_SB_14M

82.30001.691

X-32D768KHZ-38GPU

R440
2
0R2J-2-GP

GPP_CLK0P
GPP_CLK0N

L20
L19

GPP_CLK1P
GPP_CLK1N

M19
M20

GPP_CLK2P
GPP_CLK2N

N22
P22

GPP_CLK3P
GPP_CLK3N

1CLK_SB_14M_1L18

25M_48M_66M_OSC

32K_X1
TP209
TPAD14-GP

J19
J18

R164
10MR2J-L-GP

TP210
TPAD14-GP

25M_X1

25M_X2

J21

J20

25M_X1

X1

F23
F24
F22
G25
G24

ALLOW_LDTSTP
PROCHOT#
LDT_PG
LDT_STP#
LDT_RST#

C3
C2
B2

LPC

14

3D3V_M92

3D3V_S5

14

R510
10KR2F-2-GP

U73B

DY

C860
SCD1U10V2KX-4GP

DY

48,59 RT8202_PGOOD_VGA

PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4
PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PE_GPIO1
PCI_GNT#4

TSLVC08APW -1-GP

TP124
TP119
TP198
TP115
TP197
TP117
TP121
TP118

TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP

TP120

TPAD14-GP

TP201

TPAD14-GP

INT_PIRQE#
INT_PIRQF#
INT_PIRQG#
PE_GPIO

52

73.07408.L16
2ND = 73.07408.L15

3D3V_S0

DY

TPAD14-GP
TPAD14-GP DY
TPAD14-GP
1 R580
2
0R2J-2-GP
RN51
LPCCLK0_R
SRN22-3-GP
1
4
LPCCLK1_R
2
3
EC48
LPC_LAD0 35,36
EC47
LPC_LAD1 35,36
LPC_LAD2 35,36
LPC_LAD3 35,36
LPC_LFRAME# 35,36
LDRQ0#
TP213 TPAD14-GP
LDRQ1#
TP193 TPAD14-GP
PCI_REQ#5
PCI_REQ#5 12
INT_SERIRQ 35
RTC_AUX_S5
RTC_CLK 15,34

TP116
TP191
TP123

INTRUDER#
RTC_AUX_S5_R

R511
10KR2J-3-GP

PE_GPIO1

DY
PE_GPIO0

1
1

43,59

R126
10KR2J-3-GP
LPC_LAD[0..3]

LPC_LAD[0..3]

35,36

PCLK_FW H 15,36
PCLK_KBC 15,35

DY 2
DY 2SC22P50V2JN-4GP
SC22P50V2JN-4GP

ARTC1

C409

DY

TPAD14-GP
TP148
1
2
R158
510R2J-1-GP

C408
SCD1U16V2ZY-2GP

M92_RST#

PM_CLKRUN# 35

PCI_LOCK#

C407

73.07408.L16
2ND = 73.07408.L15

SC1U10V2KX-1GP

SB710-GP

RTCCLK
INTRUDER_ALERT#
VBAT

TSLVC08APW -1-GP

SCD1U16V2ZY-2GP

9 NB_ALLOW _LDTSTOP
6 PROCHOT#_SB
6,51 CPU_PW RGD
6 CPU_LDT_STOP#
6,51 CPU_LDT_RST#

X2

G22
E22
H24
H23
J25
J24
H25
H22
AB8
AD7
V15

RTC

B3

CPU

32K_X2

RTC XTAL

A3
2

LPCCLK0
LPCCLK1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
LDRQ1#/GNT5#/GPIO68
BMREQ#/REQ5#/GPIO65
SERIRQ

25M_X2

X4

2
1
C433
SC15P50V2JN-2-GP

INTE#/GPIO33
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36

AD3
AC4
AE2
AE3

15
15
15
15
15
15
15
15

PE_RST

DY

14
7

73.07408.L16
2ND = 73.07408.L15
3RD = 73.07408.02B

PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30

DY

SLT_GFX_CLKP
SLT_GFX_CLKN

TSLVC08APW -1-GP

PE_GPIO0

M23
M22

9,26,35 PLT_RST1#

U73A

PLT_RST1#_B 1

CPU_HT_CLKP
CPU_HT_CLKN

PLT_RST1#_B 32,33,36,52

3D3V_S5

P17
M18

for TR

NB_HT_CLKP
NB_HT_CLKN

DY DY DY DY

M24
M25

TPAD14-GP

1
2
NP1
NP2

U16A

TP138

NB_DISP_CLKP
NB_DISP_CLKN

PCI_CLK2 15
PCI_CLK3 15
CLK_PCI4 15
CLK_PCI_LOM 15

K23
K22

3D3V_S5

PCI INTERFACE

PCIE_RCLKP/NB_LNK_CLKP
PCIE_RCLKN/NB_LNK_CLKN

TPAD14-GP
TPAD14-GP

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0#
CBE1#
CBE2#
CBE3#
FRAME#
DEVSEL#
IRDY#
TRDY#
PAR
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
REQ3#/GPIO70
REQ4#/GPIO71
GNT0#
GNT1#
GNT2#
GNT3#/GPIO72
GNT4#/GPIO73
CLKRUN#
LOCK#

CLOCK GENERATOR

SC1U10V2KX-1GP

SC1U10V2KX-1GP

N25
N24

3 CLK_PCIE_SB
3 CLK_PCIE_SB#

PCIRST#_SB

U2
P7
V4
T1
V3
U1
V1
V2
T2
W1
T9
R6
R7
R5
U8
U5
Y7
W8
V9
Y8
AA8
Y4
Y3
Y2
AA2
AB4
AA1
AB3
AB2
AC1
AC2
AD1
W2
U7
AA7
Y1
AA6
W5
AA5
Y5
U6
W6
W4
V7
AC3
AD4
AB7
AE6
AB6
AD2
AE4
AD5
AC6
AE5
AD6
V5

Place R <100mils form pins T25,T24

N1

TP204
TP203
1
2
10R0402-PAD
2
10R0402-PAD
2
10R0402-PAD
2
0R0402-PAD

PCIE_PVSS

PCIRST#

R144
R141
R137
R138

PCIE_PVDD

P25
C811

PCI_CLK0_R
PCI_CLK1_R
PCI_CLK2_R
PCI_CLK3_R
PCI_CLK4_R
PCI_CLK5_R

PCIE_CALRP
PCIE_CALRN

P24

PCI CLKS

T25
T24

C810

220 ohm 2A

PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N

P4
P3
P1
P2
T4
T3

SC22P50V2JN-4GP

1
2
PBY201209T-221Y-N-GP

PCIE_CALRP
2 562R2F-GP
2 2K05R2F-GP PCIE_CALRN

1
1

U22
U21
U19
V19
R20
R21
R18
R17

PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5/GPIO41

EC40

R143
R147

>15mil Width 43 mA

L24

PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N

SC22P50V2JN-4GP

PCIE_VDDR

ALINK_NBTX_C_SBRX_P0
ALINK_NBTX_C_SBRX_N0
ALINK_NBTX_C_SBRX_P1
ALINK_NBTX_C_SBRX_N1
ALINK_NBTX_C_SBRX_P2
ALINK_NBTX_C_SBRX_N2
ALINK_NBTX_C_SBRX_P3
ALINK_NBTX_C_SBRX_N3

V23
V22
V24
V25
U25
U24
T23
T22

Part 1 of 5

SC22P50V2JN-4GP

8
8
8
8
8
8
8
8

SB700
A_RST#

EC39

+1.2V_RUN_PCIE_PVDD

2
2
2
2
2
2
2
2

ALINK_NBRX_C_SBTX_P0
ALINK_NBRX_C_SBTX_N0
ALINK_NBRX_C_SBTX_P1
ALINK_NBRX_C_SBTX_N1
ALINK_NBRX_C_SBTX_P2
ALINK_NBRX_C_SBTX_N2
ALINK_NBRX_C_SBTX_P3
ALINK_NBRX_C_SBTX_N3

SC22P50V2JN-4GP

1D2V_S0

1
1
1
1
1
1
1
1

SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP

N2

EC41

ALINK_NBRX_SBTX_P0
ALINK_NBRX_SBTX_N0
ALINK_NBRX_SBTX_P1
ALINK_NBRX_SBTX_N1
ALINK_NBRX_SBTX_P2
ALINK_NBRX_SBTX_N2
ALINK_NBRX_SBTX_P3
ALINK_NBRX_SBTX_N3

EC42

8
8
8
8
8
8
8
8

C774
C777
C779
C787
C794
C791
C802
C801

ASB1A
NB_RST#

PCI EXPRESS INTERFACE

R146
33R2J-2-GP
1
2

9,26,35 PLT_RST1#

PWR
GND
NP1
NP2

BAT-CON2-1-GP-U

62.70001.011

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

ATi-SB710_PCIE&PCI_(1/5)
Size
A3
Date:
5

Document Number

Rev

JV71-TR

Monday, July 06, 2009

SA
Sheet
1

11

of

61

RSMRST#_KBC

NB_PW RGD

2
300R2J-4-GP

DY

1
R411

FP_ID

2
10KR2J-3-GP

3D3V_S5

1
R445
1
R443
1
R442

DY

DY

DY

SB_TEST2
2K2R2F-GP
SB_TEST1
2K2R2F-GP

3D3V_S0

SB_TEST0
2K2R2F-GP

RSMRST#_KBC

DY
DY
DY

ICH_PME#

2
10KR2J-3-GP

R410
1KR2F-3-GP

PCIE_W AKE#

2
10KR2J-3-GP

SMB_ALERT#

1
R154
1
R444
1
R441

10KR2J-3-GP

37

PM_SLP_S5#
ECSCI#_1
ECSW I#
PM_SLP_S3#

1
2
3
4

TR

28

FP_ID
GPIO6
GPIO4

AE18
AD18
AA19
W17
V17
W20
W21
SMBC0_SB AA18
SMBD0_SB W18
SMB_CLK
K1
SMB_DATA
K2
DDC1_SCL
AA20
DDC1_SDA
Y18
SATA_DET#
C1
GPIO5
Y19
GEVENT7#
G5

FP_ID
TPAD14-GP
TPAD14-GP

GPIO0/HDMI

2009/04/10for

RN97

8
7
6
5

59

TP190
TP194

MXM_PW R_EN

ACZ_SPKR

SRN10KJ-6-GP

TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP

RN98

1 RSMRST#_KBC
ECSMI#_KBC
2
3 PCI_REQ#5
4

8
7
6
5

3D3V_S5
3D3V_S0

D3

USBCLK/14M_25M_48M_OSC

C8

USB_RCOMP

G8

PCI_REQ#5

TP196
TP199
TP149
TP200
TP218

11

31 ACZ_SDATAOUT_MDC
28 ACZ_SDATAOUT
28 ACZ_SDATAIN0
31 ACZ_SDATAIN1

USB_OC#2
TP220
USB_OC#1
USB_OC#1
25
USB_OC#0

25

ACZ_BIT_CLK
ACZ_SDATAOUT_R

4
3
TPAD14-GP
TPAD14-GP

RN96
SRN33J-5-GP-U
1
2

28,31 ACZ_SYNC
28,31 ACZ_RST#

TPAD14-GP

4
3

ACZ_RST#_R 15

TO STRAPS

TP212
TP214
TP216

1
1
1

IMC_GPIO0
IMC_GPIO1
IMC_GPIO2
IDE_RST#

H19
H20
H21
F25

IMC_GPIO0
IMC_GPIO1
SPI_CS2#/IMC_GPIO2
IDE_RST#/F_RST#/IMC_GPO3

10KR2J-3-GP TP221
TP147
TP145
TP222

1
1
1
1

IMC_GPIO4
IMC_GPIO5
IMC_GPIO6
IMC_GPIO7

D22
E24
E25
D23

IMC_GPIO4
IMC_GPIO5
IMC_GPIO6
IMC_GPIO7

3D3V_S0
3D3V_S5

3D3V_S0

R152

1
5
6
7
8

NEWCARD /GLAN
RN53

4
3
2
1

SRN4K7J-10-GP

E6
E7

DY

USB_FSD12P
USB_FSD12N

F7
E8

USB_HSD11P
USB_HSD11N

H11
J10

USBPP10 32
USBPN10 32

USB_HSD10P
USB_HSD10N

E11
F11

USBPP8 19
USBPN8 19

USB_HSD9P
USB_HSD9N

A11
B11

USB_HSD8P
USB_HSD8N

C10
D10

USB_HSD7P
USB_HSD7N

G11
H12

USBPP1 25
USBPN1 25

USB_HSD6P
USB_HSD6N

E12
E14

USBPP2 25
USBPN2 25

USB_HSD5P
USB_HSD5N

C12
D12

USB_HSD4P
USB_HSD4N

B12
A12

USB_HSD3P
USB_HSD3N

G12
G14

USB_HSD2P
USB_HSD2N

H14
H15

USB_HSD1P
USB_HSD1N

A13
B13

USBPP7 33
USBPN7 33

USB_HSD0P
USB_HSD0N

B14
A14

USBPP0 25
USBPN0 25

IMC_GPIO8
IMC_GPIO9
IMC_PWM0/IMC_GPIO10
SCL2/IMC_GPIO11
SDA2/IMC_GPIO12
SCL3_LV/IMC_GPIO13
SDA3_LV/IMC_GPIO14
IMC_PWM1/IMC_GPIO15
IMC_PWM2/IMC_GPO16
IMC_PWM3/IMC_GPO17

A18
B18
F21
D21
F19
E20
E21
E19
D19
E18

IMC_GPIO18
IMC_GPIO19
IMC_GPIO20
IMC_GPIO21
IMC_GPIO22
IMC_GPIO23
IMC_GPIO24
IMC_GPIO25

G20
G21
D25
D24
C25
C24
B25
C23

IMC_GPIO26
IMC_GPIO27
IMC_GPIO28
IMC_GPIO29
IMC_GPIO30
IMC_GPIO31
IMC_GPIO32
IMC_GPIO33
IMC_GPIO34
IMC_GPIO35
IMC_GPIO36
IMC_GPIO37
IMC_GPIO38
IMC_GPIO39
IMC_GPIO40
IMC_GPIO41

B24
B23
A23
C22
A22
B22
B21
A21
D20
C20
A20
B20
B19
A19
D18
C18

1
1 DY2
DY 2CLK48_USB_R2 C432
R161
10KR2J-3-GP
SC10P50V2JN-4GP

Place these close SB700

Place R near pin14. Route it with 10mils


Trace width and 25mils spacing to any
signals in X, Y, Z directions.

USB
Pair

USBPP3 25
USBPN3 25

USBPP5 24
USBPN5 24

USBPP6 37
USBPN6 37

SB_GPO16
SB_GPO17

Device

11

CardReader

10

WEBCAM

NC

USB2

USBCN1

USB1

OCP1#

Bluetooth

NC

Fringer print

NC

MINIC1

USB3

OCP0#

15
15

Strap Pin / define to use LPC or SPI ROM


B

SB710-GP

SMB_CLK
SMB_DATA
SMBC0_SB
SMBD0_SB

C859
SC100P50V2JN-3GP

DY

Wistron Corporation

1
2

UMA

26,33
26,33
3,16,17
3,16,17

AZ_BITCLK
AZ_SDOUT
AZ_SDIN0/GPIO42
AZ_SDIN1/GPIO43
AZ_SDIN2/GPIO44
AZ_SDIN3/GPIO46
AZ_SYNC
AZ_RST#
AZ_DOCK_RST#/GPM8#

2
1

2
1

2
1

1
1

DY

10KR2J-3-GP

DY DY DY DY DY

R151
SC12P50V2JN-3GP

SC12P50V2JN-3GP

SC12P50V2JN-3GP

SC12P50V2JN-3GP

10KR2J-3-GP

10KR2J-3-GP

DY DY

SC12P50V2JN-3GP

R439 R448

EC45 EC44 EC43 EC80 EC82

M1
M2
J7
J8
ACZ_SDIN2
L8
TP206
ACZ_SDIN3
M3
TP205
ACZ_SYNC_R
L6
ACZ_RST#_R M4
TP207
GPM8# L5
1

USB_OC6#/IR_TX1/GEVENT6#
USB_OC5#/IR_TX0/GPM5#
USB_OC4#/IR_RX0/GPM4#
USB_OC3#/IR_RX1/GPM3#
USB_OC2#/GPM2#
USB_OC1#/GPM1#
USB_OC0#/GPM0#

INTEGRATED uC

RN47
SRN33J-5-GP-U
1
2

USB_OC#5
USB_OC#4

TP151
USB_OC#4

25

RN49
SRN33J-5-GP-U
1
4
2
3

B9
B8
A8
A9
E5
F8
E4

INTEGRATED uC

TPAD14-GP

Close to SB700
28
ACZ_BITCLK
31 ACZ_BTCLK_MDC

ECSW I#

HD AUDIO

35

USB OC

SRN10KJ-6-GP

CLK48_USB

USB_FSD13P
USB_FSD13N

RSMRST#

SATA_IS0#/GPIO10
CLK_REQ3#/SATA_IS1#/GPIO6
SMARTVOLT/SATA_IS2#/GPIO4
CLK_REQ0#/SATA_IS3#/GPIO0
CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39
CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40
SPKR/GPIO2
SCL0/GPOC0#
SDA0/GPOC1#
SCL1/GPOC2#
SDA1/GPOC3#
DDC1_SCL/GPIO9
DDC1_SDA/GPIO8
LLB#/GPIO66
SHUTDOWN#/GPIO5
DDR3_RST#/GEVENT7#

CLK48_USB
USB_PCOMP 1
R167
11K8R2F-GP

1%

35 RSMRST#_KBC

Part 4 of 5

SB700
PCI_PME#/GEVENT4#
RI#/EXTEVNT0#
SLP_S2/GPM9#
SLP_S3#
SLP_S5#
PWR_BTN#
PWR_GOOD
SUS_STAT#
TEST2
TEST1
TEST0
GA20IN/GEVENT0#
KBRST#/GEVENT1#
LPC_PME#/GEVENT3#
LPC_SMI#/EXTEVNT1#
S3_STATE/GEVENT5#
SYS_RESET#/GPM7#
WAKE#/GEVENT8#
BLINK/GPM6#
SMBALERT#/THRMTRIP#/GEVENT2#
NB_PWRGD

USB MISC

E1
E2
H7
F5
34,35,41,43,48,59,60 PM_SLP_S3#
G1
35,47 PM_SLP_S5#
H2
35,51 PM_PW RBTN#
H1
41
SB_PW RGD
PM_SUS_STAT# K3
TP208
TPAD14-GP
SB_TEST2
H5
SB_TEST1
H4
SB_TEST0
H3
Y15
35
KA20GATE
W15
35
KBRCIN#
K4
35
ECSCI#_1
ECSMI#_KBC
K24
TPAD14-GP
GEVENT5#
F1
TP141
TPAD14-GP
SYS_RST#
J2
TP139
H6
26 PCIE_W AKE#
EC_TMR
F2
35
EC_TMR
SMB_ALERT#
J6
NB_PW RGD_R
W14

USB 2.0

1
R419

1ICH_PME#
1 RI#
1 S2#

TP143
TP142
TP211

GPIO

3D3V_S0

ASB1D

USB 1.1

1D8V_S0

ACPI / WAKE UP EVENTS

Reserve for DY
EC963
EMI
SC1KP50V2KX-1GP
0408

NB_PW RGD_R

2 R422
1
0R0402-PAD

NB_PW RGD

9,41

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

C857
SC100P50V2JN-3GP

DY

Title

ATi-SB710_USB&GPIO_(2/5)
Size
A3
Date:
5

Document Number

Rev

SA

JV71-TR
Monday, July 06, 2009

Sheet
1

12

of

61

PLACE SATA AC DECOUPLING


CAPS CLOSE TO SB700
ASB1B

SATA_TX1P
SATA_TX1N

23
23

SATA_RXN1
SATA_RXP1

C449 1
C446 1

2SCD01U50V2KX-1GP
2SCD01U50V2KX-1GP

SATA_RXN1_C AD11
SATA_RXP1_C AE11

SATA_RX1N
SATA_RX1P

AB12
AC12

SATA_TX2P
SATA_TX2N

AE12
AD12

SATA_RX2N
SATA_RX2P

AD13
AE13

SATA_TX3P
SATA_TX3N

AB14
AC14

SATA_RX3N
SATA_RX3P

AE14
AD14

SATA_TX4P
SATA_TX4N

AD15
AE15

SATA_RX4N
SATA_RX4P

Very Close to SB700

XTAL-25MHZ-96GP

X3

R127
10MR2J-L-GP

82.30020.791
2ND = 82.30020.851

R434
1KR2F-3-GP
1
2

C373
SC15P50V2JN-2-GP
2
1

SATA_X2_R

1
R128

C367
SC15P50V2JN-2-GP

2
300R2J-4-GP
38

1D2V_S0

AB16
AC16

SATA_TX5P
SATA_TX5N

AE16
AD16

SATA_RX5N
SATA_RX5P

SATA_CAL

V12

SATA_CAL

SATA_X1

Y12

SATA_X1

SATA_X2

AA12

SATA_X2

W11

MEDIA_LED#

PLLVDD_SATA

W12

XTLVDD_SATA

3D3V_S0
B

XTLVDD_SATA

HW MONITOR

DY

C785
SCD1U10V2KX-4GP

C784
SC1U10V2KX-1GP

LAN_RST#/GPIO13
ROM_RST#/GPIO14

U15
J1

P5
P8
R8

TEMP_COMM
TEMPIN0/GPIO61
TEMPIN1/GPIO62
TEMPIN2/GPIO63
TEMPIN3/TALERT#/GPIO64

C6
B6
A6
A5
B5

VIN0/GPIO53
VIN1/GPIO54
VIN2/GPIO55
VIN3/GPIO56
VIN4/GPIO57
VIN5/GPIO58
VIN6/GPIO59
VIN7/GPIO60

A4
B4
C4
D4
D5
D6
A7
B7

AVDD

F6

AVSS

G7

C778
SC1U10V2KX-1GP

Dummy CKG select


3D3V_S0

LAN_RST#
ROM_RST#

TP217
TP146
TP144
TP215
TP219

CLK_ID_1
CLK_ID_0

TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP

R407
10KR2J-3-GP

R412
10KR2J-3-GP

DY

DY

DY

TP202 TPAD14-GP
TP140 TPAD14-GP

R416
10KR2J-3-GP

CLK_ID
(1,0)
ICS: 0,0
SEG: 0,1
RTM: 1,0

R413
10KR2J-3-GP

DY

2009/04/09 ALL DY

ALERT#

34

PSW _CLR#
B

PSW _CLR#
AVDD_HW M

>15mil Width
1 R428
2
0R0603-PAD

G6
D2
D1
F4
F3

FANIN0/GPIO50
FANIN1/GPIO51
FANIN2/GPIO52

CLK_ID_0
CLK_ID_1

SB_SPI_MISO
SPI_MOSI_R
ICH_SPICLK
SB_SPI_HOLD
ICH_SPICS0#

SPI_DI/GPIO12
SPI_DO/GPIO11
SPI_CLK/GPIO47
SPI_HOLD#/GPIO31
SPI_CS#/GPIO32

FANOUT0/GPIO3
FANOUT1/GPIO48
FANOUT2/GPIO49

SATA_ACT#/GPIO67

AA11

>15mil Width

AD24
AD23
AE22
AC22
AD21
AE20
AB20
AD19
AE19
AC20
AD20
AE21
AB22
AD22
AE23
AC23

M8
M5
M7

93 mA

PLLVDD_SATA

1 R426
2
0R0603-PAD

IDE_D0/GPIO15
IDE_D1/GPIO16
IDE_D2/GPIO17
IDE_D3/GPIO18
IDE_D4/GPIO19
IDE_D5/GPIO20
IDE_D6/GPIO21
IDE_D7/GPIO22
IDE_D8/GPIO23
IDE_D9/GPIO24
IDE_D10/GPIO25
IDE_D11/GPIO26
IDE_D12/GPIO27
IDE_D13/GPIO28
IDE_D14/GPIO29
IDE_D15/GPIO30

SATA_TXP1_C AE10
SATA_TXN1_C AD10

2SCD01U50V2KX-1GP
2SCD01U50V2KX-1GP

C369 1
C368 1

AA24
AA25
Y22
AB23
Y23
AB24
AD25
AC25
AC24
Y25
Y24

SATA_RXN0
SATA_RXP0
SATA_TXP1
SATA_TXN1

IDE_IORDY
IDE_IRQ
IDE_A0
IDE_A1
IDE_A2
IDE_DACK#
IDE_DRQ
IDE_IOR#
IDE_IOW#
IDE_CS1#
IDE_CS3#

SATA_RX0N
SATA_RX0P

22
22
23
23

Part 2 of 5

SATA_RXN0_C AB10
SATA_RXP0_C AC10

2SCD01U50V2KX-1GP
2SCD01U50V2KX-1GP

C687 1
C686 1

SATA_TX0P
SATA_TX0N

ATA 66/100/133

AD9
AE9

SB700

SATA_TXP0
SATA_TXN0

SPI ROM

SATA ODD

22
22

SATA_TXP0_C
SATA_TXN0_C

SERIAL ATA

SATA HDD

2SCD01U50V2KX-1GP
2SCD01U50V2KX-1GP

SATA PWR

C370 1
C371 1

3D3V_S5

G106

>15mil Width

RN101

1
2
3
4

MEDIA_LED#
PSW _CLR#
ALERT#

C423

DY
2

1
2

SC2D2U6D3V2MX-GP

3D3V_S0

8
7
6
5

C418

SCD1U10V2KX-4GP

SB710-GP

GAP-OPEN

1 R163
2
0R0603-PAD

Layout connect to Cap then GND

SRN10KJ-6-GP

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

ATi-SB710_SATA-IDE_(3/5)
Size

A3
Date:
5

Document Number

Rev

JV71-TR

Monday, July 06, 2009

SB
Sheet
1

13

of

61

ASB1C

SB710-GP

1
2

1
2

1
2

1
2

1
2

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50

AVSS_SATA_1
AVSS_SATA_2
AVSS_SATA_3
AVSS_SATA_4
AVSS_SATA_5
AVSS_SATA_6
AVSS_SATA_7
AVSS_SATA_8
AVSS_SATA_9
AVSS_SATA_10
AVSS_SATA_11
AVSS_SATA_12
AVSS_SATA_13
AVSS_SATA_14
AVSS_SATA_15
AVSS_SATA_16
AVSS_SATA_17
AVSS_SATA_18
AVSS_SATA_19
AVSS_SATA_20

1
2

C437

1
2

L28
2
PBY201209T-221Y-N-GP

C436

DY

1
2

3D3V_S5

3D3V_AVDDC

PLL

>15mil Width

47 mA

DY

>15mil Width

H18
J17
J22
K25
M16
M17
M21
P16

3D3V_S0

D26

A
RB751V-40-2-GP

F9

PCIE_CK_VSS_1
PCIE_CK_VSS_2
PCIE_CK_VSS_3
PCIE_CK_VSS_4
PCIE_CK_VSS_5
PCIE_CK_VSS_6
PCIE_CK_VSS_7
PCIE_CK_VSS_8
AVSSC

AVSSCK

P23
R16
R19
T17
U18
U20
V18
V20
V21
W19
W22
W24
W25
B

L17

SB710-GP

3D3V_S0

2 L26
1
0R0603-PAD

1KR2F-3-GP

A2
A25
B1
D7
F20
G19
H8
K9
K11
K16
L4
L7
L10
L11
L12
L14
L16
M6
M10
M11
M13
M15
N4
N12
N14
P6
P9
P10
P11
P13
P15
R1
R2
R4
R9
R10
R12
R14
T11
T12
T14
U4
U14
V6
Y21
AB1
AB19
AB25
AE1
AE24

C426
SC1U10V2KX-1GP DY

62 mA

1D2V_S0

C816
C817
SCD1U10V2KX-4GP
DY SC1U10V2KX-1GP

>15mil Width

L52 2
1
0R0603-PAD

UMA

AVDDK_1D2V

PCIE_CK_VSS_9
PCIE_CK_VSS_10
PCIE_CK_VSS_11
PCIE_CK_VSS_12
PCIE_CK_VSS_13
PCIE_CK_VSS_14
PCIE_CK_VSS_15
PCIE_CK_VSS_16
PCIE_CK_VSS_17
PCIE_CK_VSS_18
PCIE_CK_VSS_19
PCIE_CK_VSS_20
PCIE_CK_VSS_21

R406

83.R2004.B8F
2ND = 83.R0304.A8F

AVDDCK_3D3V
C425
SCD1U10V2KX-4GP

C766

C769

AVDDK_1D2V

AVSS_USB_1
AVSS_USB_2
AVSS_USB_3
AVSS_USB_4
AVSS_USB_5
AVSS_USB_6
AVSS_USB_7
AVSS_USB_8
AVSS_USB_9
AVSS_USB_10
AVSS_USB_11
AVSS_USB_12
AVSS_USB_13
AVSS_USB_14
AVSS_USB_15
AVSS_USB_16
AVSS_USB_17
AVSS_USB_18
AVSS_USB_19
AVSS_USB_20
AVSS_USB_21
AVSS_USB_22
AVSS_USB_23
AVSS_USB_24

5V_S0

AVDDCK_1.2V

K17

17mA

C434
SC10U6D3V3MX-GP

J16

E9

C417

DY

AVDDCK_3.3V

AVDDCK_3D3V

C421

USB I/O

1
2

1
2

DY

V5_VREF

AVDDC

C422

DY

>10mil Width

AE7

V5_VREF

SC1U10V2KX-1GP

C420

SCD1U10V2KX-4GP

C415

SCD1U10V2KX-4GP

C416

SC1U10V2KX-1GP

DY

SC1U10V2KX-1GP

C429
SC10U6D3V3MX-GP

DY

>50mil Width

A10
B10

C431

DY

DY

SC1U10V2KX-1GP

C428
SC10U6D3V3MX-GP

658 mA

AVDDTX_0
AVDDTX_1
AVDDTX_2
AVDDTX_3
AVDDTX_4
AVDDTX_5
AVDDRX_0
AVDDRX_1
AVDDRX_2
AVDDRX_3
AVDDRX_4
AVDDRX_5

C427

SCD1U10V2KX-4GP

AVDD_USB

1
1
2
1

3.3V_S5 I/O

SATA I/O

1
2

1
2

1
2

>30mil Width
197 mA

A15
B15
C14
D8
D9
D11
D13
D14
D15
E15
F12
F14
G9
H9
H17
J9
J11
J12
J14
J15
K10
K12
K14
K15

C405

1D2V_S5

113 mA

SCD1U10V2KX-4GP

A16
B16
C16
D16
D17
E17
F15
F17
F18
G15
G17
G18

C419

DY

SCD1U10V2KX-4GP

G2
G4

DY

C414

SC1U10V2KX-1GP

1
2

S5_1.2V_1
S5_1.2V_2

C404

SC4D7U6D3V3MX-2GP

A17
A24
B17
J4
J5
L1
L2

Use Plane Shape for +3.3V_AVDD_USB

1
2
PBY201209T-221Y-N-GP

C400

SCD1U10V2KX-4GP

AVDD_SATA_1
AVDD_SATA_4
AVDD_SATA_2
AVDD_SATA_3
AVDD_SATA_5
AVDD_SATA_6
AVDD_SATA_7

S5_3.3V_1
S5_3.3V_2
S5_3.3V_3
S5_3.3V_4
S5_3.3V_5
S5_3.3V_6
S5_3.3V_7

USB_PHY_1.2V_1
USB_PHY_1.2V_2

3D3V_S5
L27

1D2V_S0

1 R148
2
0R0402-PAD

DY

SCD1U10V2KX-4GP

DY

T10
U10
U11
U12
V11
V14
W9
Y9
Y11
Y14
Y17
AA9
AB9
AB11
AB13
AB15
AB17
AC8
AD8
AE8

>20mil Width

SC1U10V2KX-1GP

AA14
AB18
AA15
AA17
AC18
AD17
AE17

C772
SCD1U10V2KX-4GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SCD1U16V2ZY-2GP

DY

SCD1U10V2KX-4GP

C366

SC1U10V2KX-1GP

C354

C770

C401

DY

SCD1U10V2KX-4GP

1
2
PBY201209T-221Y-N-GP

DY EC81

32 mA

567 mA
C786

C402

DY

SC1U10V2KX-1GP

PCIE_VDDR_1
PCIE_VDDR_2
PCIE_VDDR_3
PCIE_VDDR_4
PCIE_VDDR_5
PCIE_VDDR_6
PCIE_VDDR_7

AVDD_SATA

>50mil Width

L23

DY

3D3V_S5

P18
P19
P20
P21
R22
R24
R25

1D2V_S0

CORE S0
CLKGEN I/O

IDE/FLSH I/O

POWER

CORE S5

1
2

1
2

1
2

1
2

C396

DY

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC4D7U6D3V3MX-2GP

C395

DY

Part 5 of 5

C386

SC2D2U6D3V2MX-GP

C389

DY

C403

SC2D2U6D3V2MX-GP

C809

DY

SC2D2U6D3V2MX-GP

600 mA

CKVDD_1.2V_1
CKVDD_1.2V_2
CKVDD_1.2V_3
CKVDD_1.2V_4

L21
L22
L24
L25

SC2D2U6D3V2MX-GP

VDD33_18_1
VDD33_18_2
VDD33_18_3
VDD33_18_4

PCIE_VDDR

>100mil Width
C394

C814

CKVDD

A-LINK I/O

1
2

1
2

1
2

SCD1U10V2KX-4GP

Y20
AA21
AA22
AE25

1D2V_S0

220 ohm 2A

DY

SB700

C815

>50mil Width
71 mA

L25
1
2
PBY201209T-221Y-N-GP

C805

SC10U6D3V3MX-GP

C773

C806

SCD1U10V2KX-4GP

C807
SCD1U10V2KX-4GP

DY

C799
SCD1U10V2KX-4GP

DY

C800
SC1U10V2KX-1GP

SC4D7U6D3V3KX-GP

SC10U6D3V3MX-GP

C781

ASB1E

1D2V_S0

>100mil Width

L15
M12
M14
N13
P12
P14
R11
R15
T16

SCD1U10V2KX-4GP

C435

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

SC1U10V2KX-1GP

3D3V_S0

Part 3 of 5

PCI/GPIO I/O

3D3V_S0

510 mA

SB700
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12

SC1U10V2KX-1GP

L9
M9
T15
U9
U16
U17
V8
W7
Y6
AA4
AB5
AB21

131 mA

GROUND

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

ATi-SB710_POWER&GND_(4/5)
Size

A3
Date:
5

Document Number

Rev

JV71-TR

Monday, July 06, 2009

SB
Sheet
1

14

of

61

REQUIRED STRAPS
REQUIRED SYSTEM STRAPS
D

DY

DY

R171

DY

R430

DY

R160

DY

R155

DY

R153

DY

R140

DY

R136

DY

3D3V_S5

R142

R145

3D3V_S0

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

2K2R2F-GP
PCI_CLK2 11
PCI_CLK3 11
CLK_PCI4
11
CLK_PCI_LOM 11
PCLK_FW H 11,36
PCLK_KBC 11,35
RTC_CLK
11,34
ACZ_RST#_R 12
SB_GPO17 12

RN52
SRN2K2J-1-GP

12

SB_GPO16

TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP

R166

DY 2K2R2F-GP
2

DEBUG STRAPS

4
3

10KR2J-3-GP

10KR2J-3-GP

RN50
SRN10KJ-5-GP

DY
10KR2J-3-GP

DY

10KR2J-3-GP

3
4

DY

4
3

RN46
SRN10KJ-5-GP

1
2

R429

R159

1
2

R139

2
1

R135

PCI_CLK2

PULL
HIGH

PCI_CLK3

WatchDOG
(NB_PWRGD)
ENABLED

CLK_PCI_LOM
CLK_PCI4

USE
DEBUG
STRAPS

PCLK_FWH PCLK_KBC
IMC
ENABLED

(Use Internal)

RESERVED

PULL
LOW

CLKGEN
ENABLED

WatchDog
(NB_PWRGD)
DISABLED

IGNORE
DEBUG
STRAPS

IMC
DISABLED

DEFAULT

DEFAULT

DEFAULT

CLKGEN
DISABLED
(Use External)
DEFAULT

RTCCLK
INTERNAL
RTC

AZ_RST#
ENABLE PCI
ROM BOOT

DEFAULT

EXT. RTC
(PD on X1,
apply
32KHz to
RTC_CLK)

SB_GPO17 , SB_GPO16
ROM TYPE:

PULL
HIGH

H, H = Reserved
H, L = SPI ROM

DISABLE PCI
ROM BOOT

L, H = LPC ROM

DEFAULT

L, L = FWH ROM

DEFAULT

PULL
LOW

TP137
TP136
TP195
TP135
TP134
TP133
TP130
TP129

PCI_AD28 PCI_AD27 PCI_AD26


USE
LONG
RESET
(DEFAULT)
USE
SHORT
RESET

PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30

11
11
11
11
11
11
11
11

PCI_AD25

PCI_AD24

USE PCI
PLL

USE ACPI
BCLK

USE IDE
PLL

USE DEFAULT
PCIE STRAPS Reserved

PCI_AD23

(DEFAULT)

(DEFAULT)

(DEFAULT)

(DEFAULT)

(DEFAULT)

BYPASS
PCI PLL

BYPASS
ACPI
BCLK

BYPASS IDE
PLL

USE EEPROM
PCIE STRAPS

Reserved

PCI_AD30
PCI_AD29

Reserved

Note: SB700 has 15K internal PU FOR PCI_AD[30:23]

NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTCCLK

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

ATi-SB710_STRAPPING_(5/5)
Size

A3
Date:
5

Document Number

Rev

JV71-TR

Monday, July 06, 2009

SA
Sheet
1

15

of

61

ADIMM2

3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196

GND

201

MH1

MH2

MH2

PLACE CLOSE TO PROCESSOR


WITHIN 1.5 INCH
MEM_MA_CLK0_P
C338
SC1D5P50V2CN-1GP
MEM_MA_CLK0_N
MEM_MA_CLK1_P
C331
SC1D5P50V2CN-1GP
MEM_MA_CLK1_N

DDR_VREF
1D8V_S3

VREF_DDR_MEM

C844
SCD1U10V2KX-4GP

RN100
1
2

4
3

SRN1KJ-7-GP
2

GND

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

202

DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#

1D8V_S3

DY

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

81
82
87
88
95
96
103
104
111
112
117
118

(A0)

C456
SCD1U10V2KX-4GP

C834

NC#50
NC#69
NC#83
NC#120
NC#163/TEST

C458

DY

198
200
50
69
83
120
163

SA0
SA1

3D3V_S0

VDDSPD

5
5
5
5
5
5
5
5

SMBD0_SB 3,12,17
SMBC0_SB 3,12,17

195
197
199

SCD1U10V2KX-4GP

SDA
SCL

MH1

13
31
51
70
131
148
169
188

SCD1U10V2KX-4GP

MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7

VREF
VSS

MEM_MA_DQS0_P
MEM_MA_DQS1_P
MEM_MA_DQS2_P
MEM_MA_DQS3_P
MEM_MA_DQS4_P
MEM_MA_DQS5_P
MEM_MA_DQS6_P
MEM_MA_DQS7_P

Place C2.2uF and 0.1uF <


500mils from DDR connector

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

MEM_MA_CLK1_P 5
MEM_MA_CLK1_N 5

10
26
52
67
130
147
170
185

OTD0
OTD1

5
5
5
5
5
5
5
5

C847

BA0
BA1

MEM_MA_CLK0_P 5
MEM_MA_CLK0_N 5

164
166

1
2

11
29
49
68
129
146
167
186

C845
SC2D2U6D3V2MX-GP

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

MEM_MA_CKE0 5,18
MEM_MA_CKE1 5,18

30
32

114
119

MEM_MA_DQS0_N
MEM_MA_DQS1_N
MEM_MA_DQS2_N
MEM_MA_DQS3_N
MEM_MA_DQS4_N
MEM_MA_DQS5_N
MEM_MA_DQS6_N
MEM_MA_DQS7_N

VREF_DDR_MEM

CK1
CK1#

MEM_MA0_CS#0 5,18
MEM_MA0_CS#1 5,18

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

5
5
5
5
5
5
5
5

5,18 MEM_MA0_ODT0
5,18 MEM_MA0_ODT1

CK0
CK0#

110
115
79
80

CKE0
CKE1

MEM_MA_RAS# 5,18
MEM_MA_WE# 5,18
MEM_MA_CAS# 5,18

5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194

MEM_MA_DATA0
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA32
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
MEM_MA_DATA63

CS0#
CS1#

108
109
113

SC2D2U6D3V2MX-GP

5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5

107
106

RAS#
WE#
CAS#

5,18 MEM_MA_BANK2
5,18 MEM_MA_BANK0
5,18 MEM_MA_BANK1

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2

102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85

MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15

NORMAL TYPE

5,18
5,18
5,18
5,18
5,18
5,18
5,18
5,18
5,18
5,18
5,18
5,18
5,18
5,18
5,18
5,18

C832
SC1KP50V2KX-1GP

LAYOUT: Locate close to


DIMM
A

UMA

Wistron Corporation

LOW 5.2 mm

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

SKT-SODIMM20020U4GP

DDR_SO-DIMM SKT_1

62.10017.661
2ND = 62.10017.A41

Size
Document Number
Custom

3RD = 62.10017.G81

Date: Monday, July 06, 2009


3

Rev

SB

JV71-TR
Sheet
1

16

of

61

ADIMM1

5
5
5
5
5
5
5
5

MEM_MB_DQS0_P
MEM_MB_DQS1_P
MEM_MB_DQS2_P
MEM_MB_DQS3_P
MEM_MB_DQS4_P
MEM_MB_DQS5_P
MEM_MB_DQS6_P
MEM_MB_DQS7_P

13
31
51
70
131
148
169
188

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

114
119

5,18 MEM_MB0_ODT0
5,18 MEM_MB0_ODT1

SCD1U10V2KX-4GP

C855
2

C854
SC2D2U6D3V2MX-GP

VREF_DDR_MEM

Place C2.2uF and 0.1uF <


500mils from DDR connector

1
2

10
26
52
67
130
147
170
185

MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
SDA
SCL

195
197

VDDSPD

199

SA0
SA1

198
200

NC#50
NC#69
NC#83
NC#120
NC#163/TEST

50
69
83
120
163

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

81
82
87
88
95
96
103
104
111
112
117
118

OTD0
OTD1
VREF
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196

202

GND

GND

201

MH1

MH1

MH2

MH2

5
5
5
5
5
5
5
5

SMBD0_SB 3,12,16
SMBC0_SB 3,12,16

DIMM2_SA1
1
R203

3D3V_S0

C507

2
10KR2J-3-GP

DY

(A2)
1D8V_S3

DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#

MEM_MB_CLK1_P 5
MEM_MB_CLK1_N 5

C499

DY SCD1U10V2KX-4GP
2

11
29
49
68
129
146
167
186

MEM_MB_CLK0_P 5
MEM_MB_CLK0_N 5

164
166

CK1
CK1#

MEM_MB_DQS0_N
MEM_MB_DQS1_N
MEM_MB_DQS2_N
MEM_MB_DQS3_N
MEM_MB_DQS4_N
MEM_MB_DQS5_N
MEM_MB_DQS6_N
MEM_MB_DQS7_N

MEM_MB_CKE0 5,18
MEM_MB_CKE1 5,18

30
32

5
5
5
5
5
5
5
5

CKE0
CKE1
CK0
CK0#

BA0
BA1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

MEM_MB0_CS#0 5,18
MEM_MB0_CS#1 5,18

PLACE CLOSE TO PROCESSOR


WITHIN 1.5 INCH
C

MEM_MB_CLK0_P
1

5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194

110
115
79
80

5 MEM_MB_DATA0
5 MEM_MB_DATA1
5 MEM_MB_DATA2
5 MEM_MB_DATA3
5 MEM_MB_DATA4
5 MEM_MB_DATA5
5 MEM_MB_DATA6
5 MEM_MB_DATA7
5 MEM_MB_DATA8
5 MEM_MB_DATA9
5 MEM_MB_DATA10
5 MEM_MB_DATA11
5 MEM_MB_DATA12
5 MEM_MB_DATA13
5 MEM_MB_DATA14
5 MEM_MB_DATA15
5 MEM_MB_DATA16
5 MEM_MB_DATA17
5 MEM_MB_DATA18
5 MEM_MB_DATA19
5 MEM_MB_DATA20
5 MEM_MB_DATA21
5 MEM_MB_DATA22
5 MEM_MB_DATA23
5 MEM_MB_DATA24
5 MEM_MB_DATA25
5 MEM_MB_DATA26
5 MEM_MB_DATA27
5 MEM_MB_DATA28
5 MEM_MB_DATA29
5 MEM_MB_DATA30
5 MEM_MB_DATA31
5 MEM_MB_DATA32
5 MEM_MB_DATA33
5 MEM_MB_DATA34
5 MEM_MB_DATA35
5 MEM_MB_DATA36
5 MEM_MB_DATA37
5 MEM_MB_DATA38
5 MEM_MB_DATA39
5 MEM_MB_DATA40
5 MEM_MB_DATA41
5 MEM_MB_DATA42
5 MEM_MB_DATA43
5 MEM_MB_DATA44
5 MEM_MB_DATA45
5 MEM_MB_DATA46
5 MEM_MB_DATA47
5 MEM_MB_DATA48
5 MEM_MB_DATA49
5 MEM_MB_DATA50
5 MEM_MB_DATA51
5 MEM_MB_DATA52
5 MEM_MB_DATA53
5 MEM_MB_DATA54
5 MEM_MB_DATA55
5 MEM_MB_DATA56
5 MEM_MB_DATA57
5 MEM_MB_DATA58
5 MEM_MB_DATA59
5 MEM_MB_DATA60
5 MEM_MB_DATA61
5 MEM_MB_DATA62
5 MEM_MB_DATA63

CS0#
CS1#

C348
SC1D5P50V2CN-1GP
MEM_MB_CLK0_N
MEM_MB_CLK1_P

107
106

MEM_MB_RAS# 5,18
MEM_MB_WE# 5,18
MEM_MB_CAS# 5,18

SC2D2U6D3V2MX-GP

5,18 MEM_MB_BANK2
5,18 MEM_MB_BANK0
5,18 MEM_MB_BANK1

108
109
113

RAS#
WE#
CAS#

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2

NORMAL TYPE

102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85

5,18 MEM_MB_ADD0
5,18 MEM_MB_ADD1
5,18 MEM_MB_ADD2
5,18 MEM_MB_ADD3
5,18 MEM_MB_ADD4
5,18 MEM_MB_ADD5
5,18 MEM_MB_ADD6
5,18 MEM_MB_ADD7
5,18 MEM_MB_ADD8
5,18 MEM_MB_ADD9
5,18 MEM_MB_ADD10
5,18 MEM_MB_ADD11
5,18 MEM_MB_ADD12
5,18 MEM_MB_ADD13
5,18 MEM_MB_ADD14
5,18 MEM_MB_ADD15

C340
SC1D5P50V2CN-1GP
MEM_MB_CLK1_N

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

SKT-SODIMM200-37GP

62.10017.E21
2ND = 62.10017.A51
3RD = 62.10017.G71

Title

HI 9.2mm

DDR_SO-DIMM SKT_2
Size
Document Number
Custom
Date:

Rev

SB

JV71-TR

Monday, July 06, 2009

Sheet
1

17

of

61

Decoupling Capacitor

C516
DY

1
2

1
2

1
2

C514

C513
SC10P50V2JN-4GP

C515

SC10P50V2JN-4GP

DY

SC1KP50V2KX-1GP

C496

SC1KP50V2KX-1GP

DY C497

SC1KP50V2KX-1GP

C498

SC1KP50V2KX-1GP

DY

SCD1U16V2ZY-2GP

C469
SCD1U16V2ZY-2GP

C468

RN55
MEM_MB_ADD4 5,17
MEM_MB_ADD11 5,17
MEM_MB_ADD5 5,17
MEM_MB_ADD8 5,17

MEM_MB_CKE1 5,17
MEM_MB_ADD15 5,17
MEM_MB_ADD14 5,17
MEM_MB_ADD7 5,17

1
2
3
4

SRN47J-4-GP
RN67
8
7
6
5

MEM_MA_ADD14 5,16
MEM_MA_ADD7 5,16
MEM_MA_ADD11 5,16
MEM_MA_ADD6 5,16

1
2
3
4

SRN47J-4-GP
RN56
8
7
6
5

MEM_MB_BANK0 5,17
MEM_MB_ADD10 5,17
MEM_MB_ADD1 5,17
MEM_MB_ADD3 5,17

1
2
3
4

SRN47J-4-GP
RN69
8
7
6
5

MEM_MA0_CS#0 5,16
MEM_MA_RAS# 5,16
MEM_MA0_ODT0 5,16
MEM_MA_ADD13 5,16

1
2
3
4

C484

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to 0D9V_S3

Place these Caps near DM2


1

C888

1
2

DY

1D8V_S3

Place these Caps near PARALLEL TERMINATION

0D9V_S3

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to 0D9V_S3

SC180P50V2JN-1GP

C483
SC180P50V2JN-1GP

C887
SCD01U50V2KX-1GP

C885
SCD01U50V2KX-1GP

DY

C839
SC2D2U6D3V2MX-GP

C487
SC2D2U6D3V2MX-GP

MEM_MB0_CS#1 5,17
MEM_MB0_ODT1 5,17
MEM_MB_CAS# 5,17
MEM_MB_W E# 5,17

SC2D2U6D3V2MX-GP

SRN47J-4-GP
RN57
8
7
6
5

C481

C840

1D8V_S3

SC2D2U6D3V2MX-GP

1
2
1

C475

DY
2

1
2
1
2

1
2
1
2

1
2
1
2

1
2
1
2

1
2
1

C489

DY

C488

DY

SCD1U16V2ZY-2GP

1
2
1

C477

C479

SCD1U16V2ZY-2GP

2
1

C491

SCD1U16V2ZY-2GP

C443
SCD1U16V2ZY-2GP

DY

DY

SCD1U16V2ZY-2GP

C490

DY

SCD1U16V2ZY-2GP

C444
SCD1U16V2ZY-2GP

DY

C527

SCD1U16V2ZY-2GP

C442
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C526

SCD1U16V2ZY-2GP

C441

DY

SCD1U16V2ZY-2GP

C440

DY

C525
SCD1U16V2ZY-2GP

C478
SCD1U16V2ZY-2GP

DY

C524
SCD1U16V2ZY-2GP

Do not share the Term resistor between


the DDR addess and Control Signals.

C523
SCD1U16V2ZY-2GP

DY

SCD1U16V2ZY-2GP

SRN47J-4-GP

SRN47J-4-GP

MEM_MA_BANK0 5,16
MEM_MA_ADD10 5,16
MEM_MA_ADD3 5,16
MEM_MA_ADD1 5,16

1
2
3
4

SRN47J-4-GP
RN60
8
7
6
5

C884

1
2
3
4

SRN47J-4-GP
RN62
8
7
6
5

MEM_MB_ADD9 5,17
MEM_MB_ADD12 5,17
MEM_MB_BANK2 5,17
MEM_MB_CKE0 5,17

C886

DY

SRN47J-4-GP
RN54
8
7
6
5

1
2
3
4

C841

MEM_MA_ADD12 5,16
MEM_MA_ADD9 5,16
MEM_MA_BANK2 5,16
MEM_MA_CKE0 5,16

C838

SRN47J-4-GP
RN61
8
7
6
5

C480

1
2
3
4

C482

MEM_MB_RAS# 5,17
MEM_MB0_CS#0 5,17
MEM_MB0_ODT0 5,17
MEM_MB_ADD13 5,17

SRN47J-4-GP
RN59
8
7
6
5

1
2
3
4

MEM_MA_ADD4 5,16
MEM_MA_ADD2 5,16
MEM_MA_BANK1 5,16
MEM_MA_ADD0 5,16

SCD1U16V2ZY-2GP

SRN47J-4-GP
RN68
8
7
6
5

1D8V_S3

SCD1U16V2ZY-2GP

1
2
3
4

Place these Caps near DM1

SCD1U16V2ZY-2GP

MEM_MB_ADD6 5,17
MEM_MB_ADD2 5,17
MEM_MB_ADD0 5,17
MEM_MB_BANK1 5,17

SC2D2U6D3V2MX-GP

SRN47J-4-GP
RN58
8
7
6
5

SC2D2U6D3V2MX-GP

1
2
3
4

SC2D2U6D3V2MX-GP

MEM_MA_ADD8 5,16
MEM_MA_ADD5 5,16
MEM_MA_CKE1 5,16
MEM_MA_ADD15 5,16

SC2D2U6D3V2MX-GP

SRN47J-4-GP
RN66
8
7
6
5

8
7
6
5

1
2
3
4

MEM_MA0_ODT1 5,16
MEM_MA0_CS#1 5,16
MEM_MA_W E# 5,16
MEM_MA_CAS# 5,16

8
7
6
5

1
2
3
4

C470

SCD1U16V2ZY-2GP

1
2
3
4

C452

SCD1U16V2ZY-2GP

0D9V_S3
RN63

DY C451

SCD1U16V2ZY-2GP

Put decap near power(0.9V) and pull-up resistor


0D9V_S3

Put decap near power(0.9V) and pull-up resistor

SCD1U16V2ZY-2GP

PARALLEL TERMINATION

C450
SCD1U16V2ZY-2GP

0D9V_S3

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

DDR_DAMPING & TERMINATION


Size
A3
Date:
5

Document Number

Rev

SB

JV71-TR
Monday, July 06, 2009

Sheet
1

18

of

61

LCD/INVERTER/CCD CONN

RN23

for TR

53
53
53
53

LVDS_TXACLKLVDS_TXACLK+
LVDS_TXAOUT2LVDS_TXAOUT2+

LVDS_TXACLKLVDS_TXACLK+
LVDS_TXAOUT2LVDS_TXAOUT2+

53
53
53
53

LVDS_TXAOUT0LVDS_TXAOUT0+
LVDS_TXAOUT1LVDS_TXAOUT1+

LVDS_TXAOUT0LVDS_TXAOUT0+
LVDS_TXAOUT1LVDS_TXAOUT1+

1
2
3
4

LCDVDD

LCD_TXACLKLCD_TXACLK+
LCD_TXAOUT2LCD_TXAOUT2+

8
7
6
5

DIS SRN0J-7-GP

RN22

LCD1

C1
SC10U6D3V3MX-GP

Inverter Pin

LCD_TXAOUT0LCD_TXAOUT0+
LCD_TXAOUT1LCD_TXAOUT1+

8
7
6
5

Pin

USBPP8
USBPN8
35 DBC_EN
3D3V_S0

LCD_EDID_CLK_1
LCD_EDID_DAT_1

BRIGHTNESS_CN
BLON_OUT_1

DCBATOUT
F1
DCBATOUT_LCD1

2
1

POLYSW -1D1A24V-GP

39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
42

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

2
C

SC10U35V0ZY-GP

2ND = 69.50007.A41

RN25
CCD_PW R

53
53
53
53

LCD_TXBCLK+
LCD_TXBCLKLCD_TXBOUT2+
LCD_TXBOUT2LCD_TXBOUT1+
LCD_TXBOUT1LCD_TXBOUT0+
LCD_TXBOUT0LCD_TXACLK+
LCD_TXACLKLCD_TXAOUT2+
LCD_TXAOUT2LCD_TXAOUT1+
LCD_TXAOUT1LCD_TXAOUT0+
LCD_TXAOUT0-

LVDS_TXBCLKLVDS_TXBCLK+
LVDS_TXBOUT2LVDS_TXBOUT2+

LVDS_TXBCLKLVDS_TXBCLK+
LVDS_TXBOUT2LVDS_TXBOUT2+

1
2
3
4

LCD_TXBCLKLCD_TXBCLK+
LCD_TXBOUT2LCD_TXBOUT2+

8
7
6
5

DIS SRN0J-7-GP

Vin

Brightness

BLON

GND

GND

RN24
53
53
53
53

LVDS_TXBOUT0LVDS_TXBOUT0+
LVDS_TXBOUT1LVDS_TXBOUT1+

LVDS_TXBOUT0LVDS_TXBOUT0+
LVDS_TXBOUT1LVDS_TXBOUT1+

1
2
3
4

LCD_TXBOUT0LCD_TXBOUT0+
LCD_TXBOUT1LCD_TXBOUT1+

8
7
6
5

CCD Pin
Pin

DIS SRN0J-7-GP

RN17

C5

69.50007.A31

Vin
D

DIS SRN0J-7-GP
12
12

Symbol

35 LCD_CB_SEL

41
40

1
2
3
4

9
9
9
9

ACES-CONN40C-4-GP

20.F1296.040
2ND = 20.F1557.040
3RD = 20.F1536.040

GMCH_TXAOUT2+
GMCH_TXAOUT2GMCH_TXACLK+
GMCH_TXACLK-

GMCH_TXAOUT2+
GMCH_TXAOUT2GMCH_TXACLK+
GMCH_TXACLK-

1
2
3
4

LCD_TXAOUT2+
LCD_TXAOUT2LCD_TXACLK+
LCD_TXACLK-

8
7
6
5

Symbol

CCD_PWR

USB-

USB+

GND

GND

UMA SRN0J-7-GP

2009/04/10 Pin3 to VDD Pin4 to CCD_PWR Pin24 to GND by John

RN16

USBPN8

USBPP8

9
9
9
9

DY

2 EC56
SC22P50V2JN-4GP
2 EC57
SC22P50V2JN-4GP
DY

GMCH_TXAOUT1+
GMCH_TXAOUT1GMCH_TXAOUT0+
GMCH_TXAOUT0-

GMCH_TXAOUT1+
GMCH_TXAOUT1GMCH_TXAOUT0+
GMCH_TXAOUT0-

1
2
3
4

LCD_TXAOUT1+
LCD_TXAOUT1LCD_TXAOUT0+
LCD_TXAOUT0-

8
7
6
5

UMA SRN0J-7-GP
RN19
9
9
9
9

GMCH_TXBOUT2+
GMCH_TXBOUT2GMCH_TXBCLK+
GMCH_TXBCLK-

GMCH_TXBOUT2+
GMCH_TXBOUT2GMCH_TXBCLK+
GMCH_TXBCLK-

9
9
9
9

GMCH_TXBOUT1+
GMCH_TXBOUT1GMCH_TXBOUT0+
GMCH_TXBOUT0-

GMCH_TXBOUT1+
GMCH_TXBOUT1GMCH_TXBOUT0+
GMCH_TXBOUT0-

1
2
3
4

LCD_TXBOUT2+
LCD_TXBOUT2LCD_TXBCLK+
LCD_TXBCLK-

8
7
6
5

UMA SRN0J-7-GP
RN18

1
2
3
4

LCD_TXBOUT1+
LCD_TXBOUT1LCD_TXBOUT0+
LCD_TXBOUT0-

8
7
6
5

F2

UMA SRN0J-7-GP

3D3V_S0

69.50007.691

1
2
R508 33R2J-2-GP
BRIGHTNESS_CN
BLON_OUT_1

RN2
SRN4K7J-8-GP

PD Add For ESD


U1

DIS

Close to LCD connector Side


1
2
3

EN
GND
OUT

IN#5

IN#4

74.05285.07F

G5285T11U-GP

RN14

1
2

53 LCD_EDID_CLK
53 LCD_EDID_DAT

LCD_EDID_CLK_1
LCD_EDID_DAT_1

4
3

SRN0J-10-GP-U

DY

C2
SC4D7U6D3V3MX-2GP

100KR2J-1-GP

C6
SCD1U16V2ZY-2GP

DY

R1

DIS

LCDVDD_ON_1

LCDVDD_ON

53

C7
SC4D7U6D3V3MX-2GP

RN13

2
1

9 CLK_DDC_EDID
9 DAT_DDC_EDID

C856

3
4
SRN0J-10-GP-U

UMA

Layout 40 mil

2
0R2J-2-GP

3D3V_S0

1
R25

R3
10KR2J-3-GP

2
0R2J-2-GP

4
3

83.0005V.0AF
LCDVDD

1
R2

BRIGHTNESS 35
BLON_OUT 35

1
2

9 GMCH_LCDVDD_ON

2
3D3V_S0

UMA

C3

DY

SC100P50V2JN-3GP

D39
PESD5V0S1BB-GP-U

SC100P50V2JN-3GP

for TR

C4

DY
DY

BRIGHTNESS_AMD 9,53

1
2
DY R588
33R2J-2-GP
1
2
R589 33R2J-2-GP

2ND = 69.50007.771

DY

FUSE-1D1A6V-4GP-U

1
C554
SCD1U16V2ZY-2GP

SC4D7U6D3V3MX-2GP

CCD_PW R
C555

C701
SC220P50V2KX-3GP

SC220P50V2KX-3GP

UMA

for TR

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

LCD CONN

Document Number

A3
Date:
5

Monday, July 06, 2009

Rev

-1

JV71-TR

Sheet
1

19

of

61

UMA

RN21

8
7
6
5

9
GMCH_BLUE
9 GMCH_GREEN
9
GMCH_RED

1
2
3
4
SRN0J-7-GP

Ferrite bead impedance: 10 ohm@100MHz


L18
CRT_R_1

3D3V_S0

68.00230.021
2ND = 68.00119.081

CRT_R

Hsync & Vsync level shift

5V_S0
FCB1608CF-GP
CRT_G

FCB1608CF-GP

RN37
SRN2K2J-1-GP

L15

2009/05/22 SB Change to 2.2p

R489 PU & TR-DIS-->150R


TR-UMA & TR-MUX-->140R

EC31

CRT_R 1

Layout Note:
Place these resistors
close to the CRT-out
connector

DY

14

RN36

2
1

53,56 CRT_HSYNC
53,56 CRT_VSYNC

U46A

HSYNC_1

3
4

CRT_HSYNC1_1

1
2

VSYNC_1

UMA

U46B

14

SRN0J-10-GP-U

SRN10J-7-GP

73.74125.L13
2ND = 73.74125.L12
CRT_VSYNC1_1

RN31

1
2

9 GMCH_VSYNC
9 GMCH_HSYNC

4
3

TSAHCT125PW -GP

73.74125.L13
2ND = 73.74125.L12

SRN0J-10-GP-U

for TR

MLVG04023R0QV05-GP
DY
EC29

CRT_G 1

2
MLVG04023R0QV05-GP

Layout Note:
* Must be a ground return path between this ground and the ground on
the VGA connector.
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.

EC28

CRT_B 1

DY

DDC_CLK & DATA level shift


5V_CRT_S0

5V_S0

F3
FUSE-1D1A6V-4GP-U

MLVG04023R0QV05-GP

3D3V_S0
D25
BAS16PT-GP

69.50007.691
2ND = 69.50007.771

83.00016.F11
2ND = 83.00016.B11

3D3V_S0

CRT I/F & CONNECTOR

2009/04/09 Add By John

500mA

DY

4
3

CRT1

17
RN26
SRN2K2J-1-GP

6
1

RN44

2
1

RN35
SRN10KJ-6-GP

3
4
SRN0J-10-GP-U

11

5V_CRT_S0

7
2
8
3
9
4
10
5

CRT_G

CRT_B

CRT_IN#_R

13

CRT_HSYNC1

14

CRT_VSYNC1

15

CLK_DDC1_5

DIS
53 CRT_DDCDATA
53 CRT_DDCCLK

DAT_DDC1_5_Q

3
4

CRT_VSYNC1
9 GMCH_DDCCLK
9 GMCH_DDCDATA

20.20392.015
2ND = 20.20764.015
3RD = 20.20798.015

RN20

2
1

DAT_DDC1

1 R49
2DAT_DDC1_5
0R0402-PAD

1
2N7002KDW -GP

3
4

CLK_DDC1_5_Q

84.2N702.A3F
2ND = 84.DM601.03F

SRN0J-10-GP-U

CLK_DDC1

1 R50
2CLK_DDC1_5
0R0402-PAD

2009/04/15 ESD For 2KV By John

for TR

2009/05/23 SB Change

R64
CRT_DEC#

UMA

1CRT_IN#_R

470R2J-2-GP
C129
SC100P50V2JN-3GP

EC24

35

DY

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

DY
2

1
2

1
2

VIDEO-15-47-GP-U

CLK_DDC1_5
DAT_DDC1_5
C142
C148
DY SC100P50V2JN-3GP
SC100P50V2JN-3GP

SC18P50V2JN-1-GP

SC18P50V2JN-1-GP

CRT_HSYNC1

DY

5
6

UMA

C161

SRN0J-10-GP-U

16

C150

CRT_IN#_R
U95

RN33

2
1

C722
SCD01U50V2KX-1GP

12

DAT_DDC1_5

1
2

1
2
3
4

CRT_R

8
7
6
5

5V_CRT_DDC

CRT_HSYNC1
CRT_VSYNC1

4
3

TSAHCT125PW -GP

For System CRT

1
2

1
2

1
2

68.00230.021
2ND = 68.00119.081

1
2

1
2

DY

RN34

2009/05/22 SB Change to 10

1
2

Change

DY

DIS

C176
SC2D2P50V2CC-GP

150R2F-1-GP 150R2F-1-GP

DY

C203
SC2D2P50V2CC-GP

R490

C215
SC2D2P50V2CC-GP

R488

CRT_B

EC27 FCB1608CF-GP
SC3P50V2CN-1-GP

R489

EC30
SC3P50V2CN-1-GP

SRN10J-1-GP

1
EC32
SC3P50V2CN-1-GP

5
6
7
8

150R2F-1-GP

4
3
2
1

53 CRT_RED
53 CRT_GREEN
53 CRT_BLUE

RN114

C700
SCD1U16V2ZY-2GP

2009/05/22 SB Change to 10
1

CRT_B_1

DIS

DY

4
3

68.00230.021
2ND = 68.00119.081

L16
CRT_G_1

Title

MLVG04023R0QV05-GP
Size

CRT Connector

Document Number

Rev

SB

JV71-TR
Date:
5

Monday, July 06, 2009

Sheet
1

20

of

61

5V_S0

RESERVED#14

14

SKT-HDMI19P-11GP-U1

DY

84.T3904.C11
2ND = 84.03904.L06
E

HDMI_HPD

HDMI_A_HPD

DY

53
D

EC65

RN90
HDMI_A_HPD_CN

1
2

2 R201
1
0R2J-2-GP

4
3

HDMI_DETECT# 9

UMA

SRN100KJ-6-GP
R202
10KR2J-3-GP
3D3V_S0

for TR
4
3

62.10078.171
2ND = 62.10078.121
RN79
SRN2K2J-1-GP

DY
DIS
1
2

UMA
RN32
9 GMCH_HDMI_CLK
9 GMCH_HDMI_DATA

2
1

3D3V_S0

RN43

HDMI_A_CLK_1
3
HDMI_A_DAT_1
4
SRN0J-6-GP

2
1

3
4
SRN0J-10-GP-U

HDMI_A_CLK 53
HDMI_A_DAT 53

3D3V_S0

2
2

DY

TMDS_A_TX0TMDS_A_TX0+

2
1

TMDS_A_TX1TMDS_A_TX1+

2
1

3 HDMI_TX04 HDMI_TX0+
SRN0J-10-GP-U
RN9

R282
R281
4K7R2J-2-GP
4K7R2J-2-GP

DY

3 HDMI_TX14 HDMI_TX1+
SRN0J-10-GP-U
RN12

DY

TMDS_A_TX2TMDS_A_TX2+

1
1

DY

RN8

2
1

DY

C638
SCD1U10V2KX-4GP

DY

C28
SCD1U10V2KX-4GP

53 TMDS_A_TX253 TMDS_A_TX2+

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

53 TMDS_A_TX153 TMDS_A_TX1+

C34

C32

53 TMDS_A_TX053 TMDS_A_TX0+

53 TMDS_A_TXC53 TMDS_A_TXC+

081222 SC

20
21
22
23

GND
GND
GND
GND

EC66

EC64

TMDS_CLOCK_SHIELD
TMDS_CLOCK+
TMDS_CLOCK-

HDMI_A_HPD_CN

DY

11
10
12

SRN2K2J-1-GP

TP14 TPAD14-GP

TMDS_DATA0_SHIELD
TMDS_DATA1_SHIELD
TMDS_DATA2_SHIELD

Q40
MMBT3904-4-GP

B
HDMI_A_CEC

SC220P50V2JN-3GP

8
5
2

3
4

13
17
19

TMDS_DATA0+
TMDS_DATA0TMDS_DATA1+
TMDS_DATA1TMDS_DATA2+
TMDS_DATA2-

2
1

CEC
DDC/CEC_GROUNG
HOT_PLUG_DETECT

7
9
4
6
1
3

TDMS_A_CLK
TDMS_A_DAT

MLVG04023R0QV05-GP

HDMI_TXC+
HDMI_TXC-

15
16

SCL
SDA

+5V_POWER

SC220P50V2JN-3GP

HDMI_TX0+
HDMI_TX0HDMI_TX1+
HDMI_TX1HDMI_TX2+
HDMI_TX2-

3D3V_S0
D35
BAV99-5-GP

DY

RN6

18

5V_S0

2009/04/09 1.5k to 2.2k By John


HDMI1

5V_S0

2009/04/09 Follow Jm70-PU By John

From VGA

3 HDMI_TX24 HDMI_TX2+
SRN0J-10-GP-U

2
1

8 HDMI_DATA08 HDMI_DATA0+

2
1

UMA

8 HDMI_DATA18 HDMI_DATA1+

2
1

UMA

8 HDMI_DATA28 HDMI_DATA2+

2
1

UMA

3
4 RN27
SRN0J-10-GP-U
3
4 RN28
SRN0J-10-GP-U
3
4 RN29
SRN0J-10-GP-U
3
4 RN30
SRN0J-10-GP-U
Recommended Equalization: [PC1,PC0]=01, 4dB
R301 2 DY
4K7R2J-2-GP
PC0
1
3D3V_S0
R302 2
4K7R2J-2-GP
PC1
1

From NB

IN_D1IN_D1+

OUT_D1OUT_D1+

23
22

HDMI_TXCHDMI_TXC+

41
42

IN_D2IN_D2+

OUT_D2OUT_D2+

20
19

HDMI_TX0HDMI_TX0+

44
45

IN_D3IN_D3+

OUT_D3OUT_D3+

17
16

HDMI_TX1HDMI_TX1+

47
48

IN_D4IN_D4+

OUT_D4OUT_D4+

14
13

HDMI_TX2HDMI_TX2+

3
4

DY
3D3V_S0

3D3V_S0
3D3V_S0

PS8101-GP

RT_EN#_8101

30
29
28

HDMI_A_DAT_1
HDMI_A_CLK_1
HPD_1 1 R626
2
0R2J-2-GP DY

5V_S0

HDMI_DETECT# 9

DY

HDMI_A_HPD_CN
TDMS_A_DAT
TDMS_A_CLK

U72

1
2
3
4

HDMI_A_CLK_1

C465

1OE#
VCC
1A
2OE#
DY 2B
1B
GND
2A

8
7
6
5

TDMS_A_DAT
HDMI_A_DAT_1

73.03306.E0B

2ND = 73.03306.D0B

DY

Q19
2N7002E-1-GP

.
.
.
. .

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

84.2N702.D31
2ND = 84.2N702.E31
Title

8
9
7

0R0402-PAD
2 R1228 1TDMS_A_CLK
2
1
R1229
0R0402-PAD

OE#_8101

2009/04/14 Follow JM70 By John

CBTD3306PW -GP

71.P8101.003

DY

HPD_SINK
SDA_SINK
SCL_SINK

DY

4K7R2J-2-GP

DY

RT_EN#_8101
OE#_8101
DDC_EN_PS8101

SDA
SCL
HPD

REXT
RT_EN#
OE#
DDC_EN

R303
499R2F-2-GP

DY

R288
20KR2F-L-GP

PC0
PC1

4K7R2J-2-GP

2
2

1
R295

2 R283

6
10
25
32

DY

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

REXT_HDMI

35
34

38
39

SCD1U16V2ZY-2GP

UMA

2
1

3 HDMI_TXC4 HDMI_TXC+
SRN0J-10-GP-U

2
1

1
5
12
18
24
27
31
36
37
43
49

HDMI_CLKHDMI_CLK+

8
8

TMDS_A_TXCTMDS_A_TXC+

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

U35

NC#35
NC#34

for TR

2
11
15
21
26
33
40
46

RN7

HDMI_A_HPD_CN
Size

HDMI Connector

Document Number

Rev

SB

JV71-TR
Date:
5

Monday, July 06, 2009

Sheet
1

21

of

61

SATA Connector
SATA1

13
13

SATA_TXP0
SATA_TXN0

13
13

SATA_RXN0
SATA_RXP0

15
14
13
12
11
10
9
8
7
6
5
4
3
2

5V_S0

1
C685

DY

D23
SS24-GP

SCD1U16V2ZY-2GP

83.2R004.08G
A

DY
2

TC22
SC10U6D3V3MX-GP

24
NP2
22
21
20
19
18
17
16

1
NP1
23

2ND = 83.2R004.J8M
3RD = 83.2R004.H8M

SKT-SATA22P-27-GP

62.10065.471
2ND = 62.10065.551
3RD = 62.10065.661

SATA_TXP0

D22
BAV99PT-GP-U

SATA_TXN0

DY

DY

DY

D21
BAV99PT-GP-U

3D3V_S0

83.00099.K11

D19
BAV99PT-GP-U

D24
BAV99PT-GP-U

DY

MP
B

SATA_RXP0

SATA_RXN0

2009/05/23 SB Change

3D3V_S0
3D3V_S0

83.00099.K11

83.00099.K11

3D3V_S0

83.00099.K11

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
Date:
5

HDD

Document Number

JV71-TR

Monday, July 06, 2009

Rev

SB
Sheet
1

22

of

61

SATA ODD Connector

ODD1

8
NP1
S1
13 SATA_TXP1
13 SATA_TXN1

1
2

SSM24PT-GP

SCD1U16V2ZY-2GP

D4

83.2R004.H8M
C

DY
C430

1ODD_MD
TC9
SC10U6D3V3MX-GP

DY

13 SATA_RXN1
13 SATA_RXP1
R165
DY
10KR2J-3-GP
1
2ODD_DP

5V_S0

TP152
TPAD14-GP

S2
S3
S4
S5
S6
S7
P1
P2
P3
P4
P5
P6
NP2
9
C

SKT-SATA7P+6P-46-GP

62.10065.631

D8
BAV99PT-GP-U

D7
BAV99PT-GP-U

1
3D3V_S0

83.00099.K11
B

DY

D6
BAV99PT-GP-U

DY

D5
DY
BAV99PT-GP-U

DY

SATA_TXP1

SATA_TXN1

MP

SATA_RXN1

SATA_RXP1

2009/06/29 PD Change

3D3V_S0
3D3V_S0

83.00099.K11

83.00099.K11

3D3V_S0
B

83.00099.K11

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
Date:
5

ODD

Document Number

JV71-TR

Monday, July 06, 2009

Rev

SB
Sheet
1

23

of

61

BLUETOOTH MODULE
D

1.5A / High Active Voltage 2V


3D3V_S0
3D3V_BT_S0
U68

1
2
3

EC98 DY
SCD1U16V2ZY-2GP

C920
SC4D7U6D3V3MX-2GP

DY

OUT
GND
NC#3

IN

EN

2
BLUETOOTH_EN 35

G5240B1T1U-GP

3D3V_BT_S0

74.05240.A7F

EC21 put near


BLUE1 / all
USB put one
choke near
connector by
EMI request
C

4
3
2

USB_5USB_5+

3D3V_BT_S0

USBPN5
USBPP5

12
12

BT1
ACES-CON4-1-GP-U2

20.D0197.104
2ND = 20.F0984.004

R527
0R0402-PAD
2
1

2ND = 74.09711.A7F

R528
0R0402-PAD

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

BLUETOOTH
Size

Document Number

Rev

JV71-TR
Date:
5

Monday, July 06, 2009

SA
Sheet
1

24

of

61

5V_USB1_S0

5V_S5

1
2
3
4

6
1

2
3
4
5

12
12

SKT-1394-4P-27-GP-U

USBPN3
USBPP3

USB_PW R_EN#

0R0603-PAD
1 R169
2
1
2
0R0603-PAD
R170

USB_3USB_3+

2
3
4
5

C836
SC4D7U6D3V3MX-2GP

8
7
6
5

USB_OC#0 12
EC84
SCD1U16V2ZY-2GP

74.00547.A79
2ND = 74.02181.079

DY
D

SKT-1394-4P-27-GP-U

OUT#8
OUT#7
OUT#6
OC#

G547F2P81U-GP

2009/04/20 EMI Change to 0603 By John

GND
IN#2
IN#3
EN/EN#

2009/04/20 EMI Change to 0603 By John

22.10218.T51
2ND = 22.10321.111
3RD = 22.10218.W51
4TH = 22.10218.P01

5V_USB1_S0

22.10218.T51
2ND = 22.10321.111
3RD = 22.10218.W51
4TH = 22.10218.P01

EC83
SC1000P50V3JN-GP-U

SCD1U16V2ZY-2GP

SE220U6D3VM-8GP

EC79

DY
2

TC29

79.22710.E0L
2ND = 79.22710.6AL

2009/04/16 ADD By John

100 mil

USB_2USB_2+

USB2

0R0603-PAD
1 R156
2
1
2
0R0603-PAD
R157

USBPN2
USBPP2

U54

USB2

USB1

6
1
12
12

5V_USB1_S0

USB1

5V_USB1_S0

DY

5V_USB2_S0

USB3

2009/04/20 EMI Change to 0603 By John

USB3

6
1

5V_USB2_S0
5V_S5

12
12

U62

SC4D7U6D3V3MX-2GP

G547F2P81U-GP

SKT-1394-4P-27-GP-U
USB_OC#1 12
EC106
SCD1U16V2ZY-2GP

74.00547.A79
2ND = 74.02181.079

OUT#8
OUT#7
OUT#6
OC#

2
3
4
5

22.10218.T51
2ND = 22.10321.111
3RD = 22.10218.W51
4TH = 22.10218.P01

DY

C869
B

GND
IN#2
IN#3
EN/EN#

8
7
6
5

USB_0USB_0+

USB_PW R_EN#

1
2
3
4

0R0603-PAD
1 R133
2
1
2
0R0603-PAD
R134

USBPN0
USBPP0

2009/04/17 ADD By John


2009/04/16 Change By John
5V_USB2_S0

3D3V_S0

USB_OC#4
12
12

EC85

1
SC1U6D3V2KX-GP

DY

SC1U6D3V2KX-GP

35 USB_PW R_EN#

5V_S5

USBPN1
USBPP1

C837

EC107
SC1000P50V3JN-GP-U

12

PW R_CON_BTN#_1
PW R_CON_LED#

38 PW R_CON_BTN#_1
38 PW R_CON_LED#

14
12
11
10
9
8
7
6
5
4
3
2

EC108

DY

79.10111.40L
2ND = 79.10711.4AL

USBCN1
SC1U10V3ZY-6GP

TC33
SE100U10VM-4-GP

C798

SCD1U16V2ZY-2GP

100 mil
DY

2009/04/20 ADD By John


USB_OC#4

TP173 AFTE14P-GP

USBPN1

TP174 AFTE14P-GP

USBPP1

TP176 AFTE14P-GP

13

USB_PW R_EN#

TP178 AFTE14P-GP

Wistron Corporation

5V_S5

TP179 AFTE14P-GP

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

UMA

MLX-CON12-18-GP

20.F1352.012
2ND = 20.F0702.012

Title

USB
Size

Document Number

Rev

JV71-TR
Date:
5

Monday, July 06, 2009

SA
Sheet
1

25

of

61

3D3V_LAN_S5

38
52
68

XTALVDDH

23

1
2
3
4

BIASVDD_G

XTALVDD_G

A0
A1
A2
GND

8
7
6
5

VCC
WP
SCL
SDA

EE_W P
SCLK
SO

AT24C02BN-SH-T-GP

C939
SCD1U10V2KX-4GP

1 R20
2
0R0402-PAD

72.24C02.R01
2ND = 72.24C02.M01

BIASVDD_G
C44
SCD1U10V2KX-4GP

LAN_AVDD
LAN_AVDD

2009/04/10 Bead to 0 by John

GPHY_PLLVDDL

3D3V_LAN_S0

1 R26
2
0R0603-PAD

GPHY_PLLVDD
C56
SCD1U10V2KX-4GP
PCIE_PLLVDD

30
27

PCIE_PLLVDDL
PCIE_PLLVDDL

TRD3_N
TRD3_P

49
50

TRD2_N
TRD2_P

47
46

MDI2MDI2+

27
27

TRD1_N
TRD1_P

43
44

MDI1MDI1+

27
27

TRD0_N
TRD0_P

41
40

LINKLED#
SPD100LED#
SPD1000LED#
TRAFFICLED#

2
1
67
66

MDI3MDI3+

27
27

MDI0MDI0+

Place PLLVDD/AVDDL
CKT as close to chip as
possible

C48

3D3V_AUX_S5
27
27

3D3V_S0

C67

35

LAN_AVDD

SCD1U10V2KX-4GP

AVDDL
AVDDL
AVDDL

1 R27
2
0R0402-PAD

SCD1U10V2KX-4GP

39
45
51

48
42

AVDDH
AVDDH
AVDDL_G
AVDDL_G
AVDDL_G

C100
SCD1U10V2KX-4GP

36

XTALVDD_G

BIASVDDH
VDDC_IO
VDDC_IO
VDDC
VDDC
VDDC
VDDC

1 R44
2
0R0402-PAD

3D3V_LAN_S5

5
55
13
20
34
60

U3

2D5V_1D2V_LAN

R549
10KR2J-3-GP

DC#38
DC#52
NC#68

1D2V_LAN_S5

3D3V_LAN_S5

6
56
61
15
19
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO

U4

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C93

C114

DY

C64

2
1

1 R46
2
0R0603-PAD
SCD1U10V2KX-4GP

C54

3D3V_LAN_S5

3D3V_S5

SCD1U10V2KX-4GP

C107

C103
SCD1U10V2KX-4GP

SC4D7U6D3V3MX-2GP

C110

LAN_AVDD

1D2V_LAN_S5

R35

33
24

PCIE_VDDL
PCIE_VDDL

AVDDL_G

R23

1
2GPHY_PLLVDD
FCM1608K-601T03GP

2D5V_1D2V_LAN

22
21

XTALO
XTALI

REGOUT12_IO

18

37

RDAC

3D3V_LAN_S5

REGCTL12

14

BCP69-GP

Q5

REGCTL12

1
2

84.00069.B1B
2ND = 84.DCP69.01B

BCM5784MKMLG-GP
SRN1KJ-10-GP-U

SUPER_IDDQ

16

GND

VMAINPRSNT
LAN_CLKREQ#
VAUX_PRESENT

Wistron Corporation

C73
SCD1U10V2KX-4GP

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

BCM5784MKMLG

69

8
7
6
5

C58
SC10U6D3V3MX-GP

RN15

1
2
3
4

Size
A3

71.05784.M03

Date:
5

UMA

CLKREQ#

11

3D3V_LAN_S5

LAN_CLKREQ#

C84
SCD1U10V2KX-4GP

1D2V_LAN_S5
3 LAN_CLKREQ#

3D3V_LAN_S0

C51
SC4D7U6D3V3MX-2GP

DY

C109
R42
2R3J-GP

1RDAC

SC4D7U6D3V3MX-2GP

C81

1 R28
2PCIE_SDSVDD
0R0603-PAD

R22

1K2R2F-1-GP
2009/04/09 1.24k to 1.2k By John

C75
SC4D7U6D3V3MX-2GP

17

VDDC_IO

1 R32
2PCIE_PLLVDD
0R0603-PAD

1
TEST1
TEST2

C105
SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

82.30020.791
2ND = 82.30020.851

XTAL-25MHZ-96GP

LAN_XI

58
57

LAN_XO_R
X1
2

C92

DY

2 LAN_SMB_CLK
0R2J-2-GP
LAN_SMB_DATA
2
0R2J-2-GP
2
1LAN_X0
R45
200R2J-L1-GP

12,33 SMB_CLK
12,33 SMB_DATA

2D5V_1D2V_LAN

C116
SCD1U10V2KX-4GP

C45

SCD1U10V2KX-4GP

1
0R2J-2-GP
1
1 R39
DY R34

C112

VAUX_PRSNT
VMAIN_PRSNT
LOW_PWR

2 R47
DY

C38
SC4D7U6D3V3MX-2GP

35

SCD1U10V2KX-4GP

VAUX_PRESENT54
VMAINPRSNT
53
LOW _PW R
3

LOW _PW R

ENERGY_DET

SCD1U10V2KX-4GP

35

59

68.00217.241
ENERGY_DET

SRN4K7J-10-GP

C43

C50
SC4D7U6D3V3MX-2GP

4
3
2
1

1 R18
2
0R0402-PAD

1
2

2
1D2V_LAN_S5

5
6
7
8

DY 10KR2J-3-GP

SCLK
SI
SO
CS#

2009/04/10 Bead to 0 by John

65
63
64
62

RN104

SCLK/EECLK
SI
SO/EEDATA
CS#

R40
C115

TP183TPAD14-GP

1
2

TP61 TPAD14-GP

C72

SCD1U10V2KX-4GP

UART_MODE
EE_W P
GPIO0

9
7
4

C108

SCD1U10V2KX-4GP

DY

C117
SC47P50V2JN-3GP

LAN_RST

3 CLK_PCIE_LAN
3 CLK_PCIE_LAN#

UART_MODE
GPIO_1/SERIAL_DI
GPIO_0/SERIAL_DO

PCIE_TXD_P
PCIE_TXD_N
PCIE_RXD_P
PCIE_RXD_N
WAKE#
PERST#
PCIE_REFCLK_P
PCIE_REFCLK_N

C113

SCD1U10V2KX-4GP

1 R48
2
0R0402-PAD

9,11,35 PLT_RST1#

26
25
31
32
12
10
29
28

C98

SC4D7U6D3V3MX-2GP

12 PCIE_W AKE#

PCIE_RXDP
PCIE_RXDN

TP59 TPAD14-GP

SCD1U10V2KX-4GP

2 C87
2 C96

GPIO2

SCD1U10V2KX-4GP

SCD1U16V2KX-3GP 1
SCD1U16V2KX-3GP 1

PCIE_RXP1
PCIE_RXN1
PCIE_TXP1
PCIE_TXN1

ENERGY_DET

GPIO_2

8
8
8
8

10M/100M/1G_LED# 27
LAN_ACT_LED# 27

C69
SCD1U10V2KX-4GP

DY 10KR2J-3-GP
2

PCIE_SDSVDD

3D3V_LAN_S5

Document Number

Rev

SA

JV71-TR
Monday, July 06, 2009

Sheet
1

26

of

61

LAN Connector

XF1
26

MDI1-

26

MDI1+

26

MDI0+

XRF_TDC

26

DY

12

10

11

MDI0-

RJ45_6
MCT1
RJ45_3
RJ45_1
MCT2
RJ45_2

7
XFORM-271-GP

68.HD081.301
Change
2ND = 68.68160.30B
2009/06/03 SB Change

C31
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C39

2
0R2J-2-GP
1

1 R15

GIGA Lan Transformer

1.route on bottom as differential pairs.


2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends.
4.pairs must be equal lengths.
5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
7.Must not cross ground moat,except
RJ-45 moat.

2D5V_1D2V_LAN

68.HD081.301 Change 68.HD081.30B


LAN_ACT_LED#
10M/100M/1G_LED#

DY

XF2

1
2

C14

SCD1U16V2ZY-2GP

C16

SCD1U16V2ZY-2GP

26

MDI2+

12

RJ45_4

10

MCT3

26

MDI2-

11

RJ45_5

26

MDI3+

RJ45_7

MCT4

RJ45_8

26

MDI3-

C11
SC1KP50V2KX-1GP

DY

C558
SC1KP50V2KX-1GP

XFORM-271-GP

68.HD081.301
Change
2ND = 68.68160.30B
2009/06/03 SB Change
68.HD081.301 Change 68.HD081.30B

DOC_TIP,DOC_RING,TIP,RING:
W/S : 10/100 @ Surface layers
10/20 @ Inner layers
2

10(+) 9(-)::GREEN
10(+) 11(-):ORANGE

2009/04/09 Change 4P2R By John

LAN Connector

RN82

RJ45

8
7
6
5
RN77
SRN75J-1-GP

12(+) 13(-):YELLOW

22.10177.B51
2ND = 22.10177.B81
3RD = 22.10177.C21

2009/04/09 Follow JV70-PU By John

DY

EC60

EC11

SC100P50V2JN-3GP

C570
SC1KP2KV6KX-GP

13
15
RJ45-13P-3-GP

CONN_PW R2
CONN_PW R

SC100P50V2JN-3GP

26 LAN_ACT_LED#

4
3

SRN470J-4-GP-U

MCT_R

RJ45_1
RJ45_2
RJ45_3
RJ45_4
RJ45_5
RJ45_6
RJ45_7
RJ45_8
CONN_PW R2

1
2

1
2
3
4

CONN_PW R

14
9
10
11
1
2
3
4
5
6
7
8
12

26 10M/100M/1G_LED#

3D3V_LAN_S5

MCT1
MCT2
MCT3
MCT4

DY

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

2009/05/23 SB Change
Title

LAN CONN
Size
A3
Date:
A

Document Number
Friday, July 10, 2009

Rev

JV71-TR

SB
Sheet
E

27

of

61

3D3V_S0
C898
SC10U6D3V3MX-GP
D

5VA_S0

C901
1
2

AUDIO_BEEP

SRN47K-2-GP-U

4
3

AUDIP_PC_BEEP

SC1U10V2KX-1GP

C897

RESET#

1
2
R516 0R2J-2-GP
1
2
R514 0R2J-2-GP
1
2
C895
DY
SC22P50V2JN-4GP

BCLK

KBC_BEEP

8
7
6
5

32
28
30

MIC1_VREFO_R
MIC1_VREFO_L
MIC2_VREFO

SRN2K2J-2-GP

JDREF
1

C919
SC10U10V5ZY-1GP

ALC268_SENSE

34
13

SC22P50V2JN-4GP

SENSE_B
SENSE_A

44
43
LFE
CENTER

30

1
2
10KR2F-2-GP

LINEIN_JD#

R518
1
2
20KR2F-L-GP

MIC_JD# 30

30

Sense resistors need close codec

SDATA_OUT
SDATA_IN
SPDIFO1
SPDIFI/EAPD

48
47

SIDESURR_L
SIDESURR_R

45
46

SURR_L
SURR_R

39
41

FRONTL 29
FRONTR 29

FRONT_L
FRONT_R

35
36

SOUNDL 29
SOUNDR 29

AC97_DATIN 1
R517
AUD_SPDIF_OUT
ALC_EAPD

2
39R2J-L-GP

ACZ_SDATAOUT 12
ACZ_SDATAIN0 12

AUD_SPDIF_OUT
ALC_EAPD 29

30

ALC888S-VC2-GR-GP

71.00888.D0G
1
1

TP225 TPAD14-GP
TP223 TPAD14-GP

TP234 TPAD14-GP

C917
SCD47U6D3V2KX-GP

DY

MONO-OUT
1

LINEOUT_JD#

R519

C899
1
2DY

DMIC_CLK
MXM_SPDIF

DMIC_DAT
VREF

TP224

26
42
4
7

2
1

2
1

C797
SC1U10V2KX-1GP

SC1U10V2KX-1GP

TPAD14-GP

C760

SC1U10V2KX-1GP

C759

2009/04/09 4.7u to 1u By John

ALC888S

MIC1_L
MIC1_R
MIC2_L
MIC2_R

2
39K2R2F-L-GP

CD_L
CD_R
CD_GND

C680 MIC1-L_PORT-B
21
C681 MIC1-R_PORT-B 22
C902
IMT_MIC1-L 16
C904
IMT_MIC1-R 17

R520

5
8

18
20
19

2
2
2
2

GPIO0/DMIC_CLK/SPDIFO2
GPIO1/DMIC_DATA

1
2
3
4

LINE1_VREFO
LINE2_VREFO

to 2.2u By John

MIC1V_R
MIC1V_L
MIC2-VREFO

RN109

29
31

2
3

30
INT_MIC
30 AUD_MICIN_L
30 AUD_MICIN_R

LINE1_L
LINE1_R
LINE2_L
LINE2_R

JDREF
PIN37_VREFO

5
2009/04/09 4.7u
6
SC2D2U6D3V2MX-GP 1
7MIC1-L_PORT-B_1
SC2D2U6D3V2MX-GP 1
8 MIC1-R_PORT-B_1
INT_MIC_2 SC1U10V3ZY-6GP 1
SC1U10V3ZY-6GP 1
SRN75J-1-GP

23
24
14
15

VREF

RN103
4
3
2
1

ALC861_LINE_IN_L
ALC861_LINE_IN_R

40
37

1 C907
1 C911

27

SC4D7U6D3V3MX-2GP 2
SC4D7U6D3V3MX-2GP 2

ACZ_RST# 12,31
ACZ_SYNC 12,31
ACZ_BITCLK 12

R521
20KR2F-L-GP

LINE_IN_L
LINE_IN_R

AVSS1
AVSS2
DVSS
DVSS

30
30

BEEP
RESET#
SYNC
BCLK
AGPIO

DVDD
DVDD_IO
AVDD1
AVDD2

U64

12
11
10
6
33

ACZ_SPKR

1
9
25
38

12

SC33P50V2JN-3GP

C896
SC100P50V2JN-3GP

2
C

35

C912
SCD1U10V2KX-4GP

C900
SCD1U10V2KX-4GP

2
R515
4K7R2J-2-GP

C909
SC10U6D3V3MX-GP

RN108

1
2

3D3V_S0

"VAUX" Pull high to enable standby mode

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

Azalia codec ALC888


Document Number

Rev

SB

JV71-TR
Monday, July 06, 2009

Sheet
1

28

of

61

Close to U53.8

+5V_SPK_AMP

Close to U53.18

1
2

C929
SC1U6D3V2KX-GP

1
2

C927
SCD1U10V2KX-4GP

C926
SC1U6D3V2KX-GP

1
2
17

C930
SC1U6D3V2KX-GP
4

Close to Pin9

2
3

SPKR_EN#
MUTE#
HP_EN
LDO_EN
LDO_OUT
BIAS
LDO_SET

23
25
22
4
29
24
1

C933
1
2 SC1U6D3V2KX-GP

AMP_C1N
R533
11K8R2F-GP
2
1
2
1
11K8R2F-GP
AUD_SPK_ENABLE#
R534

2009/05/23 SB Change to 11.8K

AUD_LIN_R
AUD_LIN_L

C931
AUD_LIN_R_1 1
SC1U6D3V2KX-GP
2
AUD_LIN_L_1 1
2
C932
SC1U6D3V2KX-GP

SOUNDR
SOUNDL

28
28

AMP_MUTE#_R

R535 2
R537 2
R536 2

1 100KR2J-1-GP
DY
1 0R2J-2-GP
1 0R2J-2-GP
DY

+5V_SPK_AMP
MAX9789A_SHDN#
AMP_SHUTDOW N# 35

AMP_MUTE#_R
AMP_REGEN

2 R538
1
0R0402-PAD

AUD_BIAS
AUD_SET

5VA_S0

5V_S0

2009/04/09 100k to 0k By John

2AUD_CPVSS

SC1U6D3V2KX-GP
C979

1
2

Signal inverter for speaker shutdown

2009/05/20 SB Add

+5V_SPK_AMP

C938
SC1U6D3V2KX-GP

C937

14

R540
0R0402-PAD

SC1U6D3V2KX-GP
C936
2
1

PVSS

SPKR_INR
SPKR_INL

13

CPVSS

10
12

2009/05/23 SB Change to 0
1

DY

30
VDD

HPVDD

MAX9789CETJ-GP

C928

SC4D7U6D3V3MX-2GP

AUD_HP1_OUT_R2
AUD_HP1_OUT_L2

CPGND

GAIN1
GAIN2

11

HP_INR
HP_INL

31
32

PGND
PGND

26
27

GND
GND

HPR
HPL

AUD_AMP_GAIN1
AUD_AMP_GAIN2
C935
SC1U6D3V2KX-GP
0R0402-PAD
1
2 AUD_HP1_OUT_R1 1 R541
2
1
2 AUD_HP1_OUT_L1 1
2
R539
0R0402-PAD
C934
SC1U6D3V2KX-GP

FRONTR
FRONTL

15
16

C1P
C1N

AUD_HP1_OUT_R2
AUD_HP1_OUT_L2

DY

AMP_C1P

OUTL+
OUTLOUTROUTR+

28
33

SPKR_R+1
SPKR_L+1

30 SPKR_R+1
30 SPKR_L+1

6
7
19
20

CPVDD

8
18
PVDD
PVDD

SPKR_L+
SPKR_LSPKR_RSPKR_R+

SPKR_L+
SPKR_LSPKR_RSPKR_R+

21
5

30
30
30
30

C925
SC1U6D3V2KX-GP

C924

1
2

1
2

C923
SCD1U10V2KX-4GP

DY

U70

28
28

+5V_SPK_AMP

+5V_SPK_AMP

SC10U6D3V3MX-GP

C922

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP

60ohm 100MHz
3000mA 0.05ohm DC

+5V_SPK_AMP

2 R532
1
0R0603-PAD

5V_S0

R542
100KR2J-1-GP

AMP_SHUTDOW N# 35
AUD_SPK_ENABLE#

U71
ALC_EAPD

AMP_MUTE#_R

83.00056.E11
DY

D32
BAW 56-3-GP

R543
0R0402-PAD

.
.
. .

28

2N7002E-1-GP
R544

MAX9789A_SHDN#

84.2N702.D31
2ND = 84.2N702.E31

3D3V_S0

10KR2J-3-GP

DY

GAIN SETTING

+5V_SPK_AMP

R545
100KR2J-1-GP

R546
100KR2J-1-GP

DY
AUD_AMP_GAIN1
R547
100KR2J-1-GP

AUD_AMP_GAIN2
R548
100KR2J-1-GP

DY

UMA

GAIN1

GAIN2

GAIN

Wistron Corporation

6dB

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

10dB

15.6dB

21.6dB

Title

AUDIO AMP
Size

Document Number

Rev

SB

JV71-TR
Date:
A

Monday, July 06, 2009

Sheet
E

29

of

61

Internal Speaker

LINE IN

SPKR_LSPKR_L+
SPKR_RSPKR_R+

LIN1

28

RN107

LINEIN_JD#
LINE_IN_R_CONN

3
4

LINE_IN_L_CONN

TP5
TP6
TP18
TP19

SPKR_R-

20.F1240.002

DY

2
4
ACES-CON2-12-GP

PHONE-JK359-GP

EC96

22.10133.I51
2ND = 22.10088.H21
3RD = 22.10133.I41

MLVG04023R0QV05-GP

SPKR_R1

3
1

SPKR_R+

EC97

2
2

DYDY

R512
R513

SRN75J-2-GP-U

10KR2J-3-GP
10KR2J-3-GP

AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP

1
1
1
1

1
1

SPKR_LSPKR_L+
SPKR_RSPKR_R+

2
1

LINE_IN_R
LINE_IN_L

NP2
NP1
5
4
3
6
2
1

METAL

28
28

SPKR_LSPKR_L+
SPKR_RSPKR_R+

MLVG04023R0QV05-GP
2

29
29
29
29

DY

2009/05/06 SB Change
2009/07/06 PD change to 22.10265.211 symbol

SPKR_L1

3
1

SPKR_L+
SPKR_L-

MIC IN

20.F1240.002

2
4

MICIN1

2009/06/18 SB Change

MIC_JD#

28 AUD_MICIN_R

R500

EC95

AMIC1

DY
2

DY

MLVG04023R0QV05-GP

INT MIC

EC94

DY
MLVG04023R0QV05-GP
2

DY

10KR2J-3-GP

R498
1
1

28 AUD_MICIN_L

10KR2J-3-GP
2
2

28

DY
SC100P50V2JN-3GP

DY
SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP

DY

EC68

METAL

DY

EC67

NP2
NP1
5
4
3
6
2
1

ACES-CON2-12-GP

EC2

EC1

PHONE-JK360-GP

22.10133.I61
2ND = 22.10133.I21
3RD = 22.10088.H11
2009/05/06 SB Change
2009/07/06 PD change to 22.10265.201 symbol

4
2
INT_MIC_1

1 ER1
2
0R0402-PAD

INT_MIC 28

1
3
ACES-CON2-12-GP

20.F1240.002

MLVG0402220NV05BP-GP-U
EC58

69.80024.011

LINE OUT

LOUT1

NP2
NP1

28 AUD_SPDIF_OUT

5V_SPDIF_S0

C
B
A

DRIVE
IC

2009/06/18 SB Change

TX

LED
28

LINEOUT_JD#

29
29

2
1

SPKR_L+1
SPKR_R+1

3
4

LOUT_R+1

5
4
3
2
1
7
6

METAL

LOUT_L+1
RN111

SRN75J-2-GP-U

EN#

IN

3
2
1

NC#3
GND
OUT

DY

5V_SPDIF_S0

74.05240.B7F
2ND = 74.09711.07F
2

G5240B2T1U-GP-U

SCD1U16V2ZY-2GP

2009/07/03 PD Change

C853
SCD1U16V2ZY-2GP

DY

MLVG04023R0QV05-GP
2

C851

22.10133.K21

EC105

DY
MLVG04023R0QV05-GP
2

LINEOUT_JD#
5V_S0

EC104

PHONE-JK382-GP
U56

DY
A

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

DY 0R2J-2-GP

AUDIO JACK

R472

Size

Document Number

Rev

SB

JV71-TR
Date:
5

Monday, July 06, 2009

Sheet
1

30

of

61

MDC 1.5 CONN

C539
SC4D7U6D3V3MX-2GP

MDC1

ACZ_SYNC_A
2
0R0402-PAD
ACZ_SDATAIN1_A
2
33R2J-2-GP
1 R438
2ACZ_RST#_MDC
0R0402-PAD

3D3V_S5
ACZ_BTCLK_MDC_1
C540

2
1

C536
SC100P50V2JN-3GP

20.F1074.012

TYCO-CONN12A-4-GP

2009/06/05 SB Change

1 R244
2
0R0402-PAD

ACZ_BTCLK_MDC 12

1
R243
100KR2J-1-GP

DY

C534
SC22P50V2JN-4GP

SC4D7U6D3V3MX-2GP

12,28 ACZ_RST#

3D3V_S5

R437 1
R245 1

12,28
ACZ_SYNC
12 ACZ_SDATAIN1

4
6
8
10
12
18
17
NP2

C541
DUMMY-C2

13
14
15

3
5
7
9
11
16

ACZ_SDATAOUT_MDC

12 ACZ_SDATAOUT_MDC

NP1
14
15
2

13
1

11

12

16
17
18

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

MDC
Size

Document Number

Rev

JV71-TR
Date:
5

Monday, July 06, 2009

SB
Sheet
1

31

of

61

3D3V_D_S0

XD_CD#
SD_WP
SD_CD#
SD_DAT1/XD_D4
XD_D5/MS_BS
XD_D3/MS_D1
SD_DAT0/XD_D6/MS_D0
SD_DAT7/XD_D2/MS_D2
MS_INS#
SD_DAT6/XD_D7/MS_D3
SD_CLK/XD_D1/MS_CLK
SD_DAT5/XD_D0
SD_DAT4/XD_WP#
XD_R/B#
SD_DAT3/XD_WE#
SD_DAT2/XD_RE#
XD_ALE
XD_CE#
XD_CLE

3D3V_S0

1 R487
2
0R0603-PAD

CARD_3D3V_S0

DY

C876
SC1U10V3KX-3GP

CARD_3V3

AV_PLL

AV_PLL

VREG

DY

NC#30
NC#7
NC#3

30
7
3

GND
GND
GND
GND

6
12
32
46

EEDO
EEDI

15
18

71.05159.00G

USB_10-

12M_XO

USB_10+

XDAL_CTR

DY

R496 1
2
0R0402-PAD
R495 1
2
0R0402-PAD

R485 1
2
0R0402-PAD

3D3V_D_S0

24
22

1
1

C858
SC1U10V3KX-3GP

12 USBPP10
R482
0R0402-PAD 12 USBPN10

C864
SC47P50V2JN-3GP

2
2

RST#

MODE_SEL
SD_CMD
GPIO0
RREF
RST#

5
4

1
R474
100KR2J-1-GP

2 R479
1
0R0402-PAD

45
36
14
2
44

MODE_SEL

DY

11,33,36,52 PLT_RST1#_B

MODE_SEL
SD_CMD
K VBUS_LED
R494
LED-W -23-GP
1
2 RREF
6K19R2F-GP
RST#
LED1
ADY

DP
DM

3D3V_D_S0

D3V3
D3V3

EESK
EECS

33
11
C852
SCD1U16V2ZY-2GP

17
16

1 R484
2 VBUS_R
68R2F-GP
DY

3D3V_S0

DY

3V3_IN

XTLO
XTLI

DY

-1

C873
SCD1U16V2ZY-2GP

VREG

MS_D5
MS_D4

3D3V_D_S0

C875
SCD1U16V2ZY-2GP

C871
SC4D7U6D3V3MX-2GP

3V_VBUS_S0

R491 1
2
0R0603-PAD

3D3V_S0

10

XTAL_CTR

2 R493
1
0R0402-PAD

47
48

VREG

C874
SCD1U16V2ZY-2GP

13

2
1

C872
SC1U10V3KX-3GP

SP1
SP2
SP3
SP4
SP5
SP6
SP7
SP8
SP9
SP10
SP11
SP12
SP13
SP14
SP15
SP16
SP17
SP18
SP19

19
20
21
23
25
26
27
28
29
31
34
35
37
38
39
40
41
42
43

U58
RTS5159-GR-GP

R486 1
2
0R0402-PAD

CLK48_5158E

12M_XO

5 IN1 CARD-READER (SD/MMC/MS/MS PRO/XD)


CARD_3D3V_S0

C881
SCD1U16V2ZY-2GP

C880
SC4D7U6D3V3MX-2GP

CARD1

DY
SD_DAT5/XD_D0

2
0R0402-PAD

1 R506

XD_D3/MS_D1

2
0R0402-PAD

1 R502

SD_DAT4/XD_W P#

SD_DAT0/XD_D6/MS_D0_1
SD_DAT1/XD_D4_1
DY
SD_DAT2/XD_RE#_1
DY
SD_DAT3/XD_W E#_1
DY
SD_W P
DY
SD_CD#
DY
SD_CMD_1
DY
SD_CLK/XD_D1/MS_CLK DY

DY

EC88
EC90
EC92
EC89
EC93
EC91
EC86
EC87

1
1
1
1
1
1
1
1

2
2
2
2
2
2
2
2

23
14
33

SD_VCC
MS_VCC
XD_VCC

SD_DAT5/XD_D0_1
SD_CLK/XD_D1/MS_CLK
SD_DAT7/XD_D2/MS_D2_1
XD_D3/MS_D1_1
SD_DAT1/XD_D4_1
XD_D5/MS_BS_1
SD_DAT0/XD_D6/MS_D0_1
SD_DAT6/XD_D7/MS_D3_1

8
9
26
27
28
30
31
32

XD_D0
XD_D1
XD_D2
XD_D3
XD_D4
XD_D5
XD_D6
XD_D7

XD_R/B#
SD_DAT2/XD_RE#_1
XD_CE#
XD_CLE
XD_ALE
SD_DAT3/XD_W E#_1
SD_DAT4/XD_W P#_1
XD_CD#

1
2
3
4
5
6
7
34

XD_R/B
XD_RE
XD_CE
XD_CLE
XD_ALE
XD_WE
XD_WP
XD_CD_SW

CARD_3D3V_S0

1 R505

2
0R0402-PAD

NP1
NP2
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP

NP1
NP2

SD_DAT0
SD_DAT1
SD_DAT2
SD_DAT3

25
29
10
11

SD_DAT0/XD_D6/MS_D0_1
SD_DAT1/XD_D4_1
SD_DAT2/XD_RE#_1
SD_DAT3/XD_W E#_1

R471
R475
R476
R473

1
10R0402-PAD
10R0402-PAD
10R0402-PAD
0R0402-PAD
1
0R0402-PAD

SD_DAT0/XD_D6/MS_D0
SD_DAT1/XD_D4
SD_DAT2/XD_RE#
SD_DAT3/XD_W E#

SD_CMD
SD_CLK
SD_CD_SW
SD_WP_SW

12
24
36
35

SD_CMD_1
SD_CLK/XD_D1/MS_CLK
SD_CD#
SD_W P

R470 2

MS_DATA0
MS_DATA1
MS_DATA2
MS_DATA3

19
20
18
16

SD_DAT0/XD_D6/MS_D0_1
XD_D3/MS_D1_1
SD_DAT7/XD_D2/MS_D2_1
SD_DAT6/XD_D7/MS_D3_1

R501 2
R507 2

10R0402-PAD
10R0402-PAD

SD_DAT7/XD_D2/MS_D2
SD_DAT6/XD_D7/MS_D3

MS_BS
MS_INS
MS_SCLK

21
17
15

XD_D5/MS_BS_1
MS_INS#
SD_CLK/XD_D1/MS_CLK

R503 2

10R0402-PAD

XD_D5/MS_BS

4IN1_GND
4IN1_GND
4IN1_GND
4IN1_GND

13
22
38
37

2
2
2
2

SD_CMD

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

CARD-PUSH-36P-5-GP
Title

20.I0081.011

CARDREADER- RTS5159
Size

Document Number

Rev

SB

JV71-TR
Date:

UMA

Monday, July 06, 2009

Sheet
1

32

of

61

Mini Card Connector(WLAN)


4

2009/04/20 Change to 3D3V_S0 By John

H=6.0/8.0mm

3D3V_S0

3D3V_MINI

1D5V_S0

MINI1

53
NP1
1

W LAN_CLKREQ#_1

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
NP2
54

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

4
6
8
10
12
14
16

C552
SC100P50V2JN-3GP

3 CLK_PCIE_MINI1#
3 CLK_PCIE_MINI1

3
5
7
9
11
13
15

1 R620
2
0R0402-PAD

3 W LAN_CLKREQ#

R250
0R0603-PAD

35
35
8
8

E51_RxD
E51_TxD

C550 1
C549 1

PCIE_RXN2
PCIE_RXP2

RXN2
2
RXP2
2
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP

8 PCIE_TXN2
8 PCIE_TXP2
3D3V_S0

2009/04/20 Change to 3D3V_S0 By John


R241 1
2
0R0402-PAD

5V_S5

5V_S5_MIN2

PLT_RST1#_MINI1

SMB_CLK_MINI1 1
SMB_DATA_MINI12

10KR2J-3-GP
1
DY 2
R252
1
2
R251 0R2J-2-GP

W IRELESS_EN 35
PLT_RST1#_B 11,32,36,52

RN72 SRN33J-5-GP-U
4
SMB_CLK 12,26
3
SMB_DATA 12,26

DY

USBPN7 12
USBPP7 12
LED_W W AN#

TP169 TPAD14-GP
W LAN_LED#_MC 40

SKT-MINI52P-20-GP

20.F1117.052
2ND = 62.10043.391
2009/04/16 Change By John

3D3V_S0
3D3V_S5

1 R239
2
0R0402-PAD
R240 0R2J-2-GP
1
DY 2

3D3V_MINI

Place near MINI1


3D3V_S0

1D5V_S0

C538
SCD1U16V2ZY-2GP

1
2

C530
SCD1U16V2ZY-2GP

1
2

1
2

C553
SC1U10V3ZY-6GP

DY

TC13
ST100U6D3VBM-8GP

C522
SCD1U16V2ZY-2GP

C519
SC1U10V3ZY-6GP

1
2

SCD1U16V2ZY-2GP

3D3V_MINI
C521

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

MINI CARD
Size

Document Number

Rev

SA

JV71-TR
Date:
A

Monday, July 06, 2009

Sheet
E

33

of

61

FAN1_VCC

5V_S0

C670

DY SC2200P50V2KX-2GP

R9

D20
BAS16-1-GP

FAN1_VCC

AFTE14P-GP

TP57

FAN1_FG1

AFTE14P-GP

TP58

10KR2J-3-GP
FAN1_VCC

83.00016.B11
2ND = 83.00016.K11

FAN1

SC4D7U6D3V3MX-2GP

C679

DY

*Layout* 15 mil
C669
SCD1U16V2ZY-2GP

5
FAN1_FG1

3
2
1

4
C18
SC1KP50V2KX-1GP

*Layout* 15 mil

ACES-CON3-GP-U1

20.F0714.003
2ND = 20.D0246.103
5V_S0

U2

2ND = 74.75392.079

G1

GAP-CLOSE

G792SFUF-GP
74.00792.A79

DXP1:108 Degree
DXP2:H/W Setting
DXP3:88 Degree

12,35,41,43,48,59,60

PM_SLP_S3#

32KHZ

R7
10R2J-2-GP
1
2

Q11
MMBT3904-4-GP

SC470P25V2KN
SC2200P50V2KX-2GP

84.T3904.C11
2ND = 84.03904.L06

SC2200P50V2KX-2GP

G2

Q23
MMBT3904-4-GP

B
C702

84.T3904.C11
2ND = 84.03904.L06

2.H/W Shutdown

H_THERMDA 6

Place near chip as close


as possible

C20
SC2200P50V2KX-2GP
H_THERMDC 6

G792_32K

1.For CPU Sensor

RTC_CLK

11,15

U16B

C551

14

3D3V_S5

G792_DXN2
G792_DXN3

C8

C17

8
10
12

SGND1
SGND2
SGND3

GAP-CLOSE

R10
49K9R2F-L-GP

5
17

RUNPW ROK

DGND
DGND

2
1

41

ALERT#
THERM#
THERM_SET
RESET#

3.System Sensor, Put Plamrest.

G792_DXP2
G792_DXP3

SC470P25V2KN

15
13
3
2

V_DEGREE

SMBD_Therm 35,53
SMBC_Therm 35,53

ALERT#
T8_HW _SHUT#

G792_32K

13

1
4
14
16
18
19

DXP1
DXP2
DXP3

FAN1
FG1
CLK
SDA
SCL
NC#19

7
9
11

SCD1U16V2ZY-2GP

T8=90

VCC
DVCC

1
1
R11
21KR2F-GP

6
20

C10
SCD1U16V2ZY-2GP

C9

DY

C24
SC1U10V3ZY-6GP

C12
SC4D7U6D3V3MX-2GP

2
R12
10R2J-2-GP

5V_G792_S0

*Layout* 30 mil

5V_S0

TSLVC08APW -1-GP

73.07408.L16
2ND = 73.07408.L15

32K suspend clock output

BL3#
5V_AUX_S5

DCBATOUT

5V_AUX_S5
B

U43

HW thermal shut down tempature


setting 95 degree . Put Near SB.

LOW 3_OFF

G680LT1UF-GP

DY

3D3V_AUX_S5

HYST

G709_VCC
SB_TH_HYST

G709T1UF-GP

174KR2F-GP

RSMRST# 6,35

R314
0R2J-2-GP

DY
2

OUT#: Hi active / mount R1110


Low active / mount R1108

VCC

R309
0R2J-2-GP

DY

DY R337
D18
BAW 56-7-F-GP
3D3V_AUX_S5

U39

C646
SCD1U16V2ZY-2GP

1
2
3

35,51 S5_ENABLE

DY

SET
GND DY
OUT#

DY

1
1

DY

2
3

R322
0R0402-PAD

D17
BAT54-4-GP

1
2
3

HTH

1
R311
10KR2J-3-GP

2 SB_THSET
18KR2F-GP
T8_HW _SHUT#

C645
SCD01U16V2KX-3GP
U38

R321

DY

R338
6K04R2F-GP

T8_HW _SHUT#

LTH

1
2
3

HTH
DY
GND
RESET#/RESET LTH

R308
150R2J-L1-GP-U
5V_AUX_S5

VCC

1MR2F-GP

DY

DY R330

HTH

DY
2

C656
SCD1U16V2ZY-2GP

HW Thermal Throttling

A
B
GND

VCC

DY

S5PW R_ENABLE 45
D34

NC7S08M5X-NL-GP

2
1

6,35

RSMRST#

1KR2F-3-GP

KBC_THERMTRIP# 35

BAT54CPT-GP

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

G792
Size

Document Number

A3

83.R2003.E81
2ND = 83.BAT54.081
5

Wistron Corporation

3V5V_ENABLE 45

3
1

R298

UMA

Date:
2

Rev

SB

JV71-TR
Monday, July 06, 2009

Sheet
1

34

of

61

33
33

E51_TxD
DBC_EN

TPAD14-GP
SRN10KJ-5-GP

111
113
CCD_ON 112

E51_TxD
E51_RxD
TP110

DC_BATFULL114
LCD_CB_SEL
14
15

40 DC_BATFULL
19 LCD_CB_SEL
34,51 S5_ENABLE

VCORF

GPIO16
GPIO34
GPIO36

SER/IR

KROW 0
KROW 1
KROW 2
KROW 3
KROW 4
KROW 5
KROW 6
KROW 7

SB_ID
GPIO24

1
2

1
2

TP48
TP35
TP49
TP36
TP50
TP37
TP51
TP52

AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP C
AFTE14P-GP

36
36
36
36

SPIDI
SPIDO
SPICS#
SPICLK

VCC_POR#

85

ECRST#

FIU

W PCE773LA0DG-GP

FRONT_PW RLED 40
STDBY_LED 40
CAP_LED 38
AD_OFF 50
RSMRST#_KBC 12
PM_SLP_S5# 12,47
CHARGE_LED 40

71.00773.00G

TP_LOCK_LED 40
BLON_OUT 19

BLON_IN

6,34

ECSCI#_1

12

SPI_W P# 36

ECSW I#

3D3V_S0

84.T3906.A11
2ND = 84.03906.F11

3D3V_S5
3D3V_AUX_S5
3D3V_S5
S5_ENABLE

ECSW I#_KBC

DY

1
R88

for TR
R115
10KR2J-3-GP

R114
10KR2J-3-GP

2
1

PCB_VER1
PCB_VER0

DY

R116
10KR2J-3-GP

LOW _PW R
1
2KBC_THERMTRIP#
3 ENERGY_DET
4

8
7
6
5

SRN10KJ-6-GP

2
0R2J-2-GP

3D3V_S0

DY

MODEL_ID1

MMBT3906-4-GP

C731

83.R0304.A8H
2ND = 83.R2002.B8E

GMCH_BL_ON 9

Internal KeyBoard Connector

Q7

RSMRST#

CH731UPT-GP

2
0R2J-2-GP

R172
10KR2J-3-GP

1 ECRST#
10KR2J-3-GP
KA20GATE
KBRCIN#

RN89

DY

1
R384

2 ECSCI#_KBC
0R2J-2-GP

DY
D2

12

4
3

SRN10KJ-5-GP

1
R71

LOW _PW R 26
ENERGY_DET 26
BT_LED
40
USB_PW R_EN# 25

SPI_W P_R# 2 R76


1
0R0402-PAD

3D3V_S0

R478 2
RN91
1
2

Reserve for DY
EC964
EMI
SC1KP50V2KX-1GP
0408

MODEL_ID1
SPI_W P_R#
UMA_DISCRETE#
LOW _PW R
ENERGY_DET

3D3V_AUX_S5

KBRCIN#

1KBC_XO_R
2

2
2

1
1
1
1
1
1
1
1

MODEL_ID0

GND
GND
GND
GND
GND
GND

AGND

KROW 0
KROW 1
KROW 2
KROW 3
KROW 4
KROW 5
KROW 6
KROW 7

TP109 TPAD14-GP
TP122 TPAD14-GP

R113
10KR2J-3-GP

PlanarID
(1,0)
SA: 0,0
SB: 0,1
-1: 1,0
-2: 1,1

DY

R258
10KR2J-3-GP

CRT_DEC#

UMA

MODEL_ID0

2009/04/20
UMA_DISCRETE#

2009/04/20 ADD By John

DY
R380
10KR2J-3-GP

28

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

R393
10KR2J-3-GP
Title

DIS

PTW O-CON26-4-GP

Size

A3

20.K0382.026
2ND = 20.K0320.026
5

F_SDI
F_SDO
F_CS0#
F_SCK

54
55
56
57
58
59
60
61

PS/2

2009/04/16 Change By John

PM_SLP_S3# 12,34,41,43,48,59
KBC_PW RBTN# 39
AC_IN#
49
LID_CLOSE# 39

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

86
87
90
92

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

KBC

KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL17

71.00773.00G

GPIO12/PSDAT3
GPIO25/PSCLK3
GPIO27/PSDAT2
GPIO26/PSCLK2
GPIO35/PSDAT1
GPIO37/PSCLK1

TPDATA
TPCLK

1
2

CRT_DEC# 20

5
18
45
78
89
116

27
KCOL0

W PCE773LA0DG-GP

103

KB1

13
12
11
10
71
72

BECKUP#

39 BECKUP#
38 PW R_CON_LED
40 AC_IN_LED
38 PW R_CON_BTN#
37 TPDATA
37 TPCLK

KBC_THERMTRIP# 34

PCB_VER0
PCB_VER1

VCORF

C146
SCD1U16V2ZY-2GP

KBC_BEEP
EC_TMR
BRIGHTNESS

TP189 TPAD14-GP
FP_DETECT#
37

44

GPIO

GPO83/SOUT_CR/BADDR1
GPIO87/SIN_CR
GPO84/BADDR0

GPIO34 and GPIO46 swap


B

SPI

GPIO14/TB1
GPIO20/TA2
GPIO56/TA1
GPIO15/A_PWM
GPIO21/B_PWM
GPIO13/C_PWM

4
3

GPIO77
GPIO76/SHBM
GPIO75
GPIO81

12
19

28

GPIO25

AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP

RN88

1
2

84
83
82
91

TP150 TPAD14-GP
1105
AD_IA
49
TP_LOCK_BTN# 39
W IRELESS_BTN# 39
BT_BTN# 39

KBSOUT0/JENK#
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KBSOUT4/JEN0#
KBSOUT5/TDO
KBSOUT6/RDY#
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT
GPIO60/KBSOUT16
GPIO57/KBSOUT17

TP39
TP27
TP40
TP28
TP41
TP29
TP42
TP30
TP43
TP31
TP44
TP32
TP45
TP33
TP46
TP25
TP47
TP34

DY

DBC_EN

KBC_CIR

TP63
12,51 PM_PW RBTN#

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

SC1U10V3KX-3GP

24 BLUETOOTH_EN
19
DBC_EN
33 W IRELESS_EN
40 W LAN_TEST_LED

BAT_IN#

TPAD14-GP

1 10KR2J-3-GP

DY
KCOL0
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL17

R111
10KR2J-3-GP
1
2 E51_TxD

64
95
93
94
119
6
109
120
65
66
16
17
20
21
22
23
24
25
26
27
28
73
74
75
110

32KX2
GPIO55/CLKOUT

63
117
31
32
118
62

19
46
76
88
115
VCC
VCC
VCC
VCC
VCC

102

VDD

AVCC

SP

GPIO66/G_PWM

DY

GPIO01/TB2
GPIO03
GPIO06
GPIO07
GPIO23
GPIO24
GPIO30
GPIO31
GPIO32/D_PWM
GPIO33/H_PWM
GPIO40/F_PWM
GPIO42/TCK
GPIO43/TMS
GPIO44/TDI
GPIO45/E_PWM
GPIO46/TRST#
GPIO47
GPIO50/TDO
GPIO51
GPIO52/RDY#
GPIO53
GPIO70
GPIO71
GPIO72
GPO82/TRIS#

79
30

R66

53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33

81

NUM_LED

SMB

32KX1/32KCLKIN

KBC_XO

38

GPIO74/SDA2
GPIO73/SCL2
GPIO22/SDA1
GPIO17/SCL1

GPI94
GPI95
GPI96
GPI97

77

3D3V_S0 R112
10KR2J-3-GP
1
2 E51_RxD

BAT_SDA
BAT_SCL

D/A

2 KBC_XI
10MR2J-L-GP

2 OF 2

U81B

29 AMP_SHUTDOW N#

1105

101
105
106
107

1
R85

49,50
49,50

BATTERY----->

68
67
69
70

LPC

GPI90/AD0
GPI91/AD1
GPI92/AD2
GPI93/AD3
GPIO05
GPIO04

97
98
99
100
108
96

TPAD14-GP TP113
TPAD14-GP TP114

34,53 SMBD_Therm
34,53 SMBC_Therm

THERMAL----->

R382
100KR2J-1-GP

104

2
X2

BLON_IN

U81A

VREF

5V_AUX_S5

9,53

A/D

X-32D768KHZ-38GPU

82.30001.691

SC4D7P50V2CN-1GP

3D3V_AUX_S5

C285
1 DY2PCLK_KBC_RC

LPC_LFRAME#
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
INT_SERIRQ
PM_CLKRUN#
KBRCIN#
KA20GATE

80
GPIO41

1
2

11,36
11,36
11,36
11,36
11,36
11
11
12
12

R109
0R2J-2-GPDY

1
2

1
2

8
7
6
5
1
2
3
4

1
2

11,15 PCLK_KBC

GPIO10/LPCPD#
LRESET#
LCLK
LFRAME#
LAD0
LAD1
LAD2
LAD3
SERIRQ
GPIO11/CLKRUN#
KBRST#
GA20
ECSCI#/GPIO54
GPIO65/SMI#
GPIO67/PWUREQ#

C194

R87
30KR2F-GP

124
7
2
3
126
127
128
1
125
8
122
121
ECSCI#_KBC 29
9
ECSW I#_KBC123

C730
SCD1U16V2ZY-2GP

C232
SC100P50V2JN-3GP

DY

C749
SCD1U16V2ZY-2GP

DY

C271

C139
SCD1U16V2ZY-2GP

390R2J-1-GP

C725

C733

SCD1U16V2ZY-2GP

9,11,26 PLT_RST1#

1 OF 2

PLT_RST1#_1

C259

BAT_IN#

R95

3D3V_S0

SC10U6D3V3MX-GP

50

2009/07//01 PD Change to 390 for reset

3D3V_S0

SCD1U16V2ZY-2GP

LPC_LAD[0..3]

11,36 LPC_LAD[0..3]

1 R394
2
0R0603-PAD

SC10U6D3V3MX-GP

DY

C750
SCD1U16V2ZY-2GP

SMBC_Therm
SMBD_Therm

C754
SC1U16V3ZY-GP

SC10U6D3V3MX-GP

BAT_SCL
BAT_SDA

C751

DY DY

C207

SC15P50V2JN-2-GP

C753
RN39
SRN4K7J-10-GP

VBAT

3D3V_AUX_S5

SC15P50V2JN-2-GP

VBAT
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY

FOR KBC DEBUG


3D3V_AUX_S5

EC36

3D3V_S0

3D3V_AUX_S5

Date:
4

KBC WPC773

Document Number

JV71-TR

Monday, July 06, 2009

Rev

SB
Sheet
1

35

of

61

3D3V_AUX_S5

5
6
7
8

RN94

DY

R106
0R0603-PAD

U9

SPI_HOLD#

CS#
SO/SIO1
WP#/ACC
GND

VCC
HOLD#
SCLK
SI/SIO0

BIOS_VCC
SPI_HOLD#
BIOS_CLK
BIOS_DIO

8
7
6
5

EC76

MX25L1605DM2I-12G-GP

16M Bits
SPI FLASH ROM

0R0402-PAD
ER3 1
2
2
1
ER2
0R0402-PAD
EC75

SPICLK
SPIDO

35
35

DY

SC4D7P50V2CN-1GP

DY
72.25165.A01
2ND = 72.25X16.A01

SC4D7P50V2CN-1GP

DY

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

DY

EC78

EC77

1
2BIOS_DO
33R2J-2-GP SPI_W P#

1
2
3
4

ER4

35

SPICS#
SPIDI
SPI_W P#

35
35

4
3
2
1

SRN10KJ-6-GP

EC34
SCD1U16V2ZY-2GP

3D3V_AUX_S5

GOLDEN FINGER FOR DEBUG BOARD


11,35 LPC_LAD[0..3]

LPC_LAD[0..3]
DB1
3D3V_S0
11,35 LPC_LAD0
11,35 LPC_LAD1
11,35 LPC_LAD2
11,35 LPC_LAD3
11,35 LPC_LFRAME#
11,32,33,52 PLT_RST1#_B
11,15 PCLK_FW H

1
2
3
4
5
6
7
8
9
10
11
12

DY
B

MLX-CON10-7-GP

20.D0183.110

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

A3
Date:
5

Document Number

BIOS
JV71-TR

Monday, July 06, 2009

Rev

SA
Sheet
1

36

of

61

TOUCH PAD
TP_DATA
TP_CLK
TP_LEFT
TP_RIGHT

5V_S0
5V_S0

2
4
3

DY

DY

DY

DY

12
11
10
9
8
7
6
5
4
3
2

TP_DATA
TP_CLK

SRN33J-5-GP-U

1
2
4
3

1
2

EC23
SC100P50V2JN-3GP

TPDATA
TPCLK

35 TPDATA
35 TPCLK

14

EC22
SC100P50V2JN-3GP

RN85

TPCN1

EC74
SC100P50V2JN-3GP

DY

EC73
SC100P50V2JN-3GP

EC26
SCD1U10V2KX-4GP

RN83
SRN10KJ-5-GP

TP_RIGHT

TP_LEFT

1
13
PTW O-CON12-3-GP-U

20.K0370.012
2ND = 20.K0315.012

DY
EC969

EC968

SC1KP50V2KX-1GP

DY

USBPN6
SC1KP50V2KX-1GP

DY
EC966

1
2

5V_S0

EC965

USBPP6

2009/05/26 SB Change to 5D5V

DY

FP_ID
SC1KP50V2KX-1GP

DY
EC967

SC1KP50V2KX-1GP

FP_DETECT#

SC1KP50V2KX-1GP

Finger printer

R427
0R0603-PAD

2009/04/17 For EMI By John

2009/04/21 For EMI By John

FPCN1
13

1
3D3V_FP_S0
12
12
35
12
A

USBPP6
USBPN6
FP_DETECT#
FP_ID

TP_LEFT
TP_RIGHT

2
3
4
5
6
7
8
9
10
11
12

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

14
PTW O-CON12-3-GP-U

Title

20.K0370.012
2ND = 20.K0315.012

Size

A3
Date:
5

Touch PAD/Finger printer

Document Number

JV71-TR

Monday, July 06, 2009

Rev

SB
Sheet
1

37

of

61

2009/04/16 Change By John

Q20

35 PW R_CON_LED

DY
C

R1

R2
PDTC143ZU-GP-U

PW R_CON_LED# 25

PW R_CON_LED#

E
D

84.00143.E1K
2ND = 84.00143.D1K

5V_S0
R263

Q16
35

NUM_LED

R1

NUM_LED#_R

NUM_LED#

300R2J-4-GP

R2
PDTC143ZU-GP-U

NUM_LED1
K
A
LED-B-98-GP

83.00193.A70
2nd = 83.19217.G70

84.00143.E1K
2ND = 84.00143.D1K

5V_S0
R265

Q17
35

CAP_LED

R1

CAP_LED#_R

CAP_LED#

300R2J-4-GP

R2
PDTC143ZU-GP-U

CAP_LED1

A
LED-B-98-GP

83.00193.A70
2nd = 83.19217.G70

84.00143.E1K
2ND = 84.00143.D1K

5V_S0
R264

13

MEDIA_LED1
K
A

300R2J-4-GP

LED-B-98-GP

MEDIA_LED#

2009/07/06 PD change to 300

83.00193.A70
2nd = 83.19217.G70

1
R566

10KR2J-3-GP

3D3V_S0

R569
35 PW R_CON_BTN#

PW R_CON_BTN# 1

2470R2J-2-GP

25 PW R_CON_BTN#_1
B

2009/04/16 Change By John

PW R_CON_BTN#
EC71
A

NUM_LED#_R
EC61
CAP_LED#_R
EC63
MEDIA_LED#
EC62

DY
1

2
SC220P50V2JN-3GP

DY
1

2
SC220P50V2JN-3GP

DY
1

2
SC220P50V2JN-3GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

DY
1

2
SC220P50V2JN-3GP
Title
Size

A3
Date:
5

LAUNCH BOARD

Document Number

JV71-TR

Monday, July 06, 2009

Rev

SB
Sheet
1

38

of

61

Cover Up Switch

Power Button
PW R_SW 1

KBC_PW RBTN#_1

3D3V_AUX_S5

DY

R621

OUT

2009/05/23 SB Change

VDD
1
2

Beckup Button

4
3

LID_CLOSE# 35

EC161

EC70
SCD22U6D3V2KX-1GP

ME268-002-GP

KBC_PW RBTN#
LID_CLOSE#

100R2J-2-GP

GND

3D3V_AUX_S5
RN80

DY
MLVG04023R0QV05-GP

LID_CLOSE#_1

62.40009.A61
2ND = 62.40009.B21

LID1

74.00268.07B
EC69
SCD1U16V2ZY-2GP

2009/04/02 for power loss By John


1

SRN10KJ-5-GP

SW -TACT-5P-1-GP

EC3
SC1KP50V2KX-1GP

4
2

BK_SW 1

Beckup#_1

4
2

SW -TACT-5P-1-GP
C

DY

EC4
SC1KP50V2KX-1GP

62.40009.A61
2ND = 62.40009.B21

3D3V_S0

2009/05/23 SB Change

RN4

1
2
3
4

8
7
6
5

W IRELESS_BTN#
BT_BTN#
BECKUP#
TP_LOCK_BTN# 35

SRN10KJ-6-GP

WIRELESS Button
W LAN_SW 1
W IRELESS_BTN#_1

2
5
4
SW -TACT-5P-1-GP

RN3
Beckup#_1
1
BT_BTN#_1
2
W IRELESS_BTN#_1 3
KBC_PW RBTN#_1 4

DY

EC6
SC1KP50V2KX-1GP

8
7
6
5

Beckup#
BECKUP# 35
BT_BTN#
BT_BTN# 35
W IRELESS_BTN#
W IRELESS_BTN# 35
KBC_PW RBTN#
KBC_PW RBTN# 35

SRN470J-3-GP

62.40009.A61
2ND = 62.40009.B21
B

2009/05/23 SB Change

T/P lock Button


TP_LOCK1

BT_SW 1

5
BT_BTN#_1

4
SW -TACT-5P-1-GP

3
5

EC5
SC1KP50V2KX-1GP

470R2J-2-GP

4
SW -TACT-5P-1-GP

DY

R227
1

TP_LOCK_BTN#_1

BT/3G Button
2

TP_LOCK_BTN# 35

EC51
SC1KP50V2KX-1GP

DY

62.40009.A61
2ND = 62.40009.B21

62.40009.A61
2ND = 62.40009.B21

2009/05/23 SB Change

2009/05/23 SB Change
A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

A3
Date:
5

Document Number

SWITCH
JV71-TR

Monday, July 06, 2009

Rev

SA
Sheet
1

39

of

61

Q29
PW RLED#_1

R1

35 FRONT_PW RLED

R628
PW RLED#_1

R2
PDTC143ZU-GP-U

PW R_LED1
FRONT_PW RLED#_R1

84.00143.E1K
2ND = 84.00143.D1K

300R2J-4-GP
FRONT_PW RLED#_R2
1

5V_S5

PW R_LED7
A

5V_S5

LED-B-98-GP

83.00193.A70

2
R629

300R2J-4-GP
FRONT_PW RLED#_R3
1

2nd = 83.19217.G70

PW R_LED8
A

5V_S5

Q30
D

35

STDBY_LED

STDBY_LED#_BD

R1

STDBY_LED#_R
SRN300J-1-GP
4
3
2
1

R2
PDTC143ZU-GP-U

84.00143.E1K
2ND = 84.00143.D1K

83.00193.A70

LED-OB-2-GP

R630

Q15

83.19223.A70
2ND = 83.00195.G70

35 FRONT_PW RLED

PW RLED#_2

R1

DC_BATFULL#_R

5V_S5

LED-B-98-GP
R631

300R2J-4-GP
FRONT_PW RLED#_R5
1

CHARGER_LED1

84.00143.E1K
2ND = 84.00143.D1K

2nd = 83.19217.G70

PW R_LED9
A

83.00193.A70

84.00143.E1K
2ND = 84.00143.D1K

5V_AUX_S5

300R2J-4-GP
FRONT_PW RLED#_R4
1

R2
PDTC143ZU-GP-U

R2
PDTC143ZU-GP-U

LED-B-98-GP

3D3V_S5

DC_BATFULL#

R1

5
6
7
8

RN110

Q31

35 DC_BATFULL

2nd = 83.19217.G70

PW R_LED10
A

5V_S5

LED-B-98-GP

83.00193.A70

2nd = 83.19217.G70

2009/06/03 SB Change

Q32

35 CHARGE_LED

CHARGE_LED#

R1

CHARGE_LED#_R

R2
PDTC143ZU-GP-U

83.19223.A70
2ND = 83.00195.G70

R1225

Q14
35

AC_IN_LED

AC_IN_LED_1

R1

R2
PDTC143ZU-GP-U

3D3V_AUX_S5

LED-OB-2-GP

84.00143.E1K
2ND = 84.00143.D1K

300R2J-4-GP
AC_IN_LED#_1

300R2J-4-GP
AC_IN_LED#_2

83.00193.A70

300R2J-4-GP
AC_IN_LED#_3
2

PW R_LED12
K
A

R1226

E
1

R1227

84.00143.E1K
2ND = 84.00143.D1K

PW R_LED11
A

5V_S5

LED-B-98-GP

2nd = 83.19217.G70
5V_S5

LED-B-98-GP

83.00193.A70

2nd = 83.19217.G70

PW R_LED13
K
A

5V_S5

LED-B-98-GP

2009/06/04 SB Change

83.00193.A70

2nd = 83.19217.G70

3D3V_S0
R219

Q10

3D3V_S0
35 TP_LOCK_LED

R2
PDTC143ZU-GP-U

TP_LOCK_LED#

R1

TP_LOCK_LED#_1 K

LED-Y-57-GP

75R2J-1-GP

83.01921.P70
2ND = 83.00190.S7A

84.00143.E1K
2ND = 84.00143.D1K

R627
100KR2J-1-GP

TP_LOCK_LED1
A

R13 2
1
0R0402-PAD

2009/06/02 SB Add For Led Bug


Q1
W LAN_LED#_1

R4

2
1

DY

R5
1
2
0R0402-PAD

R1

DTA143ZUB-GP

BAW 56-5-GP

LED-Y-57-GP

22R2J-2-GP

84.00143.F1K
2ND = 84.00143.C1K

W LAN_LED#_2

W LAN_LED1
A

W LAN_LED#

Q4

83.01921.P70
2ND = 83.00190.S7A

R2

33 W LAN_LED#_MC

3D3V_S0
W LAN_LED#_3

D1

83.00056.Q11

84.2N702.D31
2ND = 84.2N702.E31

.
. .
.

35 W LAN_TEST_LED
5V_S0
R6

Q3
35

BT_LED

R1

R2
PDTC143ZU-GP-U

C
E

BT_LED#

BLT_LED#_1

100R2J-2-GP

84.00143.E1K
2ND = 84.00143.D1K

2N7002E-1-GP

3GBT_LED1
A

Wistron Corporation

LED-B-98-GP

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

83.00193.A70
2nd = 83.19217.G70

Title

Blue-tooth LED

Size

A3
Date:
5

Document Number

LED
JV71-TR

W ednesday, July 08, 2009

Rev

SB
Sheet
1

40

of

61

3D3V_S0

4
3

2D5V_S0

RN99
SRN100KJ-6-GP
D

1
2

C825

D27
2D5V_S0_PG

SC1U10V3ZY-6GP
12,34,35,43,48,59,60

VCORE_EN 44,46

PM_SLP_S3#

BAW 56-5-GP

83.00056.Q11
2ND = 83.00056.G11
3RD = 83.00056.K11

R457
45

3V/5V_POK

DY

0R2J-2-GP
R456
1 DY
2

47 1D8V_S3_PW RGD

0R2J-2-GP

P/H @ 1D8V_S3 PAGE


R120
44

DY

VRM_PW RGD

1D1V_PW RGD 46

0R2J-2-GP

14

3D3V_S5

12,34,35,43,48,59,60

84.2N702.D31
8

SB_PW RGD 12

46 1D1V_PW RGD

34

3
RUNPW ROK

D3
RUNPW ROK_D

NB_PW RGD 9,12

2N7002E-1-GP

10
2

S
U16C

PM_SLP_S3#

1D8V_S3

DY

.
.
. .

Q9

TSLVC08APW -1-GP

RUNPW ROK_D

PH in page 3
BAW 56-5-GP

83.00056.Q11
2ND = 83.00056.G11
3RD = 83.00056.K11

73.07408.L16
2ND = 73.07408.L15
3RD = 73.07408.02B

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

POWER ON LOGIC
Size

A3
Date:
5

Document Number

Rev

JV71-TR

Monday, July 06, 2009

SA
Sheet
1

41

of

61

Adapter
Input Signal
AD_OFF

AD_IN#

(O)

Input Signal

Input Power
AD_JK

Output Signal

Input Signal
VCORE_EN

ENTRIP1

Output Power

VCC(I)

DCDC 1D2V(TPS51124)

EN0
S5_ENABLE

DCDC 5V/3D3V(RT8205A)

Output Signal

(I)

VCC(O)

PGOOD

Input Power
DCBATOUT

Output Power
VCLK

VIN

CPU_CORE
ISL6265HRTZ

VREG3
VREG5

Input Signal

Output Signal

SVD

VOUT
VRM_PWRGD

PGOOD

CPU_SVC

PGOOD

3V/5V OK

Input Power

VOUT

V5FILT

+15V_ALW
3D3V_AUX_S5

Output Power

V5DRV
DCBATOUT

1D2V_S0

VTT

V(I)

5V_AUX_S5
3D3V_S5
5V_S5

SVC

DCDC 1D1V(TPS51124)

VCORE_EN

ENABLE

DCDC 1D8V(RT8209B)

CPU_PWRGD_SVID_REG

PWROK
Input Power

+5V_RUN

Input Signal
PM_SLP_S5#

Output Power

VCC

DCBATOUT

VCC_CORE(O)

VIN

VCC_CORE(O)
VCC_CORE(O)

Input Signal

EN_PSV

PGOOD

1D2V_PWRGD

Input Power

5V_S5
VCC_CORE1

Output Power
VTT

V5IN
DCBATOUT

VDDNB

G9161
PM_SLP_S5#

+5V_SUS
1D8V_S3

EN_PSV

PGOOD

Input Signal

1D1V_PWRGD

Output Power

V5FILT
V5DRV

V(I)

DCBATOUT

RT9026

VTT

1D2V_S0

V(I)

CHARGER MAX8731

Output Signal

LDO_SHDN#

Output Signal

1D8V_S3_PWRGD
Input Power

VCC_VORE0

Output Signal

Input Signal

Output Signal

0D9V LDO
1D2V LDO

1D2V_PWRGD
EN_PSV

ENTRIP2

AD+

5V_S5

CPU_SVD

Output Signal

Input Signal
MAX8731A ACIN

LDO_POK

Output Signal

ACIN
MAX8731A ACOK

5V_S5
Input Power
3D3V_S5

IN

Output Power
OUT

Input Power

Output Power

VIN
1D2V_S5

1D8V_S3

PBAT_SMBDAT

LDO_OUT

0D9V_S3

PBAT_SMBCLK

LDO_OUT

VLDOIN

ACOK

SDA
SCL
Input Power

1D5V LDO
2D5V LDO
Input Signal

R9161

G9571

Input Signal

Output Signal

Input Power
Input Power
IN

3D3V_AUX_S5

Output Signal

3D3V_S0

AD+

Output Power
OUT

3D3V_S0
2D5V_S0

Output Power

IN

OUT

DCIN
VDDSMB

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

A3
Date:
3

1D5V_S0

Size

+VCHGR

V(O)

Title

Output Power

Power Block Diagram


Document Number

Rev

JV71-TR

Monday, July 06, 2009

SA
Sheet
1

42

of

61

Aux Power

3D3V_AUX_S5

5V_S5
5V_S0
5V_S5

5V_S0
U28

I min = 150 mA

3D3V_AUX_S5

U11

U67

DY

S
S
S
G

D
D
D
D

8
7
6
5

D
AO3400-1-GP-U

2 Z_12V
S
10KR2J-3-GP
Q28
NDS0610-NL-GP

C921 1

1
R529
100KR2J-1-GP

R526
330KR2J-L1-GP

3D3V_S0

SCD22U25V3KX-GP

10KR2J-3-GP

2 R523
1 Z_12V_G3
330KR2J-L1-GP

U25

1
2
3
4

D31
PDZ9D1B-GP

3D3V_S5

DY

U65

S
S
S
G

D
D
D
D

1D8V_S0

1
2
3
4

Z_12V_D3

DY
G

2N7002KDW -GP

Z_12V_D3

PM_SLP_S3# 12,34,35,41,48,59,60
R431

84.2N702.A3F
2ND = 84.DM601.03F

U63
D
D
D
D

8
7
6
5

C795
SC22P50V2JN-4GP

for TR

R581
0R2J-2-GP

2009/04/15 ESD For 2KV By John

1D8V_S0

G
2

1 R586
2
0R3J-0-U-GP

DIS

DIS

DY

84.2N702.A3F
2ND = 84.DM601.03F

DCBATOUT

R583
100KR2J-1-GP

1D8V_M92

DY

DY R1221
2

0R2J-2-GP

48,59,60 VGA_PW R_EN

53

2
1MR2F-GP

DY

DY

1D8V_M92_ON
C865
SC22P50V2JN-4GP

1
D33
PDZ9D1B-GP

DY

83.9R103.C3F

PE_GPIO1_1

DY R1222
60

1D5V_POK

84.03400.A37

DY

0R2J-2-GP

R509
PE_GPIO1_1

11,59 PE_GPIO1

AO3400-1-GP-U

2009/04/15 ESD For 2KV By John

DY R1220

1D8V_S3

U59

2N7002KDW -GP

DIS

DIS

1 R587
2
0R3J-0-U-GP

C675
SC22P50V2JN-4GP

2
4

DIS

3D3V_M92_ON

2MR2F-GP

DY

U97

M92_runpwr_1

2N7002EW -1-GP
B

AO3400-1-GP-U

84.03400.A37

R342
R340
10KR2J-3-GP

DY
G

1
2
0R3J-0-U-GP

DIS

3D3V_S0

1D8V_M92
R585

3D3V_S5

for TR
M92_runpwr

Q34

U44

3D3V_M92

R584
100R5J-3-GP

2009/04/21 Change By John

DIS
DY

84.03400.A37

1D8V_S0_ON

Change

84.04468.037

2N7002EW -1-GP

3D3V_M92

S
S
S
G

AO3400-1-GP-U

1MR2F-GP

for TR

DY

AO4468-GP

Q33

1D8V_S3
1D8V_S0

2
D

84.03400.A37

1D8V_S3
U49

D
AO3400-1-GP-U

84.04468.037

83.9R103.C3F

Z_12V_D4

Change

U96
3D3V_runpwr

8
7
6
5

AO4468-GP

DY R524

100R5J-3-GP

3D3V_S5
3D3V_S0

D
R525

3D3V_S0

RUN_POW ER_ON

1
R522

84.S0610.B31
2ND = 84.00610.C31

2nd source:74.09198.G7F

DCBATOUT

DY

BC1

G909-330T1U-GP
74.00909.03F

84.03400.A37

84.04468.037

GAP-CLOSE-PW R

AO4468-GP

Run Power

NC#4

3D3V_AUX_S5_G 1

VOUT

SC1U16V3ZY-GP

SC1U16V3ZY-GP

DY
2

BC2

VINDY
GND
SHDN#

1
2
3
4

Change
G9

1
2
3

5V_AUX_S5

C546
SCD1U25V3KX-GP
1 DY2

R509,R34210M
C86522pF
C6751000pF
For VGA sequence issue

0R2J-2-GP

2009/04/21 ADD By John


UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

A3
Date:
5

RUN AND AUX POWER

Document Number

JV71-TR

Monday, July 06, 2009

Rev

SA
Sheet
1

43

of

61

DCBATOUT
DCBATOUT

DCBATOUT_6265_3

CPU_VDDNB_RUN_FB_L_R

R129 2
1
0R0402-PAD

CPU_VDDNB_RUN_FB_L

3D3V_S0

R391

1
2
54K9R2F-L-GP

2 R395
1
910KR2J-GP

DY

2 R396
1
0R2J-2-GP

DY

C738
1
2

6265_FB0_R
1
C742

1
2
249R2F-GP
SC4700P50V2KX-1GP SC180P50V2JN-1GP
R102
1KR2F-3-GP
1
2

R392

2
6K81R2F-1-GP
SC180P50V2JN-1GP

2
SC1KP50V2KX-1GP

R90

ISN1
2
G7

TC23

1
2

84.57N03.A37

TC6

84.57N03.A37

R379
1 DY
2
10R2F-L-GP NTC-10K-9-GP
ISP1_R

DY 2

TC5

1
2

1
2

79.33719.L01
2ND = 77.C3371.051

79.33719.L01
2ND = 77.C3371.051

R858 close to L77

79.33719.L01
2ND = 77.C3371.051
A

UMA

1
GAP-CLOSE-PW R-3-GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

1 R94

2
Title

3D3V_S0

54K9R2F-L-GP SC1KP50V2KX-1GP

2 R92
1
316KR2F-GP

DY

6265_FB1_R
1
C217

2 R91
1
0R2J-2-GP

DY

6K81R2F-1-GP

CPU Vcore(ISL6265HR)
Size

2
SC180P50V2JN-1GP

Document Number

A3
Date:

79.22719.20L
2ND = 77.22271.20L
4
3
2
1

SC4D7U25V5KX-GP
2

1
2

1
2

5
6
7
8

R100

2
SC1KP50V2KX-1GP
C241

C218
1
2

1
5
6
7
8
1

2
4K02R2F-GP

R93
1
2
C240 SCD1U16V2KX-3GP

ISP1

C261 SC180P50V2JN-1GP
1
2DY

C236
1
2

4
3
2
1

4
3
2
1

5
6
7
8

1
2
1KR2F-3-GP
1 R397
2

C237
1
2

to
PWM IC

SE330U2VDM-L-GP

1
2
1
2
249R2F-GP
C740 SC1KP50V2KX-1GP
SC4700P50V2KX-1GP SC180P50V2JN-1GP

R98

VCC_CORE_S0_1

SE330U2VDM-L-GP

BSC057N03MSG-GP

6265_FB1_C

TC28

VCC_CORE_S0_1
Design Current: 12.6A
Peak current: 18A
OCP_min:24A

SE330U2VDM-L-GP

C741 SC180P50V2JN-1GP
1
2 DY

68.3R310.20A
2ND = 68.3R31A.10V

2
L-D36UH-1-GP

Parts

S
S
S
G

BSC057N03MSG-GP

U8

Close to
CPU socket

68.R3610.20A
2ND = 68.R3610.20C

R107
16K2R2F-GPclose

D
D
D
D

U14

S
S
S
G

R97
10R2F-L-GP

D
D
D
D

DY

2
IND-3D3UH-57GP

LGATE_NB

L47

BOOT1 1
2
C288
SCD22U10V3KX-2GP

Parallel

C178

LGATE1
C746
1
2

C179

UGATE1
PHASE1

6 CPU_VDD1_RUN_FB_L
6 CPU_VDD1_RUN_FB_H

C744
1
2

C180
SC4D7U25V5KX-GP

4
3
2
1

DY 0R2J-2-GP

6 CPU_VDD0_RUN_FB_H
6 CPU_VDD0_RUN_FB_L

R398

5
6
7
8

6265_VDIFF1
6265_FB1
6265_COMP1
6265_VW1

R96

DY

U5
BSC119N03MSC-G-GP

84.11903.C37

R388
10R2J-2-GP

L53
PHASE_NB 1

ESR=15mohm
C181

SCD1U25V3KX-GP

84.04800.D37

SC10U25V6KX-1GP

R103
10R2J-2-GP

VDDNB: Design Current: 2.1A


Peak current: 3A OCP_min:5A

DCBATOUT_6265_2
ISN1
ISP1

S
S
S
G

R387
10R2J-2-GP

D
D
D
D

4
3
2
1
UGATE_NB
BOOT_NB 1
2
C364
SCD22U10V3KX-2GP
U53
SI4800BDY-T1

D
D
D
D

1D8V_S3
VCC_CORE_S0_0
VCC_CORE_S0_1

C822

VDDNB
C320
SC2D2U6D3V2MX-GP

ISL6265AHRTZ-T-GP
ISP0
ISN0

5
6
7
8
LGATE1
PHASE1
UGATE1
BOOT1

G
S
S
S

84.04800.D37

C406

D
D
D
D

74.06265.B73

5V_S0
LGATE0

DY

G
S
S
S

U10

U50
SI4800BDY-T1

BOOT_NB
BOOT0
UGATE0
PHASE0

36
35
34
33
32
31
30
29
28
27
26
25

GNDA_VCORE

6265_FB0_C

close
to L75

49
48
47
46
45
44
43
42
41
40
39
38
37
GND
VIN
VCC
FB_NB
COMP_NB
FSET_NB
VSEN_NB
RTN_NB
OCSET_NB
PGND_NB
LGATE_NB
PHASE_NB
UGATE_NB
BOOT_NB
BOOT0
UGATE0
PHASE0
PGND0
LGATE0
PVCC
LGATE1
PGND1
PHASE1
UGATE1
BOOT1

13
14
15
16
17
18
19
20
21
22
23
24

GAP-CLOSE-PW R-3-GP

GAP-CLOSE-PW R-3-GP
R862

ISP0
ISN0
VSEN0
RTN0
RTN1
VSEN1
VDIFF1
FB1
COMP1
VW1
ISP1
ISN1

Close to
CPU socket

79.33719.L01
2ND = 77.C3371.051

C393

1
2

OFS/VFIXEN
PGOOD
PWROK
SVD
SVC
ENABLE
RBIAS
OCSET
VDIFF0
FB0
COMP0
VW0

G10

1
2
ISP0

ISP0_R
ISN0
2
G8

84.57N03.A37

1
2

5
6
7
8

1
2

2
1
2

84.57N03.A37

SE220U2VDM-8GP

1
2
3
4
5
6
7
8
9
10
11
12

CPU_PW RGD_SVID_REG
R119 1 0R0402-PAD
6265_SVD
2
R117 1 0R0402-PAD
6265_SVC
2
R118 1 0R0402-PAD
6265_ENABLE
2
6265_RBIAS
1
2
R400 93K1R2F-L-GP
6265_OCSET
6265_VDIFF0
6265_FB0
6265_COMP0
6265_VW 0

UGATE_NB

79.33719.L01
2ND = 77.C3371.051

SCD1U25V3KX-GP

GNDA_VCORE

LGATE0

79.33719.L01
2ND = 77.C3371.051

SC10U25V6KX-1GP

1
2
R399 23K7R2F-GP

SRN10J-7-GP

PHASE_NB

SC10U25V6KX-1GP

GNDA_VCORE

41 VRM_PW RGD
6 CPU_PW RGD_SVID_REG
6
CPU_SVD
6
CPU_SVC
41,46 VCORE_EN

4
3

1 R385
2
4K02R2F-GP
1
2
C735 SCD1U16V2KX-3GP
R390
R402
1
2
DY 2 1 DY
10R2F-L-GP
NTC-10K-9-GP

TC25
SE330U2VDM-L-GP

DCBATOUT_6265_3
GNDA_VCORE

R121DY
0R2J-2-GP

R403
10KR2F-2-GP

6265_VIN
6265_VCC
6265_FB_NB
6265_COMP_NB
6265_FSET_NB
6265_VSEN_NB

3D3V_S0

1
2

CPU_VDDNB_RUN_FB_H
CPU_VDDNB_RUN_FB_L

TC3
SE330U2VDM-L-GP

DY

6265_OFS/VFIXEN

GNDA_VCORE

RN45

TC4
SE330U2VDM-L-GP

DY

10KR2F-2-GP

R122
0R2J-2-GP

BSC057N03MSG-GP

PHASE_NB
1 R125
2
11K3R2F-2-GP
LGATE_NB

Parts
to
PWM IC

S
S
S
G

R123
0R0603-PAD

VDDNB

2R3J-GP
C767
SCD1U25V3KX-GP

BSC057N03MSG-GP

R124

U12

L49
2
L-D36UH-1-GP

R389
16K2R2F-GPclose

D
D
D
D

GAP-CLOSE-PW R-3-GP

3D3V_S0

U13

S
S
S
G

5V_S0

CPU_VDDNB_RUN_FB_H

D
D
D
D

ST15U25VDM-1-GP

GAP-CLOSE-PW R-3-GP
G14
1
2

R1301 0R0402-PAD
2

DCBATOUT_6265_3
R414
1
2

BOOT0 1
2
C346
SCD22U10V3KX-2GP

GNDA_VCORE

GNDA_VCORE
GAP-CLOSE-PW R-3-GP
G13
1
2

UGATE0
PHASE0

1 R132
2
22KR2F-GP

C768
SC1U10V3KX-3GP

GAP-CLOSE-PW R-3-GP
G12
1
2

2R3J-GP

68.R3610.20A
2ND = 68.R3610.20C VCC_CORE_S0_0

84.11903.C37

2
SCD1U10V2KX-4GP

DCBATOUT_6265_1
G11

1
C380

6265_OCSET_NB

DCBATOUT

VCC_CORE_S0_0
Design Current: 12.6A
Peak current: 18A
OCP_min:24A

2
SC1KP50V2KX-1GP

R415

C384

4
3
2
1

5V_S0

GAP-CLOSE-PW R-3-GP

5
6
7
8
C377 SC180P50V2JN-1GP
1
2

1 R131
26265_FB_NB_R
1
44K2R2F-1-GP
C376

4
3
2
1

U15
BSC119N03MSC-G-GP

5
6
7
8

GAP-CLOSE-PW R-3-GP
G6
1
2

2
SC33P50V2JN-3GP

4
3
2
1

GAP-CLOSE-PW R-3-GP

1
C374

C382

SCD1U25V3KX-GP

GAP-CLOSE-PW R-3-GP
G5
1
2

DY

SC4D7U25V5KX-GP

C383 C387
SC4D7U25V5KX-GP

TC8
ST15U25VDM-1-GP

SC10U25V6KX-1GP
D
S
D
S
D
S
D
G

G16

GAP-CLOSE-PW R-3-GP
G3
1
2

GAP-CLOSE-PW R-3-GP

TC7

DCBATOUT_6265_1

G4

G15

DCBATOUT_6265_2

Rev

SA

JV71-TR
Monday, July 06, 2009

Sheet
1

44

of

61

3D3V_S5

DY

VCC_ENTIP1
3V5V_ENABLE

2N7002KDW -GP

C941

84.2N702.A3F
2ND = 84.DM601.03F
2009/04/15 ESD For 2KV By John

DY

51125_ENTIP2
R594

DY

130KR2F-GP

2009/06/04 Wayne

GAP-CLOSE-PW R-3-GP

C943

VCC_ENTIP2

GAP-CLOSE-PW R-3-GP
G126
1
2
GAP-CLOSE-PW R-3-GP
G128
1
2

4
2N7002KDW -GP

GAP-CLOSE-PW R-3-GP
G130
1
2

84.2N702.A3F
2ND = 84.DM601.03F

GAP-CLOSE-PW R-3-GP
G132
1
2

2009/04/15 ESD For 2KV By John

GAP-CLOSE-PW R-3-GP
G133
1
2

R595
100KR2J-1-GP

2009/03/11 Wayne

GAP-CLOSE-PW R-3-GP
G122
1
2

SC18P50V2JN-1-GP

R593
130KR2F-GP

U99

SCD1U25V3ZY-1GP

DCBATOUT_51125

C942
SC18P50V2JN-1-GP

GAP-CLOSE-PW R-3-GP
G131
1
2

DY

R592
10KR2J-3-GP

51125_ENTIP1

GAP-CLOSE-PW R-3-GP
G129
1
2

2009/03/27 Wayne

1
3V5V_ENABLE
C940

GAP-CLOSE-PW R-3-GP
G127
1
2

TC37

U98

GAP-CLOSE-PW R-3-GP
G125
1
2

ST15U25VDM-1-GP

TC34

R591
10KR2J-3-GP

GAP-CLOSE-PW R-3-GP

ST15U25VDM-1-GP

GAP-CLOSE-PW R-3-GP

5V_S5
G118

SCD1U25V3ZY-1GP

GAP-CLOSE-PW R-3-GP
G123
1
2

5V_PW R

GAP-CLOSE-PW R-3-GP
G121
1
2

5V_AUX_S5

GAP-CLOSE-PW R-3-GP
G120
1
2

GAP-CLOSE-PW R-3-GP
G124
1
2

5V_AUX_S5

GAP-CLOSE-PW R-3-GP
G117
1
2

GAP-CLOSE-PW R-3-GP
G119
1
2

2009/03/20 Wayne

3V5V_ENABLE 34

GAP-CLOSE-PW R-3-GP
G116
1
2

GAP-CLOSE-PW R-3-GP
G115
1
2

2KR2F-3-GP

R590

34 S5PW R_ENABLE

G114

3D3V_PW R

DCBATOUT_51125
G113
2

DCBATOUT

DCBATOUT_51125
G112
2

DCBATOUT

GAP-CLOSE-PW R-3-GP

DCBATOUT_51125

DCBATOUT_51125

ENTRIP2

ENTRIP1

VREF

15

TONSEL

GND

25

14
51125_SKIPSEL

SKIPSEL

NC#18

18

51125_VCLK

3D3V_AUX_S5

2
0R2J-2-GP

DY

DY
51125_VREF

1
R605
C959
SC10U6D3V3MX-GP

R606

2
0R2J-2-GP

G
S
S
S

4
3
2
1

1
2

R597
0R2J-2-GP

DY

TP238
TPAD14-GP
R601
0R2J-2-GP

17

1
2

C955
SCD1U10V2KX-4GP

DY

77.22271.27L
2ND = 77.C2271.00L

C958
SC18P50V2JN-1-GP

R600
30KR2F-GP

51125_FB1_R

DY

DY
2

1 R237
2
0R0603-PAD

3V/5V_POK

41
R603
20KR2F-L-GP

2009/03/20 Wayne

Close to VFB Pin (pin2)

5V_AUX_S5_51125

51125_VREF

2 R604
1
0R0402-PAD

Id=7.7A
Qg=8.5~13nC
Rdson=16.5~21mohm

5V_AUX_S5

2
1

1 R236
2
0R0603-PAD

84.04812.A37

RT8205AGQW -GP
3D3V_AUX_S5

SC4D7U25V5KX-GP
2

51125_ENTIP1

PGND

SC4D7U25V5KX-GP

D
D
D
D

5
6
7
8

23

TC36
ST220U6D3VDM-20GP

PGOOD

51125_FB2_R
C957

51125_TONSEL

EN

1 2

2 51125_EN 13
820KR2F-GP
51125_ENTIP2 6

G134

IND-3D3UH-57GP

FB1

2ND = 68.3R31A.10V

U79

FB2

5V_PW R

2009/03/11 Wayne

VO1

51125_FB2

L56

68.3R310.20A

VO2

24

5
6
7
8

51125_FB1

VREG3

Id=7.7A
Qg=8.5~13nC
Rdson=16.5~21mohm

DYSC18P50V2JN-1-GP

R602
10KR2F-2-GP

51125_VO1

51125_VO2

1 2

0R2J-2-GP

19

3D3V_AUX_S5_5_51125

DYR599

LGATE1

R598
7K15R2F-L-GP

LGATE2

SCD22U6D3V2KX-1GP

2009/03/20 Wayne

PHASE1

12

3
C956

51125_DRVL1

PHASE2

51125_DRVL2

51125_VREF

51125_LL1

20

8
7
6
5
1
2
3
4

SI4812BDY-T1-E3-GP

1
2

1
2

ST220U6D3VDM-20GP

21

51125_VBST1_1

GAP-CLOSE-PWR-3-GP

G
S
S
S

77.22271.27L
2ND = 77.C2271.00L

1
R596

UGATE2

11

2
1
4D7R2F-GP

SI4812BDY-T1-E3-GP

84.04812.A37

UGATE1

51125_DRVH1

51125_LL2
U78

D
D
D
D

G135

GAP-CLOSE-PWR-3-GP

SCD1U10V2KX-4GP

DY

51125_VBST1

BOOT1

D
D
D
D

10

22

BOOT2

Design Current = 6A
Max Current = 7A
OCP min = 10A

TAI-TEC 7*7*3
DCR=17.6mohm, Irating=6A
Isat=13.5A

G
S
S
S

SCD1U25V3KX-GP
C953
1
2

4
3
2
1

C951
R1197
151125_VBST2_1 2
151125_VBST2
4D7R2F-GP
51125_DRVH2

2
IND-3D3UH-57GP

TC35

1
2

R1198

L55

U76
SI4800BDY-T1

VIN

SCD1U25V3KX-GP

68.3R310.20A
2ND = 68.3R31A.10V

2009/03/11 Wayne

C950

84.04800.D37

Id=7A
Qg=8.7~13nC
Rdson=23~30mohm

VREG5

3D3V_PW R

Id=7A
2009/03/20 Wayne
Qg=8.7~13nC
U77
Rdson=23~30mohm

16

8
7
6
5
1
2
3
4

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP
2

U75
SI4800BDY-T1

84.04800.D37

C949

SCD01U50V2KX-1GP

C948

G
S
S
S

TAI-TEC 7*7*3
DCR=17.6mohm, Irating=6A
Isat=13.5A
2009/03/11 Wayne

C954

SCD01U50V2KX-1GP

C945 C946

C952

DY

51125_EN

D
D
D
D

Design Current = 6A
Max Current = 7A
OCP min = 10A

SCD01U50V2KX-1GP

C947
SC10U25V6KX-1GP

2009/03/11 Wayne
C944

DCBATOUT_51125

S5PW R_ENABLE 34

C960
SC10U6D3V3MX-GP

UMA

Close to VFB Pin (pin5)

2 R607
1
0R0402-PAD

3D3V_AUX_S5

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

2
0R2J-2-GP

DY

1
R608

Title

DCDC 5V/3D3V (RT8205A)


Size
A3
Date:
5

Document Number

Rev

SA

JV71-TR
Monday, July 06, 2009

Sheet
1

45

of

61

DCBATOUT

DCBATOUT_51124
1D1V_PW R

G63

G55

S
S
S
G

2ND = 79.10112.3JL
DCBATOUT

DCBATOUT_51124_1

1
2

84.04800.D37

C634

5
6
7
8

GAP-CLOSE-PW R-3-GP

C633
SC4D7U25V5KX-GP

U37
SI4800BDY-T1

SC4D7U25V5KX-GP

D
D
D
D

GAP-CLOSE-PW R-3-GP
G65
1
2

GAP-CLOSE-PW R-3-GP
G57
1
2

GAP-CLOSE-PW R-3-GP
G59
1
2

Iomax=8A

1
2

1
2

1
2

GAP-CLOSE-PW R-3-GP
G51
1
2
GAP-CLOSE-PW R-3-GP
G52
1
2

79.3971V.6AL
2ND = 77.93971.02L

GAP-CLOSE-PW R-3-GP
G54
1
2

TP182TPAD14-GP

2009/03/27 WAYNE
C623 change to 1u10v for ESL

24
7

1D2V_PW RGD

1
6

U41

GAP-CLOSE-PW R-3-GP

Close to VFB Pin (pin5)

1D1V_PW RGD 41

74.51124.073

SCD1U16V2KX-3GP
51124_V5FILT

1
2

1
R328
30KR2F-GP

TC18

C682

DY

DY

51124_VFB2

84.04812.A37

5
6
7
8

R329
17K8R2F-GP

D
D
D
D

U42

G
S
S
S

10KR2J-3-GP

51124_VBST2

C661
1

R326
0R2J-2-GP

C657

4
3
2
1

DY

SI4812BDY-T1-E3-GP

DY R323

51124_VBST1

SCD1U16V2KX-3GP
51124_LL2

68.1R510.10K
2ND = 68.1R51A.10F

GAP-CLOSE-PW R-3-GP
G68
1
2

1D2V Iomax=5A
OCP>10A

GAP-CLOSE-PW R-3-GP
G69
1
2
GAP-CLOSE-PW R-3-GP
G70
1
2

SE390U2D5VM-2GP

C641
1

L37
1
2
IND-1D5UH-23-GP

SC18P50V2JN-1-GP

GAP-CLOSE-PW R-3-GP
G67
1
2

SC1U10V3KX-3GP

51124_LL1

G66

1D2V_PW R

R332
9K1R2F-1-GP

C665

R312
15KR2F-GP

C664

51124_TRIP1
51124_TRIP2

U45
SI4800BDY-T1

84.04800.D37
S
S
S
G

TPS51124RGER-GPU1

51124_TONSEL

DY

DRVH2
LL2
DRVL2

1D2V_S0

C666

BC4
SCD47U6D3V2KX-GP

17
14

1
2

1D2V_PW R
51124_DRVH2
51124_LL2
51124_DRVL2

10
11
12

D
D
D
D

2 R335
1
0R0402-PAD

DCBATOUT_51124

GND
GND
PGND2
PGND1

5
6
7
8

EN1
EN2

3
25
13
18

51124_DRVH1
51124_LL1
51124_DRVL1

21
20
19

4
3
2
1

23
8

PGOOD1
PGOOD2

51124_EN1
51124_EN2

DRVH1
LL1
DRVL1

TONSEL

V5FILT
V5IN

SCD1U25V3KX-GP

15
16

SC4D7U25V5KX-GP

51124_V5FILT

DY

VO1
VO2

BC3
SC1U10V2KX-1GP

VBST1
VBST2

22
9

C636 1

VFB1
VFB2

C654
SC1U10V2KX-1GP

1D1V_PW RGD

2
5

2
1

DY

R318
38K3R2F-GP

SC4D7U25V5KX-GP

VCORE_EN

84.04172.037

C623

TC16

2009/06/4 WAYNE

1D2V_PW R
1D1V_PW R
51124_VFB2
51124_VFB1

TRIP1
TRIP2

SC180P50V2JN-1GP

41,44

R299 DY
2
1
10KR2J-3-GP

41,44 VCORE_EN

R327
2R3J-GP

SC4D7U6D3V3MX-2GP

10KR2J-3-GP

10KR2J-3-GP

51124_VFB1

R334

SC1U10V3KX-3GP
2

2ND = 79.10112.3JL

R313

DY

S
S
S
G

5V_S5

C650

R319
16K9R2F-GP

5
6
7
8
1

3D3V_S0
GAP-CLOSE-PW R-3-GP

79.10712.L02

U40
SI4172DY-T1-GE3-GP

4
3
2
1

3D3V_S0

GAP-CLOSE-PW R-3-GP
G53
1
2

C647

68.1R01A.20B
2ND = 68.1R01B.10K

2 R333
1
0R0402-PAD

1D1V_PW R
SE390U2D5VM-2GP

TC21
GAP-CLOSE-PW R-3-GP
G48
1
2

Vo(cal)=1.1060V

L32
1
2
COIL-1UH-34-GP-U

SC18P50V2JN-1-GP

GAP-CLOSE-PW R-3-GP
G47
1
2

D
D
D
D

SE100U25VM-L1-GP

Vtrip(mV)=Rtrip(Kohm)*10(uA)
Iocp=(Vtrip/Rdson)+((1/(2*L*f))*((Vin-Vout)*Vout)/Vin))

GAP-CLOSE-PW R-3-GP
G58
1
2

G49

GAP-CLOSE-PW R-3-GP
G56
1
2

C635
SCD1U25V3KX-GP

GAP-CLOSE-PW R-3-GP
G64
1
2

4
3
2
1

TC15

79.10712.L02

1D1V_S0

DCBATOUT_51124_1

1
SE100U25VM-L1-GP

GAP-CLOSE-PW R-3-GP
G71
1
2
GAP-CLOSE-PW R-3-GP
G72
1
2

79.3971V.6AL
2ND = 77.93971.02L

GAP-CLOSE-PW R-3-GP
G73
1
2

2009/06/4 WAYNE

GAP-CLOSE-PW R-3-GP

2009/03/27 WAYNE
C682 change to 1u10v for ESL

TONSEL

GND

OPEN

V5FILT

240k/CH1
300k/CH2

300k/CH1
360k/CH2

360k/CH1
420k/CH2

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Vout=0.758V*(R1+R2)/R2 --> PWM mode


Vout=0.764V*(R1+R2)/R2 --> Skip Mode

Title

TPS51124_1D1V_1D2V
Size

Document Number

A3
Date:
5

Rev

SA

JV71-TR
Monday, July 06, 2009

Sheet
1

46

of

61

DCBATOUT_51117

Cyntec 10*10*4
DCR=4.2mohm, Irating=16A
Isat=33A

V5FILT
V5DRV

5
14

VFB
VBST

0R2J-2-GP
1 R467
251117A_EN
1
1 R466
2 51117A_TON 2
51117A_TRIP 11
249KR2F-GP

EN_PSV
TON
TRIP

13
9

LL

12

VOUT
PGOOD
GND
PGND
GND

3
6
7
8
15

C849

DY
2

R464
21KR2F-GP

4
3
2
1

5117A_DRVH2 2R3J-GP 15117A_DRVH_1


51117A_DRVL

2
1

51117A_VFB

R619

DRVH
DRVL

51117A_LL
1D8V_PW R

TC32

C903

DY

79.33719.L01
2ND = 77.C3371.051

2009/03/27 WAYNE
add C903 for ESL

Vout=0.75*(R1+R2)/R2

3D3V_S5

1D8V_PW R
R468
200KR2J-L1-GP

TPS51117RGYR-GP

1D8V_S3

1D8V_PW R

G99

74.51117.073

1
2

R481
15K8R2F-GP

R465
30KR2F-GP

4
10

68.1R510.10J

5
6
7
8
U60
FDS6690AS-GP

U57

SC1U10V2KX-1GP
2
1

2
1

C861
1

SCD1U25V3KX-GP

84.06690.E37

51117A_VFB

12,35 PM_SLP_S5#

51117A_VBST_1 2

C850

51117A_VBST

2R3J-GP

Vo(cal)=1.8214V
1D8V Iomax=10A
OCP>15A
SE330U2VDM-L-GP

SC18P50V2JN-1-GP

CH551H-30PT-GP
83.R5003.C8F

51117A_V5FILT

S
S
S
G

D29

DY

L54
1
2
IND-1D5UH-34-GP

R618

D
D
D
D

5V_S5

1D8V_PW R

2ND = 68.1R51A.10E

2009/03/19 Wayne

R469
300R3F-GP

4
3
2
1

S
S
S
G

C862
SC1U10V2KX-1GP

5V_S5

U61
FDS8884-GP

84.08884.037

SC1U10V3KX-3GP

GAP-CLOSE-PW R-3-GP

GAP-CLOSE-PW R-3-GP

C868

GAP-CLOSE-PW R-3-GP
G96
1
2

C867

GAP-CLOSE-PW R-3-GP
G93
1
2

C863

GAP-CLOSE-PW R-3-GP
G95
1
2

GAP-CLOSE-PW R-3-GP
G92
1
2

SCD1U25V3KX-GP

DCBATOUT_51117

SC4D7U25V5KX-GP

2ND = 79.10112.3JL

SC4D7U25V5KX-GP

79.10712.L02

D
D
D
D

SE100U25VM-L1-GP

TC31

DCBATOUT
G94

5
6
7
8

G91

DCBATOUT

1D8V_S3_PW RGD 41

G104

GAP-CLOSE-PW R-3-GP
G100
1
2

GAP-CLOSE-PW R-3-GP
G105
1
2

GAP-CLOSE-PW R-3-GP
G101
1
2

GAP-CLOSE-PW R-3-GP
G107
1
2

GAP-CLOSE-PW R-3-GP
G102
1
2

GAP-CLOSE-PW R-3-GP
G108
1
2

GAP-CLOSE-PW R-3-GP
G103
1
2

GAP-CLOSE-PW R-3-GP
G109
1
2

GAP-CLOSE-PW R-3-GP

GAP-CLOSE-PW R-3-GP

DDR_0.9V
Iomax=1.5A
OCP>3A

DDR_VREF_PW R
C545
G32
SCD1U10V2KX-4GP
1

C548
SC10U6D3V3MX-GP

C547
SC1U16V3KX-2GP

1D8V_S3

5V_S5

C535
SC10U6D3V3MX-GP

RT9026PFP-GP

GAP-CLOSE-PW R-3-GP

C542
SCD1U10V2KX-4GP

GAP-CLOSE-PW R-3-GP
G34
1
2

1
2
3
4
5

VIN
VDDQSNS
S5
VLDOIN
GND
VTT
S3
PGND
VTTREF VTTSNS
GND

9026_S3

10
9
8
7
6

11

9026_S5

DDR_VREF_S3

1
2
R249 0R2J-2-GP
1
2
R247 0R2J-2-GP

0D9V_S3

GAP-CLOSE-PW R-3-GP
G33
1
2

U27

12,35 PM_SLP_S5#

C544
SC10U6D3V3MX-GP

74.09026.079
2ND = 74.02997.A79
A

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

A3
Date:
5

DCDC_1D8V_APW7141/LDO 0D9V
Document Number

Rev

JV71-TR

Monday, July 06, 2009

SA
Sheet
1

47

of

61

1D5V_S0
Iomax=1A

G957

1D5V_S0_LDO

1D5V_S0
G111

1
C918

GAP-CLOSE-PW R-3-GP
G110
1
2

DY

SC10U6D3V5KX-1GP

U66

GAP-CLOSE-PW R-3-GP
3D3V_S0

3
2
1

VOUT
GND
VIN
G957T65UF-GP

DY

74.95765.03C

C913
SC1U10V3KX-3GP

DY

1D2V_S5
Iomax=400mA

For MINI Card.NEW Card power SW

U18

1D2V_S5

2D5V_LDO
3D3V_S0
U47
G74

GND

1
1

VOUT
VIN

APL5308-25AC-1GPU

74.05308.F31
2ND = 74.09131.A31

1D8V_S3

DY R622

2
0R2J-2-GP

R446
2K2R2J-2-GP

60

9025_POK

RT9025-25PSP-GP

74.09025.03D
2ND = 74.09661.07D

R420
20KR2F-L-GP

DIS

C776

C771

DY
2

9025_FB

DIS

C775
R421
8K25R2F-1-GP

5
6
7
8

NC#5
VOUT
ADJ
GND

DIS

DIS

VDD
VIN
EN
PGOOD

2
1

for TR

4
3
2
1

SC10U6D3V5KX-1GP

3D3V_S0

DY

SC10U6D3V3MX-GP

DY

C866

G86

DIS

SC100P50V2JN-3GP

R579
1
2
0R2J-2-GP

SCD1U25V3ZY-1GP

43,59,60 VGA_PW R_EN

1
U48

29025_EN
0R2J-2-GP

GAP-CLOSE-PW R-3-GP
G85
1
2
GAP-CLOSE-PW R-3-GP

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

9025_POK

Vo=0.8*(1+(R1/R2))

Title
Size
A3

LDO 2D5V/1D5V/1D2V_S5/1D1V_M92

Date:
5

PM_SLP_S3#

1D1V_M92
R447

12,34,35,41,43,59,60

Iomax=0.6A
1D1V_M92_PW R

DIS
PM_SLP_S3#1

DIS

GND

11,59 RT8202_PGOOD_VGA

C803
SC1U10V3ZY-6GP

C819

ADD By John

SC10U6D3V3MX-GP

C820
SC10U10V5ZY-1GP

2009/04/09

DIS

Place near to CPU

5V_S5

DY

2D5V_S0

C782

2009/04/09 FOLLOW JM70-PU By John

GAP-CLOSE-PW R-3-GP
C761
SC22U6D3V5MX-2GP

SC1U10V3ZY-6GP

2009/04/09 Change to 74.09131.C31 By John

DY

2D5V
Iomax=0.2A

C411
SC10U6D3V5KX-1GP

74.09131.C31

Place near to SB710

SC10U6D3V3MX-GP

G9131-12T73UF-GP

C412

GND

VIN

C413
SC10U6D3V3MX-GP

SC1U10V3KX-3GP

DY

C410

VOUT

3D3V_S5

Document Number

Rev

JV71-TR

Monday, July 06, 2009

SA
Sheet
1

48

of

61

2009/03/23 WAYNE

AD+
AD+_TO_SYS

DCBATOUT

1
2
3
4

BT+

R262

2
AD+

1
2

R261 1
10KR2F-2-GP

C574

ISL88731_ACOK

C573

C23

84.04407.F37

R293
470KR2J-2-GP

G50
GAP-CLOSE-PWR-2U

R286
10R2J-2-GP

G61
GAP-CLOSE-PWR-2U
2
1

R287
10R2J-2-GP

2009/04/15 ESD For 2KV By John

G60
GAP-CLOSE-PWR-2U
2
1

84.2N702.A3F
2ND = 84.DM601.03F

U88
2N7002KDW -GP

8
7
6
5

AO4407A-GP

G62
GAP-CLOSE-PWR-2U
2
1

100KR2J-1-GP

G43
GAP-CLOSE-PWR-2U

10KR2J-3-GP

R259

1ISL88731_CSSN
1
2

D
D
D
D

SCD1U25V3KX-GP

AD+_G_1

G42
GAP-CLOSE-PWR-2U

D01R3721F-GP-U
R260

AO4407A-GP

84.04407.F37

U34
S
S
S
G

1
2
3
4

U30
S
S
S
G

D
D
D
D

8
7
6
5

D14

ISL88731_CSIN

NC#16

16

VFB

15

C619

C626

C620

5
6
7
8

1
2

R275
PBATT_SENSE_R

BATT_SENSE

50

100R2J-2-GP

ISL88731AHRZ-T-GP

74.88731.B73

C438

1
2
G44
GAP-CLOSE-PW R-2U
3D3V_AUX_S5

CHG_AGND

C562
SCD1U25V2ZY-1GP

C569
SC1U10V3KX-3GP

1
2

SCD015U25V2KX-GP

DY

DY

VCOMP
NC#5
ICOMP
VREF
NC#7
GND

GND

6
5
4
3
7
12

C439

29

2
10KR2F-2-GP

C566
2
1

C565
SCD01U50V2ZY-1GP

DY
2

1ISL88731_CCV1
2

C560

ISL88731_CCV
ISL88731_CCS

C564
SCD01U50V2KX-1GP

DY
SCD01U50V2KX-1GP

10KR2J-3-GP

R267

R274
1

84.08884.037
ISL88731_CSIP

ICM

1KR2F-3-GP

10R2F-L-GP

4
3
2
1

1
8

C567
SCD22U50V3ZY-1GP

AD_IA

ISL88731_IINP

CSON

17

R276
ISL88731_CSIP_R

C445

18

C447

SC10U25V6KX-1GP

CSOP

S
S
S
G

35

NC#14

CHG_AGND

R272

U33
FDS8884-GP

D
D
D
D

14

SC10U25V6KX-1GP

PGND

19

ISL88731_DLO

D01R3721F-GP-U
SC10U25V6KX-1GP

20

68.1001C.10Y
2ND = 68.1001B.10R

SC10U25V6KX-1GP

LGATE

2
IND-10UH-209-GP

SDA

BT+

R278

L31
ISL88731_LX

5
6
7
8

35,50 BAT_SDA

1
2
C575
SCD1U50V3KX-GP

SCL

2009/03/23 WAYNE

SC1U10V3KX-3GP

BAT54PT-GP

ISL88731_LX

C595
1
2

SC4D7U25V5KX-GP

23

PHASE

84.08884.037
1

GAP-CLOSE-PWR-2U
G45
1
2

10

U36
FDS8884-GP

CHG_AGND

DY

ACOK

CHG_AGND
35,50 BAT_SCL

24

BOOT
VDDP

D15

SC4D7U25V5KX-GP

13

UGATE

ISL88731_DHI

ISL88731_ACOK

25
21

27
26

CHG_AGND

1
2

C561
SCD1U10V2KX-4GP

SCD01U50V2KX-1GP

C571

R285
4D7R3F-L-GP
2

ISL88731_CSSN_R
ISL88731_VCC
R284
0R3J-0-U-GP
ISL88731_BST 1
2ISL88731_BST1
ISL88731_LDO

CSSN
VCC

VDDSMB

28

S
S
S
G

R279
49K9R2F-L-GP

11

5V_S5

CSSP

G46
GAP-CLOSE-PWR-2U

ACIN

CHRG_IN
C576
SC1U10V3KX-3GP

4
3
2
1

DCIN

22

ISL88731_ACIN

CHG_AGND

D
D
D
D

U32

NC#1

SC1U25V5KX-1GP

C577
SCD1U25V3KX-GP

SCD1U25V3KX-GP

83.R2003.C8F
2ND = 83.R2003.J8F
3RD = 83.R2003.F8F

R277
215KR3F-1-GP

CHG_AGND

C572

CH521S-30PT-GP-U

SCD047U25V2KX-GP

SCD1U25V3KX-GP
ISL88731_CSSP

R270
10KR2F-2-GP

AC_IN#

ISL88731_LDO

Q18

R268
10KR2F-2-GP

.
.
. .
2N7002EW -GP

84.2N702.B3K
2ND = 84.2N702.C3K

AC_IN#

35

R269 1

ISL88731_ACOK
2
0R0402-PAD

UMA

R266
15KR2J-1-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

ISL88731A Charger
Size
A3
Date:
5

Document Number

Rev

SA

JV71-TR
Monday, July 06, 2009

Sheet
1

49

of

61

AD_JK

Adaptor in to generate DCBATOUT

DCIN1

AD_JK

DC-JACK174-GP

K
C556
SCD1U50V3KX-GP

D9

AD+_2

P6SBMJ24APT-GP

83.P6SBM.AAG
2ND = 83.P6SMB.AAG

22.10037.I01
2ND = DIS=22.10037.I21

1
2
3
4

R256
200KR2F-L-GP

S
S
S
G

D
D
D
D

8
7
6
5

AO4407A-GP

NP1

5
6

U29

DY

AD+

EC59
SCD1U50V3KX-GP

4
1
2
3

C557
SC1U50V5ZY-1-GP

84.04407.F37

2
3
1

R1

R2
AD_OFF#_JK

Q13

2009/05/06 SB Change

DTA124EUB-GP

Q12
AFTE14P-GP
AFTE14P-GP

1
1

35

2
R2
DTC124EUB-GP

AD_OFF

R255
100KR2J-1-GP

84.00124.T1K
2ND = 84.00124.K1K
3RD = 84.00124.N1K

R1

84.00124.S1K
2ND = 84.00124.H1K
R257
3RD = 84.00124.M1K
1KR2F-3-GP

TP8
TP7

AD_JK
AD_JK

BATA_SDA_1
BATA_SCL_1
BAT_IN#_1
BT+
BT+

BATTERY CONNECTOR

D12
BAV99PT-GP-U

DY

D11
DY
BAV99PT-GP-U

DY

83.00099.K11
3

83.00099.K11

BAT1

RN76

1
2
3
4

35,49 BAT_SDA
35,49 BAT_SCL

8
7
6
5

BATA_SDA_1
BATA_SCL_1
BAT_IN#_1

3
4
5
6
7

SRN33J-7-GP

EC19

SC1000P50V3JN-GP-U

DY

EC14

49 BATT_SENSE

DY
2

EC16
SC1000P50V3JN-GP-U

1
2

1
2

K
A

DY

EC18
SCD1U50V3KX-GP

DY EC13
SC10P50V2JN-4GP

83.5R603.E3F
2ND = 83.5R603.M3F

DY

SC10P50V2JN-4GP

EC17
SCD1U50V3ZY-GP
D13
MM3Z5V6T1G-GP

BT+

BAT_IN#

35

TP9
TP10
TP11
TP13
TP12

3D3V_AUX_S5

83.00099.K11

D10
BAV99PT-GP-U

AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP

1
1
1
1
1

SCL
SDA
BAT_IN#
BT+#6
BT+#7

GND
GND
GND
GND

1
2
8
9

ALP-CON7-2-GP

20.81017.007
2ND = 20.81025.007
3RD = 20.81240.007
2009/05/06 SB Change

R8
1
2
0R0402-PAD

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

AD/BATT CONN

Document Number

Rev

SB

JV71-TR
Date:
A

Monday, July 06, 2009

Sheet
E

50

of

61

1
2

1
2

DY

EC715

1
2

1
2

1
2

1
2

1
2

1
2

EC133

DY

EC124

DY

EC132

DY

1
2

1
2

1
2

EC127

DY

SCD1U25V2ZY-1GP

EC131

DY

SCD1U25V2ZY-1GP

EC126

DY

SCD1U25V2ZY-1GP

EC129

SCD1U25V2ZY-1GP

DY

SCD1U25V2ZY-1GP

EC125

DY

SCD1U25V2ZY-1GP

EC130

DY

SCD1U25V2ZY-1GP

EC128

DY

SCD1U25V2ZY-1GP

EC117

DY

SCD1U25V2ZY-1GP

EC123

DY

SCD1U25V2ZY-1GP

EC122

SCD1U25V2ZY-1GP

DY

SCD1U25V2ZY-1GP

EC116

DY

SCD1U25V2ZY-1GP

1
2

14
2

EC121

DY

SCD1U25V2ZY-1GP

EC115

DY

SCD1U25V2ZY-1GP

EC120

DY

SCD1U25V2ZY-1GP

EC114

DY

SCD1U25V2ZY-1GP

EC119

DY

SCD1U25V2ZY-1GP

EC118

SCD1U25V2ZY-1GP

EC714

DY

SC1KP50V2KX-1GP

7
1

EC38

DY

1D8V_S3

SCD1U25V2ZY-1GP

DY

EC713

DY

SC1KP50V2KX-1GP

EC113
SCD1U25V2ZY-1GP

DY

DY

SC1KP50V2KX-1GP

EC112
SCD1U25V2ZY-1GP

DY

EC711 EC712

DY

SC1KP50V2KX-1GP

EC111
SCD1U25V2ZY-1GP

DY

EC710

DY

SC1KP50V2KX-1GP

EC709

DY

SC1KP50V2KX-1GP

EC708

DY

SC1KP50V2KX-1GP

EC707

DY

SC1KP50V2KX-1GP

EC706

DY

SC1KP50V2KX-1GP

EC705

DY

SC1KP50V2KX-1GP

EC704

DY

SC1KP50V2KX-1GP

EC703

DY

SC1KP50V2KX-1GP

EC702

DY

SC1KP50V2KX-1GP

EC701

DY

SC1KP50V2KX-1GP

DY

SC1KP50V2KX-1GP

EC110
SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

EC109

DY

EC35

DY

EC15
SCD1U25V2ZY-1GP

EC72

EC33

DY

1D8V_S3

DCBATOUT

DY

EC54

DY

SCD1U25V2ZY-1GP

EC21
SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

DCBATOUT

DY

EC53

DY

SCD1U25V2ZY-1GP

EC37

DY

EC52

DY

SCD1U25V2ZY-1GP

EC25

DY

EC103

DY

SCD1U25V2ZY-1GP

EC46

DY

EC102

DY

SCD1U25V2ZY-1GP

EC20

EC101

DY

VCC_CORE_S0_0

SCD1U25V2ZY-1GP

EC12
SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

DY

EC55

DY

SCD1U25V2ZY-1GP

BT+

EC10

DY

73.07408.L16
2ND = 73.07408.L15

EC100

DY

SCD1U25V2ZY-1GP

EC9

DY

TSLVC08APW -1-GP

73.07408.L16
2ND = 73.07408.L15

EC99

DY

3D3V_S0

SCD1U25V2ZY-1GP

EC8

DY

13

11

SCD1U25V2ZY-1GP

TSLVC08APW -1-GP

TSLVC08APW -1-GP

DY

SCD1U25V2ZY-1GP

EC7

DY

EC723

DY

1D1V_S0

SCD1U25V2ZY-1GP

10

DY

73.07408.L16
2ND = 73.07408.L15
3RD = 73.07408.02B

DCBATOUT

EC716

DY

12

SC1KP50V2KX-1GP

13

U73D

SC1KP50V2KX-1GP

9
11

U73C

14

14

U16D

12

3D3V_S5

3D3V_S5

5V_S5

1D8V_M92

3D3V_S5

2009/04/20 ADD FOR EMI By John

SPRING_GND17
HOLE355X355R111-S1-GP

DY

DY
1

DY

HOLE355X355R111-S1-GP

DY

H10

H9

HOLE355X355R111-S1-GP

H25

HOLE355X355R111-S1-GP

HOLE256R142-GP

DY
1

DY
1

DY

DY H7

H30A
HOLE355X355R111-S1-GP

H29

HOLE355X355R111-S1-GP

H35

HOLE355X355R111-S1-GP

DY
1

DY
1

DY

H26

HOLE355X355R111-S1-GP

H27

HOLE355X355R111-S1-GP

H4

DY
1

DY

HOLE355X355R111-S1-GP

H5

HOLE355X355R111-S1-GP

H6

HOLE355X355R111-S1-GP

DY
1

DY
1

DY

H19

2009/06/02 SB Add FOR EMI

SPRING-9-GP

DY

H24

HOLE355X355R111-S1-GP

H2

HOLE355X355R111-S1-GP

H3

HOLE355X355R111-S1-GP

2009/05/25 SB Add FOR EMI

DY
1

DY

SPRING_GND15

SPRING_GND16

DY
1

SPRING_GND14

SPRING-U3

SPRING-U3

DY

SPRING-43-GP-U

SPRING_GND13

DY

SPRING-43-GP-U

SPRING_GND12

DY

SPRING-43-GP-U

SPRING_GND11

DY

SPRING-7

2009/07/06 34.4FX16.001

SPRING_GND10

SPRING-7

34.3P604.001

UMA

DY

SPRING-7

DY

SPRING-7

DY

SPRING_GND9
SPRING-62-GP

DY

SPRING_GND8
SPRING-43-GP-U

Change

SPRING_GND6
SPRING-43-GP-U

34.3P604.001

SPRING-12-GP-U

Change
34.4C322.001

DY

SPRING_GND5

SPRING_GND7
SPRING_GND4

SPRING_GND3
SPRING-41-GP

SPRING_GND2
SPRING-41-GP

DY

SPRING_GND1

H11
B

SPRING-56-GP

HOLE355X355R111-S1-GP

2009/06/30 PD Add for EMI

34.15J03.001
2009/06/02 SB Add for EMI

symbol
2009/04/17 JV71-TR By John

TOP

Check test point

TOP

3D3V_S0

FAN
H37_TR
HOLE

H41_TR
HOLE

H39_TR
HOLE

H44_TR
HOLE

1
1

DIS

DIS

H61
HOLE

H57

TP233

TPAD14-GP

TP232

TPAD14-GP

3D3V_S5

TP231

TPAD14-GP

5V_S5

TP230

TPAD14-GP

12,35 PM_PW RBTN#

TP229

TPAD14-GP

6,11 CPU_PW RGD

TP228

TPAD14-GP

Wistron Corporation

34,35 S5_ENABLE

TP227

TPAD14-GP

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

6,11 CPU_LDT_RST#

TP226

TPAD14-GP

3D3V_AUX_S5
H60
HOLE

SA

34.4V802.001

34.4V802.001

Test Point
Dimm Door

2009/06/04 SB Add

-1

Title
Size
Date:

SB

UMA

H38_TR
HOLE

MDC

H36_TR
HOLE

VGA

NB

STF256R89H178-GP

CPU

EMI/Spring/Boss
Document Number
Friday, July 10, 2009

Rev

JV71-TR

SB
Sheet
1

51

of

61

1 OF 8

AVGA1A

for TR
D

8 PEG_RXP[15..0]

PEG_TXP[15..0]

8 PEG_TXP[15..0]

8 PEG_RXN[15..0]

PEG_TXN[15..0]

8 PEG_TXN[15..0]

PEG_TXP0
PEG_TXN0

AA38
Y37

PCIE_RX0P
PCIE_RX0N

PCIE_TX0P
PCIE_TX0N

PEG_RXP0_1
PEG_RXN0_1

Y33
Y32

C222

1
2
SCD1U16V2KX-3GP
1
C231 SCD1U16V2KX-3GP

DIS

PEG_TXP1
PEG_TXN1

Y35
W36

PCIE_RX1P
PCIE_RX1N

PCIE_TX1P
PCIE_TX1N

W33
W32

PEG_RXP1_1
PEG_RXN1_1

C226

PEG_TXP2
PEG_TXN2

W38
V37

PCIE_RX2P
PCIE_RX2N

PCIE_TX2P
PCIE_TX2N

U33
U32

PEG_RXP2_1
PEG_RXN2_1

C257

1
2
SCD1U16V2KX-3GP
1
C233 SCD1U16V2KX-3GP

DIS

1
2
SCD1U16V2KX-3GP
1
C238 SCD1U16V2KX-3GP

DIS

PEG_TXP3
PEG_TXN3

V35
U36

PCIE_RX3P
PCIE_RX3N

PCIE_TX3P
PCIE_TX3N

PEG_RXP3_1
PEG_RXN3_1

U30
U29

C268
1
2
SCD1U16V2KX-3GP
1
C248 SCD1U16V2KX-3GP

DIS

U38
T37

PEG_TXP5
PEG_TXN5

T35
R36

PEG_TXP6
PEG_TXN6

R38
P37

PEG_TXP7
PEG_TXN7

P35
N36

PEG_TXP8
PEG_TXN8

N38
M37

PEG_TXP9
PEG_TXN9

M35
L36

PEG_TXP10
PEG_TXN10

L38
K37

PEG_TXP11
PEG_TXN11

K35
J36

PEG_TXP12
PEG_TXN12

J38
H37

PEG_TXP13
PEG_TXN13

H35
G36

PCIE_RX4P
PCIE_RX4N
PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
PCIE_RX8P
PCIE_RX8N
PCIE_RX9P
PCIE_RX9N
PCIE_RX10P
PCIE_RX10N
PCIE_RX11P
PCIE_RX11N
PCIE_RX12P
PCIE_RX12N
PCIE_RX13P
PCIE_RX13N

PCI EXPRESS INTERFACE

PEG_TXP4
PEG_TXN4

PCIE_TX4P
PCIE_TX4N

PEG_RXP4_1
PEG_RXN4_1

T33
T32

C278
1
2
SCD1U16V2KX-3GP
1
C273 SCD1U16V2KX-3GP

DIS

PCIE_TX5P
PCIE_TX5N

PEG_RXP5_1
PEG_RXN5_1

T30
T29

C287
1
2
SCD1U16V2KX-3GP
1
C279 SCD1U16V2KX-3GP

DIS

PCIE_TX6P
PCIE_TX6N

PEG_RXP6_1
PEG_RXN6_1

P33
P32

C289
1
2
SCD1U16V2KX-3GP
1
C294 SCD1U16V2KX-3GP

DIS

PCIE_TX7P
PCIE_TX7N

PEG_RXP7_1
PEG_RXN7_1

P30
P29

C307
1
2
SCD1U16V2KX-3GP
1
C299 SCD1U16V2KX-3GP

DIS

PCIE_TX8P
PCIE_TX8N

PEG_RXP8_1
PEG_RXN8_1

N33
N32

C301
1
2
SCD1U16V2KX-3GP
1
C309 SCD1U16V2KX-3GP

DIS

PCIE_TX9P
PCIE_TX9N

PEG_RXP9_1
PEG_RXN9_1

N30
N29

C319

1
2
SCD1U16V2KX-3GP
1
C328 SCD1U16V2KX-3GP

DIS

PCIE_TX10P
PCIE_TX10N

PEG_RXP10_1
PEG_RXN10_1

L33
L32

C303

1
2
SCD1U16V2KX-3GP
1
C292 SCD1U16V2KX-3GP

DIS

PCIE_TX11P
PCIE_TX11N

PEG_RXP11_1
PEG_RXN11_1

L30
L29

C333
1
2
SCD1U16V2KX-3GP
1
C344 SCD1U16V2KX-3GP

DIS

PCIE_TX12P
PCIE_TX12N

PEG_RXP12_1
PEG_RXN12_1

K33
K32

C314
1
2
SCD1U16V2KX-3GP
1
C322 SCD1U16V2KX-3GP

DIS

PCIE_TX13P
PCIE_TX13N

PEG_RXP13_1
PEG_RXN13_1

J33
J32

C343
1
2
SCD1U16V2KX-3GP
1
C332 SCD1U16V2KX-3GP

DIS

PEG_TXP14
PEG_TXN14

G38
F37

PCIE_RX14P
PCIE_RX14N

PCIE_TX14P
PCIE_TX14N

PEG_RXP14_1
PEG_RXN14_1

K30
K29

C353
1
2
SCD1U16V2KX-3GP
1
C360 SCD1U16V2KX-3GP

DIS

PEG_TXP15
PEG_TXN15

F35
E37

PCIE_RX15P
PCIE_RX15N

PCIE_TX15P
PCIE_TX15N

PEG_RXP15_1
PEG_RXN15_1

H33
H32

C352
1
2
SCD1U16V2KX-3GP
1
C359 SCD1U16V2KX-3GP

DIS

DIS

DIS

PEG_RXP2
PEG_RXN2

DIS

PEG_RXP3
PEG_RXN3

DIS

PEG_RXP4
PEG_RXN4

DIS

PEG_RXP5
PEG_RXN5

DIS

PEG_RXP6
PEG_RXN6

DIS

PEG_RXP7
PEG_RXN7

DIS

DIS

PEG_RXP9
PEG_RXN9

DIS
2

DIS
2

DIS
2

DIS
2

PEG_RXP8
PEG_RXN8

DIS

PEG_RXP1
PEG_RXN1

PEG_RXN[15..0]

PEG_RXP0
PEG_RXN0

DIS

PEG_RXP[15..0]

PEG_RXP10
PEG_RXN10
PEG_RXP11
PEG_RXN11
PEG_RXP12
PEG_RXN12
PEG_RXP13
PEG_RXN13
PEG_RXP14
PEG_RXN14

PEG_RXP15
PEG_RXN15

DIS

CLOCK

AB35
AA36

3 CLK_PCIE_PEG
3 CLK_PCIE_PEG#

PCIE_REFCLKP
PCIE_REFCLKN

1D1V_M92
CALIBRATION

AJ21
AK21
AH16

2009/07//01 PD Change to 200 for reset

DIS

PLT_RST1#_M92_1

11,32,33,36 PLT_RST1#_B

R423
1
2
200R2J-L1-GP

C780
SC47P50V2JN-3GP

DIS

1K27R2F-L-GP

PCIE_CALRP

Y30

PCIE_CALRN

Y29

R99

2KR2F-3-GP

DIS
PERST#
M92-M2-GP

DIS

DY

AA30

NC#AJ21
NC#AK21
NC_PWRGOOD

R89

71.M92M2.M01
11
A

M92_RST#

1 R582
2
0R2J-2-GP

Change to 71.M92M2.M02
UMA

DY

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

M92 PCIE
Document Number

Rev

SB

JV71-TR
Monday, July 06, 2009

Sheet
1

52

of

61

Layout notice:
It should be pleace near HDMI connector

DY

2 OF 8

AVGA1B

TX5P_DPB0P
TX5M_DPB0N
TXCCP_DPC3P
TXCCM_DPC3N
TX0P_DPC2P
TX0M_DPC2N
DPC

TX1P_DPC1P
TX1M_DPC1N
TX2P_DPC0P
TX2M_DPC0N
TXCDP_DPD3P
TXCDM_DPD3N
TX3P_DPD2P
TX3M_DPD2N

DPD

I2C

TX5P_DPD0P
TX5M_DPD0N

CRT_GREEN

AF37
AE38

CRT_BLUE 20

AC36
AC38

CRT_HSYNC
CRT_VSYNC

H2SYNC
V2SYNC

A2VDDQ

VREFG

1
2
3
4

for TR

DIS
AC30
AC31
AD30
AD31

DY

1
0R0402-PAD

C119

DIS

DAC2_A2VDD

AF30
AF31

3D3V_M92
2 R70

C173
SCD1U16V2KX-3GP

AC32
AD32
AF32

DIS

C160

DY

AD29
AC29
AG31
AG32

DY

DAC2_A2VDDQ

C202
SCD1U16V2KX-3GP

DAC2_A2VDDQ

DIS

AF33

DY

C183

DIS

C184

1
0R0402-PAD

C187

DIS

AVSSQ

DIS
68.00084.F81
2ND = 68.00217.701

for TR
1D8V_M92

L17
1

DIS

for TR

C220

BLM15BD121SS1D-GP

DIS

C221

C204

DIS

BLM15BD121SS1D-GP

DIS
68.00084.F81
2ND = 68.00217.701
B

1D8V_M92

L19
1

DAC2_A2VDD

2mA

AA29

DY

DIS

DAC1_VDD1DI

C156

DAC2_VDD2DI

AG33
AD33

C159

C182

C118

DY

R52
C158
SCD1U16V2KX-3GP

AVSSQ

AVSSQ

3D3V_M92

BLM15BD121SS1D-GP
C201
DIS
SC1U6D3V2KX-GP

68.00084.F81
2ND = 68.00217.701

R418
1
2
715R2F-GP

AUX1P
AUX1N

300mA
AN31

DPLL_VDDC

AV33
AU34

DDC2CLK
DDC2DATA

XTALIN
XTALOUT

AUX2P
AUX2N

GPU_DPLUS
GPU_DMINUS

FAN_PWM
TSVDD

AF29
AG29

DPLUS
DMINUS

THERMAL

DDCCLK_AUX4P
DDCDATA_AUX4N
DDCCLK_AUX5P
DDCDATA_AUX5N

AK32
AJ32
AJ33

TS_FDO
TSVDD
TSVSS

C153

R360
1MR2J-1-GP

DIS

DIS

NC_DDCCLK_AUX7P
NC_DDCDATA_AUX7N

C559
SCD1U16V2KX-3GP

U31

20
20

DIS

R2711
R2731

34,35 SMBC_Therm
34,35 SMBD_Therm

AM27
AL27

2 0R2J-2-GP
2 0R2J-2-GP

DIS
AM19
AL19

HDMI_A_CLK
HDMI_A_DAT

SMBC_G781
8
SMBD_G781
7
ALERT#_G781 6
5

21
21

SMBCLK
VCC
SMBDATA
DXP
ALERT#
DXN
GND
THERM#

1
2
3
4

GPU_DPLUS
GPU_DMINUS

G781P8F-GP

DIS

AN20
AM20
AL30
AM30

for TR

RN75
SRN2K2J-1-GP

DY

AL29
AM29

43

PE_GPIO1_1

DIS

U100
SMBD_G781

AN21
AM21
AJ30
AJ31

SMBC_G781

AK30
AK29

SMBD_Therm

SMBC_Therm
A

3D3V_M92

2N7002KDW-GP

84.2N702.A3F
2ND = 84.DM601.03F

X6
M92-M2-GP
3

DIS

2
CRT_DDCCLK
CRT_DDCDATA

DDC6CLK
DDC6DATA

AM26
AN26

4
3

PLL/CLOCK
DPLL_PVDD
DPLL_PVSS

DDC1CLK
DDC1DATA

1D8V_M92

L14

DAC1_VDD1DI

DAC1_AVDD

100mA

for TR

1D8V_M92

AC33
AC34

DAC2_VDD2DI

DAC1_AVDD

65mA

0R2J-2-GP

AVSSQ

20,56
20,56

499R2F-2-GP

DIS
1

AD34
AE34

2
R80

1
2

DDC/AUX
AM32
AN32

DPLL_VDDC

XTALIN
XTALOUT

1
0R2J-2-GP

2009/04/15 ESD For 2KV By John

UMA

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

DIS
XTAL-27MHZ-58-GP

DIS

C689
SC6D8P50V2DN-GP

Title

M92 IO

C678
SC6D8P50V2DN-GP

Wistron Corporation
DIS

82.30034.461
2ND = 82.30034.701
5

4
3

1R558

1R559

DIS
1

DIS

AB34

RN86
SRN150F-1-GP

20

C
Y
COMP

1
2

AE36
AD35

2
1
2

8
7
6
5

CRT_RED 20

2
1

DIS

DIS

1R557

AD39
AD37

DIS

SCD1U16V2KX-3GP

68.00084.F81
2ND = 68.00217.701

C125
SC1U10V3KX-3GP

DIS

1R553

CRT_GREEN

SC10U6D3V3MX-GP

LVDS_TXAOUT2+ 19
LVDS_TXAOUT2- 19

SCD1U16V2KX-3GP

TP77

LVDS_TXAOUT1+ 19
LVDS_TXAOUT1- 19

AP35
AR35

B2
B2#

R2SET

for TR
L10

LVDS_TXAOUT0+ 19
LVDS_TXAOUT0- 19

AR37
AU39

G2
G2#

DDCCLK_AUX3P
DDCDATA_AUX3N

1
220mA
BLM15BD121SS1D-GP

LVDS_TXACLK+ 19
LVDS_TXACLK- 19

AW37
AU35

R2
R2#

A2VSSQ

For Thermal sensor

1D8V_M92

AP34
AR34

VDD1DI
VSS1DI

C152
SCD1U16V2KX-3GP

DY

for TR

CRT_RED

AT23
AR22

R82
RSET
AVDD
AVSSQ

A2VDD

120mA

R212 2

LVDS_TXBOUT2+ 19
LVDS_TXBOUT2- 19

M92-M2-GP

HSYNC
VSYNC

DIS

CLK_27M_M92

DIS

DIS

AU22
AV21

100mA

DPLL_PVDD

84.2N702.B3K
2ND = 84.2N702.C3K

AT21
AR20

130mA

Depending on OSC used select voltage divider resist


values R25 R70 to ensure XTALIN voltage level of
1.8V

RN38
SRN10KJ-5-GP

AN36
AP37

TXOUT_L3P
TXOUT_L3N

2N7002EW-GP

B
B#

HPD1

AH13

BLON_IN 9,35
LCDVDD_ON 19

LVDS_TXBOUT1+ 19
LVDS_TXBOUT1- 19

SCD1U16V2KX-3GP

G
G#

= 0.6V)
VGA_VREFG

DIS

DY

AU20
AT19

SC10U6D3V3MX-GP

GPIO_0
GPIO_1
GPIO_2
GPIO_3_SMBDATA
GPIO_4_SMBCLK
GPIO_5_AC_BATT
DAC1
GPIO_6
GPIO_7_BLON
GPIO_8_ROMSO
GPIO_9_ROMSI
GPIO_10_ROMSCK
GPIO_11
GPIO_12
GPIO_13
GPIO_14_HPD2
GPIO_15_PWRCNTL_0
GPIO_16_SSIN
GPIO_17_THERMAL_INT
GPIO_18_HPD3
GPIO_19_CTF
GPIO_20_PWRCNTL_1
GPIO_21_BB_EN
GPIO_22_ROMCSB
GPIO_23_CLKREQB
JTAG_TRSTB
JTAG_TDI
JTAG_TCK
JTAG_TMS
JTAG_TDO
GENERICA
GENERICB
GENERICC
GENERICD
GENERICE_HPD4
DAC2
GENERICF
GENERICG

AK24

VREFG VOLTAGE DIVIDER IS


(VREFG = VDDR4,5(1.8V) / 3

R69
249R2F-GP

9,19

CRT_BLUE
R
R#

VDD2DI
VSS2DI

DIS

TXOUT_L2P_DPE0P
TXOUT_L2N_DPE0N

SC1U6D3V2KX-GP

HDMI_A_HPD

SCD1U16V2KX-3GP

1
1
1
1
1
1
1
1
1
1
1

TP65
TP73
TP72
TP71
TP85
TP76
TP81
TP74
TP78
TP75
TP82

R73
499R2F-2-GP

BRIGHTNESS_AMD

AG38
AH37

JTAG_TRSTB

DIS

R53
1KR2F-3-GP

Back Bias (body bias) which minimizes


power consumption in battery modes.
PD = Disable
PU = Enable
21

R499

LVDS_TXBOUT0+ 19
LVDS_TXBOUT0- 19

TP184

for TR

R504

SC10U6D3V3MX-GP

R355 1
DIS 2
10KR2J-3-GP

56 GPIO_VGA_22

1D8V_M92

AH35
AJ36

SC1U6D3V2KX-GP

PWRCNTL_1

DY

LVDS_TXBCLK+ 19
LVDS_TXBCLK- 19

SCD1U16V2KX-3GP

TP66
59

AJ38
AK37

SCD1U16V2KX-3GP

THERMTRIP_VGA

1
TP79

R324
100KR2F-L1-GP

SC1U6D3V2KX-GP

Thermal_int
1

AT17
AR16

TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N

1
TP64

PWRCNTL_0
1
0R2J-2-GP

DY

SCD1U16V2KX-3GP

59
R354 2

AU16
AV15

56 GPIO_VGA_11
56 GPIO_VGA_12
56 GPIO_VGA_13
3 CLK_27M_SSIN

0R2J-2-GP

AF35
AG36

TXOUT_U3P
TXOUT_U3N

TXCLK_LP_DPE3P
TXCLK_LN_DPE3N

56 GPIO_VGA_08
56 GPIO_VGA_09

TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N

TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N

1
GPIO_VGA_07_BLON

TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N

Q22

TP84

TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N

5V_S0

Thermal_int

LVTMDP

R168 2
1
0R0402-PAD

BLON_IN

0R2J-2-GP

AK35
AL36

TXCLK_UP_DPF3P
TXCLK_UN_DPF3N

AU14
AV13
AT15
AR14

9,35

AH20
AH18
AN16
AH23
AJ23
AH17
AJ17
AK17
AJ13
AH15
AJ16
AK16
AL16
AM16
AM14
AM13
AK14
AG30
AN14
AM17
AL13
AJ14
AK13
AN13
AM23
AN23
AK23
AL24
AM24
AJ19
AK19
AJ20
AK20
AJ24
AH26
AH24

BLON_IN_R

AK27
AJ27

VARY_BL
DIGON

AT33
AU32

TP83
TP80
56 GPIO_VGA_05

DIS

DIS

GPIO_VGA_03
GPIO_VGA_04

1
1

AR32
AT31

56 GPIO_VGA_00
56 GPIO_VGA_01
56 GPIO_VGA_02

AV31
AU30

SCL
SDA
GENERAL PURPOSE I/O

R75
10KR2J-3-GP

AR30
AT29

AK26
AJ26

19 LCD_EDID_CLK
19 LCD_EDID_DAT

3D3V_M92

TMDS_A_TX2+ 21
TMDS_A_TX2- 21

TMDS_A_TX1+ 21
TMDS_A_TX1- 21

DIS2

It's strap for GDDR3-136ball


Need to Clarify

TX4P_DPD1P
TX4M_DPD1N

DIS2

LVDS CONTROL

2
499R2F-2-GP
2
499R2F-2-GP

TX4P_DPB1P
TX4M_DPB1N

TX2P_DPAP0
TX2P_DPAN0

TMDS_A_TX0+ 21
TMDS_A_TX0- 21

2
499R2F-2-GP
2
499R2F-2-GP

TX3P_DPB2P
TX3M_DPB2N

DPB

TX2P_DPAP1
TX2P_DPAN1

AT27
AR26

DIS2

1R556

TXCBP_DPB3P
TXCBM_DPB3N

AU26
AV25

TMDS_A_TXC+ 21
TMDS_A_TXC- 21

1R555

TX2P_DPA0P
TX2M_DPA0N

HYNIX-SAMSUNG

DY

DY

HYNIX-SAMSUNG

HYNIX
2
R374

DVPCNTL_MVP_0
DVPCNTL_MVP_1
DVPCNTL_0
DVPCNTL_1
DVPCNTL_2
DVPCLK
DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23

DIS2

1R554

SAMSUNG

1
2

2
1

AR8
AU8
AP8
AW8
AR3
AR1
AU1
AU3
AW3
AP6
AW5
AU5
AR6
AW6
AU6
AT7
AV7
AN7
AV9
AT9
AR10
AW10
AU10
AP10
AV11
AT11
AR12
AW12
AU12
AP12

TX2P_DPAP2
TX2P_DPAN2

SAMSUNG

TX1P_DPA1P
TX1M_DPA1N

R371

AT25
AR24

C696
1DIS 2
SCD1U16V2KX-3GP
C6971
SCD1U16V2KX-3GP
C694
1DIS 2
SCD1U16V2KX-3GP
C6951
SCD1U16V2KX-3GP
C692 1DIS 2
C6931
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
C690 1DIS 2
SCD1U16V2KX-3GP
C6911
SCD1U16V2KX-3GP

.
.
. .

DVPDATA [3:0]
0100
512MB Hynix-H5PS1G63EFR-20L
(500MHz)
1000
512MB Samsung-K4N1G164QE-HC20 (500MHz)
1100
512MB QIMONDA HYB18T1G161C2F-20 (500MHz)

R369

10KR2J-3-GP

R368

10KR2J-3-GP

10KR2J-3-GP

R363

HYNIX

10KR2J-3-GP

DVPDATA [3:2:1:0] for VRAM type


selection H/W strap
Should provide VRAM Table for VBios
request

1
2

1
2

MEM_ID0
MEM_ID1
MEM_ID2
MEM_ID3

R370

10KR2J-3-GP

DIS

R367

10KR2J-3-GP

10KR2J-3-GP

SCD1U16V2KX-3GP

DY

SCD1U16V2KX-3GP

DIS

SC1U10V3KX-3GP

SC10U6D3V3MX-GP

DY

68.00084.F81
2ND = 68.00217.701

C126

10KR2J-3-GP

R365
C130

TX2P_DPAP3
TX2P_DPAN3

2
499R2F-2-GP
2
499R2F-2-GP

DPA

AU24
AV23

1R552

TX0P_DPA2P
TX0M_DPA2N

MUTI GFX
1D8V_M92 1D8V_M92 1D8V_M92 1D8V_M92

DIS

C120

7 OF 8

AVGA1G

2
499R2F-2-GP
2
499R2F-2-GP

TXCAP_DPA3P
TXCAM_DPA3N

for TR

DPLL_VDDC

1
2
BLM15BD121SS1D-GP
C122

DIS

for TR

1
2

C147
SCD1U16V2KX-3GP

SC10U6D3V3MX-GP

DIS

C138

C123

SCD1U16V2KX-3GP

SC10U6D3V3MX-GP

68.00084.F81 DIS
2ND = 68.00217.701

1D1V_M92

DY

C121

DPLL_PVDD

DIS

1
2
BLM15BD121SS1D-GP

1D8V_M92

L6

L7

for TR

Size
A2

Document Number

Date:

Monday, July 06, 2009

Rev

SA

JV71-TR
Sheet
1

53

of

61

for TR
1D8V_M92

362mA

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

DY

C185

C172

DIS

DIS

C235

1
2

1
2

1
2

1
2

1
2

C209

C300

C225

C284

DIS

DIS

C355

DY

C304

C274

C357

DIS
2

DIS

C282

DIS

C230

C275

DIS

DY

1
2

2
1
2

1
2

DY

C208

VCC_GFX_CORE

1
1

1
2

DIS

2
1

DIS

C190

DIS

1
2

DY

C189

1
2

SCD1U16V2KX-3GP

SC1U6D3V2KX-GP

DIS

C165

1
2

1
2

1
2

1
2

1
2

VCC_GFX_CORE

1
2
1
2

1
2

1
2
1
2

1
2

1
2

1
2

1
2
2

1
2

1
2

1
2

2
1

1
2

1
2
1

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2
1
2

C234

SC2D2U6D3V2MX-GP

DIS

C157

SC1U6D3V2KX-GP

C228

SC1U6D3V2KX-GP

C223

DY

SC2D2U6D3V2MX-GP

M92-M2-GP

M15
N13
R12
T12

C270

DIS

SC1U6D3V2KX-GP

DIS

VDDCI
VDDCI
VDDCI
VDDCI

DIS

SC10U6D3V3MX-GP

C137

ISOLATED
CORE I/O

C265

SC1U6D3V2KX-GP

C134

DIS

C200

SC1U6D3V2KX-GP

C133
SC10U6D3V3MX-GP

68.00084.F81
2ND = 68.00217.701

DIS

C296

SC1U6D3V2KX-GP

DIS

DIS

BBP
BBP

DIS

SCD1U16V2KX-3GP

DIS

BLM15BD121SS1D-GP

DIS

C211
SC1U6D3V2KX-GP

DIS

AA13
Y13

C210

DIS

SC1U6D3V2KX-GP

22mA

SC1U6D3V2KX-GP

DIS

SPVSS

C162

DIS

VCC_GFX_CORE

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

L11

SPV10

BACK BIAS

VCC_GFX_CORE

SPV10

NC_SPV18

C266

DIS

SC2D2U6D3V2MX-GP

C727

AN10

C229

VCC_GFX_CORE

AN9

DIS

C277

DIS

SCD1U16V2KX-3GP

C726
SC1U6D3V2KX-GP

SC10U6D3V3MX-GP

68.00084.F81 C729
2ND = 68.00217.701

DIS

SC10U6D3V3MX-GP

AM10
SPV10

DIS

SC10U6D3V3MX-GP

40mA

C267

DY

SC2D2U6D3V2MX-GP

PCIE_PVDD

DIS

C350

SC10U6D3V3MX-GP

NC_MPV18#1
NC_MPV18#2

C297

DIS

SC10U6D3V3MX-GP

L46

PCIE_PVDD

C290

DIS

SC10U6D3V3MX-GP

H7
H8

1
2
BLM15BD121SS1D-GP

PLL

AB37

PCIE_PVDD

C269

DIS

SC10U6D3V3MX-GP

68.00084.F81
2ND = 68.00217.701

C216

DIS

SC1U6D3V2KX-GP

40mA

DIS

C276

SC1U6D3V2KX-GP

C311
SC1U6D3V2KX-GP

DIS

SC2D2U6D3V2MX-GP

DY

VDDRHB
VSSRHB

C329

SC1U6D3V2KX-GP

V12
U12

DIS

SC1U6D3V2KX-GP

C310
SC1U6D3V2KX-GP

+VDDRHA

DY

DIS

SC1U6D3V2KX-GP

DY

C283

SC2D2U6D3V2MX-GP

1
2
BLM15BD121SS1D-GP

for TR
1D8V_M92

VDDRHA
VSSRHA

C224

VCC_GFX_CORE

DIS

SC1U6D3V2KX-GP

M20
M21

DIS

SC1U6D3V2KX-GP

MEM CLK
+VDDRHA

DIS

C246
SC1U6D3V2KX-GP

VRAM CLOCK

L21

1D5V_M92

C298

SC2D2U6D3V2MX-GP

for TR 0408

C243
SC1U6D3V2KX-GP

DY

DIS

C242
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

DIS

DIS

SC1U6D3V2KX-GP

68.00084.F81
= 68.00217.701

L20
2ND
1
2
BLM15BD121SS1D-GP

C337

SC1U6D3V2KX-GP

1D5V_M92

VDDR4
VDDR4
VDDR4
VDDR4

DIS

SC2D2U6D3V2MX-GP

AD12
AF11
AF12
AG11

170mA

VDDR5
VDDR5
VDDR5
VDDR5

C321

SC2D2U6D3V2MX-GP

AF13
AF15
AG13
AG15

170mA

SC1U6D3V2KX-GP

DIS

SC2D2U6D3V2MX-GP

DIS

C191

C306

SC1U6D3V2KX-GP

I/O
VDDR3
VDDR3
VDDR3
VDDR3

DIS

SC1U6D3V2KX-GP

AF23
AF24
AG23
AG24

C313

SC1U6D3V2KX-GP

50mA

VDD_CT
VDD_CT
VDD_CT
VDD_CT

AA15
AA17
AA20
AA22
AA24
AA27
AB13
AB16
AB18
AB21
AB23
AB26
AB28
AC12
AC15
AC17
AC20
AC22
AC24
AC27
AD13
AD16
AD18
AD21
AD23
AD26
AF17
AF20
AF22
AG16
AG18
AG21
AH22
M16
M18
M23
M26
N15
N17
N20
N22
N24
N27
R13
R16
R18
R21
R23
R26
T15
T17
T20
T22
T24
T27
U16
U18
U21
U23
U26
V15
V17
V20
V22
V24
V27
Y16
Y18
Y21
Y23
Y26
Y28
AH27
AH28

DIS

SC1U6D3V2KX-GP

AF26
AF27
AG26
AG27

POWER

110mA

VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC

DIS

1D1V_M92

SC1U6D3V2KX-GP

LEVEL
TRANSLATION

C168

for TR 0408

C149

CORE

C247

1400mA
G30
G31
H29
H30
J29
J30
L28
M28
N28
R28
T28
U28

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

VDD_CT

PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC

AA31
AA32
AA33
AA34
V28
W29
W30
Y31

SC1U6D3V2KX-GP

C164

PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR

SC1U6D3V2KX-GP

DY

VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1

SC1U6D3V2KX-GP

C171
SCD1U16V2KX-3GP

C325

AC7
AD11
AF7
AG10
AJ7
AK8
AL9
G11
G14
G17
G20
G23
G26
G29
H10
J7
J9
K11
K13
K8
L12
L16
L21
L23
L26
L7
M11
N11
P7
R11
U11
U7
Y11
Y7

C195
SC1U6D3V2KX-GP

DIS

C302

DIS

C188
SCD1U16V2KX-3GP

DY

SC1U6D3V2KX-GP

SCD1U16V2KX-3GP

DIS

C291

DIS

C336

SC1U6D3V2KX-GP

C272

SC1U6D3V2KX-GP

DIS

C167

SCD1U16V2KX-3GP

C260

C198

SC1U6D3V2KX-GP

DIS

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C326

C175
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

1D8V_M92

C197

DIS

DIS

C342

SCD1U16V2KX-3GP

DIS

C166

C327

DIS

C323

C318

SC1U6D3V2KX-GP

DIS

for TR

DIS

DIS

SC1U6D3V2KX-GP

3D3V_M92

C668

DIS

C169

DIS

SC1U6D3V2KX-GP

68.00084.F81
2ND = 68.00217.701

DIS

DIS

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP

DIS

SC10U6D3V3MX-GP

DIS

DIS

C199

BLM15BD121SS1D-GP

DIS

C335

SC1U6D3V2KX-GP

DIS

DY

SC1U6D3V2KX-GP

L22
1

DIS

C334
SC1U6D3V2KX-GP

for TR

DIS

C219
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP

DIS

C341
SC1U6D3V2KX-GP

DIS

C317

DIS

C330

DY

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

DIS

C345

DY

SC1U6D3V2KX-GP

DIS

C339

C305

SC1U6D3V2KX-GP

PCIE

DY

SCD1U16V2KX-3GP

MEM I/O

DIS

C245

5 OF 8

AVGA1E

1D5V_M92

DY

1D8V_M92

VDDR1+VDDRHx 1.50 V (DDR3 700 MHz) 0.93 A (RMS) / 1.2 A (peak)

for TR 0408

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

M92 POWER

Size
A2

Document Number

Date:

Monday, July 06, 2009

Rev

SA

JV71-TR
Sheet
1

54

of

61

8 OF 8

AVGA1H
DP C/D POWER

DP A/B POWER
6 OF 8

AVGA1F
AP20
AP21

NC_DPC_VDD18#1
NC_DPC_VDD18#2

NC_DPA_VDD18#1
NC_DPA_VDD18#2

AN24
AP24

1D1V_M92

NC_DPD_VDD18#1
NC_DPD_VDD18#2

NC_DPB_VDD18#1
NC_DPB_VDD18#2

1
2

AN27
AP27
AP28
AW24
AW26

C128

1D1V_M92

L8

DIS

DIS
C131

DPA_VSSR
DPA_VSSR
DPA_VSSR
DPA_VSSR
DPA_VSSR

DIS

DPA_VDD10

DIS
68.00214.091
2ND = 68.00206.341

AP25
AP26

1D1V_M92

1D1V_M92

AH34
AJ34

400mA
DPE_VDD10

AL33
AM33

DP E/F POWER
DPE_VDD18
DPE_VDD18

DP PLL POWER
DPA_PVDD
DPA_PVSS

DPE_VDD10
DPE_VDD10

DPB_PVDD
DPB_PVSS

AU28
AV27

DPA_PVDD

AV29
AR28

DPB_PVDD

DPE_VSSR
DPE_VSSR
DPE_VSSR
DPE_VSSR
DPE_VSSR

DPC_PVDD
DPC_PVSS

DIS

20mA

C132

20mA

C136

1D8V_M92

L9

DIS

for TR

1
2
BLM15BD121SS1D-GP
C127

DIS

for TR

68.00084.F81
2ND = 68.00217.701

1D8V_M92

DPD_PVDD
DPD_PVSS

for TR
DPE_PVDD

DIS

M92-M2-GP

C714

C715

1D8V_M92

1
2
BLM15BD121SS1D-GP
C713
SC10U6D3V3MX-GP

R68
150R2F-1-GP

L42

DIS

SC1U6D3V2KX-GP

DIS
2

68.00084.F81
2ND = 68.00217.701

SCD1U16V2KX-3GP

DPEF_CALR

DIS

DIS
1 AM39

BLM15BD121SS1D-GP
C719

DIS
2

C718

SC10U6D3V3MX-GP

DIS

DIS
1

C717

SC1U6D3V2KX-GP

DPF_VSSR
DPF_VSSR
DPF_VSSR
DPF_VSSR
DPF_VSSR

DIS

DPF_PVDD

AL38
AM35

NC_DPF_PVDD
NC_DPF_PVSS
AF39
AH39
AK39
AL34
AM34

1D8V_M92
1 R350
2
0R0603-PAD

1D8V_M92

L44

DPF_VDD10
DPF_VDD10

for TR

AK33
AK34

DPD_PVDD

20mA

AM37
AN38

DPE_PVDD
DPE_PVSS

DPF_VDD10

for TR

DPE_PVDD

DPF_VDD18
DPF_VDD18

AF34
AG34

DPF_VDD18

1 R351
2
0R0603-PAD

20mA

AV19
AR18

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

F15
F17
F19
F21
F23
F25
F27
F29
F31
F33
F7
F9
G2
G6
H9
J2
J27
J6
J8
K14
K7
L11
L17
L2
L22
L24
L6
M17
M22
M24
N16
N18
N2
N21
N23
N26
N6
R15
R17
R2
R20
R22
R24
R27
R6
T11
T13
T16
T18
T21
T23
T26
U15
U17
U2
U20
U22
U24
U27
U6
V11
V16
V18
V21
V23
V26
W2
W6
Y15
Y17
Y20
Y22
Y24
Y27
U13
V13

for TR

20mA

DPC_PVDD

PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS

1 R51
2
0R0603-PAD

DPD_PVDD

C186

400mA

AU18
AV17

AN34
AP39
AR39
AU37
AW35

1
2

150R2F-1-GP

2
1
2

C151

DIS
2

1
2

DIS
1

C145
SC1U6D3V2KX-GP

SC10U6D3V3MX-GP

C143

DIS

AW28 1 R358

DIS
68.00214.091
2ND = 68.00206.341

2
2
2

DIS

1
2
HCB1608KF-1-GP

DPAB_CALR

150R2F-1-GP

DIS

SC1U6D3V2KX-GP

L12

DPCD_CALR

1D8V_M92

C711

1D1V_M92

DIS

AN29
AP29
AP30
AW30
AW32

DIS

1 AW18

DPE_VDD18

SCD1U16V2KX-3GP

68.00084.F81
2ND = 68.00217.701

SC10U6D3V3MX-GP

1
2
BLM15BD121SS1D-GP
C712
DIS

DIS

L43

DIS
C140
SCD1U16V2KX-3GP

for TR

DIS
C141
SC1U6D3V2KX-GP

68.00214.091
2ND = 68.00206.341
1D8V_M92

SC10U6D3V3MX-GP

C135

DIS

DIS

1
2
HCB1608KF-1-GP

C155

1 R65
2
0R0603-PAD

SC10U6D3V3MX-GP

L13

SC1U6D3V2KX-GP

2 R359
DIS

DPB_VSSR
DPB_VSSR
DPB_VSSR
DPB_VSSR
DPB_VSSR

DPB_VDD10

SC1U6D3V2KX-GP

1D1V_M92

C708

DIS

DPD_VSSR
DPD_VSSR
DPD_VSSR
DPD_VSSR
DPD_VSSR

AN33
AP33

SCD1U16V2KX-3GP

SC10U6D3V3MX-GP

68.00084.F81
2ND = 68.00217.701

DIS

SCD1U16V2KX-3GP

C709

DIS

DIS

L41
1
2
BLM15BD121SS1D-GP

1D8V_M92

DPB_VDD10
DPB_VDD10

AN19
AP18
AP19
AW20
AW22

DPD_VDD10
DPD_VDD10

AP14
AP15

1 R348
2
0R0603-PAD

for TR

AB39
E39
F34
F39
G33
G34
H31
H34
H39
J31
J34
K31
K34
K39
L31
L34
M34
M39
N31
N34
P31
P34
P39
R34
T31
T34
T39
U31
U34
V34
V39
W31
W34
Y34
Y39

1
2
HCB1608KF-1-GP
C124
SC10U6D3V3MX-GP

DPC_VSSR
DPC_VSSR
DPC_VSSR
DPC_VSSR
DPC_VSSR

AP31
AP32

SC1U6D3V2KX-GP

AP22
AP23

DPA_VDD10
DPA_VDD10

SCD1U16V2KX-3GP

AN17
AP16
AP17
AW14
AW16

DPC_VDD10
DPC_VDD10

AP13
AT13

1 R349
2
0R0603-PAD

DIS
68.00084.F81
2ND = 68.00217.701

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

VSS_MECH
VSS_MECH
VSS_MECH

M92-M2-GP

A3
A37
AA16
AA18
AA2
AA21
AA23
AA26
AA28
AA6
AB12
AB15
AB17
AB20
AB22
AB24
AB27
AC11
AC13
AC16
AC18
AC2
AC21
AC23
AC26
AC28
AC6
AD15
AD17
AD20
AD22
AD24
AD27
AD9
AE2
AE6
AF10
AF16
AF18
AF21
AG17
AG2
AG20
AG22
AG6
AG9
AH21
AH29
AJ10
AJ11
AJ2
AJ28
AJ6
AK11
AK31
AK7
AL11
AL14
AL17
AL2
AL20
AL21
AL23
AL26
AL32
AL6
AL8
AM11
AM31
AM9
AN11
AN2
AN30
AN6
AN8
AP11
AP7
AP9
AR5
AW34
B11
B13
B15
B17
B19
B21
B23
B25
B27
B29
B31
B33
B7
B9
C1
C39
E35
E5
F11
F13

A39
AW1
AW39

VSS_MECH1
VSS_MECH2
VSS_MECH3

TP107
TP108
TP154

1
1
1

2009/05/16 SB Add

DIS

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A2
Date:
5

DP POWER_GND
Document Number

Rev

SA

JV71-TR
Sheet

Monday, July 06, 2009


1

55

of

61

AMD RESERVED CONFIGURATION STRAPS


ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET

M92-M2 uses memory group B only

H2SYNC,

4 OF 8

AVGA1D
57,58 MDB[63..0]

MAB[0..12]

40.2R PN:64.40R25.6DL
( 0.5 * VDDR1 ) ( for SSTL-1.8/SSTL-2/DDR2 )
( 0.7 * VDDR1 ) ( for GDDR3/GDDR4 )

DIVIDER RESISTORS
MVREF TO 1.8V

DDR2

DDR3

100R

MVREF TO GND

100R

100R

100R

GDDR3
40.2R
100R

for TR 0408
1D5V_M92

R435
100R2F-L1-GP-U

DIS

1
2

DQMB_0
DQMB_1
DQMB_2
DQMB_3
DQMB_4
DQMB_5
DQMB_6
DQMB_7
QSB_0/RDQSB_0
QSB_1/RDQSB_1
QSB_2/RDQSB_2
QSB_3/RDQSB_3
QSB_4/RDQSB_4
QSB_5/RDQSB_5
QSB_6/RDQSB_6
QSB_7/RDQSB_7
QSB_0B/WDQSB_0
QSB_1B/WDQSB_1
QSB_2B/WDQSB_2
QSB_3B/WDQSB_3
QSB_4B/WDQSB_4
QSB_5B/WDQSB_5
QSB_6B/WDQSB_6
QSB_7B/WDQSB_7
ODTB0
ODTB1
CLKB0
CLKB0#
CLKB1
CLKB1#
RASB0#
RASB1#
CASB0#
CASB1#
CSB0_0#
CSB0_1#
CSB1_0#
CSB1_1#
CKEB0
CKEB1

MVREFDB
MVREFSB

P8
T9
P9
N7
N8
N9
U9
U8
Y9
W9
AC8
AC9
AA7
AA8
Y8
AA9

MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12

53 GPIO_VGA_00

53 GPIO_VGA_01
53 GPIO_VGA_02
53 GPIO_VGA_05

BA2
BA0
BA1

BA2
BA0
BA1
DQMB#0
DQMB#1
DQMB#2
DQMB#3
DQMB#4
DQMB#5
DQMB#6
DQMB#7

F6
K3
P3
V5
AB5
AH1
AJ9
AM5

RDQSB0
RDQSB1
RDQSB2
RDQSB3
RDQSB4
RDQSB5
RDQSB6
RDQSB7

G7
K1
P1
W4
AC4
AH3
AJ8
AM3

WDQSB0
WDQSB1
WDQSB2
WDQSB3
WDQSB4
WDQSB5
WDQSB6
WDQSB7
ODTB0
ODTB1

L9
L8

CLKB0
CLKB0#

AD8
AD7

CLKB1
CLKB1#

T10
Y10

RASB0#
RASB1#

W10
AA10

CASB0#
CASB1#

P10
L10

CSB0#_0

AD10
AC10

CSB1#_0

53 GPIO_VGA_08
53 GPIO_VGA_09

H3
H1
T3
T5
AE4
AF5
AK6
AK5

T7
W7

57,58
57,58
57,58

53 GPIO_VGA_11

53 GPIO_VGA_22
DQMB#[0..7]

R62

R58

R61

DIS
DIS
DIS
DY

R54

R56

R57

DY
DIS

DY

GPIO_28_TDO ,

2 10KR2J-3-GP

20,53 CRT_VSYNC

2 10KR2J-3-GP

If BIOS_ROM_EN (GPIO22) = 0
2 10KR2J-3-GP

53 GPIO_VGA_13

CLKB0
CLKB0#

57
57

CLKB1
CLKB1#

58
58

RASB0#
RASB1#

57
58

CASB0#
CASB1#

57
58

CSB0#_0

57

CSB1#_0

58

AK10
AL10

2 10KR2J-3-GP

128MB
256MB
64MB
32MB
512MB
1GB
2GB
4GB

2 10KR2J-3-GP

R55

2 10KR2J-3-GP

R377

2 10KR2J-3-GP

R378

2 10KR2J-3-GP

R60

DIS

x000
x001
x010
x
x
x
x
x

STRAPS

PIN

DIS

R59

TX_PWRS_ENB

DRAM_RST

DIS

Chingis
(formerly PMC)

M25P05A
M25P10A
M25P20
M25P40
M25P80

0100
0101
0101
0101
0101

Pm25LV512A
Pm25LV010A

0100
0101

RECOMMENDED SETTINGS
0= DO NOT INSTALL RESISTOR
1 = INSTALL 10K RESISTOR
X = DESIGN DEPENDANT
NA = NOT APPLICABLE

DESCRIPTION

GPIO0

Tansmitter Power Savings Enable


0= 50% Tx output swing
1= Full Tx output swing

GPIO1

Transmitter De-emphasis Enable


0= Tx de-emphasis disabled
1= Tx de-emphasis enabled

(Internal PD)

2 10KR2J-3-GP

DY

57,58

(Internal PD)

PCIE GNE2 ENABLED

HDMI must only be enabled on systems that are


legally entitled. It is the responsibility of the system
designer to ensure that the system is entitled to
support this feature.

0 = Advertises the PCI-E device


as 2.5GT/s
1 = Advertises the PCI-E device
as 5GT/s

BIF_GEN2_EN_A

GPIO2

AC_BATT

GPIO5

AC (Performance mode) = 3.3 V


Battery saving mode = 0.0 V

ROMSO

GPIO8

Serial ROM Output from ROM

BIF_CLK_PM_EN
0

VGA ENABLED
U10
AA11

CKEB0
CKEB1

N10
AB11

WEB0#
WEB1#

CKEB0
CKEB1

57
58

WEB0#
WEB1#

57
58

ROMSI

GPIO9

Serial ROM Input to ROM


SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT

ROMIDCFG[3:0]
(Internal PD)

DIS

ST
Microelectronics

PCIE FULL TX OUTPUT SWING


2 10KR2J-3-GP

DY

TESTEN
CLKTESTA
CLKTESTB

Part Number GPIO[13,12,11]

2 10KR2J-3-GP

TX_DEEMPH_EN
WDQSB[0..7]
57
58

If BIOS_ROM_EN (GPIO22) = 1

Size of the primary


GPIO[13,12,11] Manufacturer
memory apertures

57,58
53 GPIO_VGA_12

ODTB0
ODTB1

GPIO21_BB_EN

2 10KR2J-3-GP

57,58

20,53 CRT_HSYNC

RDQSB[0..7]

DIS

R63

if BIOS_ROM_EN=1,then Config[3:0]
defines the ROM type
if BIOS_ROM_EN=0,then Config[3:0]
defines the primary memory apeture size

X X X

AH11

PWRCNTL_[1,0]

R417
1KR2F-3-GP

R356
4K7R2F-GP

R357

AD28
CLKTESTA
CLKTESTB

DIS

DIS

MAB_0
MAB_1
MAB_2
MAB_3
MAB_4
MAB_5
MAB_6
MAB_7
MAB_8
MAB_9
MAB_10
MAB_11
MAB_12
MAB_13/BA2
MAB_14/BA0
MAB_15/BA1

GENERICC

PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET

GPIO[13,12,11]

TESTEN

DIS

Y12
AA12

DQB_0
DQB_1
DQB_2
DQB_3
DQB_4
DQB_5
DQB_6
DQB_7
DQB_8
DQB_9
DQB_10
DQB_11
DQB_12
DQB_13
DQB_14
DQB_15
DQB_16
DQB_17
DQB_18
DQB_19
DQB_20
DQB_21
DQB_22
DQB_23
DQB_24
DQB_25
DQB_26
DQB_27
DQB_28
DQB_29
DQB_30
DQB_31
DQB_32
DQB_33
DQB_34
DQB_35
DQB_36
DQB_37
DQB_38
DQB_39
DQB_40
DQB_41
DQB_42
DQB_43
DQB_44
DQB_45
DQB_46
DQB_47
DQB_48
DQB_49
DQB_50
DQB_51
DQB_52
DQB_53
DQB_54
DQB_55
DQB_56
DQB_57
DQB_58
DQB_59
DQB_60
DQB_61
DQB_62
DQB_63

WEB0#
WEB1#

1
2

100R2F-L1-GP-U
1

MVREFDB
MVREFSB

C793

1
2

DIS

DIS

C792

4K7R2F-GP

DIS

C789

SCD1U16V2KX-3GP

C790

SCD01U50V2KX-1GP

DIS

R433
100R2F-L1-GP-U

DIS

R432

SCD1U16V2KX-3GP

R436
100R2F-L1-GP-U

DIS

SCD01U50V2KX-1GP

1D5V_M92

for TR 0408

C5
C3
E3
E1
F1
F3
F5
G4
H5
H6
J4
K6
K5
L4
M6
M1
M3
M5
N4
P6
P5
R4
T6
T1
U4
V6
V1
V3
Y6
Y1
Y3
Y5
AA4
AB6
AB1
AB3
AD6
AD1
AD3
AD5
AF1
AF3
AF6
AG4
AH5
AH6
AJ4
AK3
AF8
AF9
AG8
AG7
AK9
AL7
AM8
AM7
AK1
AL4
AM6
AM1
AN4
AP3
AP1
AP5

MEMORY INTERFACE B

MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8
MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63

3D3V_M92

57,58

M92-M2-GP

BB_EN

STRAPS
GPIO

PIN
DVPDATA(23:20)

(Internal PD)
B

for TR 0408

GPIO[15,20]

Power control signals to control the core


voltage regulator

GPIO21

Back Bias (body bias) which minimizes


power consumption in battery modes.
0V = Disable
3D3V = Enable

DESCRIPTION
Initialization Behavior: This signal is input during
reset (no reference clock is required). After reset,
the default state is output low (0 V).
The signals above can be left unconnected if not
used.

1D5V_M92

VGA_HSYNC

AUD[1]
AUD[0]

VGA_VSYNC

(Internal PD)

AUD[1:0]
00:No audio function
01:Audio for DisplayPort and HDMI
( if adapter is detected)
10:Audio for DisplayPort only
11:Audio for both DisplayPort and HDMI

DIS

R1203
4K7R2F-GP
2

CCBYPASS

GENERICC

DIS

C961
SC2200P50V2KX-2GP

R1204
4K7R2F-GP

DY

57,58 VRAM_RST

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A2
Date:
5

Memory / Straps
Document Number

Rev

SA

JV71-TR
Sheet

Monday, July 06, 2009


1

56

of

61

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A15

BA0
BA1
BA2

M2
N8
M3

BA0
BA1
BA2

CLKB0
CLKB0#

J7
K7

CK
CK#

CKEB0

K9

DQMB#3
DQMB#2

D3
E7

DMU
DML

W EB0#
CASB0#
RASB0#

L3
K3
J3

WE#
CAS#
RAS#

56,58
56,58
56,58

BA0
BA1
BA2

56
56

CLKB0
CLKB0#

56

CKEB0

56
56

DQMB#3
DQMB#2

56
56
56

W EB0#
CASB0#
RASB0#

F3
G3

RDQSB2
W DQSB2

ODT

K1

ODTB0

CS#
RESET#

L2
T2

CSB0#_0

NC#T7
NC#L9
NC#L1
NC#J9
NC#J1

T7
L9
L1
J9
J1

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

G1
F9
E8
E2
D8
D1
B9
B1
G9

DQSL
DQSL#

CKE

DIS

RDQSB3
W DQSB3

DIS

RDQSB2
W DQSB2

56
56

ODTB0

56

CSB0#_0

243R2F-2-GP MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12

56

VRAM_RST

56,58

56,58
56,58
56,58

for TR

for TR

1D5V_M92

1D5V_M92

56,58 RDQSB[0..7]

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

H1
M8
L8

VREFDQ
VREFCA
ZQ

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A15

BA0
BA1
BA2

M2
N8
M3

BA0
BA1
BA2

CLKB0
CLKB0#

J7
K7

CK
CK#

CKEB0

K9

CKE

DQMB#0
DQMB#1

D3
E7

DMU
DML

W EB0#
CASB0#
RASB0#

L3
K3
J3

WE#
CAS#
RAS#

MDB11
MDB14
MDB8
MDB10
MDB15
MDB13
MDB9
MDB12

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

MDB5
MDB4
MDB3
MDB7
MDB0
MDB1
MDB6
MDB2

DQSU
DQSU#

C7
B7

RDQSB0
W DQSB0

DQSL
DQSL#

F3
G3

RDQSB1
W DQSB1

ODT

K1

ODTB0

CS#
RESET#

L2
T2

CSB0#_0

NC#T7
NC#L9
NC#L1
NC#J9
NC#J1

T7
L9
L1
J9
J1

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

G1
F9
E8
E2
D8
D1
B9
B1
G9

56
56

RDQSB1
W DQSB1

56
56

ODTB0

56

CSB0#_0

56

VRAM_RST

56,58

1
1

VREFD_U0

R408

DIS

DIS

C764

DIS

C765

DIS

C743

C763
SCD47U6D3V2KX-GP

DIS

C821

C818
SC10U6D3V3MX-GP

DIS

C757

DIS

SC10U6D3V3MX-GP

DIS

C747

DIS

SC10U6D3V3MX-GP

DIS

C755

R424

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Date:
4

RDQSB0
W DQSB0

CLKB0

Size
A3

72.51G63.C0U

SC10U6D3V3MX-GP

1
2
1

DIS

E3
F7
F2
F8
H3
H8
G2
H7

CLKB0#

SC1U6D3V2KX-GP

1
2
1

A8
A1
C1
C9
D2
E9
F1
H9
H2

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

H5TQ1G63BFR-12C-GP

DIS

SC1U6D3V2KX-GP

DIS

SC1U6D3V2KX-GP

DIS

DIS

SC1U6D3V2KX-GP

C788
R404

C756
SC1U6D3V2KX-GP

DIS

C758
SC1U6D3V2KX-GP

DIS

C748
SC1U6D3V2KX-GP

DIS

C804
SC1U6D3V2KX-GP

DIS

C813
SC1U6D3V2KX-GP

DIS

C399
SC1U6D3V2KX-GP

SCD1U16V2KX-3GP

DIS

C390

W EB0#
CASB0#
RASB0#

R409

4K99R2F-L-GP

DIS

C783
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

DIS

C796

56
56
56

DIS

R425
4K99R2F-L-GP
VREFC_U0

SCD1U16V2KX-3GP

DIS

C812

DQMB#0
DQMB#1

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

56R2F-1-GP

DIS

4K99R2F-L-GP

DIS

for TR

SCD1U16V2KX-3GP

1D5V_M92

C762

DIS

56
56

56R2F-1-GP

R405
4K99R2F-L-GP
MAB[0..12]

MDB[63..0]

CKEB0

K8
K2
N1
R9
B2
D9
G7
R1
N9

SAMSUNG 72.41164.H0U
HYUNIX 72.51G63.C0U

56,58 DQMB#[0..7]

56,58 MDB[63..0]

CLKB0
CLKB0#

56

MAB[0..12]

BA0
BA1
BA2

56
56

72.51G63.C0U

56,58 W DQSB[0..7]

AFBRAM4

VREFD_U0
VREFC_U0
ZQ3
2

R1200

H5TQ1G63BFR-12C-GP

56,58

56
56

MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12

RDQSB3
W DQSB3

243R2F-2-GP

C7
B7

DQSU
DQSU#

MDB27
MDB28
MDB30
MDB24
MDB25
MDB31
MDB26
MDB29

VREFDQ
VREFCA
ZQ

D7
C3
C8
C2
A7
A2
B8
A3

H1
M8
L8

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

A8
A1
C1
C9
D2
E9
F1
H9
H2

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

MDB21
MDB20
MDB22
MDB16
MDB19
MDB17
MDB23
MDB18

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

E3
F7
F2
F8
H3
H8
G2
H7

VREFD_U0
VREFC_U0
ZQ1

R1199

1D5V_M92

AFBRAM3

K8
K2
N1
R9
B2
D9
G7
R1
N9

DIS

DDR3

1D5V_M92

DDR3 B0
Document Number

Rev

SB

JV71-TR
Monday, July 06, 2009

Sheet
1

57

of

61

1D5V_M92

A8
A1
C1
C9
D2
E9
F1
H9
H2
VREFD_U2
VREFC_U2
ZQ2

R1201

243R2F-2-GP

56,57
56,57
56,57

BA0
BA1
BA2

56
56

CLKB1
CLKB1#

56

CKEB1

56
56

DQMB#4
DQMB#5

56
56
56

W EB1#
CASB1#
RASB1#

H1
M8
L8

MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12

1D5V_M92

AFBRAM2

K8
K2
N1
R9
B2
D9
G7
R1
N9

DIS

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

E3
F7
F2
F8
H3
H8
G2
H7

MDB42
MDB41
MDB46
MDB43
MDB44
MDB40
MDB47
MDB45

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

MDB37
MDB35
MDB38
MDB39
MDB34
MDB32
MDB36
MDB33

DQSU
DQSU#

C7
B7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VREFDQ
VREFCA
ZQ

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A15

BA0
BA1
BA2

M2
N8
M3

BA0
BA1
BA2

CLKB1
CLKB1#

J7
K7

CK
CK#

CKEB1

K9

CKE

DQMB#4
DQMB#5

D3
E7

DMU
DML

W EB1#
CASB1#
RASB1#

L3
K3
J3

WE#
CAS#
RAS#

RDQSB4
W DQSB4

DQSL
DQSL#

F3
G3

RDQSB5
W DQSB5

ODT

K1

ODTB1

CS#
RESET#

L2
T2

CSB1#_0

NC#T7
NC#L9
NC#L1
NC#J9
NC#J1

T7
L9
L1
J9
J1

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

DIS

AFBRAM1

K8
K2
N1
R9
B2
D9
G7
R1
N9

RDQSB4
W DQSB4

56
56

DIS

VREFD_U2
VREFC_U2
ZQ4
2

R1202
RDQSB5
W DQSB5

56
56

ODTB1

56

CSB1#_0

56

VRAM_RST

56,57

243R2F-2-GP MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12

56,57
56,57
56,57

G1
F9
E8
E2
D8
D1
B9
B1
G9

BA0
BA1
BA2

56
56

CLKB1
CLKB1#

56

CKEB1

56
56

DQMB#7
DQMB#6

56
56
56

W EB1#
CASB1#
RASB1#

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

H1
M8
L8

VREFDQ
VREFCA
ZQ

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A15

BA0
BA1
BA2

M2
N8
M3

BA0
BA1
BA2

CLKB1
CLKB1#

J7
K7

CK
CK#

CKEB1

K9

CKE

DQMB#7
DQMB#6

D3
E7

DMU
DML

W EB1#
CASB1#
RASB1#

L3
K3
J3

WE#
CAS#
RAS#

56,57 DQMB#[0..7]

DQSU
DQSU#

C7
B7

RDQSB7
W DQSB7

DQSL
DQSL#

F3
G3

RDQSB6
W DQSB6

ODT

K1

ODTB1

CS#
RESET#

L2
T2

CSB1#_0

NC#T7
NC#L9
NC#L1
NC#J9
NC#J1

T7
L9
L1
J9
J1

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

G1
F9
E8
E2
D8
D1
B9
B1
G9

RDQSB7
W DQSB7

56
56

RDQSB6
W DQSB6

56
56

ODTB1

56

CSB1#_0

56

VRAM_RST

56,57

1
2

DIS

C710

DIS

C662

1
2

DIS

C698

C728

UMA

SC10U6D3V3MX-GP

2
1

DIS

C688

SC10U6D3V3MX-GP

DIS

C683

1
2

DIS

C676

C699
SCD47U6D3V2KX-GP

SC10U6D3V3MX-GP

DIS

C672

1
2

DIS

SC10U6D3V3MX-GP

C684 R345

SC1U6D3V2KX-GP

VREFD_U2

R361

DIS

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

Date:
4

Wistron Corporation

Size
A3

DIS

SC1U6D3V2KX-GP

1
2

1
2

DIS

SC1U6D3V2KX-GP

DIS

C671

SC1U6D3V2KX-GP

DIS

C724

SC1U6D3V2KX-GP

R372

SC1U6D3V2KX-GP

DIS

C214
SC1U6D3V2KX-GP

DIS

C163
SC1U6D3V2KX-GP

DIS

C212
SC1U6D3V2KX-GP

DIS

C144
SC1U6D3V2KX-GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

DIS

C660

C716

DIS

DIS

4K99R2F-L-GP

DIS

C663

DIS

VREFC_U2
SCD1U16V2KX-3GP

DIS

C170

MDB[63..0]

R362

DIS

R346
4K99R2F-L-GP

DIS

4K99R2F-L-GP

DIS

MDB61
MDB62
MDB58
MDB56
MDB60
MDB59
MDB57
MDB63

56R2F-1-GP

R373
4K99R2F-L-GP

for TR

C192

D7
C3
C8
C2
A7
A2
B8
A3

CLKB1

1D5V_M92

for TR

56R2F-1-GP

MAB[0..12]

SCD1U16V2KX-3GP

DIS

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

1D5V_M92

for TR

56,57 W DQSB[0..7]

MDB52
MDB50
MDB48
MDB49
MDB53
MDB54
MDB51
MDB55

CLKB1#

56,57 RDQSB[0..7]

1D5V_M92

E3
F7
F2
F8
H3
H8
G2
H7

SAMSUNG 72.41164.H0U
HYUNIX 72.51G63.C0U

56,57 MDB[63..0]

DIS

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

H5TQ1G63BFR-12C-GP

72.51G63.C0U

MAB[0..12]

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

A8
A1
C1
C9
D2
E9
F1
H9
H2

H5TQ1G63BFR-12C-GP

56,57

M92 DDR3 B1
Document Number

Rev

SB

JV71-TR
Monday, July 06, 2009

Sheet
1

58

of

61

1
VOUT

RT8202APQW -GP

VGA_CORE_PW R

8K2R2F-1-GP

Iomax=8A, OCP>12A

1
2

1
2

C826

VGA_CORE_PW R

VGA_CORE_PW R

IND-1D5UH-52-GP

DY

DIS
84.04172.037

4
3
2
1

GAP-CLOSE-PW R-3-GP
G81
1
2

DIS

C843

TC26
SE390U2D5VM-2GP

GAP-CLOSE-PW R-3-GP
G82
1
2
GAP-CLOSE-PW R-3-GP
G84
1
2
GAP-CLOSE-PW R-3-GP
G79
1
2

74.08202.A73

GAP-CLOSE-PW R-3-GP
G75
1
2

2009/06/04 WAYNE

GAP-CLOSE-PW R-3-GP
G83
1
2
GAP-CLOSE-PW R-3-GP
G76
1
2

1
1

C833

2009/04/10 Vout Change 0.9v to 0.95v by John


GAP-CLOSE-PW R-3-GP

RT8202_FB_VGA
R452
59KR2F-GP

R458
110KR2F-L-GP

R451
47KR2F-GP

DIS

DY

DIS

2009/04/10 Vout Change 0.9v to 0.95v By John

DIS

SC47P50V2JN-3GP

Vout=0.75*(1+Rh/Rl)
R459
16KR2F-GP

79.3971V.6AL
2ND = 77.93971.02L

RT8202_DL_VGA

DIS

GAP-CLOSE-PW R-3-GP
G80
1
2

68.1R51A.10E
2ND = 68.1R510.10J

VCC_GFX_CORE

G77
GAP-CLOSE-PW R-3-GP
G78
1
2

DIS

DIS

C828

L50

U52
SI4172DY-T1-GE3-GP

RT8202_LX_VGA

DIS

10
3

RT8202_OC_VGA_L 1
RT8202_FB_VGA

DIS

RT8202_LX_VGA

RT8202_BST_VGA_L
1
2
RT8202_DH_VGA
1R2F-GP
RT8202_LX_VGA
RT8202_DL_VGA
R455

5
6
7
8

13
12
11
8

OC
FB

DIS

NC#5
NC#14

5
6
7
8

1
2

VDDP

BOOT
UGATE
PHASE
LGATE

C835
SCD1U25V3KX-GP

GND
GND

5
14

PGND

R625 DY
1
2
0R2J-2-GP

DY

for TR

C846

17
6

DIS

43,48,60 VGA_PW R_EN

EN/DEM

SCD1U25V3ZY-1GP

PM_SLP_S3#

15

R460

S
S
S
G

12,34,35,41,43,48,60

DY CH551H-30PT-GP
R577
1
2
0R2J-2-GP

RT8202_EN_VGA

83.R5003.C8F
2ND = 83.R5003.H8H

TON
PGOOD

2RT8202_LX_VGA
RT8202_DH_VGA

DIS

C823

SC1U10V3KX-3GP

2
D38

PM_SLP_S3#

RT8202_PGOOD_VGA

16
4

DIS
1

D
D
D
D

12,34,35,41,43,48,60

VDD

0R0402-PAD-1-GP

4
3
2
1

2
1

1
2
1

U55

DY

C827
SC100P50V2JN-3GP

C830
SC1U10V3ZY-6GP

DIS

DIS

SCD1U50V3KX-GP

DIS

SI4800BDY-T1

84.04800.D37

C824

SC4D7U25V5KX-GP

DIS

DIS

SC4D7U25V5KX-GP

C842
SC1KP50V2KX-1GP

U51

83.00521.01F

S
S
S
G

DIS

5V_S5

SC4D7U25V5KX-GP

RT8202_TON_VGA

D28
CH521S-30-GP-U1

D
D
D
D

DIS

C831
SC1U10V3ZY-6GP

DIS

R450
11,48 RT8202_PGOOD_VGA

DCBATOUT_8202_VGA

RT8202_BST_VGA

R449
10KR2F-2-GP

DY

5V_S5

RT8202_VDD_VGA

GAP-CLOSE-PW R-3-GP
DCBATOUT_8202_VGA
3D3V_S0
1 R461
2
1MR2F-GP

79.10712.L02
2ND = 79.10112.3JL
3RD = 79.10712.6JL

R454
10R2F-L-GP

DIS

GAP-CLOSE-PW R-3-GP
G145
1
2

DIS
2

5V_S5

GAP-CLOSE-PW R-3-GP
G144
1
2

SE100U25VM-L1-GP

GAP-CLOSE-PW R-3-GP
G143
1
2

TC30

DCBATOUT_8202_VGA
G142
2

DCBATOUT

DY

Q25

for TR DIS

84.2N702.B3K
2ND = 84.2N702.C3K

.
. .
.

2N7002EW -GP
R463

3D3V_S0

NV_VID1

.
. .
.
G

DY

2
12

MXM_PW R_EN

MXM_PW R_EN

1 R624
2MXM_PW R_EN_1
0R2J-2-GP

PW RCNTL_0 53

10KR2J-3-GP

C848
SCD1U10V2KX-4GP

DIS

C829
SCD1U10V2KX-4GP

2
VGA_PW R_EN

VGA_PW R_EN 43,48,60

DY

83.00056.Q11
2

DY

BAW 56-5-GP

C978
SC1U6D3V2KX-GP

PE_GPIO1

R453

DY

DY

11,43 PE_GPIO1

DIS
NV_VID0

PW RCNTL_1 53

10KR2J-3-GP

1
100KR2J-1-GP
R623

DY D37

84.2N702.B3K
2ND = 84.2N702.C3K
2N7002EW -GP

2009/04/10 FOLLW SJM50-TR

DIS

Q26

2ND = 83.00056.G11
A

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

RT8202A_VGA CORE

Document Number

Rev

SA

JV71-TR
Monday, July 06, 2009

Sheet
1

59

of

61

DCBATOUT

DCBATOUT_51117_1D5V

DCBATOUT_51117_1D5V

G136

DY

20081128
1

5912_EN_U87
1
R1212 2
51117_TON
1
2
DY 249KR2F-GP 51117_TRIP1 11

12

DY

EN/DEM
TON
CS

VOUT
PGOOD
GND
PGND
NC#15

3
6
7
8
15

1
2

DY

GAP-CLOSE-PW R-3-GP
G139
1
2

TC38
SE220U6D3VM-8GP

1
2

1
R1210
47KR2F-GP

GAP-CLOSE-PW R-3-GP
G140
1
2
GAP-CLOSE-PW R-3-GP
G141
1
2
GAP-CLOSE-PW R-3-GP

FB
BOOT

51117_DRVH_1

1
2
3D3R2F-GP

PHASE

51117_LL

DY

51117_DRVH
51117_DRVL

UGATE
LGATE

1
2

51117_1D8V_VFB

G
S
S
S

5
14

13
9

VDD
VDDP

5
6
7
8
D
D
D
D

R1208
47KR2F-GP

4
3
2
1

2
1
2

1
2

4
10

2ND = 83.R5003.H8H
3RD = 83.5R003.08F

R1209

U86

DY
C966

DY

DY

DY

DY

DY

DY

C967

79.22710.E0L
2ND = 79.22710.6AL

U85
SI4800BDY-T1

SCD1U16V2KX-3GP

DY

51117_1D8V_VFB
51117_VBST

C969

SC1U10V3KX-3GP

C970
SC1U10V2KX-1GP
D36
CH551H-30PT-GP
83.R5003.C8F

C968
1

51117_VBST_1 2

1
2
3D3R2F-GP
51117_V5FILT

DY

IND-5D6UH-45-GP

1D5V_M92
G138

Vo(cal)=1.8046V

SCD1U10V2KX-4GP

DY

1D5V_VRAM

1D5V_VRAM

DY

SC18P50V2JN-1-GP

5V_S5

DY

84.04800.D37
R1207

Iomax=3A
OCP>6A
L57

DY

DY

1
R1206
300R3F-GP

DY

5V_S5

C965
SC1U10V2KX-1GP

1
2

5
6
7
8

Id=5A
Qg=8.7~13nC,
Rdson=23~30mohm

DY

C964

G
S
S
S

79.10712.L02
2ND = 79.10112.3JL
3RD = 79.10712.6JL

D
D
D
D

U84
SI4800BDY-T1

C963

4
3
2
1

GAP-CLOSE-PW R-3-GP

C962

SCD1U50V3KX-GP

SE100U25VM-L1-GP

84.04800.D37

SC10U25V6KX-1GP

GAP-CLOSE-PW R-3-GP
G137
1
2

TC39

DY

SC10U25V6KX-1GP

1D5V_PGOOD 1

1D8V_PW R
3D3V_S0

2
R1213

Id=5A
Qg=8.7~13nC,
Rdson=23~30mohm

10KR2J-3-GP

DY

RT8209BGQW -GP
R1214
16KR2F-GP

DY

20090108_SB Wayne

1D5V_S0
Iomax=3.16A
OCP>6A

1D8V_S3

3D3V_S0

C973 DIS
SC10U6D3V3MX-GP

R1215

C972 DIS
SC10U6D3V3MX-GP

1
C971
SC1U16V3KX-2GP

DIS

10KR2J-3-GP

5V_S5

EN

R1216
PM_SLP_S3#

2
0R2J-2-GP DIS

VIN
VIN

5
9

VOUT
DIS VOUT

3
4

Vo(cal.)=1.5096V

12,34,35,41,43,48,59

5912_EN_U87

SO-8-P

2
0R2J-2-GP

9025_POK

R1217
26K7R3F-GP

DY
74.05912.A71
2ND = 74.G9731.03D

2009/04/09

DIS

C977
SC1U6D3V2KX-GP

R1218
30K1R3F-GP

DIS

DIS
C974

DIS

DIS

C975

C976

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Vo=0.8*(1+(R1/R2))
Title
Size
A3
Date:

48

DIS

GND
APL5912-KAC-GP

R1223
A

2
0R2J-2-GP

5912_FB

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

43,48,59 VGA_PW R_EN

FB

SC47P50V2JN-3GP

DY R1219

1D5V_VRAM

POK

U87
1D5V_PGOOD

2
0R2J-2-GP

1D5V_POK

43

VCNTL

DY
R1224

DY

RT8209B/APL5912_1D5V_ VRAM
Document Number

Rev

JV71-TR
Monday, July 06, 2009

SA

Sheet
1

60

of

61

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

HISTORY
Size

Document Number

A3
Date:
5

Rev

SA

JV71-TR
Monday, July 06, 2009

Sheet
1

61

of

61

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